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JTAG.sch
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JTAG.sch
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EESchema Schematic File Version 4
EELAYER 30 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 24 25
Title "Marble-Mini"
Date "2020-09-25"
Rev "v1.1"
Comp "Michał Gąska / WUT"
Comment1 ""
Comment2 ""
Comment3 "JTAG "
Comment4 ""
$EndDescr
Text Label 10050 1550 0 50 ~ 10
USB_TCK
Text Label 10050 1650 0 50 ~ 10
USB_TDI_DO
Text Label 10050 1750 0 50 ~ 10
USB_TMS
Text Label 10050 1850 0 50 ~ 10
USB_TDO_DI
Text Label 10050 2750 0 50 ~ 10
FMC1_TCK
Text Label 10050 2850 0 50 ~ 10
FMC1_TDI
Text Label 10050 2950 0 50 ~ 10
FMC1_TDO
Text Label 10050 3050 0 50 ~ 10
FMC1_TMS
Text Label 10050 3150 0 50 ~ 10
FMC1_TRST
Wire Wire Line
10050 2750 10500 2750
Wire Wire Line
10050 3050 10500 3050
Wire Wire Line
10050 3150 10500 3150
Text Label 10050 3350 0 50 ~ 10
FMC2_TCK
Text Label 10050 3450 0 50 ~ 10
FMC2_TDI
Text Label 10050 3550 0 50 ~ 10
FMC2_TDO
Text Label 10050 3650 0 50 ~ 10
FMC2_TMS
Text Label 10050 3750 0 50 ~ 10
FMC2_TRST
Wire Wire Line
10050 3350 10500 3350
Wire Wire Line
10050 3650 10500 3650
Wire Wire Line
10050 3750 10500 3750
Text Label 10050 4050 0 50 ~ 10
FPGA_TDI
Text Label 10050 4150 0 50 ~ 10
FPGA_TDO
Text Label 10050 4250 0 50 ~ 10
FPGA_TMS
Text Label 10050 4350 0 50 ~ 10
FPGA_TCK
Text HLabel 10500 4050 2 50 Output ~ 10
FPGA_TDI
Text HLabel 10500 4150 2 50 Input ~ 10
FPGA_TDO
Text HLabel 10500 4250 2 50 Output ~ 10
FPGA_TMS
Text HLabel 10500 4350 2 50 Output ~ 10
FPGA_TCK
Wire Wire Line
10050 4050 10500 4050
Wire Wire Line
10050 4250 10500 4250
Wire Wire Line
10050 4350 10500 4350
Text HLabel 10500 3350 2 50 Output ~ 10
FMC2_TCK
Text HLabel 10500 3450 2 50 Output ~ 10
FMC2_TDI
Text HLabel 10500 3550 2 50 Input ~ 10
FMC2_TDO
Text HLabel 10500 3650 2 50 Output ~ 10
FMC2_TMS
Text HLabel 10500 3750 2 50 Output ~ 10
FMC2_TRST
Text HLabel 10500 2750 2 50 Output ~ 10
FMC1_TCK
Text HLabel 10500 2850 2 50 Output ~ 10
FMC1_TDI
Text HLabel 10500 2950 2 50 Input ~ 10
FMC1_TDO
Text HLabel 10500 3050 2 50 Output ~ 10
FMC1_TMS
Text HLabel 10500 3150 2 50 Output ~ 10
FMC1_TRST
Text HLabel 10500 1550 2 50 Input ~ 10
USB_TCK
Text HLabel 10500 1650 2 50 Output ~ 10
USB_TDI_DO
Text HLabel 10500 1750 2 50 Input ~ 10
USB_TMS
Text HLabel 10500 1850 2 50 Input ~ 10
USB_TDO_DI
Wire Wire Line
10050 4150 10500 4150
$Comp
L marble_misc:MOLEX_87831-1420-MOLEX J11
U 1 1 5CB763C1
P 4200 4700
F 0 "J11" H 4244 4773 50 0000 C CNN
F 1 "MOLEX_87831-1420" H 4200 3110 60 0001 L CNN
F 2 "Marble:MOLEX_87831-1420" H 4200 2300 60 0001 L CNN
F 3 "" H 4200 2930 60 0001 L CNN
F 4 "Milli-Grid™" H 4200 2840 60 0001 L CNN "Pole4"
F 5 "MOLEX_87831-1420" H 4200 2840 60 0001 L CNN "Part Number"
F 6 "Connector 14 Male" H 4200 2750 60 0001 L CNN "Library Ref"
F 7 "SchLib\\Connectors.SchLib" H 4200 2660 60 0001 L CNN "Library Path"
F 8 " " H 4200 2570 60 0001 L CNN "Comment"
F 9 "Standard" H 4200 2480 60 0001 L CNN "Component Kind"
F 10 "Standard" H 4200 2390 60 0001 L CNN "Component Type"
F 11 " " H 4200 2210 60 0001 L CNN "PackageDescription"
F 12 "14" H 4200 2120 60 0001 L CNN "Pin Count"
F 13 " " H 4200 2030 60 0001 L CNN "Case"
F 14 "PcbLib\\MOLEX THD.PcbLib" H 4200 1940 60 0001 L CNN "Footprint Path"
F 15 "MOLEX_87831-1420" H 4200 1850 60 0001 L CNN "Footprint Ref"
F 16 "Milli-Grid™" H 4200 1760 60 0001 L CNN "Family"
F 17 "Yes" H 4200 1670 60 0001 L CNN "Mounted"
F 18 "No" H 4200 1580 60 0001 L CNN "Socket"
F 19 "No" H 4200 1490 60 0001 L CNN "SMD"
F 20 "No" H 4200 1400 60 0001 L CNN "PressFit"
F 21 "No" H 4200 1310 60 0001 L CNN "Sense"
F 22 " " H 4200 1220 60 0001 L CNN "Sense Comment"
F 23 "None" H 4200 1130 60 0001 L CNN "Status"
F 24 " " H 4200 1040 60 0001 L CNN "Status Comment"
F 25 " " H 4200 860 60 0001 L CNN "Device"
F 26 "2.00mm (.079\") Pitch Milli-Grid™ Header, Vertical, Shrouded, Center Polarization Slot, Locking Window, 14 Circuits" H 4200 770 60 0001 L CNN "Part Description"
F 27 "MOLEX" H 4200 680 60 0001 L CNN "Manufacturer"
F 28 "87831-1420" H 4200 590 60 0001 L CNN "Manufacturer Part Number"
F 29 "6.4mm" H 4200 500 60 0001 L CNN "ComponentHeight"
F 30 " " H 4200 230 60 0001 L CNN "ComponentLink1Description"
F 31 " " H 4200 50 60 0001 L CNN "ComponentLink2Description"
F 32 "CERN DEM JLC" H 4200 -40 60 0001 L CNN "Author"
F 33 "04/13/10 00:00:00" H 4200 -130 60 0001 L CNN "CreateDate"
F 34 "04/13/10 00:00:00" H 4200 -220 60 0001 L CNN "LatestRevisionDate"
F 35 "MOLEX THD" H 4200 -310 60 0001 L CNN "Library Name"
F 36 "This work is licensed under the Creative Commons CC-BY-SA 4.0 License. To the extent that circuit schematics that use Licensed Material can be considered to be ‘Adapted Material’, then the copyright holder waives article 3.b of the license with respect to these schematics." H 4200 -400 60 0001 L CNN "License"
1 4200 4700
-1 0 0 -1
$EndComp
NoConn ~ 4400 6100
NoConn ~ 4400 5900
Wire Wire Line
4400 4800 4550 4800
Wire Wire Line
4550 4800 4550 5000
Wire Wire Line
4400 5000 4550 5000
Connection ~ 4550 5000
Wire Wire Line
4550 5000 4550 5200
Wire Wire Line
4400 5200 4550 5200
Connection ~ 4550 5200
Wire Wire Line
4550 5200 4550 5400
Wire Wire Line
4400 5400 4550 5400
Connection ~ 4550 5400
Wire Wire Line
4550 5400 4550 5600
Wire Wire Line
4400 5600 4550 5600
Connection ~ 4550 5600
Wire Wire Line
4400 5800 4550 5800
Wire Wire Line
4550 5600 4550 5800
Wire Wire Line
4400 6000 4750 6000
Text Label 4700 5100 0 50 ~ 10
JTAG_TMS
Text Label 4700 5300 0 50 ~ 10
JTAG_TCK
Text Label 4700 5500 0 50 ~ 10
JTAG_TDO
Text Label 4700 5700 0 50 ~ 10
JTAG_TDI
Wire Wire Line
5050 5100 4400 5100
Wire Wire Line
5050 5300 4400 5300
Wire Wire Line
5050 5500 4400 5500
Wire Wire Line
5050 5700 4400 5700
$Comp
L power:GND #PWR?
U 1 1 5D14D5F8
P 5450 6400
AR Path="/5C16C03C/5D14D5F8" Ref="#PWR?" Part="1"
AR Path="/5CA40231/5D14D5F8" Ref="#PWR0371" Part="1"
F 0 "#PWR0371" H 5450 6150 50 0001 C CNN
F 1 "GND" H 5455 6227 50 0000 C CNN
F 2 "" H 5450 6400 50 0001 C CNN
F 3 "" H 5450 6400 50 0001 C CNN
1 5450 6400
1 0 0 -1
$EndComp
$Comp
L power:+2V5 #PWR?
U 1 1 5D14D5FE
P 5450 5650
AR Path="/5BABAC65/5D14D5FE" Ref="#PWR?" Part="1"
AR Path="/5CC24E97/5D14D5FE" Ref="#PWR?" Part="1"
AR Path="/5CC393D3/5D14D5FE" Ref="#PWR?" Part="1"
AR Path="/5CC6DBF7/5D14D5FE" Ref="#PWR?" Part="1"
AR Path="/5CC8AFE1/5D14D5FE" Ref="#PWR?" Part="1"
AR Path="/5C16C03C/5D14D5FE" Ref="#PWR?" Part="1"
AR Path="/5CA40231/5D14D5FE" Ref="#PWR0372" Part="1"
F 0 "#PWR0372" H 5450 5500 50 0001 C CNN
F 1 "+2V5" H 5465 5823 50 0000 C CNN
F 2 "" H 5450 5650 50 0001 C CNN
F 3 "" H 5450 5650 50 0001 C CNN
1 5450 5650
1 0 0 -1
$EndComp
$Comp
L power:GND #PWR?
U 1 1 5D14E3EE
P 4550 6150
AR Path="/5C16C03C/5D14E3EE" Ref="#PWR?" Part="1"
AR Path="/5CA40231/5D14E3EE" Ref="#PWR0370" Part="1"
F 0 "#PWR0370" H 4550 5900 50 0001 C CNN
F 1 "GND" H 4555 5977 50 0000 C CNN
F 2 "" H 4550 6150 50 0001 C CNN
F 3 "" H 4550 6150 50 0001 C CNN
1 4550 6150
1 0 0 -1
$EndComp
Wire Wire Line
5450 6300 5450 6400
Wire Wire Line
5450 5650 5450 5700
Text HLabel 5800 6000 2 50 Output ~ 10
EN_CON_JTAG
Text HLabel 10500 950 2 50 Input ~ 10
Self_FPGA_TMS
Text HLabel 10500 1050 2 50 Output ~ 10
Self_FPGA_TDO
Text HLabel 10500 1150 2 50 Input ~ 10
Self_FPGA_TDI
Text HLabel 10500 1250 2 50 Input ~ 10
Self_FPGA_TCK
Wire Wire Line
2100 1250 2050 1250
Wire Wire Line
2050 1250 2050 1150
Wire Wire Line
2100 1150 2050 1150
Connection ~ 2050 1150
Wire Wire Line
2050 1150 2050 1100
$Comp
L power:GND #PWR?
U 1 1 5E92E32C
P 2300 2600
AR Path="/5C16C03C/5E92E32C" Ref="#PWR?" Part="1"
AR Path="/5CA40231/5E92E32C" Ref="#PWR0569" Part="1"
F 0 "#PWR0569" H 2300 2350 50 0001 C CNN
F 1 "GND" H 2305 2427 50 0000 C CNN
F 2 "" H 2300 2600 50 0001 C CNN
F 3 "" H 2300 2600 50 0001 C CNN
1 2300 2600
1 0 0 -1
$EndComp
$Comp
L power:GND #PWR?
U 1 1 5E92E33A
P 2750 2600
AR Path="/5C16C03C/5E92E33A" Ref="#PWR?" Part="1"
AR Path="/5CA40231/5E92E33A" Ref="#PWR0573" Part="1"
F 0 "#PWR0573" H 2750 2350 50 0001 C CNN
F 1 "GND" H 2755 2427 50 0000 C CNN
F 2 "" H 2750 2600 50 0001 C CNN
F 3 "" H 2750 2600 50 0001 C CNN
1 2750 2600
1 0 0 -1
$EndComp
Wire Wire Line
2050 1850 2100 1850
$Comp
L power:GND #PWR?
U 1 1 5E92E35A
P 3100 2000
AR Path="/5C16C03C/5E92E35A" Ref="#PWR?" Part="1"
AR Path="/5CA40231/5E92E35A" Ref="#PWR0576" Part="1"
F 0 "#PWR0576" H 3100 1750 50 0001 C CNN
F 1 "GND" H 3105 1827 50 0000 C CNN
F 2 "" H 3100 2000 50 0001 C CNN
F 3 "" H 3100 2000 50 0001 C CNN
1 3100 2000
1 0 0 -1
$EndComp
Wire Wire Line
3100 1950 3100 2000
Wire Wire Line
1000 1550 2100 1550
Wire Wire Line
2100 3100 2050 3100
Wire Wire Line
2050 3100 2050 3050
$Comp
L power:GND #PWR?
U 1 1 5E92E384
P 2300 4550
AR Path="/5C16C03C/5E92E384" Ref="#PWR?" Part="1"
AR Path="/5CA40231/5E92E384" Ref="#PWR0571" Part="1"
F 0 "#PWR0571" H 2300 4300 50 0001 C CNN
F 1 "GND" H 2305 4377 50 0000 C CNN
F 2 "" H 2300 4550 50 0001 C CNN
F 3 "" H 2300 4550 50 0001 C CNN
1 2300 4550
1 0 0 -1
$EndComp
$Comp
L power:GND #PWR?
U 1 1 5E92E392
P 2750 4550
AR Path="/5C16C03C/5E92E392" Ref="#PWR?" Part="1"
AR Path="/5CA40231/5E92E392" Ref="#PWR0575" Part="1"
F 0 "#PWR0575" H 2750 4300 50 0001 C CNN
F 1 "GND" H 2755 4377 50 0000 C CNN
F 2 "" H 2750 4550 50 0001 C CNN
F 3 "" H 2750 4550 50 0001 C CNN
1 2750 4550
1 0 0 -1
$EndComp
Wire Wire Line
2050 3800 2100 3800
$Comp
L power:GND #PWR?
U 1 1 5E92E3B2
P 3100 3950
AR Path="/5C16C03C/5E92E3B2" Ref="#PWR?" Part="1"
AR Path="/5CA40231/5E92E3B2" Ref="#PWR0577" Part="1"
F 0 "#PWR0577" H 3100 3700 50 0001 C CNN
F 1 "GND" H 3105 3777 50 0000 C CNN
F 2 "" H 3100 3950 50 0001 C CNN
F 3 "" H 3100 3950 50 0001 C CNN
1 3100 3950
1 0 0 -1
$EndComp
Wire Wire Line
3100 3900 3100 3950
Wire Wire Line
2100 3300 1750 3300
$Comp
L power:GND #PWR?
U 1 1 5E92E3BC
P 2050 3200
AR Path="/5C16C03C/5E92E3BC" Ref="#PWR?" Part="1"
AR Path="/5CA40231/5E92E3BC" Ref="#PWR0566" Part="1"
F 0 "#PWR0566" H 2050 2950 50 0001 C CNN
F 1 "GND" V 2055 3027 50 0000 C CNN
F 2 "" H 2050 3200 50 0001 C CNN
F 3 "" H 2050 3200 50 0001 C CNN
1 2050 3200
0 1 1 0
$EndComp
Wire Wire Line
2050 3200 2100 3200
Wire Wire Line
1000 3600 2100 3600
Text Label 3350 1550 0 50 ~ 10
JTAG_TCK
Text Label 3350 3500 0 50 ~ 10
JTAG_TMS
Text Label 1000 3500 0 50 ~ 10
Self_FPGA_TMS
Text Label 1000 3600 0 50 ~ 10
Self_FPGA_TDO
Text Label 1000 1650 0 50 ~ 10
Self_FPGA_TDI
Text Label 1000 1550 0 50 ~ 10
Self_FPGA_TCK
Wire Wire Line
1000 3500 2100 3500
Wire Wire Line
1000 1650 2100 1650
$Comp
L power:+3V3 #PWR?
U 1 1 5E96069B
P 2300 2300
AR Path="/5BD32060/5E96069B" Ref="#PWR?" Part="1"
AR Path="/5C907554/5C417BCB/5E96069B" Ref="#PWR?" Part="1"
AR Path="/5C907554/5E96069B" Ref="#PWR?" Part="1"
AR Path="/5C907554/5CAAC367/5E96069B" Ref="#PWR?" Part="1"
AR Path="/5CA40231/5E96069B" Ref="#PWR0568" Part="1"
F 0 "#PWR0568" H 2300 2150 50 0001 C CNN
F 1 "+3V3" H 2315 2473 50 0000 C CNN
F 2 "" H 2300 2300 50 0001 C CNN
F 3 "" H 2300 2300 50 0001 C CNN
1 2300 2300
1 0 0 -1
$EndComp
$Comp
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L power:+3V3 #PWR?
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AR Path="/5BD32060/5E977E1E" Ref="#PWR?" Part="1"
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L power:+3V3 #PWR?
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L power:+3V3 #PWR?
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AR Path="/5BD32060/5E987CEB" Ref="#PWR?" Part="1"
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Wire Wire Line
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output\n
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input
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FPGA_TMS
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$Comp
L power:GND #PWR?
U 1 1 5E0F6571
P 1750 6050
AR Path="/5C16C03C/5E0F6571" Ref="#PWR?" Part="1"
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F 0 "#PWR0586" H 1750 5800 50 0001 C CNN
F 1 "GND" H 1755 5877 50 0000 C CNN
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Text Label 4600 6000 0 50 ~ 10
EN_CON_JTAG
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L marble_misc:NC7SZ66P5X-Standard_Logic U7
U 1 1 5E17EE5A
P 7600 1850
F 0 "U7" H 7900 2015 50 0000 C CNN
F 1 "NC7SZ66P5X" H 7900 1924 50 0000 C CNN
F 2 "Marble:SOT65P210X110-5N" H 7600 360 60 0001 L CNN
F 3 "\\\\cern.ch\\dfs\\Applications\\Altium\\Datasheets\\NC7SZ66P5X.pdf" H 7600 1080 60 0001 L CNN
F 4 "NC7SZ66P5X" H 7600 990 60 0001 L CNN "Part Number"
F 5 "NC7SZ66P5X" H 7600 900 60 0001 L CNN "Library Ref"
F 6 "SchLib\\Standard Logic.SchLib" H 7600 810 60 0001 L CNN "Library Path"
F 7 "=Device" H 7600 720 60 0001 L CNN "Comment"
F 8 "Standard" H 7600 630 60 0001 L CNN "Component Kind"
F 9 "Standard" H 7600 540 60 0001 L CNN "Component Type"
F 10 "NC7SZ66P5X" H 7600 450 60 0001 L CNN "Device"
F 11 "SOT353, SC70-5, SOT, 0.65mm Pitch, 5 pin, 1.25mm W X 2.00mm L X 1.10mm H, IPC Medium Density" H 7600 270 60 0001 L CNN "PackageDescription"
F 12 " " H 7600 180 60 0001 L CNN "Status"
F 13 "Low Voltage Single SPST Normally Open Bus Switch" H 7600 90 60 0001 L CNN "Part Description"
F 14 "FAIRCHILD SEMICONDUCTOR" H 7600 0 60 0001 L CNN "Manufacturer"
F 15 "NC7SZ66P5X" H 7600 -90 60 0001 L CNN "Manufacturer Part Number"
F 16 "5" H 7600 -180 60 0001 L CNN "Pin Count"
F 17 "SOT353" H 7600 -270 60 0001 L CNN "Case"
F 18 "Yes" H 7600 -360 60 0001 L CNN "Mounted"
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F 20 "Yes" H 7600 -540 60 0001 L CNN "SMD"
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F 22 "No" H 7600 -720 60 0001 L CNN "Sense"
F 23 " " H 7600 -810 60 0001 L CNN "Sense Comment"
F 24 "No" H 7600 -900 60 0001 L CNN "Bonding"
F 25 " " H 7600 -990 60 0001 L CNN "Status Comment"
F 26 "1.1mm" H 7600 -1080 60 0001 L CNN "ComponentHeight"
F 27 "PcbLib\\ICs And Semiconductors SMD.PcbLib" H 7600 -1170 60 0001 L CNN "Footprint Path"
F 28 "SOT65P210X110-5N" H 7600 -1260 60 0001 L CNN "Footprint Ref"
F 29 "CERN DEM JLC" H 7600 -1350 60 0001 L CNN "Author"
F 30 " " H 7600 -1620 60 0001 L CNN "ComponentLink1Description"
F 31 " " H 7600 -1800 60 0001 L CNN "ComponentLink2Description"
F 32 "07/07/14 00:00:00" H 7600 -1890 60 0001 L CNN "CreateDate"
F 33 "07/07/14 00:00:00" H 7600 -1980 60 0001 L CNN "LatestRevisionDate"
F 34 "ICs And Semiconductors SMD" H 7600 -2070 60 0001 L CNN "Library Name"
F 35 "This work is licensed under the Creative Commons CC-BY-SA 4.0 License. To the extent that circuit schematics that use Licensed Material can be considered to be ‘Adapted Material’, then the copyright holder waives article 3.b of the license with respect to these schematics." H 7600 -2160 60 0001 L CNN "License"
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$Comp
L marble_misc:NC7SZ66P5X-Standard_Logic U10
U 1 1 5E17F12A
P 5200 1850
F 0 "U10" H 5500 2015 50 0000 C CNN
F 1 "NC7SZ66P5X" H 5500 1924 50 0000 C CNN
F 2 "Marble:SOT65P210X110-5N" H 5200 360 60 0001 L CNN
F 3 "\\\\cern.ch\\dfs\\Applications\\Altium\\Datasheets\\NC7SZ66P5X.pdf" H 5200 1080 60 0001 L CNN
F 4 "NC7SZ66P5X" H 5200 990 60 0001 L CNN "Part Number"
F 5 "NC7SZ66P5X" H 5200 900 60 0001 L CNN "Library Ref"
F 6 "SchLib\\Standard Logic.SchLib" H 5200 810 60 0001 L CNN "Library Path"
F 7 "=Device" H 5200 720 60 0001 L CNN "Comment"
F 8 "Standard" H 5200 630 60 0001 L CNN "Component Kind"
F 9 "Standard" H 5200 540 60 0001 L CNN "Component Type"
F 10 "NC7SZ66P5X" H 5200 450 60 0001 L CNN "Device"
F 11 "SOT353, SC70-5, SOT, 0.65mm Pitch, 5 pin, 1.25mm W X 2.00mm L X 1.10mm H, IPC Medium Density" H 5200 270 60 0001 L CNN "PackageDescription"
F 12 " " H 5200 180 60 0001 L CNN "Status"
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F 14 "FAIRCHILD SEMICONDUCTOR" H 5200 0 60 0001 L CNN "Manufacturer"
F 15 "NC7SZ66P5X" H 5200 -90 60 0001 L CNN "Manufacturer Part Number"
F 16 "5" H 5200 -180 60 0001 L CNN "Pin Count"
F 17 "SOT353" H 5200 -270 60 0001 L CNN "Case"
F 18 "Yes" H 5200 -360 60 0001 L CNN "Mounted"
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F 20 "Yes" H 5200 -540 60 0001 L CNN "SMD"
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F 27 "PcbLib\\ICs And Semiconductors SMD.PcbLib" H 5200 -1170 60 0001 L CNN "Footprint Path"
F 28 "SOT65P210X110-5N" H 5200 -1260 60 0001 L CNN "Footprint Ref"
F 29 "CERN DEM JLC" H 5200 -1350 60 0001 L CNN "Author"
F 30 " " H 5200 -1620 60 0001 L CNN "ComponentLink1Description"
F 31 " " H 5200 -1800 60 0001 L CNN "ComponentLink2Description"
F 32 "07/07/14 00:00:00" H 5200 -1890 60 0001 L CNN "CreateDate"
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F 34 "ICs And Semiconductors SMD" H 5200 -2070 60 0001 L CNN "Library Name"
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$EndComp
$Comp
L power:+2V5 #PWR?
U 1 1 5E19D3B4
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AR Path="/5BABAC65/5E19D3B4" Ref="#PWR?" Part="1"
AR Path="/5CC24E97/5E19D3B4" Ref="#PWR?" Part="1"
AR Path="/5CC393D3/5E19D3B4" Ref="#PWR?" Part="1"
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F 0 "#PWR0585" H 2050 3750 50 0001 C CNN
F 1 "+2V5" V 2050 4100 50 0000 C CNN
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1 2050 3900
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$Comp
L power:+2V5 #PWR?
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AR Path="/5BABAC65/5E19F8E8" Ref="#PWR?" Part="1"
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F 0 "#PWR0584" H 2050 1800 50 0001 C CNN
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0 -1 -1 0
$EndComp
Wire Wire Line
2050 1950 2100 1950
Wire Wire Line
2050 3900 2100 3900
$Comp
L Resistors_SMD:R0402_0R_JUMPER R?
U 1 1 5E1A9A5B
P 7050 4850
AR Path="/5C16BF8E/5DB9B7E6/5E1A9A5B" Ref="R?" Part="1"
AR Path="/5CA40231/5E1A9A5B" Ref="R215" Part="1"
F 0 "R215" H 7400 4800 50 0000 C CNN
F 1 "R0402_0R_JUMPER" H 7050 4640 60 0001 L CNN
F 2 "Marble:RESC1005X40N" H 7050 3830 60 0001 L CNN
F 3 "\\\\cern.ch\\dfs\\Applications\\Altium\\Datasheets\\R0402_Phycomp_RC0402.pdf" H 7050 4460 60 0001 L CNN
F 4 "0" H 7050 4800 50 0000 C CNN "Val"
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F 14 "RESC1005X40N" H 7050 3470 60 0001 L CNN "Footprint Ref"
F 15 "Not Recommended" H 7050 3290 60 0001 L CNN "Status"
F 16 " " H 7050 3200 60 0001 L CNN "Power"
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F 21 "GENERIC" H 7050 2750 60 0001 L CNN "Manufacturer"
F 22 "R0402_0R_JUMPER" H 7050 2660 60 0001 L CNN "Manufacturer Part Number"
F 23 "0402" H 7050 2570 60 0001 L CNN "Case"
F 24 "No" H 7050 2480 60 0001 L CNN "PressFit"
F 25 "Yes" H 7050 2390 60 0001 L CNN "Mounted"
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F 31 " " H 7050 1850 60 0001 L CNN "ComponentHeight"
F 32 "YAGEO PHYCOMP" H 7050 1760 60 0001 L CNN "Manufacturer1 Example"
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F 35 "CERN DEM JLC" H 7050 1400 60 0001 L CNN "Author"
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F 38 "Resistors SMD" H 7050 1130 60 0001 L CNN "Library Name"
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1 7050 4850
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$EndComp
$Comp
L Resistors_SMD:R0402_0R_JUMPER R?
U 1 1 5E1AC264
P 7050 4950
AR Path="/5C16BF8E/5DB9B7E6/5E1AC264" Ref="R?" Part="1"
AR Path="/5CA40231/5E1AC264" Ref="R216" Part="1"
F 0 "R216" H 7400 4900 50 0000 C CNN
F 1 "R0402_0R_JUMPER" H 7050 4740 60 0001 L CNN
F 2 "Marble:RESC1005X40N" H 7050 3930 60 0001 L CNN
F 3 "\\\\cern.ch\\dfs\\Applications\\Altium\\Datasheets\\R0402_Phycomp_RC0402.pdf" H 7050 4560 60 0001 L CNN
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F 10 "Standard" H 7050 4020 60 0001 L CNN "Component Type"
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F 20 "1A (0.05R Max DC Resistance) Zero Ohm Jumper" H 7050 2940 60 0001 L CNN "Part Description"
F 21 "GENERIC" H 7050 2850 60 0001 L CNN "Manufacturer"
F 22 "R0402_0R_JUMPER" H 7050 2760 60 0001 L CNN "Manufacturer Part Number"
F 23 "0402" H 7050 2670 60 0001 L CNN "Case"
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F 25 "Yes" H 7050 2490 60 0001 L CNN "Mounted"
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F 31 " " H 7050 1950 60 0001 L CNN "ComponentHeight"
F 32 "YAGEO PHYCOMP" H 7050 1860 60 0001 L CNN "Manufacturer1 Example"
F 33 "232270591001L" H 7050 1770 60 0001 L CNN "Manufacturer1 Part Number"
F 34 "0.4mm" H 7050 1680 60 0001 L CNN "Manufacturer1 ComponentHeight"
F 35 "CERN DEM JLC" H 7050 1500 60 0001 L CNN "Author"
F 36 "12/03/07 00:00:00" H 7050 1410 60 0001 L CNN "CreateDate"
F 37 "10/17/12 00:00:00" H 7050 1320 60 0001 L CNN "LatestRevisionDate"
F 38 "Resistors SMD" H 7050 1230 60 0001 L CNN "Library Name"
F 39 "This work is licensed under the Creative Commons CC-BY-SA 4.0 License. To the extent that circuit schematics that use Licensed Material can be considered to be ‘Adapted Material’, then the copyright holder waives article 3.b of the license with respect to these schematics." H 7050 1140 60 0001 L CNN "License"
1 7050 4950
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$EndComp
$Comp
L Resistors_SMD:R0402_0R_JUMPER R?
U 1 1 5E1AEA6C
P 7050 5050
AR Path="/5C16BF8E/5DB9B7E6/5E1AEA6C" Ref="R?" Part="1"
AR Path="/5CA40231/5E1AEA6C" Ref="R228" Part="1"
F 0 "R228" H 7400 5000 50 0000 C CNN
F 1 "R0402_0R_JUMPER" H 7050 4840 60 0001 L CNN
F 2 "Marble:RESC1005X40N" H 7050 4030 60 0001 L CNN
F 3 "\\\\cern.ch\\dfs\\Applications\\Altium\\Datasheets\\R0402_Phycomp_RC0402.pdf" H 7050 4660 60 0001 L CNN
F 4 "0" H 7050 5000 50 0000 C CNN "Val"
F 5 "R0402_0R_JUMPER" H 7050 4570 60 0001 L CNN "Part Number"
F 6 "Resistor" H 7050 4480 60 0001 L CNN "Library Ref"
F 7 "SchLib\\Resistors.SchLib" H 7050 4390 60 0001 L CNN "Library Path"
F 8 "=Value" H 7050 4300 60 0001 L CNN "Comment"
F 9 "Standard" H 7050 4210 60 0001 L CNN "Component Kind"
F 10 "Standard" H 7050 4120 60 0001 L CNN "Component Type"
F 11 " " H 7050 3940 60 0001 L CNN "PackageDescription"
F 12 "2" H 7050 3850 60 0001 L CNN "Pin Count"
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F 14 "RESC1005X40N" H 7050 3670 60 0001 L CNN "Footprint Ref"
F 15 "Not Recommended" H 7050 3490 60 0001 L CNN "Status"
F 16 " " H 7050 3400 60 0001 L CNN "Power"
F 17 " " H 7050 3310 60 0001 L CNN "TC"
F 18 " " H 7050 3220 60 0001 L CNN "Voltage"
F 19 " " H 7050 3130 60 0001 L CNN "Tolerance"
F 20 "1A (0.05R Max DC Resistance) Zero Ohm Jumper" H 7050 3040 60 0001 L CNN "Part Description"
F 21 "GENERIC" H 7050 2950 60 0001 L CNN "Manufacturer"
F 22 "R0402_0R_JUMPER" H 7050 2860 60 0001 L CNN "Manufacturer Part Number"
F 23 "0402" H 7050 2770 60 0001 L CNN "Case"
F 24 "No" H 7050 2680 60 0001 L CNN "PressFit"
F 25 "Yes" H 7050 2590 60 0001 L CNN "Mounted"
F 26 " " H 7050 2500 60 0001 L CNN "Sense Comment"
F 27 "No" H 7050 2410 60 0001 L CNN "Sense"
F 28 " " H 7050 2320 60 0001 L CNN "Status Comment"
F 29 "No" H 7050 2230 60 0001 L CNN "Socket"
F 30 "Yes" H 7050 2140 60 0001 L CNN "SMD"
F 31 " " H 7050 2050 60 0001 L CNN "ComponentHeight"
F 32 "YAGEO PHYCOMP" H 7050 1960 60 0001 L CNN "Manufacturer1 Example"
F 33 "232270591001L" H 7050 1870 60 0001 L CNN "Manufacturer1 Part Number"
F 34 "0.4mm" H 7050 1780 60 0001 L CNN "Manufacturer1 ComponentHeight"
F 35 "CERN DEM JLC" H 7050 1600 60 0001 L CNN "Author"
F 36 "12/03/07 00:00:00" H 7050 1510 60 0001 L CNN "CreateDate"
F 37 "10/17/12 00:00:00" H 7050 1420 60 0001 L CNN "LatestRevisionDate"
F 38 "Resistors SMD" H 7050 1330 60 0001 L CNN "Library Name"
F 39 "This work is licensed under the Creative Commons CC-BY-SA 4.0 License. To the extent that circuit schematics that use Licensed Material can be considered to be ‘Adapted Material’, then the copyright holder waives article 3.b of the license with respect to these schematics." H 7050 1240 60 0001 L CNN "License"
1 7050 5050
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$Comp
L Resistors_SMD:R0402_0R_JUMPER R?
U 1 1 5E1B1275
P 7050 5150
AR Path="/5C16BF8E/5DB9B7E6/5E1B1275" Ref="R?" Part="1"
AR Path="/5CA40231/5E1B1275" Ref="R229" Part="1"
F 0 "R229" H 7400 5100 50 0000 C CNN
F 1 "R0402_0R_JUMPER" H 7050 4940 60 0001 L CNN
F 2 "Marble:RESC1005X40N" H 7050 4130 60 0001 L CNN
F 3 "\\\\cern.ch\\dfs\\Applications\\Altium\\Datasheets\\R0402_Phycomp_RC0402.pdf" H 7050 4760 60 0001 L CNN
F 4 "0" H 7050 5100 50 0000 C CNN "Val"
F 5 "R0402_0R_JUMPER" H 7050 4670 60 0001 L CNN "Part Number"
F 6 "Resistor" H 7050 4580 60 0001 L CNN "Library Ref"
F 7 "SchLib\\Resistors.SchLib" H 7050 4490 60 0001 L CNN "Library Path"
F 8 "=Value" H 7050 4400 60 0001 L CNN "Comment"
F 9 "Standard" H 7050 4310 60 0001 L CNN "Component Kind"
F 10 "Standard" H 7050 4220 60 0001 L CNN "Component Type"
F 11 " " H 7050 4040 60 0001 L CNN "PackageDescription"
F 12 "2" H 7050 3950 60 0001 L CNN "Pin Count"
F 13 "PcbLib\\Resistors SMD.PcbLib" H 7050 3860 60 0001 L CNN "Footprint Path"
F 14 "RESC1005X40N" H 7050 3770 60 0001 L CNN "Footprint Ref"
F 15 "Not Recommended" H 7050 3590 60 0001 L CNN "Status"
F 16 " " H 7050 3500 60 0001 L CNN "Power"
F 17 " " H 7050 3410 60 0001 L CNN "TC"
F 18 " " H 7050 3320 60 0001 L CNN "Voltage"
F 19 " " H 7050 3230 60 0001 L CNN "Tolerance"
F 20 "1A (0.05R Max DC Resistance) Zero Ohm Jumper" H 7050 3140 60 0001 L CNN "Part Description"
F 21 "GENERIC" H 7050 3050 60 0001 L CNN "Manufacturer"
F 22 "R0402_0R_JUMPER" H 7050 2960 60 0001 L CNN "Manufacturer Part Number"
F 23 "0402" H 7050 2870 60 0001 L CNN "Case"
F 24 "No" H 7050 2780 60 0001 L CNN "PressFit"
F 25 "Yes" H 7050 2690 60 0001 L CNN "Mounted"
F 26 " " H 7050 2600 60 0001 L CNN "Sense Comment"
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F 29 "No" H 7050 2330 60 0001 L CNN "Socket"
F 30 "Yes" H 7050 2240 60 0001 L CNN "SMD"
F 31 " " H 7050 2150 60 0001 L CNN "ComponentHeight"
F 32 "YAGEO PHYCOMP" H 7050 2060 60 0001 L CNN "Manufacturer1 Example"
F 33 "232270591001L" H 7050 1970 60 0001 L CNN "Manufacturer1 Part Number"
F 34 "0.4mm" H 7050 1880 60 0001 L CNN "Manufacturer1 ComponentHeight"
F 35 "CERN DEM JLC" H 7050 1700 60 0001 L CNN "Author"
F 36 "12/03/07 00:00:00" H 7050 1610 60 0001 L CNN "CreateDate"
F 37 "10/17/12 00:00:00" H 7050 1520 60 0001 L CNN "LatestRevisionDate"
F 38 "Resistors SMD" H 7050 1430 60 0001 L CNN "Library Name"
F 39 "This work is licensed under the Creative Commons CC-BY-SA 4.0 License. To the extent that circuit schematics that use Licensed Material can be considered to be ‘Adapted Material’, then the copyright holder waives article 3.b of the license with respect to these schematics." H 7050 1340 60 0001 L CNN "License"
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$EndComp
Text Label 6150 5150 0 50 ~ 10
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
6150 5150 6750 5150
$Comp
L Resistors_SMD:R0402_0R_JUMPER R?
U 1 1 5E1E07F8
P 10000 1650
AR Path="/5C16BF8E/5DB9B7E6/5E1E07F8" Ref="R?" Part="1"
AR Path="/5CA40231/5E1E07F8" Ref="R231" Part="1"
F 0 "R231" H 10350 1600 50 0000 C CNN
F 1 "R0402_0R_JUMPER" H 10000 1440 60 0001 L CNN
F 2 "Marble:RESC1005X40N" H 10000 630 60 0001 L CNN
F 3 "\\\\cern.ch\\dfs\\Applications\\Altium\\Datasheets\\R0402_Phycomp_RC0402.pdf" H 10000 1260 60 0001 L CNN
F 4 "0" H 10000 1600 50 0000 C CNN "Val"
F 5 "R0402_0R_JUMPER" H 10000 1170 60 0001 L CNN "Part Number"
F 6 "Resistor" H 10000 1080 60 0001 L CNN "Library Ref"
F 7 "SchLib\\Resistors.SchLib" H 10000 990 60 0001 L CNN "Library Path"
F 8 "=Value" H 10000 900 60 0001 L CNN "Comment"
F 9 "Standard" H 10000 810 60 0001 L CNN "Component Kind"
F 10 "Standard" H 10000 720 60 0001 L CNN "Component Type"
F 11 " " H 10000 540 60 0001 L CNN "PackageDescription"
F 12 "2" H 10000 450 60 0001 L CNN "Pin Count"
F 13 "PcbLib\\Resistors SMD.PcbLib" H 10000 360 60 0001 L CNN "Footprint Path"
F 14 "RESC1005X40N" H 10000 270 60 0001 L CNN "Footprint Ref"
F 15 "Not Recommended" H 10000 90 60 0001 L CNN "Status"
F 16 " " H 10000 0 60 0001 L CNN "Power"
F 17 " " H 10000 -90 60 0001 L CNN "TC"
F 18 " " H 10000 -180 60 0001 L CNN "Voltage"
F 19 " " H 10000 -270 60 0001 L CNN "Tolerance"
F 20 "1A (0.05R Max DC Resistance) Zero Ohm Jumper" H 10000 -360 60 0001 L CNN "Part Description"
F 21 "GENERIC" H 10000 -450 60 0001 L CNN "Manufacturer"
F 22 "R0402_0R_JUMPER" H 10000 -540 60 0001 L CNN "Manufacturer Part Number"
F 23 "0402" H 10000 -630 60 0001 L CNN "Case"
F 24 "No" H 10000 -720 60 0001 L CNN "PressFit"
F 25 "Yes" H 10000 -810 60 0001 L CNN "Mounted"
F 26 " " H 10000 -900 60 0001 L CNN "Sense Comment"
F 27 "No" H 10000 -990 60 0001 L CNN "Sense"
F 28 " " H 10000 -1080 60 0001 L CNN "Status Comment"
F 29 "No" H 10000 -1170 60 0001 L CNN "Socket"
F 30 "Yes" H 10000 -1260 60 0001 L CNN "SMD"
F 31 " " H 10000 -1350 60 0001 L CNN "ComponentHeight"
F 32 "YAGEO PHYCOMP" H 10000 -1440 60 0001 L CNN "Manufacturer1 Example"
F 33 "232270591001L" H 10000 -1530 60 0001 L CNN "Manufacturer1 Part Number"
F 34 "0.4mm" H 10000 -1620 60 0001 L CNN "Manufacturer1 ComponentHeight"
F 35 "CERN DEM JLC" H 10000 -1800 60 0001 L CNN "Author"
F 36 "12/03/07 00:00:00" H 10000 -1890 60 0001 L CNN "CreateDate"
F 37 "10/17/12 00:00:00" H 10000 -1980 60 0001 L CNN "LatestRevisionDate"
F 38 "Resistors SMD" H 10000 -2070 60 0001 L CNN "Library Name"
F 39 "This work is licensed under the Creative Commons CC-BY-SA 4.0 License. To the extent that circuit schematics that use Licensed Material can be considered to be ‘Adapted Material’, then the copyright holder waives article 3.b of the license with respect to these schematics." H 10000 -2160 60 0001 L CNN "License"
1 10000 1650
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$EndComp
$Comp
L Resistors_SMD:R0402_0R_JUMPER R?
U 1 1 5E1E0825
P 10000 1850
AR Path="/5C16BF8E/5DB9B7E6/5E1E0825" Ref="R?" Part="1"
AR Path="/5CA40231/5E1E0825" Ref="R233" Part="1"
F 0 "R233" H 10350 1800 50 0000 C CNN
F 1 "R0402_0R_JUMPER" H 10000 1640 60 0001 L CNN
F 2 "Marble:RESC1005X40N" H 10000 830 60 0001 L CNN
F 3 "\\\\cern.ch\\dfs\\Applications\\Altium\\Datasheets\\R0402_Phycomp_RC0402.pdf" H 10000 1460 60 0001 L CNN
F 4 "0" H 10000 1800 50 0000 C CNN "Val"
F 5 "R0402_0R_JUMPER" H 10000 1370 60 0001 L CNN "Part Number"
F 6 "Resistor" H 10000 1280 60 0001 L CNN "Library Ref"
F 7 "SchLib\\Resistors.SchLib" H 10000 1190 60 0001 L CNN "Library Path"
F 8 "=Value" H 10000 1100 60 0001 L CNN "Comment"
F 9 "Standard" H 10000 1010 60 0001 L CNN "Component Kind"
F 10 "Standard" H 10000 920 60 0001 L CNN "Component Type"
F 11 " " H 10000 740 60 0001 L CNN "PackageDescription"
F 12 "2" H 10000 650 60 0001 L CNN "Pin Count"
F 13 "PcbLib\\Resistors SMD.PcbLib" H 10000 560 60 0001 L CNN "Footprint Path"
F 14 "RESC1005X40N" H 10000 470 60 0001 L CNN "Footprint Ref"
F 15 "Not Recommended" H 10000 290 60 0001 L CNN "Status"
F 16 " " H 10000 200 60 0001 L CNN "Power"
F 17 " " H 10000 110 60 0001 L CNN "TC"
F 18 " " H 10000 20 60 0001 L CNN "Voltage"
F 19 " " H 10000 -70 60 0001 L CNN "Tolerance"
F 20 "1A (0.05R Max DC Resistance) Zero Ohm Jumper" H 10000 -160 60 0001 L CNN "Part Description"
F 21 "GENERIC" H 10000 -250 60 0001 L CNN "Manufacturer"
F 22 "R0402_0R_JUMPER" H 10000 -340 60 0001 L CNN "Manufacturer Part Number"
F 23 "0402" H 10000 -430 60 0001 L CNN "Case"
F 24 "No" H 10000 -520 60 0001 L CNN "PressFit"
F 25 "Yes" H 10000 -610 60 0001 L CNN "Mounted"
F 26 " " H 10000 -700 60 0001 L CNN "Sense Comment"
F 27 "No" H 10000 -790 60 0001 L CNN "Sense"
F 28 " " H 10000 -880 60 0001 L CNN "Status Comment"
F 29 "No" H 10000 -970 60 0001 L CNN "Socket"
F 30 "Yes" H 10000 -1060 60 0001 L CNN "SMD"
F 31 " " H 10000 -1150 60 0001 L CNN "ComponentHeight"
F 32 "YAGEO PHYCOMP" H 10000 -1240 60 0001 L CNN "Manufacturer1 Example"
F 33 "232270591001L" H 10000 -1330 60 0001 L CNN "Manufacturer1 Part Number"
F 34 "0.4mm" H 10000 -1420 60 0001 L CNN "Manufacturer1 ComponentHeight"
F 35 "CERN DEM JLC" H 10000 -1600 60 0001 L CNN "Author"
F 36 "12/03/07 00:00:00" H 10000 -1690 60 0001 L CNN "CreateDate"
F 37 "10/17/12 00:00:00" H 10000 -1780 60 0001 L CNN "LatestRevisionDate"
F 38 "Resistors SMD" H 10000 -1870 60 0001 L CNN "Library Name"
F 39 "This work is licensed under the Creative Commons CC-BY-SA 4.0 License. To the extent that circuit schematics that use Licensed Material can be considered to be ‘Adapted Material’, then the copyright holder waives article 3.b of the license with respect to these schematics." H 10000 -1960 60 0001 L CNN "License"
1 10000 1850