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Commit 8a45976

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WolfvakWolfvak
committed
Potentially fix screen init on some systems
Sanitized I2C Reorganized the memory layout - Moved GM9 to ARM9 RAM - Increased RAMdisk size to 88MiB
1 parent 5e652b1 commit 8a45976

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10 files changed

+163
-155
lines changed

10 files changed

+163
-155
lines changed

‎Makefile

+5-5
Original file line numberDiff line numberDiff line change
@@ -74,7 +74,7 @@ endif
7474

7575
CXXFLAGS := $(CFLAGS) -fno-rtti -fno-exceptions
7676

77-
LDFLAGS = -T../link.ld -nostartfiles -g $(ARCH) -Wl,-Map,$(TARGET).map
77+
LDFLAGS = -T../link.ld -nostartfiles -g $(ARCH) -Wl,-Map,$(TARGET).map,-z,max-page-size=512
7878

7979
LIBS :=
8080

@@ -152,12 +152,12 @@ binary: common
152152
@$(MAKE) --no-print-directory -C $(BUILD) -f $(CURDIR)/Makefile
153153

154154
firm: binary screeninit
155-
firmtool build $(OUTPUT).firm -n 0x08006000 -A 0x08006000 -D $(OUTPUT).bin $(OUTPUT_D)/screeninit.elf -C NDMA XDMA -S nand-retail -g
156-
firmtool build $(OUTPUT)_dev.firm -n 0x08006000 -A 0x08006000 -D $(OUTPUT).bin $(OUTPUT_D)/screeninit.elf -C NDMA XDMA -S nand-dev -g
155+
firmtool build $(OUTPUT).firm -D $(OUTPUT).elf $(OUTPUT_D)/screeninit.elf -C NDMA XDMA -S nand-retail -g
156+
firmtool build $(OUTPUT)_dev.firm -D $(OUTPUT).elf $(OUTPUT_D)/screeninit.elf -C NDMA XDMA -S nand-dev -g
157157

158158
ntrboot: binary screeninit
159-
firmtool build $(OUTPUT)_ntr.firm -n 0x08006000 -A 0x08006000 -D $(OUTPUT).bin $(OUTPUT_D)/screeninit.elf -C NDMA XDMA -S spi-retail -g
160-
firmtool build $(OUTPUT)_ntr_dev.firm -n 0x08006000 -A 0x08006000 -D $(OUTPUT).bin $(OUTPUT_D)/screeninit.elf -C NDMA XDMA -S spi-dev -g
159+
firmtool build $(OUTPUT)_ntr.firm -D $(OUTPUT).elf $(OUTPUT_D)/screeninit.elf -C NDMA XDMA -S spi-retail -g
160+
firmtool build $(OUTPUT)_ntr_dev.firm -D $(OUTPUT).elf $(OUTPUT_D)/screeninit.elf -C NDMA XDMA -S spi-dev -g
161161

162162
release:
163163
@-rm -fr $(BUILD) $(OUTPUT_D) $(RELEASE)

‎common/pxi.h

+1
Original file line numberDiff line numberDiff line change
@@ -18,6 +18,7 @@ enum {
1818
PXI_NONE = 0,
1919
PXI_READY,
2020
PXI_BUSY,
21+
PXI_SCREENINIT,
2122
PXI_BRIGHTNESS
2223
};
2324

‎link.ld

+3-3
Original file line numberDiff line numberDiff line change
@@ -4,7 +4,7 @@ ENTRY(_start)
44

55
SECTIONS
66
{
7-
. = 0x23F00000;
7+
. = 0x08006000;
88
__start__ = ABSOLUTE(.);
99

1010
.text.start : ALIGN(4) { *(.text.start) }
@@ -17,7 +17,7 @@ SECTIONS
1717

1818
__end__ = ABSOLUTE(.);
1919

20-
__stack_abt = __start__;
21-
__stack_top = __start__ - 0x80000;
20+
__stack_abt = 0x22800000;
21+
__stack_top = __stack_abt - 0x80000;
2222
__code_size__ = __end__ - __start__;
2323
}

‎screeninit/Makefile

+1-1
Original file line numberDiff line numberDiff line change
@@ -19,7 +19,7 @@ ASFLAGS := $(ARCH) -x assembler-with-cpp $(INCLUDE)
1919
CFLAGS := $(ARCH) -Wall -Wextra -MMD -MP -fno-builtin \
2020
-Wno-unused-function -Wno-unused-variable \
2121
-std=c11 -O2 -flto -ffast-math -Wno-main $(INCLUDE)
22-
LDFLAGS := -nostdlib -nostartfiles
22+
LDFLAGS := -nostdlib -nostartfiles -Wl,-z,max-page-size=512
2323

2424
objects = $(patsubst $(dir_source)/%.s, $(dir_build)/%.o, \
2525
$(patsubst $(dir_source)/%.c, $(dir_build)/%.o, \

‎screeninit/source/main.c

+15-12
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,6 @@
11
#include <cpu.h>
22
#include <pxi.h>
33
#include <gic.h>
4-
#include <i2c.h>
54
#include <gpulcd.h>
65
#include <vram.h>
76
#include <types.h>
@@ -19,6 +18,21 @@ void PXI_IRQHandler(void)
1918
default:
2019
break;
2120

21+
case PXI_SCREENINIT:
22+
{
23+
GPU_Init();
24+
GPU_PSCFill(VRAM_START, VRAM_END, 0);
25+
GPU_SetFramebuffers((u32[]){VRAM_TOP_LA, VRAM_TOP_LB,
26+
VRAM_TOP_RA, VRAM_TOP_RB,
27+
VRAM_BOT_A, VRAM_BOT_B});
28+
29+
GPU_SetFramebufferMode(0, PDC_RGB24);
30+
GPU_SetFramebufferMode(1, PDC_RGB24);
31+
32+
PXI_SetRemote(PXI_BUSY);
33+
break;
34+
}
35+
2236
case PXI_BRIGHTNESS:
2337
{
2438
PXI_RecvArray(pxi_args, 1);
@@ -50,17 +64,6 @@ void main(void)
5064
u32 entry;
5165
PXI_Reset();
5266

53-
GPU_Init();
54-
GPU_PSCFill(VRAM_START, VRAM_END, 0);
55-
GPU_SetFramebuffers((u32[]){VRAM_TOP_LA, VRAM_TOP_LB,
56-
VRAM_TOP_RA, VRAM_TOP_RB,
57-
VRAM_BOT_A, VRAM_BOT_B});
58-
59-
GPU_SetFramebufferMode(0, PDC_RGB24);
60-
GPU_SetFramebufferMode(1, PDC_RGB24);
61-
62-
I2C_writeReg(I2C_DEV_MCU, 0x22, 0x2A);
63-
6467
GIC_Reset();
6568
GIC_SetIRQ(IRQ_PXI_SYNC, PXI_IRQHandler);
6669
PXI_EnableIRQ();

‎source/common/common.h

+3-3
Original file line numberDiff line numberDiff line change
@@ -91,6 +91,6 @@
9191
#define TEMP_BUFFER_SIZE (0x1800000) // 24MB(!)
9292

9393
// buffer area defines (in use by image.c, for RAMdrive)
94-
#define RAMDRV_BUFFER ((u8*)0x24000000) // top half of FCRAM
95-
#define RAMDRV_SIZE_O3DS (0x04000000) // 64MB
96-
#define RAMDRV_SIZE_N3DS (0x0C000000) // 192MB
94+
#define RAMDRV_BUFFER ((u8*)0x22800000) // top of STACK
95+
#define RAMDRV_SIZE_O3DS (0x5800000) // 88MB
96+
#define RAMDRV_SIZE_N3DS (0xD800000) // 216MB

‎source/main.c

+10-5
Original file line numberDiff line numberDiff line change
@@ -1,21 +1,26 @@
11
#include "godmode.h"
22
#include "power.h"
33
#include "pxi.h"
4+
#include "i2c.h"
45

56
void main(int argc, char** argv)
67
{
78
(void) argv; // unused for now
89

910
// Wait for ARM11
1011
PXI_WaitRemote(PXI_READY);
11-
12+
13+
PXI_DoCMD(PXI_SCREENINIT, NULL, 0);
14+
I2C_writeReg(I2C_DEV_MCU, 0x22, 0x2A);
15+
1216
#ifdef AUTORUN_SCRIPT
1317
// Run the script runner
14-
if (ScriptRunner(argc) == GODMODE_EXIT_REBOOT) Reboot();
15-
else PowerOff();
18+
if (ScriptRunner(argc) == GODMODE_EXIT_REBOOT)
1619
#else
1720
// Run the main program
18-
if (GodMode(argc) == GODMODE_EXIT_REBOOT) Reboot();
19-
else PowerOff();
21+
if (GodMode(argc) == GODMODE_EXIT_REBOOT)
2022
#endif
23+
Reboot();
24+
25+
PowerOff();
2126
}

‎source/start.s

+61-91
Original file line numberDiff line numberDiff line change
@@ -5,91 +5,50 @@
55
#include <arm.h>
66
#include <brf.h>
77

8-
@ Make sure to preserve r0-r2
98
.global _start
109
_start:
11-
@ Switch to supervisor mode and disable interrupts
12-
msr cpsr_c, #(SR_SYS_MODE | SR_IRQ | SR_FIQ)
10+
@ Disable interrupts
11+
mrs r4, cpsr
12+
orr r4, r4, #(SR_IRQ | SR_FIQ)
13+
msr cpsr_c, r4
1314

14-
@ Short delay (not always necessary, just in case)
15-
mov r3, #0x40000
16-
.Lwaitloop:
17-
subs r3, #1
18-
bgt .Lwaitloop
19-
20-
@ Check the load address
21-
adr r3, _start
22-
ldr r4, =__start__
23-
cmp r3, r4
24-
beq _start_gm
25-
26-
@ Relocate the binary to the correct location and branch to it
27-
ldr r5, =__code_size__
28-
.Lbincopyloop:
29-
subs r5, #4
30-
ldrge r6, [r3, r5]
31-
strge r6, [r4, r5]
32-
bge .Lbincopyloop
33-
34-
mov r5, r0
35-
mov r6, r1
36-
mov r7, r2
37-
ldr r3, =BRF_WB_INV_DCACHE
38-
blx r3
39-
mov r0, r5
40-
mov r1, r6
41-
mov r2, r7
42-
43-
mov lr, #0
44-
mcr p15, 0, lr, c7, c5, 0 @ Invalidate ICache
45-
46-
bx r4
47-
48-
_start_gm:
49-
ldr sp, =__stack_top
15+
@ Preserve boot registers
16+
mov r9, r0
17+
mov r10, r1
18+
mov r11, r2
5019

51-
mov r9, r0 @ argc
52-
mov r10, r1 @ argv
20+
@ Clear bss
21+
ldr r0, =__bss_start
22+
ldr r1, =__bss_end
23+
mov r2, #0
24+
.LBSS_Clear:
25+
cmp r0, r1
26+
strlo r2, [r0], #4
27+
blo .LBSS_Clear
5328

54-
ldr r4, =0xBEEF
55-
lsl r2, #16
56-
lsr r2, #16
57-
cmp r2, r4 @ magic word
58-
movne r9, #0
29+
ldr r0, =BRF_WB_INV_DCACHE
30+
blx r0 @ Writeback & Invalidate Data Cache
31+
ldr r0, =BRF_INVALIDATE_ICACHE
32+
blx r0 @ Invalidate Instruction Cache
5933

60-
@ Disable caches / mpu
34+
@ Disable caches / DTCM / MPU
6135
ldr r1, =(CR_ENABLE_MPU | CR_ENABLE_DCACHE | CR_ENABLE_ICACHE | \
6236
CR_ENABLE_DTCM)
63-
ldr r2, =(CR_ENABLE_ITCM | CR_CACHE_RROBIN)
37+
ldr r2, =(CR_ENABLE_ITCM)
6438
mrc p15, 0, r0, c1, c0, 0
6539
bic r0, r1
6640
orr r0, r2
6741
mcr p15, 0, r0, c1, c0, 0
6842

69-
@ Clear bss
70-
ldr r0, =__bss_start
71-
ldr r1, =__bss_end
72-
mov r2, #0
73-
.Lbss_clr:
74-
cmp r0, r1
75-
strlt r2, [r0], #4
76-
blt .Lbss_clr
77-
78-
@ Invalidate caches
79-
mov r5, #0
80-
mcr p15, 0, r5, c7, c5, 0 @ invalidate I-cache
81-
mcr p15, 0, r5, c7, c6, 0 @ invalidate D-cache
82-
mcr p15, 0, r5, c7, c10, 4 @ drain write buffer
43+
@ Give full access to defined memory regions
44+
ldr r0, =0x33333333
45+
mcr p15, 0, r0, c5, c0, 2 @ write data access
46+
mcr p15, 0, r0, c5, c0, 3 @ write instruction access
8347

84-
@ Give read/write access to all the memory regions
85-
ldr r5, =0x33333333
86-
mcr p15, 0, r5, c5, c0, 2 @ write data access
87-
mcr p15, 0, r5, c5, c0, 3 @ write instruction access
88-
89-
@ Sets MPU regions and cache settings
48+
@ Set MPU regions and cache settings
9049
adr r0, __mpu_regions
9150
ldmia r0, {r1-r8}
92-
mov r0, #0b00101101 @ bootrom/itcm/arm9 mem and fcram are cacheable/bufferable
51+
mov r0, #0b00101000
9352
mcr p15, 0, r1, c6, c0, 0
9453
mcr p15, 0, r2, c6, c1, 0
9554
mcr p15, 0, r3, c6, c2, 0
@@ -98,42 +57,53 @@ _start_gm:
9857
mcr p15, 0, r6, c6, c5, 0
9958
mcr p15, 0, r7, c6, c6, 0
10059
mcr p15, 0, r8, c6, c7, 0
101-
mcr p15, 0, r0, c3, c0, 0 @ Write bufferable 0, 2, 5
102-
mcr p15, 0, r0, c2, c0, 0 @ Data cacheable 0, 2, 5
103-
mcr p15, 0, r0, c2, c0, 1 @ Inst cacheable 0, 2, 5
60+
mcr p15, 0, r0, c3, c0, 0 @ Write bufferable
61+
mcr p15, 0, r0, c2, c0, 0 @ Data cacheable
62+
mcr p15, 0, r0, c2, c0, 1 @ Inst cacheable
10463

10564
@ Enable dctm
106-
ldr r0, =0x3000800A @ set dtcm
107-
mcr p15, 0, r0, c9, c1, 0 @ set the dtcm Region Register
108-
109-
@ Install exception handlers
110-
ldr r0, =XRQ_Start
111-
ldr r1, =XRQ_End
112-
ldr r2, =0x00000000
113-
.LXRQ_Install:
114-
cmp r0, r1
115-
ldrlt r3, [r0], #4
116-
strlt r3, [r2], #4
117-
blt .LXRQ_Install
65+
ldr r0, =0x3000800A
66+
mcr p15, 0, r0, c9, c1, 0 @ set the DTCM Region Register
11867

11968
@ Enable caches / select low exception vectors
12069
ldr r1, =(CR_ALT_VECTORS | CR_DISABLE_TBIT)
121-
ldr r2, =(CR_ENABLE_MPU | CR_ENABLE_DCACHE | CR_ENABLE_ICACHE | \
122-
CR_ENABLE_DTCM)
70+
ldr r2, =(CR_ENABLE_MPU | CR_ENABLE_DCACHE | CR_ENABLE_ICACHE | \
71+
CR_ENABLE_DTCM | CR_CACHE_RROBIN)
12372
mrc p15, 0, r0, c1, c0, 0
12473
bic r0, r1
12574
orr r0, r2
12675
mcr p15, 0, r0, c1, c0, 0
12776

128-
@ Fixes mounting of SDMC
129-
ldr r0, =0x10000000
77+
@ Install exception handlers
78+
ldr r0, =XRQ_Start
79+
ldr r1, =XRQ_End
80+
ldr r2, =0x00000000
81+
.LXRQ_Install:
82+
cmp r0, r1
83+
ldrlo r3, [r0], #4
84+
strlo r3, [r2], #4
85+
blo .LXRQ_Install
86+
87+
@ Fix SDMC mounting
88+
mov r0, #0x10000000
13089
mov r1, #0x340
13190
str r1, [r0, #0x20]
13291

133-
mov r0, r9
134-
mov r1, r10
92+
@ Check arguments
93+
lsl r2, r11, #16
94+
lsr r2, r2, #16
13595

136-
bl main
96+
ldr r3, =0xBEEF
97+
cmp r2, r3
98+
99+
moveq r0, r9
100+
moveq r1, r10
101+
movne r0, #0
102+
103+
@ Switch to system mode, disable interrupts, setup application stack
104+
msr cpsr_c, #(SR_SYS_MODE | SR_IRQ | SR_FIQ)
105+
ldr sp, =__stack_top
106+
b main
137107

138108
__mpu_regions:
139109
.word 0xFFFF001F @ FFFF0000 64k | bootrom (unprotected / protected)

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