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Description
I'm seeking clarification on two points:
- Does FlagGems plan to enhance CPU runtime support, especially with operator-specific tuning?
- Following the ARM backend support PR, would contributions for backend support of other CPUs—particularly for RISC-V with Vector extensions(RVV)—be welcomed?
Background
Tiling-based optimization is crucial in efficient AI kernel programming, and Triton’s popularity stems from its ease of use in this space. FlagGems is one of the earliest open-source libraries exploring this approach and already supports platforms beyond NVIDIA GPUs, according to backend code.
Given the relevance of tiling on CPUs, Triton has begun developing a triton-cpu branch. However, CPU backend support in FlagGems remains limited. Aside from a recent ARM backend support PR, support for other CPUs is minimal. Since tuning configurations optimized for ARM architectures may not generalize well to other CPU platforms such as x86 or RISC-V. Is that a way we can do something about this? Thanks!
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