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hephaestus-brain-pcb-SMT-MIXED.kicad_pcb
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(kicad_pcb (version 20171130) (host pcbnew "(5.1.8)-1")
(general
(thickness 1.6)
(drawings 20)
(tracks 626)
(zones 0)
(modules 36)
(nets 56)
)
(page A4)
(layers
(0 F.Cu signal)
(31 B.Cu signal)
(32 B.Adhes user hide)
(33 F.Adhes user hide)
(34 B.Paste user hide)
(35 F.Paste user hide)
(36 B.SilkS user)
(37 F.SilkS user)
(38 B.Mask user hide)
(39 F.Mask user)
(40 Dwgs.User user hide)
(41 Cmts.User user hide)
(42 Eco1.User user hide)
(43 Eco2.User user hide)
(44 Edge.Cuts user)
(45 Margin user hide)
(46 B.CrtYd user hide)
(47 F.CrtYd user)
(48 B.Fab user hide)
(49 F.Fab user hide)
)
(setup
(last_trace_width 0.1524)
(user_trace_width 0.1524)
(user_trace_width 0.3048)
(user_trace_width 0.6096)
(user_trace_width 0.8128)
(user_trace_width 1.6256)
(trace_clearance 0.1524)
(zone_clearance 0.1524)
(zone_45_only no)
(trace_min 0.1524)
(via_size 0.4)
(via_drill 0.2)
(via_min_size 0.4)
(via_min_drill 0.2)
(user_via 0.4 0.2)
(user_via 0.8 0.4)
(uvia_size 0.3)
(uvia_drill 0.1)
(uvias_allowed no)
(uvia_min_size 0.2)
(uvia_min_drill 0.1)
(edge_width 0.05)
(segment_width 0.2)
(pcb_text_width 0.3)
(pcb_text_size 1.5 1.5)
(mod_edge_width 0.12)
(mod_text_size 1 1)
(mod_text_width 0.15)
(pad_size 1.524 1.524)
(pad_drill 0.762)
(pad_to_mask_clearance 0.0005)
(solder_mask_min_width 0.0005)
(aux_axis_origin 0 0)
(visible_elements 7FFFFFFF)
(pcbplotparams
(layerselection 0x010fc_ffffffff)
(usegerberextensions false)
(usegerberattributes false)
(usegerberadvancedattributes false)
(creategerberjobfile false)
(excludeedgelayer false)
(linewidth 0.100000)
(plotframeref false)
(viasonmask false)
(mode 1)
(useauxorigin false)
(hpglpennumber 1)
(hpglpenspeed 20)
(hpglpendiameter 15.000000)
(psnegative false)
(psa4output false)
(plotreference true)
(plotvalue true)
(plotinvisibletext false)
(padsonsilk false)
(subtractmaskfromsilk false)
(outputformat 1)
(mirror false)
(drillshape 0)
(scaleselection 1)
(outputdirectory "./gerbers/"))
)
(net 0 "")
(net 1 GND)
(net 2 VCC)
(net 3 +5V)
(net 4 "Net-(C4-Pad1)")
(net 5 "Net-(C5-Pad2)")
(net 6 "Net-(C6-Pad1)")
(net 7 +5VP)
(net 8 "Net-(D3-Pad2)")
(net 9 "Net-(D3-Pad3)")
(net 10 DOTSTAR_CLK)
(net 11 DOTSTAR_DATA)
(net 12 QSPI_D0)
(net 13 QSPI_D1)
(net 14 QSPI_D2)
(net 15 QSPI_D3)
(net 16 QSPI_SCK)
(net 17 QSPI_CS)
(net 18 SDA)
(net 19 SCL)
(net 20 RX)
(net 21 TX)
(net 22 9)
(net 23 10)
(net 24 11)
(net 25 13)
(net 26 12)
(net 27 D-)
(net 28 D+)
(net 29 "Net-(IC1-Pad43)")
(net 30 SWCLK)
(net 31 SWDIO)
(net 32 "Net-(R1-Pad1)")
(net 33 "Net-(SW1-Pad3)")
(net 34 "Net-(U2-Pad4)")
(net 35 +3V3)
(net 36 7)
(net 37 PA00)
(net 38 PA01)
(net 39 PA02)
(net 40 PB08)
(net 41 PB09)
(net 42 PA04)
(net 43 PA05)
(net 44 PA06)
(net 45 PA07)
(net 46 PA14)
(net 47 PA15)
(net 48 PB22)
(net 49 PB23)
(net 50 PA27)
(net 51 "Net-(J8-PadB8)")
(net 52 "Net-(J8-PadB5)")
(net 53 "Net-(J8-PadA5)")
(net 54 "Net-(J8-PadA8)")
(net 55 RST)
(net_class Default "This is the default net class."
(clearance 0.1524)
(trace_width 0.1524)
(via_dia 0.4)
(via_drill 0.2)
(uvia_dia 0.3)
(uvia_drill 0.1)
(add_net +3V3)
(add_net +5V)
(add_net +5VP)
(add_net 10)
(add_net 11)
(add_net 12)
(add_net 13)
(add_net 7)
(add_net 9)
(add_net D+)
(add_net D-)
(add_net DOTSTAR_CLK)
(add_net DOTSTAR_DATA)
(add_net GND)
(add_net "Net-(C4-Pad1)")
(add_net "Net-(C5-Pad2)")
(add_net "Net-(C6-Pad1)")
(add_net "Net-(D3-Pad2)")
(add_net "Net-(D3-Pad3)")
(add_net "Net-(IC1-Pad43)")
(add_net "Net-(J8-PadA5)")
(add_net "Net-(J8-PadA8)")
(add_net "Net-(J8-PadB5)")
(add_net "Net-(J8-PadB8)")
(add_net "Net-(R1-Pad1)")
(add_net "Net-(SW1-Pad3)")
(add_net "Net-(U2-Pad4)")
(add_net PA00)
(add_net PA01)
(add_net PA02)
(add_net PA04)
(add_net PA05)
(add_net PA06)
(add_net PA07)
(add_net PA14)
(add_net PA15)
(add_net PA27)
(add_net PB08)
(add_net PB09)
(add_net PB22)
(add_net PB23)
(add_net QSPI_CS)
(add_net QSPI_D0)
(add_net QSPI_D1)
(add_net QSPI_D2)
(add_net QSPI_D3)
(add_net QSPI_SCK)
(add_net RST)
(add_net RX)
(add_net SCL)
(add_net SDA)
(add_net SWCLK)
(add_net SWDIO)
(add_net TX)
(add_net VCC)
)
(module unified:DFN-8-1EP_3x2mm_P0.5mm_EP1.75x1.45mm (layer F.Cu) (tedit 5FB1F118) (tstamp 5FB263D7)
(at 122.05 60.5 180)
(descr "8-Lead Plastic Dual Flat, No Lead Package (MC) - 2x3x0.9 mm Body [DFN] (see Microchip Packaging Specification 00000049BS.pdf)")
(tags "DFN 0.5")
(path /5FA9124F)
(attr smd)
(fp_text reference U3 (at 0.05 -0.05 180) (layer F.SilkS) hide
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value AT25xxx-MA (at 0 2.05 180) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -0.5 -1) (end 1.5 -1) (layer F.Fab) (width 0.15))
(fp_line (start 1.5 -1) (end 1.5 1) (layer F.Fab) (width 0.15))
(fp_line (start 1.5 1) (end -1.5 1) (layer F.Fab) (width 0.15))
(fp_line (start -1.5 1) (end -1.5 0) (layer F.Fab) (width 0.15))
(fp_line (start -1.5 0) (end -0.5 -1) (layer F.Fab) (width 0.15))
(fp_line (start -2.1 -1.3) (end -2.1 1.3) (layer F.CrtYd) (width 0.05))
(fp_line (start 2.1 -1.3) (end 2.1 1.3) (layer F.CrtYd) (width 0.05))
(fp_line (start -2.1 -1.3) (end 2.1 -1.3) (layer F.CrtYd) (width 0.05))
(fp_line (start -2.1 1.3) (end 2.1 1.3) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.5 1.125) (end 1.5 1.125) (layer F.SilkS) (width 0.15))
(fp_line (start 0 -1.125) (end 1.5 -1.125) (layer F.SilkS) (width 0.15))
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 0.7 0.7) (thickness 0.105)))
)
(pad "" smd rect (at -0.4375 -0.3625 180) (size 0.71 0.58) (layers F.Paste))
(pad "" smd rect (at 0.4375 -0.3625 180) (size 0.71 0.58) (layers F.Paste))
(pad "" smd rect (at 0.4375 0.3625 180) (size 0.71 0.58) (layers F.Paste))
(pad 9 smd rect (at 0 0 180) (size 1.71 1.45) (layers F.Cu F.Mask)
(net 1 GND))
(pad "" smd rect (at -0.4375 0.3625 180) (size 0.71 0.58) (layers F.Paste))
(pad 8 smd rect (at 1.45 -0.75 180) (size 0.75 0.27) (layers F.Cu F.Paste F.Mask)
(net 35 +3V3))
(pad 7 smd rect (at 1.45 -0.25 180) (size 0.75 0.27) (layers F.Cu F.Paste F.Mask)
(net 15 QSPI_D3))
(pad 6 smd rect (at 1.45 0.25 180) (size 0.75 0.27) (layers F.Cu F.Paste F.Mask)
(net 16 QSPI_SCK))
(pad 5 smd rect (at 1.45 0.75 180) (size 0.75 0.27) (layers F.Cu F.Paste F.Mask)
(net 12 QSPI_D0))
(pad 4 smd rect (at -1.45 0.75 180) (size 0.75 0.27) (layers F.Cu F.Paste F.Mask)
(net 1 GND))
(pad 3 smd rect (at -1.45 0.25 180) (size 0.75 0.27) (layers F.Cu F.Paste F.Mask)
(net 14 QSPI_D2))
(pad 2 smd rect (at -1.45 -0.25 180) (size 0.75 0.27) (layers F.Cu F.Paste F.Mask)
(net 13 QSPI_D1))
(pad 1 smd rect (at -1.45 -0.75 180) (size 0.75 0.27) (layers F.Cu F.Paste F.Mask)
(net 17 QSPI_CS))
(model ${KISYS3DMOD}/Package_DFN_QFN.3dshapes/DFN-8-1EP_3x2mm_P0.5mm_EP1.75x1.45mm.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module unified:GCT_USB4110-GF-A (layer F.Cu) (tedit 5FB1EEB9) (tstamp 5FAEC852)
(at 123 102.87)
(path /5FAEF4FA)
(fp_text reference J8 (at -1.425 -3.135) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.015)))
)
(fp_text value USB4110-GF-A (at 5.56 7.265) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.015)))
)
(fp_line (start 4.32 -1.65) (end 4.32 4.52) (layer F.SilkS) (width 0.01))
(fp_line (start 0 -1.65) (end 4.32 -1.65) (layer F.SilkS) (width 0.01))
(fp_line (start -4.47 -1.07) (end -4.47 6.28) (layer F.Fab) (width 0.1))
(fp_line (start -4.47 6.28) (end 4.47 6.28) (layer F.Fab) (width 0.1))
(fp_line (start 4.47 6.28) (end 4.47 -1.07) (layer F.Fab) (width 0.1))
(fp_line (start 4.47 -1.07) (end -4.47 -1.07) (layer F.Fab) (width 0.1))
(fp_line (start -6.45 -1.9) (end 6.45 -1.9) (layer F.CrtYd) (width 0.05))
(fp_line (start 6.45 -1.9) (end 6.45 6.53) (layer F.CrtYd) (width 0.05))
(fp_line (start 6.45 6.53) (end -6.45 6.53) (layer F.CrtYd) (width 0.05))
(fp_line (start -6.45 6.53) (end -6.45 -1.9) (layer F.CrtYd) (width 0.05))
(fp_line (start -4.47 4.79) (end -4.47 6.28) (layer F.SilkS) (width 0.2))
(fp_line (start -4.47 6.28) (end 4.47 6.28) (layer F.SilkS) (width 0.2))
(fp_line (start 4.47 6.28) (end 4.47 4.79) (layer F.SilkS) (width 0.2))
(fp_line (start -4.47 0.86) (end -4.47 2.07) (layer F.SilkS) (width 0.2))
(fp_line (start 4.47 0.86) (end 4.47 2.07) (layer F.SilkS) (width 0.2))
(fp_circle (center -3.78 -2.23) (end -3.68 -2.23) (layer F.SilkS) (width 0.2))
(fp_circle (center -3.78 -2.23) (end -3.68 -2.23) (layer F.Fab) (width 0.2))
(pad "" np_thru_hole circle (at -2.89 0.87) (size 0.65 0.65) (drill 0.65) (layers *.Cu *.Mask))
(pad "" np_thru_hole circle (at 2.89 0.87) (size 0.65 0.65) (drill 0.65) (layers *.Cu *.Mask))
(pad 14 thru_hole oval (at -4.32 0.34) (size 1 2.1) (drill oval 0.6 1.7) (layers *.Cu *.Mask))
(pad 13 thru_hole oval (at 4.32 0.34) (size 1 2.1) (drill oval 0.6 1.7) (layers *.Cu *.Mask))
(pad 11 thru_hole oval (at -4.32 4.52) (size 1 1.6) (drill oval 0.6 1.2) (layers *.Cu *.Mask))
(pad 10 thru_hole oval (at 4.32 4.52) (size 1 1.6) (drill oval 0.6 1.2) (layers *.Cu *.Mask))
(pad None np_thru_hole circle (at 2.89 0) (size 0.65 0.65) (drill 0.65) (layers *.Cu *.Mask))
(pad None np_thru_hole circle (at -2.89 0) (size 0.65 0.65) (drill 0.65) (layers *.Cu *.Mask))
(pad S4 smd rect (at 5.11 3.43) (size 2.18 2) (layers F.Cu F.Paste F.Mask)
(net 1 GND))
(pad S3 smd rect (at -5.11 3.43) (size 2.18 2) (layers F.Cu F.Paste F.Mask)
(net 1 GND))
(pad S2 smd rect (at 5.11 -0.5) (size 2.18 2) (layers F.Cu F.Paste F.Mask)
(net 1 GND))
(pad S1 smd rect (at -5.11 -0.5) (size 2.18 2) (layers F.Cu F.Paste F.Mask)
(net 1 GND))
(pad A7 smd rect (at 0.25 -1.075) (size 0.27 1.15) (layers F.Cu F.Paste F.Mask)
(net 27 D-))
(pad A6 smd rect (at -0.25 -1.075) (size 0.27 1.15) (layers F.Cu F.Paste F.Mask)
(net 28 D+))
(pad B6 smd rect (at 0.75 -1.075) (size 0.27 1.15) (layers F.Cu F.Paste F.Mask)
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(pad B7 smd rect (at -0.75 -1.075) (size 0.27 1.15) (layers F.Cu F.Paste F.Mask)
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(pad A8 smd rect (at 1.25 -1.075) (size 0.27 1.15) (layers F.Cu F.Paste F.Mask)
(net 54 "Net-(J8-PadA8)"))
(pad A5 smd rect (at -1.25 -1.075) (size 0.27 1.15) (layers F.Cu F.Paste F.Mask)
(net 53 "Net-(J8-PadA5)"))
(pad B5 smd rect (at 1.75 -1.075) (size 0.27 1.15) (layers F.Cu F.Paste F.Mask)
(net 52 "Net-(J8-PadB5)"))
(pad B8 smd rect (at -1.75 -1.075) (size 0.27 1.15) (layers F.Cu F.Paste F.Mask)
(net 51 "Net-(J8-PadB8)"))
(pad B1/A12 smd rect (at 3.2 -1.075) (size 0.57 1.15) (layers F.Cu F.Paste F.Mask)
(net 1 GND))
(pad B4/A9 smd rect (at 2.4 -1.075) (size 0.57 1.15) (layers F.Cu F.Paste F.Mask)
(net 7 +5VP))
(pad A4/B9 smd rect (at -2.4 -1.075) (size 0.57 1.15) (layers F.Cu F.Paste F.Mask)
(net 7 +5VP))
(pad A1/B12 smd rect (at -3.2 -1.075) (size 0.57 1.15) (layers F.Cu F.Paste F.Mask)
(net 1 GND))
(model ${KIPRJMOD}/USB4110-GF-A--3DModel-STEP-56544.STEP
(offset (xyz 0 -6.28 1.5))
(scale (xyz 1 1 1))
(rotate (xyz -90 0 0))
)
)
(module unified:QFN50P700X700X90-49N-D (layer F.Cu) (tedit 5FB04177) (tstamp 5FAA0C15)
(at 125.5 67.5 180)
(descr "48 pin QFN MO-220")
(tags "Integrated Circuit")
(path /5FA8FAFE)
(attr smd)
(fp_text reference IC1 (at 0 0 180) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.254)))
)
(fp_text value ATSAMD51G19A-MU (at -23.55 9.7 180) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.254)))
)
(fp_circle (center -3.875 -3.5) (end -3.875 -3.375) (layer F.SilkS) (width 0.25))
(fp_line (start -3.5 -3) (end -3 -3.5) (layer F.Fab) (width 0.1))
(fp_line (start -3.5 3.5) (end -3.5 -3.5) (layer F.Fab) (width 0.1))
(fp_line (start 3.5 3.5) (end -3.5 3.5) (layer F.Fab) (width 0.1))
(fp_line (start 3.5 -3.5) (end 3.5 3.5) (layer F.Fab) (width 0.1))
(fp_line (start -3.5 -3.5) (end 3.5 -3.5) (layer F.Fab) (width 0.1))
(fp_line (start -4.125 4.125) (end -4.125 -4.125) (layer F.CrtYd) (width 0.05))
(fp_line (start 4.125 4.125) (end -4.125 4.125) (layer F.CrtYd) (width 0.05))
(fp_line (start 4.125 -4.125) (end 4.125 4.125) (layer F.CrtYd) (width 0.05))
(fp_line (start -4.125 -4.125) (end 4.125 -4.125) (layer F.CrtYd) (width 0.05))
(fp_text user %R (at 0 0 180) (layer F.Fab)
(effects (font (size 1.27 1.27) (thickness 0.254)))
)
(pad 49 smd rect (at 0 0 180) (size 5.25 5.25) (layers F.Cu F.Paste F.Mask)
(net 1 GND))
(pad 48 smd rect (at -2.75 -3.45 180) (size 0.27 0.85) (layers F.Cu F.Paste F.Mask)
(net 11 DOTSTAR_DATA))
(pad 47 smd rect (at -2.25 -3.45 180) (size 0.27 0.85) (layers F.Cu F.Paste F.Mask)
(net 10 DOTSTAR_CLK))
(pad 46 smd rect (at -1.75 -3.45 180) (size 0.27 0.85) (layers F.Cu F.Paste F.Mask)
(net 31 SWDIO))
(pad 45 smd rect (at -1.25 -3.45 180) (size 0.27 0.85) (layers F.Cu F.Paste F.Mask)
(net 30 SWCLK))
(pad 44 smd rect (at -0.75 -3.45 180) (size 0.27 0.85) (layers F.Cu F.Paste F.Mask)
(net 35 +3V3))
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(pad 42 smd rect (at 0.25 -3.45 180) (size 0.27 0.85) (layers F.Cu F.Paste F.Mask)
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(net 4 "Net-(C4-Pad1)"))
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(net 55 RST))
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(net 50 PA27))
(pad 38 smd rect (at 2.25 -3.45 180) (size 0.27 0.85) (layers F.Cu F.Paste F.Mask)
(net 49 PB23))
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(net 48 PB22))
(pad 36 smd rect (at 3.45 -2.75 270) (size 0.27 0.85) (layers F.Cu F.Paste F.Mask)
(net 35 +3V3))
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(pad 34 smd rect (at 3.45 -1.75 270) (size 0.27 0.85) (layers F.Cu F.Paste F.Mask)
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(net 21 TX))
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(net 20 RX))
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(pad 21 smd rect (at 1.25 3.45 180) (size 0.27 0.85) (layers F.Cu F.Paste F.Mask)
(net 18 SDA))
(pad 20 smd rect (at 0.75 3.45 180) (size 0.27 0.85) (layers F.Cu F.Paste F.Mask)
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(pad 1 smd rect (at -3.45 -2.75 270) (size 0.27 0.85) (layers F.Cu F.Paste F.Mask)
(net 37 PA00))
(model ATSAMD51G19A-MU.stp
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module unified:PCB-artwork (layer F.Cu) (tedit 0) (tstamp 5FAF477F)
(at 123 83)
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