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Hi all,
Thanks for your great work and I really love NetFPGA project!
I found there maybe one bug in the axis_sim_stim.vhd
file. It handles @(N)
as same as +(N)
and doesn't provide the semantic of wait until some absolute time.
-- operator @(N): wait until absolute time N ns
elsif c = '@' then -- wait until absolute time (ns)
read_char( l, c ); -- discard operator
parse_int( l, i );
quiescent;
wait for ( i * 1 ns);
wait_cycle;
-- operator +(N): wait for N ns
elsif c = '+' then -- wait for relative time (ns)
read_char( l, c ); -- discard operator
parse_int( l, i );
quiescent;
wait for ( i * 1 ns);
wait_cycle;
Have a nice day!
Thanks,
Vic
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