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Description
The following procedures will add the capability to expected a non-good response code.
Usecases:
- Check for read-only registers
log("Check 'status' register"); ReadCheck(AXILite_ConfigManager, 32x"04", x"0012"); AxiWrite( AXILite_ConfigManager, 32x"04", x"00FF", AXI4_RESP_DECERR); -- AXI4_RESP_SLVERR); ReadCheck(AXILite_ConfigManager, 32x"04", x"0012");
- Check for registers out off address range (assuming AXI4-Lite register has only 3 registers (0x00, 0x04, 0x08):
log("Check invalid register address"); AxiRead( AXILite_ConfigManager, 32x"0C", Data, AXI4_RESP_DECERR); AxiWrite(AXILite_ConfigManager, 32x"0C", x"00FF", AXI4_RESP_DECERR);
Implementation:
File: AxiOptionsPkg.vhd
-- Blocking Write Transaction with optional expected resonse code.
procedure AxiWrite (
signal TransactionRec : inout AddressBusRecType ;
constant iAddr : in std_logic_vector ;
constant iData : in std_logic_vector ;
constant ExpectedResponseCode : in Axi4RespType := AXI4_RESP_OKAY ;
constant StatusMsgOn : in boolean := false
) is
variable currentResponseCode : Axi4RespType;
begin
GetAxi4Options(TransactionRec, BRESP, currentResponseCode);
SetAxi4Options(TransactionRec, BRESP, ExpectedResponseCode);
Write (TransactionRec, iAddr, iData, StatusMsgOn);
SetAxi4Options(TransactionRec, BRESP, currentResponseCode);
end procedure AxiWrite ;
-- Blocking Read Transaction with optional expected resonse code.
procedure AxiRead (
signal TransactionRec : inout AddressBusRecType ;
constant iAddr : in std_logic_vector ;
variable oData : out std_logic_vector ;
constant ExpectedResponseCode : in Axi4RespType := AXI4_RESP_OKAY ;
constant StatusMsgOn : in boolean := false
) is
variable currentResponseCode : Axi4RespType;
begin
GetAxi4Options(TransactionRec, RRESP, currentResponseCode);
SetAxi4Options(TransactionRec, RRESP, ExpectedResponseCode);
Read (TransactionRec, iAddr, oData, StatusMsgOn);
SetAxi4Options(TransactionRec, RRESP, currentResponseCode);
end procedure AxiRead ;
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