diff --git a/Header/KM1M0DF/KM1M0D0x/gpio.h b/Header/KM1M0DF/KM1M0D0x/gpio.h new file mode 100644 index 0000000..145da12 --- /dev/null +++ b/Header/KM1M0DF/KM1M0D0x/gpio.h @@ -0,0 +1,1037 @@ +/**************************************************************************//** + * @file gpio.h + * @version V1.00 + * @brief KM1M0DF series GPIO Driver Header File + * + * SPDX-License-Identifier: Apache-2.0 + * @copyright (C) 2024 Nuvoton Technology Corp. Japan All rights reserved. + ******************************************************************************/ +#ifndef __GPIO_H__ +#define __GPIO_H__ + +/** @addtogroup Standard_Driver Standard Driver + @{ +*/ + +/** @addtogroup GPIO_Driver GPIO Driver + @{ +*/ + +/** @addtogroup GPIO_EXPORTED_CONSTANTS GPIO Exported Constants + @{ +*/ + +/*---------------------------------------------------------------------------------------------------------*/ +/* Pull-up resistor selection. */ +/*---------------------------------------------------------------------------------------------------------*/ +#define GPIO_PLU_DISABLE (0U) /*!< Without pull-up resistor \hideinitializer */ +#define GPIO_PLU_PULL_UP (1U) /*!< Adding pull-up resistor \hideinitializer */ + +/*---------------------------------------------------------------------------------------------------------*/ +/* LED output selection. */ +/*---------------------------------------------------------------------------------------------------------*/ +#define GPIO_LED_NO_OUTPUT (0U) /*!< No output LED \hideinitializer */ +#define GPIO_LED_OUTPUT (1U) /*!< output LED resistor \hideinitializer */ + +/*---------------------------------------------------------------------------------------------------------*/ +/* Input level selection. */ +/*---------------------------------------------------------------------------------------------------------*/ +#define GPIO_VDD50_30_LOW_LEVEL (0U) /*!< VDD50 x 0.7(High level) VDD50 x 0.3(Low level) \hideinitializer */ +#define GPIO_VDD50_45_LOW_LEVEL (1U) /*!< VDD50 x 0.7(High level) VDD50 x 0.45(Low level) \hideinitializer */ + +/*---------------------------------------------------------------------------------------------------------*/ +/* Nch open drain output control definitions. */ +/*---------------------------------------------------------------------------------------------------------*/ +/* Pin of the specified port */ +#define GPIO_P03ODC GPIO_IOPnODC_Pn3ODC_Msk /*!< P03 Nch open drain selection \hideinitializer */ +#define GPIO_P04ODC GPIO_IOPnODC_Pn4ODC_Msk /*!< P04 Nch open drain selection \hideinitializer */ +#define GPIO_P05ODC GPIO_IOPnODC_Pn5ODC_Msk /*!< P05 Nch open drain selection \hideinitializer */ +#define GPIO_P07ODC GPIO_IOPnODC_Pn7ODC_Msk /*!< P07 Nch open drain selection (KM1M0DF02/03 only) \hideinitializer */ +#define GPIO_P16ODC GPIO_IOPnODC_Pn6ODC_Msk /*!< P16 Nch open drain selection (KM1M0DF02 only) \hideinitializer */ +#define GPIO_P20ODC GPIO_IOPnODC_Pn0ODC_Msk /*!< P20 Nch open drain selection \hideinitializer */ +#define GPIO_P21ODC GPIO_IOPnODC_Pn1ODC_Msk /*!< P21 Nch open drain selection \hideinitializer */ +#define GPIO_P22ODC GPIO_IOPnODC_Pn2ODC_Msk /*!< P22 Nch open drain selection (KM1M0DF04 only) \hideinitializer */ +#define GPIO_P30ODC GPIO_IOPnODC_Pn0ODC_Msk /*!< P30 Nch open drain selection (KM1M0DF02 only) \hideinitializer */ +#define GPIO_P32ODC GPIO_IOPnODC_Pn2ODC_Msk /*!< P32 Nch open drain selection (KM1M0DF02 only) \hideinitializer */ +#define GPIO_P33ODC GPIO_IOPnODC_Pn3ODC_Msk /*!< P33 Nch open drain selection (KM1M0DF02/03 only) \hideinitializer */ +#define GPIO_P34ODC GPIO_IOPnODC_Pn4ODC_Msk /*!< P34 Nch open drain selection (KM1M0DF02/03 only) \hideinitializer */ +#define GPIO_P36ODC GPIO_IOPnODC_Pn6ODC_Msk /*!< P36 Nch open drain selection (KM1M0DF02 only) \hideinitializer */ +#define GPIO_P40ODC GPIO_IOPnODC_Pn0ODC_Msk /*!< P40 Nch open drain selection (KM1M0DF02 only) \hideinitializer */ +#define GPIO_P42ODC GPIO_IOPnODC_Pn2ODC_Msk /*!< P42 Nch open drain selection (KM1M0DF02 only) \hideinitializer */ +#define GPIO_P43ODC GPIO_IOPnODC_Pn3ODC_Msk /*!< P43 Nch open drain selection (KM1M0DF02/03 only) \hideinitializer */ +#define GPIO_P45ODC GPIO_IOPnODC_Pn5ODC_Msk /*!< P45 Nch open drain selection (KM1M0DF02/03 only) \hideinitializer */ +#define GPIO_P50ODC GPIO_IOPnODC_Pn0ODC_Msk /*!< P50 Nch open drain selection \hideinitializer */ +#define GPIO_P52ODC GPIO_IOPnODC_Pn2ODC_Msk /*!< P52 Nch open drain selection \hideinitializer */ +#define GPIO_P53ODC GPIO_IOPnODC_Pn3ODC_Msk /*!< P53 Nch open drain selection \hideinitializer */ +#define GPIO_P64ODC GPIO_IOPnODC_Pn4ODC_Msk /*!< P64 Nch open drain selection \hideinitializer */ +#define GPIO_P65ODC GPIO_IOPnODC_Pn5ODC_Msk /*!< P65 Nch open drain selection \hideinitializer */ +#define GPIO_P67ODC GPIO_IOPnODC_Pn7ODC_Msk /*!< P67 Nch open drain selection \hideinitializer */ +#define GPIO_P71ODC GPIO_IOPnODC_Pn1ODC_Msk /*!< P71 Nch open drain selection \hideinitializer */ +#define GPIO_P72ODC GPIO_IOPnODC_Pn2ODC_Msk /*!< P72 Nch open drain selection \hideinitializer */ +#define GPIO_P73ODC GPIO_IOPnODC_Pn3ODC_Msk /*!< P73 Nch open drain selection \hideinitializer */ +#define GPIO_P74ODC GPIO_IOPnODC_Pn4ODC_Msk /*!< P74 Nch open drain selection \hideinitializer */ +#define GPIO_P75ODC GPIO_IOPnODC_Pn5ODC_Msk /*!< P75 Nch open drain selection \hideinitializer */ +#define GPIO_P77ODC GPIO_IOPnODC_Pn7ODC_Msk /*!< P77 Nch open drain selection \hideinitializer */ +#define GPIO_P92ODC GPIO_IOPnODC_Pn2ODC_Msk /*!< P92 Nch open drain selection (KM1M0DF03 only) \hideinitializer */ +#define GPIO_PA5ODC GPIO_IOPnODC_Pn5ODC_Msk /*!< PA5 Nch open drain selection \hideinitializer */ +#define GPIO_PA6ODC GPIO_IOPnODC_Pn6ODC_Msk /*!< PA6 Nch open drain selection \hideinitializer */ +#define GPIO_PA7ODC GPIO_IOPnODC_Pn7ODC_Msk /*!< PA7 Nch open drain selection \hideinitializer */ + +/* Nch open drain output selection */ +#define GPIO_ODC_PUSHPULL (0U) /*!< Push-pull output \hideinitializer */ +#define GPIO_ODC_NCH_OPENDRAIN (1U) /*!< Nch open drain output \hideinitializer */ + +/*---------------------------------------------------------------------------------------------------------*/ +/* Pin-Function definitions */ +/*---------------------------------------------------------------------------------------------------------*/ +/********************* Bit definition of IOP0MD register **********************/ +#define GPIO_P00MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P00MD_TM10IOB (0x01UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< TM10IOB input/output pin. \hideinitializer */ +#define GPIO_P00MD_LED0 (0x09UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< LED0 output pin. \hideinitializer */ + +#define GPIO_P01MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P01MD_TM09IOB (0x01UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< TM09IOB input/output pin. \hideinitializer */ +#define GPIO_P01MD_LED1 (0x09UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< LED1 output pin. \hideinitializer */ + +#define GPIO_P02MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P02MD_TM07IOB (0x01UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< TM07IOB input/output pin. \hideinitializer */ +#define GPIO_P02MD_SBI0A (0x04UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< SBI0A input pin. \hideinitializer */ +#define GPIO_P02MD_LRX0A (0x04UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< LRX0A input pin. \hideinitializer */ +#define GPIO_P02MD_LED2 (0x09UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< LED2 output pin. \hideinitializer */ + +#define GPIO_P03MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P03MD_TM08IOB (0x01UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< TM08IOB input/output pin. \hideinitializer */ +#define GPIO_P03MD_TM15IOB (0x03UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< TM15IOB input/output pin. \hideinitializer */ +#define GPIO_P03MD_SBO0A (0x04UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< SBO0A input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) \hideinitializer */ +#define GPIO_P03MD_LTX0A (0x04UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< LTX0A input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) \hideinitializer */ +#define GPIO_P03MD_DA1OUT0 (0x07UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< DA1OUT0 output pin. (KM1M0DF04 only) \hideinitializer */ +#define GPIO_P03MD_LED3 (0x09UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< LED3 output pin. \hideinitializer */ + +#define GPIO_P04MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P04MD_TM00IOB (0x01UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< TM00IOB input/output pin. \hideinitializer */ +#define GPIO_P04MD_TM02IOB (0x02UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< TM02IOB input/output pin. \hideinitializer */ +#define GPIO_P04MD_TM11IOA (0x03UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< TM11IOA input/output pin. \hideinitializer */ +#define GPIO_P04MD_SBT0A (0x04UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< SBT0A input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) \hideinitializer */ +#define GPIO_P04MD_LED4 (0x09UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< LED4 output pin. \hideinitializer */ + +#define GPIO_P05MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P05MD_TM12IOA (0x03UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< TM12IOA input/output pin. \hideinitializer */ +#define GPIO_P05MD_SBO3A (0x04UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< SBO3A input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) \hideinitializer */ +#define GPIO_P05MD_LED5 (0x09UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< LED5 output pin. \hideinitializer */ + +#define GPIO_P06MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn6MD_Pos) /*!< General-purpose input/output pin. (KM1M0DF02/03 only) \hideinitializer */ +#define GPIO_P06MD_SBI3A (0x04UL << GPIO_MD_IOPnMD_Pn6MD_Pos) /*!< SBI3A input pin. (KM1M0DF02/03 only) \hideinitializer */ +#define GPIO_P06MD_LED6 (0x09UL << GPIO_MD_IOPnMD_Pn6MD_Pos) /*!< LED6 output pin. (KM1M0DF02/03 only) \hideinitializer */ + +#define GPIO_P07MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn7MD_Pos) /*!< General-purpose input/output pin. (KM1M0DF02/03 only) \hideinitializer */ +#define GPIO_P07MD_SBT3A (0x04UL << GPIO_MD_IOPnMD_Pn7MD_Pos) /*!< SBT3A input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) (KM1M0DF02/03 only) \hideinitializer */ +#define GPIO_P07MD_DA1OUT0 (0x07UL << GPIO_MD_IOPnMD_Pn7MD_Pos) /*!< DA1OUT0 output pin. (KM1M0DF02/03 only) \hideinitializer */ +#define GPIO_P07MD_LED7 (0x09UL << GPIO_MD_IOPnMD_Pn7MD_Pos) /*!< LED7 output pin. (KM1M0DF02/03 only) \hideinitializer */ + +/********************* Bit definition of IOP1MD register **********************/ +#define GPIO_P10MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< General-purpose input/output pin. (KM1M0DF02 only) \hideinitializer */ +#define GPIO_P10MD_TM00IOC (0x01UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< TM00IOC input/output pin. (KM1M0DF02 only) \hideinitializer */ +#define GPIO_P10MD_AN20 (0x07UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< AN20 input pin. (KM1M0DF02 only) \hideinitializer */ + +#define GPIO_P11MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< General-purpose input/output pin. (KM1M0DF02 only) \hideinitializer */ +#define GPIO_P11MD_TM02IOC (0x01UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< TM02IOC input/output pin. (KM1M0DF02 only) \hideinitializer */ +#define GPIO_P11MD_AN21 (0x07UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< AN21 input pin. (KM1M0DF02 only) \hideinitializer */ + +#define GPIO_P12MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< General-purpose input/output pin. (KM1M0DF02 only) \hideinitializer */ +#define GPIO_P12MD_TM01IOC (0x01UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< TM01IOC input/output pin. (KM1M0DF02 only) \hideinitializer */ +#define GPIO_P12MD_AN22 (0x07UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< AN22 input pin. (KM1M0DF02 only) \hideinitializer */ + +#define GPIO_P13MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< General-purpose input/output pin. (KM1M0DF02 only) \hideinitializer */ +#define GPIO_P13MD_TM03IOC (0x01UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< TM03IOC input/output pin. (KM1M0DF02 only) \hideinitializer */ +#define GPIO_P13MD_AN23 (0x07UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< AN23 input pin. (KM1M0DF02 only) \hideinitializer */ + +#define GPIO_P14MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< General-purpose input/output pin. (KM1M0DF02 only) \hideinitializer */ +#define GPIO_P14MD_TM04IOC (0x01UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< TM04IOC input/output pin. (KM1M0DF02 only) \hideinitializer */ + +#define GPIO_P15MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< General-purpose input/output pin. (KM1M0DF02 only) \hideinitializer */ +#define GPIO_P15MD_TM07IOC (0x01UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< TM07IOC input/output pin. (KM1M0DF02 only) \hideinitializer */ +#define GPIO_P15MD_BUZZERB (0x02UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< BUZZERB output pin. (KM1M0DF02 only) \hideinitializer */ + +#define GPIO_P16MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn6MD_Pos) /*!< General-purpose input/output pin. (KM1M0DF02 only) \hideinitializer */ +#define GPIO_P16MD_TM08IOC (0x01UL << GPIO_MD_IOPnMD_Pn6MD_Pos) /*!< TM08IOC input/output pin. (KM1M0DF02 only) \hideinitializer */ +#define GPIO_P16MD_NBUZZERB (0x02UL << GPIO_MD_IOPnMD_Pn6MD_Pos) /*!< NBUZZERB output pin. (KM1M0DF02 only) \hideinitializer */ +#define GPIO_P16MD_SBC2B (0x05UL << GPIO_MD_IOPnMD_Pn6MD_Pos) /*!< SBC2B input/output pin.(Nch open-drain control is valid when serial I/F output is selected.) (KM1M0DF02 only) \hideinitializer */ + +/********************* Bit definition of IOP2MD register **********************/ +#define GPIO_P20MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P20MD_SBC3A (0x04UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< SBC3A input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) (KM1M0DF02/03 only)\hideinitializer */ +#define GPIO_P20MD_SBI3A (0x04UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< SBI3A input pin. (KM1M0DF04 only) \hideinitializer */ +#define GPIO_P20MD_SCL8 (0x05UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< IICSCL8 input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) \hideinitializer */ +#define GPIO_P20MD_IRQ0A (0x0AUL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< External interrupt input 0A pin. \hideinitializer */ + +#define GPIO_P21MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P21MD_SBT3A (0x04UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< SBT3A input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) (KM1M0DF04 only) \hideinitializer */ +#define GPIO_P21MD_SDA8 (0x05UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< IICSDA8 input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) \hideinitializer */ +#define GPIO_P21MD_IRQ1A (0x0AUL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< External interrupt input 1A pin. \hideinitializer */ + +#define GPIO_P22MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P22MD_SBC3A (0x04UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< SBC3A input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) (KM1M0DF04 only) \hideinitializer */ +#define GPIO_P22MD_IRQ2A (0x0AUL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< External interrupt input 2A pin. \hideinitializer */ + +#define GPIO_P23MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P23MD_TM13IOA (0x01UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< TM13IOA input/output pin. \hideinitializer */ +#define GPIO_P23MD_IRQ3A (0x0AUL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< External interrupt input 3A pin. \hideinitializer */ + +#define GPIO_P24MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P24MD_TM14IOA (0x01UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< TM14IOA input/output pin. \hideinitializer */ +#define GPIO_P24MD_IRQ4A (0x0AUL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< External interrupt input 4A pin. \hideinitializer */ + +#define GPIO_P25MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P25MD_OSC1 (0x07UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< External high-speed vibration OSC1 pin. \hideinitializer */ + +#define GPIO_P26MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn6MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P26MD_OSC2 (0x07UL << GPIO_MD_IOPnMD_Pn6MD_Pos) /*!< External high-speed vibration OSC2 pin. \hideinitializer */ + +/********************* Bit definition of IOP3MD register **********************/ +#define GPIO_P30MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< General-purpose input/output pin. (KM1M0DF02 only) \hideinitializer */ +#define GPIO_P30MD_SBO2B (0x05UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< SBO2B input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) (KM1M0DF02 only) \hideinitializer */ + +#define GPIO_P31MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< General-purpose input/output pin. (KM1M0DF02 only) \hideinitializer */ +#define GPIO_P31MD_SBI2B (0x05UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< SBI2B input pin. (KM1M0DF02 only) \hideinitializer */ + +#define GPIO_P32MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< General-purpose input/output pin. (KM1M0DF02 only) \hideinitializer */ +#define GPIO_P32MD_SBC4B (0x04UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< SBC4B input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) (KM1M0DF02 only) \hideinitializer */ +#define GPIO_P32MD_SBT2B (0x05UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< SBT2B input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) (KM1M0DF02 only) \hideinitializer */ + +#define GPIO_P33MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< General-purpose input/output pin. (KM1M0DF02/03 only) \hideinitializer */ +#define GPIO_P33MD_SBO4B (0x04UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< SBO4B input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) (KM1M0DF02/03 only) \hideinitializer */ +#define GPIO_P33MD_SDA6B (0x05UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< IICSDA6B input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) (KM1M0DF02/03 only) \hideinitializer */ +#define GPIO_P33MD_AN15 (0x07UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< AN15 input pin. (KM1M0DF03 only) \hideinitializer */ + +#define GPIO_P34MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< General-purpose input/output pin. (KM1M0DF02/03 only) \hideinitializer */ +#define GPIO_P34MD_SBT4B (0x04UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< SBT4B input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) (KM1M0DF02/03 only) \hideinitializer */ +#define GPIO_P34MD_SCL6B (0x05UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< IIC0SCL6B input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) (KM1M0DF02/03 only) \hideinitializer */ + +#define GPIO_P35MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< General-purpose input/output pin. (KM1M0DF02/03 only) \hideinitializer */ +#define GPIO_P35MD_SBI4B (0x04UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< SBI4B input pin. (KM1M0DF02/03 only) \hideinitializer */ +#define GPIO_P35MD_DA0OUT0 (0x07UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< DA0OUT0 ouput pin. (KM1M0DF03 only)\hideinitializer */ + + +#define GPIO_P36MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn6MD_Pos) /*!< General-purpose input/output pin. (KM1M0DF02 only)\hideinitializer */ +#define GPIO_P36MD_SBC3B (0x04UL << GPIO_MD_IOPnMD_Pn6MD_Pos) /*!< SBC3B input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) (KM1M0DF02 only)\hideinitializer */ + +/********************* Bit definition of IOP4MD register **********************/ +#define GPIO_P40MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< General-purpose input/output pin. (KM1M0DF02 only) \hideinitializer */ +#define GPIO_P40MD_SBO3B (0x04UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< SBO3B input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) (KM1M0DF02 only) \hideinitializer */ + +#define GPIO_P41MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< General-purpose input/output pin. (KM1M0DF02 only) \hideinitializer */ +#define GPIO_P41MD_SBI3B (0x04UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< SBI3B input pin. (KM1M0DF02 only) \hideinitializer */ + +#define GPIO_P42MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< General-purpose input/output pin. (KM1M0DF02 only) \hideinitializer */ +#define GPIO_P42MD_SBT3B (0x04UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< SBT3B input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) (KM1M0DF02 only) \hideinitializer */ + +#define GPIO_P43MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< General-purpose input/output pin. (KM1M0DF02/03 only) \hideinitializer */ +#define GPIO_P43MD_SBO0B (0x04UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< SBO0B input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) (KM1M0DF02/03 only) \hideinitializer */ +#define GPIO_P43MD_LTX0B (0x04UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< LTX0B input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) (KM1M0DF02/03 only) \hideinitializer */ + +#define GPIO_P44MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< General-purpose input/output pin. (KM1M0DF02/03 only) \hideinitializer */ +#define GPIO_P44MD_SBI0B (0x04UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< SBI0B input pin. (KM1M0DF02/03 only) \hideinitializer */ +#define GPIO_P44MD_LRX0B (0x04UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< LRX0B input pin. (KM1M0DF02/03 only) \hideinitializer */ + +#define GPIO_P45MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< General-purpose input/output pin. (KM1M0DF02/03 only) \hideinitializer */ +#define GPIO_P45MD_SBT0B (0x04UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< SBT0B input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) (KM1M0DF02/03 only) \hideinitializer */ + +#define GPIO_P46MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn6MD_Pos) /*!< General-purpose input/output pin. (KM1M0DF02/03 only) \hideinitializer */ + +#define GPIO_P47MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn7MD_Pos) /*!< General-purpose input/output pin. (KM1M0DF02/03 only) \hideinitializer */ + +/********************* Bit definition of IOP5MD register **********************/ +#define GPIO_P50MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P50MD_TM07OUT0 (0x01UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< TM07OUT0 output pin. \hideinitializer */ +#define GPIO_P50MD_SBO1A (0x04UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< SBO1A input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) \hideinitializer */ +#define GPIO_P50MD_CMPIN1B (0x08UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< CMPIN1B input pin. (KM1M0DF02 only) \hideinitializer */ + +#define GPIO_P51MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P51MD_TM07OUT1 (0x01UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< TM07OUT1 output pin. \hideinitializer */ +#define GPIO_P51MD_SBI1A (0x04UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< SBI1A input pin. \hideinitializer */ +#define GPIO_P51MD_CMPREF1B (0x08UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< CMPREF1B input pin. (KM1M0DF02 only) \hideinitializer */ + +#define GPIO_P52MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P52MD_TM07OUT2 (0x01UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< TM07OUT2 output pin. \hideinitializer */ +#define GPIO_P52MD_SBT1A (0x04UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< SBT1A input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) \hideinitializer */ + +#define GPIO_P53MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P53MD_TM07OUT3 (0x01UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< TM07OUT3 output pin. \hideinitializer */ +#define GPIO_P53MD_SBC1A (0x04UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< SBC1A input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) \hideinitializer */ + +#define GPIO_P54MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P54MD_TM07OUT4 (0x01UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< TM07OUT4 output pin. \hideinitializer */ + +#define GPIO_P55MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P55MD_TM07OUT5 (0x01UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< TM07OUT5 output pin. \hideinitializer */ +#define GPIO_P55MD_AN11 (0x07UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< AN11 input pin. (KM1M0DF04 only) \hideinitializer */ + +#define GPIO_P56MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn6MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P56MD_NBUZZERA (0x01UL << GPIO_MD_IOPnMD_Pn6MD_Pos) /*!< NBUZZERA output pin. \hideinitializer */ +#define GPIO_P56MD_AN10 (0x07UL << GPIO_MD_IOPnMD_Pn6MD_Pos) /*!< AN10 input pin. (KM1M0DF04 only) \hideinitializer */ +#define GPIO_P56MD_DA0OUT0 (0x07UL << GPIO_MD_IOPnMD_Pn6MD_Pos) /*!< DA0OUT0 output pin. (KM1M0DF04 only) \hideinitializer */ + +#define GPIO_P57MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn7MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P57MD_BUZZERA (0x01UL << GPIO_MD_IOPnMD_Pn7MD_Pos) /*!< BUZZERA output pin. \hideinitializer */ +#define GPIO_P57MD_AN9 (0x07UL << GPIO_MD_IOPnMD_Pn7MD_Pos) /*!< AN9 input pin. (KM1M0DF04 only) \hideinitializer */ + +/********************* Bit definition of IOP6MD register **********************/ +#define GPIO_P61MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< General-purpose input/output pin. (KM1M0DF02 only) \hideinitializer */ +#define GPIO_P61MD_DA1OUT1 (0x07UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< DA1OUT1 output pin. (KM1M0DF02 only) \hideinitializer */ + +#define GPIO_P62MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P62MD_TM01IOB (0x01UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< TM01IOB input/output pin. \hideinitializer */ +#define GPIO_P62MD_CMPREF1A (0x08UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< CMPREF1A input pin. (KM1M0DF02 only) \hideinitializer */ + +#define GPIO_P63MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P63MD_TM03IOB (0x01UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< TM03IOB input/output pin. \hideinitializer */ +#define GPIO_P63MD_CMPIN1A (0x08UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< CMPIN1A input pin. (KM1M0DF02 only) \hideinitializer */ + +#define GPIO_P64MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P64MD_TM04IOB (0x01UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< TM04IOB input/output pin. \hideinitializer */ +#define GPIO_P64MD_SBC2A (0x04UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< SBC2A input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) \hideinitializer */ +#define GPIO_P64MD_CMPOT1 (0x08UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< CMPOT1 output pin. (KM1M0DF02 only) \hideinitializer */ + +#define GPIO_P65MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P65MD_SBO2A (0x04UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< SBO2A input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) \hideinitializer */ + +#define GPIO_P66MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn6MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P66MD_SBI2A (0x04UL << GPIO_MD_IOPnMD_Pn6MD_Pos) /*!< SBI2A input pin. \hideinitializer */ + +#define GPIO_P67MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn7MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P67MD_SBT2A (0x04UL << GPIO_MD_IOPnMD_Pn7MD_Pos) /*!< SBT2A input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) \hideinitializer */ + +/********************* Bit definition of IOP7MD register **********************/ +#define GPIO_P70MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P70MD_SBI4A (0x04UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< SBI4A input pin. \hideinitializer */ +#define GPIO_P70MD_CMPREF1B (0x08UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< CMPREF1B input (KM1M0DF03 only) pin. \hideinitializer */ +#define GPIO_P70MD_KEY0 (0x0AUL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< Key interrupt input KEY0 pin. \hideinitializer */ + +#define GPIO_P71MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P71MD_SBO4A (0x04UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< SBO4A input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) \hideinitializer */ +#define GPIO_P71MD_SDA6A (0x05UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< SDA6A input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) \hideinitializer */ +#define GPIO_P71MD_CMPIN1B (0x08UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< CMPIN1B inpuT pin. (KM1M0DF03 only) \hideinitializer */ +#define GPIO_P71MD_KEY1 (0x0AUL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< Key interrupt input KEY1 pin. \hideinitializer */ + +#define GPIO_P72MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P72MD_SBT4A (0x04UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< SBT4A input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) \hideinitializer */ +#define GPIO_P72MD_SCL6A (0x05UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< SCL6A input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) \hideinitializer */ +#define GPIO_P72MD_DA1OUT1 (0x07UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< DA1OUT1 output pin. (KM1M0DF03 only) \hideinitializer */ +#define GPIO_P72MD_KEY2 (0x0AUL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< Key interrupt input KEY2 pin. \hideinitializer */ + +#define GPIO_P73MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P73MD_TM13IOB (0x01UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< TM13IOB input/output pin. \hideinitializer */ +#define GPIO_P73MD_SBC4A (0x04UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< SBC4A input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) \hideinitializer */ +#define GPIO_P73MD_SDA7A (0x05UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< IICSDA7A input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) \hideinitializer */ +#define GPIO_P73MD_CMPREF1B (0x08UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< CMPREF1B input pin. (KM1M0DF04 only) \hideinitializer */ +#define GPIO_P73MD_CMPREF1A (0x08UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< CMPREF1A input pin. (KM1M0DF03 only) \hideinitializer */ +#define GPIO_P73MD_KEY3 (0x0AUL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< Key interrupt input KEY3 pin. \hideinitializer */ + +#define GPIO_P74MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P74MD_TM14IOB (0x01UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< TM14IOB input/output pin. \hideinitializer */ +#define GPIO_P74MD_SBC1B (0x04UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< SBC1B input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) \hideinitializer */ +#define GPIO_P74MD_SCL7A (0x05UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< IICSCL7A input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) \hideinitializer */ +#define GPIO_P74MD_CMPIN1B (0x08UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< CMPIN1B input pin. (KM1M0DF04 only) \hideinitializer */ +#define GPIO_P74MD_CMPIN1A (0x08UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< CMPIN1A input pin. (KM1M0DF03 only) \hideinitializer */ +#define GPIO_P74MD_KEY4 (0x0AUL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< Key interrupt input KEY4 pin. \hideinitializer */ + +#define GPIO_P75MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P75MD_SBO1B (0x04UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< SBO1B input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) \hideinitializer */ +#define GPIO_P75MD_DA1OUT1 (0x07UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< DA1OUT1 output pin. (KM1M0DF04 only) \hideinitializer */ +#define GPIO_P75MD_CMPOT1 (0x08UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< CMPOT1 output pin. (KM1M0DF03 only) \hideinitializer */ +#define GPIO_P75MD_KEY5 (0x0AUL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< Key interrupt input KEY5 pin. \hideinitializer */ + +#define GPIO_P76MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn6MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P76MD_SBI1B (0x04UL << GPIO_MD_IOPnMD_Pn6MD_Pos) /*!< SBI1B input pin. \hideinitializer */ +#define GPIO_P76MD_CMPREF1A (0x08UL << GPIO_MD_IOPnMD_Pn6MD_Pos) /*!< CMPREF1A input pin. (KM1M0DF04 only) \hideinitializer */ +#define GPIO_P76MD_KEY6 (0x0AUL << GPIO_MD_IOPnMD_Pn6MD_Pos) /*!< Key interrupt input KEY6 pin. \hideinitializer */ + +#define GPIO_P77MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn7MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P77MD_SBT1B (0x04UL << GPIO_MD_IOPnMD_Pn7MD_Pos) /*!< SBT1B input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) \hideinitializer */ +#define GPIO_P77MD_CMPIN1A (0x08UL << GPIO_MD_IOPnMD_Pn7MD_Pos) /*!< CMPIN1A input pin. (KM1M0DF04 only) \hideinitializer */ +#define GPIO_P77MD_KEY7 (0x0AUL << GPIO_MD_IOPnMD_Pn7MD_Pos) /*!< Key interrupt input KEY7 pin. \hideinitializer */ + +/********************* Bit definition of IOP8MD register **********************/ +#define GPIO_P80MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P80MD_SDO0 (0x01UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< Timer synchronous output SDO0 pin. \hideinitializer */ +#define GPIO_P80MD_PWM0A (0x02UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< PWM0A output pin. \hideinitializer */ +#define GPIO_P80MD_CMPOT1 (0x08UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< CMPOT1 output pin. (KM1M0DF04 only) \hideinitializer */ + +#define GPIO_P81MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P81MD_SDO1 (0x01UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< Timer synchronous output SDO1 pin. \hideinitializer */ +#define GPIO_P81MD_NPWM0A (0x02UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< NPWM0A output pin. \hideinitializer */ + +#define GPIO_P82MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P82MD_SDO2 (0x01UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< Timer synchronous output SDO2 pin. \hideinitializer */ +#define GPIO_P82MD_PWM1A (0x02UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< PWM1A output pin. \hideinitializer */ + +#define GPIO_P83MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P83MD_SDO3 (0x01UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< Timer synchronous output SDO3 pin. \hideinitializer */ +#define GPIO_P83MD_NPWM1A (0x02UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< NPWM1A output pin. \hideinitializer */ + +#define GPIO_P84MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P84MD_SDO4 (0x01UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< Timer synchronous output SDO4 pin. \hideinitializer */ +#define GPIO_P84MD_PWM2A (0x02UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< PWM2A output pin. \hideinitializer */ + +#define GPIO_P85MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P85MD_SDO5 (0x01UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< Timer synchronous output SDO5 pin. \hideinitializer */ +#define GPIO_P85MD_NPWM2A (0x02UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< NPWM2A output pin. \hideinitializer */ + +#define GPIO_P86MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn6MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P86MD_SDO6 (0x01UL << GPIO_MD_IOPnMD_Pn6MD_Pos) /*!< Timer synchronous output SDO6 pin. \hideinitializer */ +#define GPIO_P86MD_PWMBCSTA (0x02UL << GPIO_MD_IOPnMD_Pn6MD_Pos) /*!< PWMBCSTA output pin. \hideinitializer */ + +#define GPIO_P87MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn7MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P87MD_SDO7 (0x01UL << GPIO_MD_IOPnMD_Pn7MD_Pos) /*!< Timer synchronous output SDO7 pin. \hideinitializer */ +#define GPIO_P87MD_TM15IOC (0x02UL << GPIO_MD_IOPnMD_Pn7MD_Pos) /*!< TM15IOC output pin. \hideinitializer */ + +/********************* Bit definition of IOP9MD register **********************/ +#define GPIO_P90MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P90MD_XI (0x07UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< External low speed vibration XI pin. \hideinitializer */ + +#define GPIO_P91MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P91MD_XO (0x07UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< External low speed vibration XO pin. \hideinitializer */ + +#define GPIO_P92MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< General-purpose input/output pin. (KM1M0DF02/03 only) \hideinitializer */ +#define GPIO_P92MD_SBC4B (0x04UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< SBC4B input pin. (KM1M0DF03 only) \hideinitializer */ +#define GPIO_P92MD_AN19 (0x07UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< AN19 input pin. (KM1M0DF02 only) \hideinitializer */ +#define GPIO_P92MD_AN14 (0x07UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< AN14 input pin. (KM1M0DF03 only) \hideinitializer */ + +#define GPIO_P93MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< General-purpose input/output pin. (KM1M0DF02/03 only) \hideinitializer */ +#define GPIO_P93MD_AN18 (0x07UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< AN18 input pin. (KM1M0DF02 only) \hideinitializer */ +#define GPIO_P93MD_AN13 (0x07UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< AN13 input pin. (KM1M0DF03 only) \hideinitializer */ + +#define GPIO_P94MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P94MD_AN17 (0x07UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< AN17 input pin. (KM1M0DF02 only) \hideinitializer */ +#define GPIO_P94MD_DA0OUT0 (0x07UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< DA0OUT0 output pin. (KM1M0DF02 only) \hideinitializer */ +#define GPIO_P94MD_AN12 (0x07UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< AN12 input pin. (KM1M0DF03 only) \hideinitializer */ +#define GPIO_P94MD_AN8 (0x07UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< AN8 input pin. (KM1M0DF04 only) \hideinitializer */ +#define GPIO_P94MD_DA0OUT1 (0x07UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< DA0OUT1 output pin. (KM1M0DF03 only) \hideinitializer */ +#define GPIO_P94MD_CMPREF0B (0x08UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< CMPREF0B input pin. (KM1M0DF03 only) \hideinitializer */ + +#define GPIO_P95MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P95MD_AN16 (0x07UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< AN16 input pin. (KM1M0DF02 only) \hideinitializer */ +#define GPIO_P95MD_DA0OUT1 (0x07UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< DA0OUT1 output pin. (KM1M0DF02 only) \hideinitializer */ + +/********************* Bit definition of IOPAMD register **********************/ +#define GPIO_PA0MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_PA0MD_TM00IOA (0x01UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< TM00IOA input/output pin. (KM1M0DF02/03 only) \hideinitializer */ +#define GPIO_PA0MD_TM00IOA_64 (0x02UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< TM00IOA input/output pin. (KM1M0DF04 only) \hideinitializer */ +#define GPIO_PA0MD_TM15IOA (0x02UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< TM15IOA input/output pin. (KM1M0DF02/03 only) \hideinitializer */ +#define GPIO_PA0MD_AN0 (0x07UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< AN0 input pin. \hideinitializer */ + +#define GPIO_PA1MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_PA1MD_TM01IOA (0x01UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< TM01IOA input/output pin. (KM1M0DF02/03 only) \hideinitializer */ +#define GPIO_PA1MD_TM01IOA_64 (0x02UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< TM01IOA input/output pin. (KM1M0DF04 only) \hideinitializer */ +#define GPIO_PA1MD_TM11IOB (0x02UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< TM11IOB input/output pin. (KM1M0DF02/03 only) \hideinitializer */ +#define GPIO_PA1MD_AN1 (0x07UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< AN1 input pin. \hideinitializer */ + +#define GPIO_PA2MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_PA2MD_TM02IOA (0x01UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< TM02IOA input/output pin. (KM1M0DF02/03 only) \hideinitializer */ +#define GPIO_PA2MD_TM02IOA_64 (0x02UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< TM02IOA input/output pin. (KM1M0DF04 only) \hideinitializer */ +#define GPIO_PA2MD_TM12IOB (0x02UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< TM12IOB input/output pin. (KM1M0DF02/03 only) \hideinitializer */ +#define GPIO_PA2MD_AN2 (0x07UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< AN2 input pin. \hideinitializer */ +#define GPIO_PA2MD_DA0OUT1 (0x07UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< DA0OUT1 output pin. (KM1M0DF04 only) \hideinitializer */ +#define GPIO_PA2MD_CMPREF0B (0x08UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< CMPREF0B input pin. (KM1M0DF04 only) \hideinitializer */ + +#define GPIO_PA3MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_PA3MD_TM03IOA (0x01UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< TM03IOA input/output pin. (KM1M0DF02/03 only) \hideinitializer */ +#define GPIO_PA3MD_TM03IOA_64 (0x02UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< TM03IOA input/output pin. (KM1M0DF04 only) \hideinitializer */ +#define GPIO_PA3MD_AN3 (0x07UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< AN3 input pin. \hideinitializer */ +#define GPIO_PA3MD_CMPIN0B (0x08UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< CMPIN0B input pin. (KM1M0DF04 only) \hideinitializer */ + +#define GPIO_PA4MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_PA4MD_TM04IOA (0x01UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< TM04IOA input/output pin. \hideinitializer */ +#define GPIO_PA4MD_SBI5 (0x04UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< SBI5 input pin. \hideinitializer */ +#define GPIO_PA4MD_AN4 (0x07UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< AN4 input pin. \hideinitializer */ +#define GPIO_PA4MD_CMPREF0A (0x08UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< CMPREF0A input pin. \hideinitializer */ + +#define GPIO_PA5MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_PA5MD_TM07IOA (0x01UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< TM07IOA input/output pin. \hideinitializer */ +#define GPIO_PA5MD_SBO5 (0x04UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< SBO5 input/output pin. (Nch open-drain control is valid when serial I/F input/output is selected.) \hideinitializer */ +#define GPIO_PA5MD_AN5 (0x07UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< AN5 input pin. \hideinitializer */ +#define GPIO_PA5MD_CMPIN0A (0x08UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< CMPIN0A input pin. \hideinitializer */ + +#define GPIO_PA6MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn6MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_PA6MD_TM08IOA (0x01UL << GPIO_MD_IOPnMD_Pn6MD_Pos) /*!< TM08IOA input/output pin. \hideinitializer */ +#define GPIO_PA6MD_TM10IOA (0x02UL << GPIO_MD_IOPnMD_Pn6MD_Pos) /*!< TM10IOA input/output pin. \hideinitializer */ +#define GPIO_PA6MD_SBT5 (0x04UL << GPIO_MD_IOPnMD_Pn6MD_Pos) /*!< SBT5 input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) \hideinitializer */ +#define GPIO_PA6MD_AN6 (0x07UL << GPIO_MD_IOPnMD_Pn6MD_Pos) /*!< AN6 input pin. \hideinitializer */ +#define GPIO_PA6MD_CMPOT0 (0x08UL << GPIO_MD_IOPnMD_Pn6MD_Pos) /*!< CMPOT0 output pin. \hideinitializer */ + +#define GPIO_PA7MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn7MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_PA7MD_MONITOR (0x01UL << GPIO_MD_IOPnMD_Pn7MD_Pos) /*!< Monitor output pin. \hideinitializer */ +#define GPIO_PA7MD_TM09IOA (0x02UL << GPIO_MD_IOPnMD_Pn7MD_Pos) /*!< TM09IOA input/output pin. \hideinitializer */ +#define GPIO_PA7MD_SBC5 (0x04UL << GPIO_MD_IOPnMD_Pn7MD_Pos) /*!< SBC5 input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) \hideinitializer */ +#define GPIO_PA7MD_AN7 (0x07UL << GPIO_MD_IOPnMD_Pn7MD_Pos) /*!< AN7 input pin. \hideinitializer */ + +/********************* Bit definition of IOPBMD register **********************/ +#define GPIO_PB0MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< General-purpose input/output pin. (KM1M0DF02/03 only) \hideinitializer */ +#define GPIO_PB0MD_AN8 (0x07UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< AN8 input pin. (KM1M0DF02/03 only) \hideinitializer */ + +#define GPIO_PB1MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< General-purpose input/output pin. (KM1M0DF02/03 only) \hideinitializer */ +#define GPIO_PB1MD_AN9 (0x07UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< AN9 input pin. (KM1M0DF02/03 only) \hideinitializer */ + +#define GPIO_PB2MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< General-purpose input/output pin. (KM1M0DF02/03 only) \hideinitializer */ +#define GPIO_PB2MD_AN10 (0x07UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< AN10 input pin. (KM1M0DF02/03 only) \hideinitializer */ + +#define GPIO_PB3MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< General-purpose input/output pin. (KM1M0DF02/03 only) \hideinitializer */ +#define GPIO_PB3MD_AN11 (0x07UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< AN11 input pin. (KM1M0DF02/03 only) \hideinitializer */ +#define GPIO_PB3MD_CMPIN0B (0x08UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< CMPIN0B input pin. (KM1M0DF02/03 only) \hideinitializer */ + +#define GPIO_PB4MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< General-purpose input/output pin. (KM1M0DF02 only) \hideinitializer */ +#define GPIO_PB4MD_AN12 (0x07UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< AN12 input pin. (KM1M0DF02 only) \hideinitializer */ +#define GPIO_PB4MD_CMPREF0B (0x08UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< CMPREF0B input pin. (KM1M0DF02 only) \hideinitializer */ + +#define GPIO_PB5MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< General-purpose input/output pin. (KM1M0DF02 only) \hideinitializer */ +#define GPIO_PB5MD_AN13 (0x07UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< AN13 input pin. (KM1M0DF02 only) \hideinitializer */ + +#define GPIO_PB6MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn6MD_Pos) /*!< General-purpose input/output pin. (KM1M0DF02 only) \hideinitializer */ +#define GPIO_PB6MD_AN14 (0x07UL << GPIO_MD_IOPnMD_Pn6MD_Pos) /*!< AN14 input pin. (KM1M0DF02 only) \hideinitializer */ + +#define GPIO_PB7MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn7MD_Pos) /*!< General-purpose input/output pin. (KM1M0DF02 only) \hideinitializer */ +#define GPIO_PB7MD_AN15 (0x07UL << GPIO_MD_IOPnMD_Pn7MD_Pos) /*!< AN15 input pin. (KM1M0DF02 only) \hideinitializer */ + +/*---------------------------------------------------------------------------------------------------------*/ +/* Pin Interrupt control definitions */ +/*---------------------------------------------------------------------------------------------------------*/ +/* Interrupt definitions */ +#define GPIO_EXINT0 (EXINT_MD_EXTDEG_IRQEG4_Pos) /*!< External interrupt 0 \hideinitializer */ +#define GPIO_EXINT1 (EXINT_MD_EXTDEG_IRQEG5_Pos) /*!< External interrupt 1 \hideinitializer */ +#define GPIO_EXINT2 (EXINT_MD_EXTDEG_IRQEG6_Pos) /*!< External interrupt 2 \hideinitializer */ +#define GPIO_EXINT3 (EXINT_MD_EXTDEG_IRQEG7_Pos) /*!< External interrupt 3 \hideinitializer */ +#define GPIO_EXINT4 (EXINT_MD_EXTDEG_IRQEG8_Pos) /*!< External interrupt 4 \hideinitializer */ +#define GPIO_KEYINT0 (EXINT_MD_EXTDEG_IRQEG9_Pos) /*!< KEY interrupt 0 \hideinitializer */ +#define GPIO_KEYINT1 (EXINT_MD_EXTDEG_IRQEG10_Pos) /*!< KEY interrupt 1 \hideinitializer */ +#define GPIO_KEYINT2 (EXINT_MD_EXTDEG_IRQEG11_Pos) /*!< KEY interrupt 2 \hideinitializer */ +#define GPIO_KEYINT3 (EXINT_MD_EXTDEG_IRQEG12_Pos) /*!< KEY interrupt 3 \hideinitializer */ +#define GPIO_KEYINT4 (EXINT_MD_EXTDEG_IRQEG13_Pos) /*!< KEY interrupt 4 \hideinitializer */ +#define GPIO_KEYINT5 (EXINT_MD_EXTDEG_IRQEG14_Pos) /*!< KEY interrupt 5 \hideinitializer */ +#define GPIO_KEYINT6 (EXINT_MD_EXTDEG_IRQEG15_Pos) /*!< KEY interrupt 6 \hideinitializer */ +#define GPIO_KEYINT7 (EXINT_MD_EXTDEG_IRQEG16_Pos) /*!< KEY interrupt 7 \hideinitializer */ + +/* Both edge detect selection */ +#define GPIO_INTERRUPT_BOTHEDGE_DISABLE (0x00U) /*!< GPIO interrupt both-edge : disable \hideinitializer */ +#define GPIO_INTERRUPT_BOTHEDGE_ENABLE (0x01U) /*!< GPIO interrupt both-edge : enable \hideinitializer */ + +/* Interrupt trigger settings */ +#define GPIO_INTERRUPT_TRIGGER_RISINGEDGE (0x00U) /*!< GPIO interrupt trigger : rising edge \hideinitializer */ +#define GPIO_INTERRUPT_TRIGGER_FALLINGEDGE (0x01U) /*!< GPIO interrupt trigger : falling edge \hideinitializer */ +#define GPIO_INTERRUPT_TRIGGER_H_LEVEL (0x02U) /*!< GPIO interrupt trigger : "H" level \hideinitializer */ +#define GPIO_INTERRUPT_TRIGGER_L_LEVEL (0x03U) /*!< GPIO interrupt trigger : "L" level \hideinitializer */ + +/*---------------------------------------------------------------------------------------------------------*/ +/* Noise Filter Sampling clock frequency selection */ +/*---------------------------------------------------------------------------------------------------------*/ +#define GPIO_NF_SMP_SYSCLK (0x00U << NF_NFnCTR_CK_Pos) /*!< Noise Filter Sampling clock frequency : SYSCLK \hideinitializer */ +#define GPIO_NF_SMP_SYSCLK_DIV_32 (0x01U << NF_NFnCTR_CK_Pos) /*!< Noise Filter Sampling clock frequency : SYSCLK/32 \hideinitializer */ +#define GPIO_NF_SMP_SYSCLK_DIV_64 (0x02U << NF_NFnCTR_CK_Pos) /*!< Noise Filter Sampling clock frequency : SYSCLK/64 \hideinitializer */ +#define GPIO_NF_SMP_SYSCLK_DIV_128 (0x03U << NF_NFnCTR_CK_Pos) /*!< Noise Filter Sampling clock frequency : SYSCLK/128 \hideinitializer */ +#define GPIO_NF_SMP_SYSCLK_DIV_256 (0x04U << NF_NFnCTR_CK_Pos) /*!< Noise Filter Sampling clock frequency : SYSCLK/256 \hideinitializer */ +#define GPIO_NF_SMP_SYSCLK_DIV_512 (0x05U << NF_NFnCTR_CK_Pos) /*!< Noise Filter Sampling clock frequency : SYSCLK/512 \hideinitializer */ +#define GPIO_NF_SMP_SYSCLK_DIV_1024 (0x06U << NF_NFnCTR_CK_Pos) /*!< Noise Filter Sampling clock frequency : SYSCLK/1024 \hideinitializer */ +#define GPIO_NF_SMP_LPCLK (0x07U << NF_NFnCTR_CK_Pos) /*!< Noise Filter Sampling clock frequency : LPCLK \hideinitializer */ + +/*---------------------------------------------------------------------------------------------------------*/ +/* External interrupt number */ +/*---------------------------------------------------------------------------------------------------------*/ +/* The following is used to operate the registers GnIRCLR, GnIESET, GnIECLR, GnID. */ +/* Each bit of the register GnIRCLR, GnIESET, GnIECLR, GnID indicates the interrupt group number and is common to all. */ +/* Therefore, the following refers to the GnIRCLR macro, but they are used in common. */ +#define GPIO_EXTERNAL_INT0 (EXINT_CTRL_GnID_ID0_Msk) /*!< GPIO external interrupt0 \hideinitializer */ +#define GPIO_EXTERNAL_INT1 (EXINT_CTRL_GnID_ID1_Msk) /*!< GPIO external interrupt1 \hideinitializer */ +#define GPIO_EXTERNAL_INT2 (EXINT_CTRL_GnID_ID2_Msk) /*!< GPIO external interrupt2 \hideinitializer */ +#define GPIO_EXTERNAL_INT3 (EXINT_CTRL_GnID_ID3_Msk) /*!< GPIO external interrupt3 \hideinitializer */ +#define GPIO_EXTERNAL_INT4 (EXINT_CTRL_GnID_ID4_Msk) /*!< GPIO external interrupt4 \hideinitializer */ + +/*---------------------------------------------------------------------------------------------------------*/ +/* KEY interrupt number */ +/*---------------------------------------------------------------------------------------------------------*/ +/* The following is used to operate the registers GnIRCLR, GnIESET, GnIECLR, GnID. */ +/* Each bit of the register GnIRCLR, GnIESET, GnIECLR, GnID indicates the interrupt group number and is common to all. */ +/* Therefore, the following refers to the GnIRCLR macro, but they are used in common. */ +#define GPIO_KEY_INT0 (EXINT_CTRL_GnID_ID0_Msk) /*!< GPIO KEY interrupt0 \hideinitializer */ +#define GPIO_KEY_INT1 (EXINT_CTRL_GnID_ID1_Msk) /*!< GPIO KEY interrupt1 \hideinitializer */ +#define GPIO_KEY_INT2 (EXINT_CTRL_GnID_ID2_Msk) /*!< GPIO KEY interrupt2 \hideinitializer */ +#define GPIO_KEY_INT3 (EXINT_CTRL_GnID_ID3_Msk) /*!< GPIO KEY interrupt3 \hideinitializer */ +#define GPIO_KEY_INT4 (EXINT_CTRL_GnID_ID4_Msk) /*!< GPIO KEY interrupt4 \hideinitializer */ +#define GPIO_KEY_INT5 (EXINT_CTRL_GnID_ID5_Msk) /*!< GPIO KEY interrupt5 \hideinitializer */ +#define GPIO_KEY_INT6 (EXINT_CTRL_GnID_ID6_Msk) /*!< GPIO KEY interrupt6 \hideinitializer */ +#define GPIO_KEY_INT7 (EXINT_CTRL_GnID_ID7_Msk) /*!< GPIO KEY interrupt7 \hideinitializer */ + +/*---------------------------------------------------------------------------------------------------------*/ +/* Synchronous output definitions */ +/*---------------------------------------------------------------------------------------------------------*/ +/* Pin Output selection */ +#define GPIO_SYNC_P80 (GPIO_IOPnSYO_PnSYO0_Pos) /*!< GPIO P80 output \hideinitializer */ +#define GPIO_SYNC_P81 (GPIO_IOPnSYO_PnSYO1_Pos) /*!< GPIO P81 output \hideinitializer */ +#define GPIO_SYNC_P82 (GPIO_IOPnSYO_PnSYO2_Pos) /*!< GPIO P82 output \hideinitializer */ +#define GPIO_SYNC_P83 (GPIO_IOPnSYO_PnSYO3_Pos) /*!< GPIO P83 output \hideinitializer */ +#define GPIO_SYNC_P84 (GPIO_IOPnSYO_PnSYO4_Pos) /*!< GPIO P84 output \hideinitializer */ +#define GPIO_SYNC_P85 (GPIO_IOPnSYO_PnSYO5_Pos) /*!< GPIO P85 output \hideinitializer */ +#define GPIO_SYNC_P86 (GPIO_IOPnSYO_PnSYO6_Pos) /*!< GPIO P86 output \hideinitializer */ +#define GPIO_SYNC_P87 (GPIO_IOPnSYO_PnSYO7_Pos) /*!< GPIO P87 output \hideinitializer */ + +/* Output selection */ +#define GPIO_OUTPUT_IOPORT (0U) /*!< GPIO I/O port output \hideinitializer */ +#define GPIO_OUTPUT_SYNC (1U) /*!< GPIO Synchronous output \hideinitializer */ + +/* Synchronous output event */ +#define GPIO_SYNC_EVENT_IRQ2A (0x00U << GPIO_IOPnSEV_PnSEV_Pos) /*!< GPIO IRQ2A output \hideinitializer */ +#define GPIO_SYNC_EVENT_TM7IRQ (0x01U << GPIO_IOPnSEV_PnSEV_Pos) /*!< GPIO TM7IRQ output \hideinitializer */ +#define GPIO_SYNC_EVENT_TM2IRQ (0x02U << GPIO_IOPnSEV_PnSEV_Pos) /*!< GPIO TM2IRQ output \hideinitializer */ +#define GPIO_SYNC_EVENT_TM1IRQ (0x03U << GPIO_IOPnSEV_PnSEV_Pos) /*!< GPIO TM1IRQ output \hideinitializer */ + +/*---------------------------------------------------------------------------------------------------------*/ +/* Pin Real-time control (IRQ0A event) definitions */ +/*---------------------------------------------------------------------------------------------------------*/ +/* Register mask value */ +#define GPIO_IOPnCNT1_Msk (0x10U) /*!< IOPnCNT1 register \hideinitializer */ +#define GPIO_IOPnCNT2_Msk (0x20U) /*!< IOPnCNT2 register \hideinitializer */ +/* Pin Output Control */ +#define GPIO_P80CNT (GPIO_IOPnCNT1_Msk | 0x0U) /*!< P80 Output \hideinitializer */ +#define GPIO_P81CNT (GPIO_IOPnCNT1_Msk | 0x1U) /*!< P81 Output \hideinitializer */ +#define GPIO_P82CNT (GPIO_IOPnCNT1_Msk | 0x2U) /*!< P82 Output \hideinitializer */ +#define GPIO_P83CNT (GPIO_IOPnCNT1_Msk | 0x3U) /*!< P83 Output \hideinitializer */ +#define GPIO_P84CNT (GPIO_IOPnCNT2_Msk | 0x0U) /*!< P84 Output \hideinitializer */ +#define GPIO_P85CNT (GPIO_IOPnCNT2_Msk | 0x1U) /*!< P85 Output \hideinitializer */ +#define GPIO_PA0CNT (GPIO_IOPnCNT1_Msk | 0x0U) /*!< PA0 Output \hideinitializer */ +#define GPIO_PA2CNT (GPIO_IOPnCNT1_Msk | 0x1U) /*!< PA2 Output \hideinitializer */ +#define GPIO_PA4CNT (GPIO_IOPnCNT1_Msk | 0x2U) /*!< PA4 Output \hideinitializer */ +#define GPIO_PA5CNT (GPIO_IOPnCNT1_Msk | 0x3U) /*!< PA5 Output \hideinitializer */ +#define GPIO_PA6CNT (GPIO_IOPnCNT2_Msk | 0x0U) /*!< PA6 Output \hideinitializer */ +#define GPIO_PA7CNT (GPIO_IOPnCNT2_Msk | 0x1U) /*!< PA7 Output \hideinitializer */ +/* Real-time control selection */ +#define GPIO_REALTIME_CONTROL_DISABLE (0x0U) /*!< I/O port (Real-time control disabled) \hideinitializer */ +#define GPIO_REALTIME_CONTROL_HIGH (0x1U) /*!< "1"(High) output \hideinitializer */ +#define GPIO_REALTIME_CONTROL_LOW (0x2U) /*!< "0"(Low) output \hideinitializer */ +#define GPIO_REALTIME_CONTROL_HIZ (0x3U) /*!< "Hi-z" output \hideinitializer */ + +/*@}*/ /* end of group GPIO_EXPORTED_CONSTANTS */ + + +/** @addtogroup GPIO_EXPORTED_FUNCTIONS GPIO Exported Functions + @{ +*/ + +/* BSP inline API function definitions */ +/* Declare these inline functions here to avoid MISRA C 2004 rule 8.1 error */ +__STATIC_INLINE void GPIO_DisableNf(NF_T *nf); +__STATIC_INLINE void GPIO_EnableNf(NF_T *nf); +__STATIC_INLINE void GPIO_SetInputCtrl(GPIO_T *gpio, uint8_t u8Ctl); +__STATIC_INLINE void GPIO_SetInputCtrlClr(GPIO_T *gpio, uint8_t u8Ctl); +__STATIC_INLINE void GPIO_SetInputCtrlSet(GPIO_T *gpio, uint8_t u8Ctl); +__STATIC_INLINE void GPIO_SetOutputCtrl(GPIO_T *gpio, uint8_t u8Ctl); +__STATIC_INLINE void GPIO_SetOutputCtrlClr(GPIO_T *gpio, uint8_t u8Ctl); +__STATIC_INLINE void GPIO_SetOutputCtrlSet(GPIO_T *gpio, uint8_t u8Ctl); +__STATIC_INLINE uint8_t GPIO_GetInput(GPIO_T const *gpio); +__STATIC_INLINE void GPIO_SetOutput(GPIO_T *gpio, uint8_t u8Out); +__STATIC_INLINE void GPIO_SetOutputClr(GPIO_T *gpio, uint8_t u8Clr); +__STATIC_INLINE void GPIO_SetOutputSet(GPIO_T *gpio, uint8_t u8Set); +__STATIC_INLINE void GPIO_SetOutputToggle(GPIO_T *gpio, uint8_t u8Tgl); +__STATIC_INLINE void GPIO_SetOpenDrainCtrl(GPIO_T *gpio, uint8_t u8Odc, uint8_t u8Value); + +/** + * @brief Noise filter disabled + * @param[in] nf : The pointer of the specified NFn. + * - \ref NF0 + * - \ref NF1 + * - \ref NF2 + * - \ref NF3 + * - \ref NF4 + * @return None + * @details Disable the noise filter of the specified external interrupt. + * @note Disable the noise filter while the interrupt or the timer is disabled. + */ +__STATIC_INLINE void GPIO_DisableNf(NF_T *nf) +{ + nf->NFnCTR &= (~NF_NFnCTR_EN_Msk); +} + +/** + * @brief Noise filter enabled + * @param[in] nf : The pointer of the specified NFn. + * - \ref NF0 + * - \ref NF1 + * - \ref NF2 + * - \ref NF3 + * - \ref NF4 + * @return None + * @details Enable the noise filter of the specified external interrupt. + * @note Enable the noise filter while the interrupt or the timer is disabled. + */ +__STATIC_INLINE void GPIO_EnableNf(NF_T *nf) +{ + nf->NFnCTR |= NF_NFnCTR_EN_Msk; +} + +/** + * @brief Port input enable / disable + * @param[in] gpio : The pointer of the specified GPIO module(GPIO0, GPIO1, ...., GPIOA, GPIOB). + * - \ref GPIO0 + * - \ref GPIO1 (KM1M0DF02 only) + * - \ref GPIO2 + * - \ref GPIO3 (KM1M0DF02/03 only) + * - \ref GPIO4 (KM1M0DF02/03 only) + * - \ref GPIO5 + * - \ref GPIO6 + * - \ref GPIO7 + * - \ref GPIO8 + * - \ref GPIO9 + * - \ref GPIOA + * - \ref GPIOB (KM1M0DF02/03 only) + * @param[in] u8Ctl : For each pin (Pn0 to Pn7), set it to 1 for input enable and 0 for input disable. + * Each bit shows the pin information in the order of Pn0, Pn1.. Pn6, and Pn7 from the bottom. + * @return None + * @details Enable or disable the input of the specified pin + */ +__STATIC_INLINE void GPIO_SetInputCtrl(GPIO_T *gpio, uint8_t u8Ctl) +{ + gpio->IOPnIE = u8Ctl; +} + +/** + * @brief Port input disable + * @param[in] gpio : The pointer of the specified GPIO module(GPIO0, GPIO1, ...., GPIOA, GPIOB). + * - \ref GPIO0 + * - \ref GPIO1 (KM1M0DF02 only) + * - \ref GPIO2 + * - \ref GPIO3 (KM1M0DF02/03 only) + * - \ref GPIO4 (KM1M0DF02/03 only) + * - \ref GPIO5 + * - \ref GPIO6 + * - \ref GPIO7 + * - \ref GPIO8 + * - \ref GPIO9 + * - \ref GPIOA + * - \ref GPIOB (KM1M0DF02/03 only) + * @param[in] u8Ctl : For each pin (Pn0 to Pn7), set it to 1 for input disable. + * Each bit shows the pin information in the order of Pn0, Pn1.. Pn6, and Pn7 from the bottom. + * @return None + * @details Disable the input of the specified pin + */ +__STATIC_INLINE void GPIO_SetInputCtrlClr(GPIO_T *gpio, uint8_t u8Ctl) +{ + gpio->IOPnIE &= ~(u8Ctl); +} + +/** + * @brief Port input enable + * @param[in] gpio : The pointer of the specified GPIO module(GPIO0, GPIO1, ...., GPIOA, GPIOB). + * - \ref GPIO0 + * - \ref GPIO1 (KM1M0DF02 only) + * - \ref GPIO2 + * - \ref GPIO3 (KM1M0DF02/03 only) + * - \ref GPIO4 (KM1M0DF02/03 only) + * - \ref GPIO5 + * - \ref GPIO6 + * - \ref GPIO7 + * - \ref GPIO8 + * - \ref GPIO9 + * - \ref GPIOA + * - \ref GPIOB (KM1M0DF02/03 only) + * @param[in] u8Ctl : For each pin (Pn0 to Pn7), set it to 1 for input enable. + * Each bit shows the pin information in the order of Pn0, Pn1.. Pn6, and Pn7 from the bottom. + * @return None + * @details Enable the input of the specified pin + */ +__STATIC_INLINE void GPIO_SetInputCtrlSet(GPIO_T *gpio, uint8_t u8Ctl) +{ + gpio->IOPnIE |= u8Ctl; +} + +/** + * @brief Port output enable / disable + * @param[in] gpio : The pointer of the specified GPIO module(GPIO0, GPIO1, ...., GPIOA, GPIOB). + * - \ref GPIO0 + * - \ref GPIO1 (KM1M0DF02 only) + * - \ref GPIO2 + * - \ref GPIO3 (KM1M0DF02/03 only) + * - \ref GPIO4 (KM1M0DF02/03 only) + * - \ref GPIO5 + * - \ref GPIO6 + * - \ref GPIO7 + * - \ref GPIO8 + * - \ref GPIO9 + * - \ref GPIOA + * - \ref GPIOB (KM1M0DF02/03 only) + * @param[in] u8Ctl : For each pin (Pn0 to Pn7), set it to 1 for output enable and 0 for output disable. + * Each bit shows the pin information in the order of Pn0, Pn1.. Pn6, and Pn7 from the bottom. + * @return None + * @details Enable or disable the output of the specified pin + * @note When outputting data to a pin, enable the output after setting the data by GPIO_SetOutput. + */ +__STATIC_INLINE void GPIO_SetOutputCtrl(GPIO_T *gpio, uint8_t u8Ctl) +{ + gpio->IOPnOE = u8Ctl; +} + +/** + * @brief Port output disable + * @param[in] gpio : The pointer of the specified GPIO module(GPIO0, GPIO1, ...., GPIOA, GPIOB). + * - \ref GPIO0 + * - \ref GPIO1 (KM1M0DF02 only) + * - \ref GPIO2 + * - \ref GPIO3 (KM1M0DF02/03 only) + * - \ref GPIO4 (KM1M0DF02/03 only) + * - \ref GPIO5 + * - \ref GPIO6 + * - \ref GPIO7 + * - \ref GPIO8 + * - \ref GPIO9 + * - \ref GPIOA + * - \ref GPIOB (KM1M0DF02/03 only) + * @param[in] u8Ctl : For each pin (Pn0 to Pn7), set it to 1 for output disable. + * Each bit shows the pin information in the order of Pn0, Pn1.. Pn6, and Pn7 from the bottom. + * @return None + * @details Disable the output of the specified pin + */ +__STATIC_INLINE void GPIO_SetOutputCtrlClr(GPIO_T *gpio, uint8_t u8Ctl) +{ + gpio->IOPnOE &= ~(u8Ctl); +} + +/** + * @brief Port output enable + * @param[in] gpio : The pointer of the specified GPIO module(GPIO0, GPIO1, ...., GPIOA, GPIOB). + * - \ref GPIO0 + * - \ref GPIO1 (KM1M0DF02 only) + * - \ref GPIO2 + * - \ref GPIO3 (KM1M0DF02/03 only) + * - \ref GPIO4 (KM1M0DF02/03 only) + * - \ref GPIO5 + * - \ref GPIO6 + * - \ref GPIO7 + * - \ref GPIO8 + * - \ref GPIO9 + * - \ref GPIOA + * - \ref GPIOB (KM1M0DF02/03 only) + * @param[in] u8Ctl : For each pin (Pn0 to Pn7), set it to 1 for output enable. + * Each bit shows the pin information in the order of Pn0, Pn1.. Pn6, and Pn7 from the bottom. + * @return None + * @details Enable the output of the specified pin + * @note When outputting data to a pin, enable the output after setting the data by GPIO_SetOutput. + */ +__STATIC_INLINE void GPIO_SetOutputCtrlSet(GPIO_T *gpio, uint8_t u8Ctl) +{ + gpio->IOPnOE |= u8Ctl; +} + +/** + * @brief Get Port input data + * @param[in] gpio : The pointer of the specified GPIO module(GPIO0, GPIO1, ...., GPIOA, GPIOB). + * - \ref GPIO0 + * - \ref GPIO1 (KM1M0DF02 only) + * - \ref GPIO2 + * - \ref GPIO3 (KM1M0DF02/03 only) + * - \ref GPIO4 (KM1M0DF02/03 only) + * - \ref GPIO5 + * - \ref GPIO6 + * - \ref GPIO7 + * - \ref GPIO8 + * - \ref GPIO9 + * - \ref GPIOA + * - \ref GPIOB (KM1M0DF02/03 only) + * @return The specified port input data + * @details Get the IN register of specified GPIO port. + * @note When reading a pin input data, read the value after enabling the input by GPIO_SetInputCtrl. + * When the input is disabled, "0" is always read out. + */ +__STATIC_INLINE uint8_t GPIO_GetInput(GPIO_T const *gpio) +{ + return (gpio->IOPnIN); +} + +/** + * @brief Set GPIO Port OUT Data + * @param[in] gpio : The pointer of the specified GPIO module(GPIO0, GPIO1, ...., GPIOA, GPIOB). + * - \ref GPIO0 + * - \ref GPIO1(KM1M0DF02 only) + * - \ref GPIO2 + * - \ref GPIO3(KM1M0DF02/03 only) + * - \ref GPIO4(KM1M0DF02/03 only) + * - \ref GPIO5 + * - \ref GPIO6 + * - \ref GPIO7 + * - \ref GPIO8 + * - \ref GPIO9 + * - \ref GPIOA + * - \ref GPIOB(KM1M0DF02/03 only) + * @param[in] u8Out : GPIO port data. + * @return None + * @details Set the Data into specified GPIO port. + */ +__STATIC_INLINE void GPIO_SetOutput(GPIO_T *gpio, uint8_t u8Out) +{ + gpio->IOPnOUT = u8Out; +} + +/** + * @brief Clear output data of specified pin + * @param[in] gpio : The pointer of the specified GPIO module(GPIO0, GPIO1, ...., GPIOA, GPIOB). + * - \ref GPIO0 + * - \ref GPIO1 (KM1M0DF02 only) + * - \ref GPIO2 + * - \ref GPIO3 (KM1M0DF02/03 only) + * - \ref GPIO4 (KM1M0DF02/03 only) + * - \ref GPIO5 + * - \ref GPIO6 + * - \ref GPIO7 + * - \ref GPIO8 + * - \ref GPIO9 + * - \ref GPIOA + * - \ref GPIOB (KM1M0DF02/03 only) + * @param[in] u8Clr : For each pin (Pn0 to Pn7), set it to 1 to clear it and 0 to not clear it. + * Each bit shows the pin information in the order of Pn0, Pn1.. Pn6, and Pn7 from the bottom. + * @return None + * @details Clear the output data of the specified pin of the GPIO port + */ +__STATIC_INLINE void GPIO_SetOutputClr(GPIO_T *gpio, uint8_t u8Clr) +{ + gpio->IOPnCLR = u8Clr; +} + +/** + * @brief Set output data of specified pin + * @param[in] gpio : The pointer of the specified GPIO module(GPIO0, GPIO1, ...., GPIOA, GPIOB). + * - \ref GPIO0 + * - \ref GPIO1 (KM1M0DF02 only) + * - \ref GPIO2 + * - \ref GPIO3 (KM1M0DF02/03 only) + * - \ref GPIO4 (KM1M0DF02/03 only) + * - \ref GPIO5 + * - \ref GPIO6 + * - \ref GPIO7 + * - \ref GPIO8 + * - \ref GPIO9 + * - \ref GPIOA + * - \ref GPIOB (KM1M0DF02/03 only) + * @param[in] u8Set : For each pin (Pn0 to Pn7), set it to 1 if you want to set it (set the output data to 1), + * or set it to 0 if you do not want to set it. + * Each bit shows the pin information in the order of Pn0, Pn1.. Pn6, and Pn7 from the bottom. + * @return None + * @details Set the output data of the specified pin of the GPIO port to 1. + */ +__STATIC_INLINE void GPIO_SetOutputSet(GPIO_T *gpio, uint8_t u8Set) +{ + gpio->IOPnSET = u8Set; +} + +/** + * @brief Invert the output data of the specified pin + * @param[in] gpio : The pointer of the specified GPIO module(GPIO0, GPIO1, ...., GPIOA, GPIOB). + * - \ref GPIO0 + * - \ref GPIO1 (KM1M0DF02 only) + * - \ref GPIO2 + * - \ref GPIO3 (KM1M0DF02/03 only) + * - \ref GPIO4 (KM1M0DF02/03 only) + * - \ref GPIO5 + * - \ref GPIO6 + * - \ref GPIO7 + * - \ref GPIO8 + * - \ref GPIO9 + * - \ref GPIOA + * - \ref GPIOB (KM1M0DF02/03 only) + * @param[in] u8Tgl : For each pin (Pn0 to Pn7), set it to 1 if you want to invert it, + * or set it to 0 if you do not want to invert it. + * Each bit shows the pin information in the order of Pn0, Pn1.. Pn6, and Pn7 from the bottom. + * @return None + * @details Invert the output data of the specified pin of the GPIO port. + */ +__STATIC_INLINE void GPIO_SetOutputToggle(GPIO_T *gpio, uint8_t u8Tgl) +{ + gpio->IOPnTGL = u8Tgl; +} + +/** + * @brief Nch open drain output control of the specified pin + * @param[in] gpio : The pointer of the specified GPIO module(GPIO0, GPIO1, GPIO2, GPIO3, GPIO4, GPIO5, GPIO6, GPIO7, GPIOA). + * - \ref GPIO0 + * - \ref GPIO1(KM1M0DF02 only) + * - \ref GPIO2 + * - \ref GPIO3(KM1M0DF02/03 only) + * - \ref GPIO4(KM1M0DF02/03 only) + * - \ref GPIO5 + * - \ref GPIO6 + * - \ref GPIO7 + * - \ref GPIO9(KM1M0DF03 only) + * - \ref GPIOA + * @param[in] u8Odc : Pin of the specified port. Select from the macros below. + * (The logical sum of multiple macros is also possible.) + * | GPIO0 | GPIO1 | GPIO2 | GPIO3 | + * |:------------------------------------|:---------------------------------|:---------------------------------|:------------------------------------| + * | \ref GPIO_P03ODC | \ref GPIO_P16ODC (KM1M0DF02 only)| \ref GPIO_P20ODC | \ref GPIO_P30ODC (KM1M0DF02 only) | + * | \ref GPIO_P04ODC | | \ref GPIO_P21ODC | \ref GPIO_P32ODC (KM1M0DF02 only) | + * | \ref GPIO_P05ODC | | \ref GPIO_P22ODC (KM1M0DF04 only)| \ref GPIO_P33ODC (KM1M0DF02/03 only)| + * | \ref GPIO_P07ODC (KM1M0DF02/03 only)| | | \ref GPIO_P34ODC (KM1M0DF02/03 only)| + * | | | | \ref GPIO_P36ODC (KM1M0DF02 only) | + * --------------------------------------------------------------------------------------------------------------------------------------------------- + * | GPIO4 | GPIO5 | GPIO6 | GPIO7 | + * |:------------------------------------|:---------------------------------|:---------------------------------|:------------------------------------| + * | \ref GPIO_P40ODC (KM1M0DF02 only) | \ref GPIO_P50ODC | \ref GPIO_P64ODC | \ref GPIO_P71ODC | + * | \ref GPIO_P42ODC (KM1M0DF02 only) | \ref GPIO_P52ODC | \ref GPIO_P65ODC | \ref GPIO_P72ODC | + * | \ref GPIO_P43ODC (KM1M0DF02/03 only)| \ref GPIO_P53ODC | \ref GPIO_P67ODC | \ref GPIO_P73ODC | + * | \ref GPIO_P45ODC (KM1M0DF02/03 only)| | | \ref GPIO_P74ODC | + * | | | | \ref GPIO_P75ODC | + * | | | | \ref GPIO_P77ODC | + * --------------------------------------------------------------------------------------------------------------------------------------------------- + * | GPIO9 | GPIOA | + * |:------------------------------------|:---------------------------------| + * | \ref GPIO_P92ODC (KM1M0DF03 only) | \ref GPIO_PA5ODC | + * | | \ref GPIO_PA6ODC | + * | | \ref GPIO_PA7ODC | + * | | | + * @param[in] u8Value : Nch open drain output selection. + * - \ref GPIO_ODC_PUSHPULL + * - \ref GPIO_ODC_NCH_OPENDRAIN + * @return None + * @details Set Nch open drain / push pull output of the specified pin of GPIO port + */ +__STATIC_INLINE void GPIO_SetOpenDrainCtrl(GPIO_T *gpio, uint8_t u8Odc, uint8_t u8Value) +{ + if (u8Value == GPIO_ODC_NCH_OPENDRAIN) + { + gpio->IOPnODC |= u8Odc; + } + else + { + gpio->IOPnODC &= ~(u8Odc); + } +} + +/*-----------------------------*/ +/* BSP API function prototypes */ +/*-----------------------------*/ +void GPIO_SetFunctionMode(GPIO_MD_T *gpio_md, uint8_t u8Pin, uint32_t u32Value); +void GPIO_SetPullCtrl(GPIO_T *gpio, uint8_t u8Pin, uint8_t u8Value); +void GPIO_SetNfClk(NF_T *nf, uint8_t u8Smp); +void GPIO_ClearNMIIntFlag(void); +void GPIO_EnableResist(GPIO_T *gpio, uint8_t u8Ctl); +void GPIO_DisableResist(GPIO_T *gpio, uint8_t u8Ctl); +void GPIO_SetPullUpDownCtrl(GPIO_T *gpio, uint8_t u8Pin, uint8_t u8Value); +void GPIO_SetLEDOutput(GPIO_T *gpio, uint8_t u8Pin, uint8_t u8Value); +void GPIO_SetInputLevel(GPIO_T *gpio, uint8_t u8Pin, uint8_t u8Level); +void GPIO_SetRealTimeCtrl(GPIO_T *gpio, uint8_t u8PinCnt, uint8_t u8RealTimeCtr); +void GPIO_SetSyncOutputCtrl(uint8_t u8PinSel, uint8_t u8OutSel, uint8_t u8OutCtr); +void GPIO_SetIntCond(uint32_t u32Irqtgn, uint32_t u32Edge, uint32_t u32Trigger); +void GPIO_ClearExternalIntFlag(uint32_t u32EintNum); +void GPIO_DisableExternalInt(uint32_t u32EintNum); +void GPIO_EnableExternalInt(uint32_t u32EintNum); +uint32_t GPIO_GetExternalIntFlag(uint32_t u32EintNum); +uint32_t GPIO_GetExternalIntDetectFlag(uint32_t u32EintNum); +void GPIO_ClearKEYIntFlag(uint32_t u32KeyNum); +void GPIO_DisableKEYInt(uint32_t u32KeyNum); +void GPIO_EnableKEYInt(uint32_t u32KeyNum); +uint32_t GPIO_GetKEYIntFlag(uint32_t u32KeyNum); +uint32_t GPIO_GetKEYIntDetectFlag(uint32_t u32KeyNum); + + +/*@}*/ /* end of group GPIO_EXPORTED_FUNCTIONS */ + +/*@}*/ /* end of group GPIO_Driver */ + +/*@}*/ /* end of group Standard_Driver */ + +#endif /* __GPIO_H__ */ + +/*** (C) COPYRIGHT 2024 Nuvoton Technology Corp. Japan ***/ diff --git a/Header/KM1M0DF/KM1M0D1x/gpio.h b/Header/KM1M0DF/KM1M0D1x/gpio.h new file mode 100644 index 0000000..c49059f --- /dev/null +++ b/Header/KM1M0DF/KM1M0D1x/gpio.h @@ -0,0 +1,921 @@ +/**************************************************************************//** + * @file gpio.h + * @version V1.00 + * @brief KM1M0DF series GPIO Driver Header File + * + * SPDX-License-Identifier: Apache-2.0 + * @copyright (C) 2023 Nuvoton Technology Corp. Japan All rights reserved. + ******************************************************************************/ +#ifndef __GPIO_H__ +#define __GPIO_H__ + +/** @addtogroup Standard_Driver Standard Driver + @{ +*/ + +/** @addtogroup GPIO_Driver GPIO Driver + @{ +*/ + +/** @addtogroup GPIO_EXPORTED_CONSTANTS GPIO Exported Constants + @{ +*/ + +/*---------------------------------------------------------------------------------------------------------*/ +/* Pull-up resistor selection. */ +/*---------------------------------------------------------------------------------------------------------*/ +#define GPIO_PLU_DISABLE (0U) /*!< Without pull-up resistor \hideinitializer */ +#define GPIO_PLU_PULL_UP (1U) /*!< Adding pull-up resistor \hideinitializer */ + +/*---------------------------------------------------------------------------------------------------------*/ +/* LED output selection. */ +/*---------------------------------------------------------------------------------------------------------*/ +#define GPIO_LED_NO_OUTPUT (0U) /*!< No output LED \hideinitializer */ +#define GPIO_LED_OUTPUT (1U) /*!< output LED resistor \hideinitializer */ + +/*---------------------------------------------------------------------------------------------------------*/ +/* Input level selection. */ +/*---------------------------------------------------------------------------------------------------------*/ +#define GPIO_VDD50_30_LOW_LEVEL (0U) /*!< VDD50 x 0.7(High level) VDD50 x 0.3(Low level) \hideinitializer */ +#define GPIO_VDD50_45_LOW_LEVEL (1U) /*!< VDD50 x 0.7(High level) VDD50 x 0.45(Low level) \hideinitializer */ + +/*---------------------------------------------------------------------------------------------------------*/ +/* Nch open drain output control definitions. */ +/*---------------------------------------------------------------------------------------------------------*/ +/* Pin of the specified port */ +#define GPIO_P01ODC GPIO_IOPnODC_Pn1ODC_Msk /*!< P01 Nch open drain selection \hideinitializer */ +#define GPIO_P02ODC GPIO_IOPnODC_Pn2ODC_Msk /*!< P02 Nch open drain selection \hideinitializer */ +#define GPIO_P03ODC GPIO_IOPnODC_Pn3ODC_Msk /*!< P03 Nch open drain selection \hideinitializer */ +#define GPIO_P05ODC GPIO_IOPnODC_Pn5ODC_Msk /*!< P05 Nch open drain selection \hideinitializer */ +#define GPIO_P10ODC GPIO_IOPnODC_Pn0ODC_Msk /*!< P10 Nch open drain selection \hideinitializer */ +#define GPIO_P20ODC GPIO_IOPnODC_Pn0ODC_Msk /*!< P20 Nch open drain selection \hideinitializer */ +#define GPIO_P21ODC GPIO_IOPnODC_Pn1ODC_Msk /*!< P21 Nch open drain selection \hideinitializer */ +#define GPIO_P33ODC GPIO_IOPnODC_Pn3ODC_Msk /*!< P33 Nch open drain selection \hideinitializer */ +#define GPIO_P34ODC GPIO_IOPnODC_Pn4ODC_Msk /*!< P34 Nch open drain selection \hideinitializer */ +#define GPIO_P43ODC GPIO_IOPnODC_Pn3ODC_Msk /*!< P43 Nch open drain selection \hideinitializer */ +#define GPIO_P45ODC GPIO_IOPnODC_Pn5ODC_Msk /*!< P45 Nch open drain selection \hideinitializer */ +#define GPIO_P46ODC GPIO_IOPnODC_Pn6ODC_Msk /*!< P46 Nch open drain selection \hideinitializer */ +#define GPIO_P47ODC GPIO_IOPnODC_Pn7ODC_Msk /*!< P47 Nch open drain selection \hideinitializer */ +#define GPIO_P50ODC GPIO_IOPnODC_Pn0ODC_Msk /*!< P50 Nch open drain selection \hideinitializer */ +#define GPIO_P52ODC GPIO_IOPnODC_Pn2ODC_Msk /*!< P52 Nch open drain selection \hideinitializer */ +#define GPIO_P64ODC GPIO_IOPnODC_Pn4ODC_Msk /*!< P64 Nch open drain selection \hideinitializer */ +#define GPIO_P66ODC GPIO_IOPnODC_Pn6ODC_Msk /*!< P66 Nch open drain selection \hideinitializer */ +#define GPIO_P67ODC GPIO_IOPnODC_Pn7ODC_Msk /*!< P67 Nch open drain selection \hideinitializer */ +#define GPIO_P70ODC GPIO_IOPnODC_Pn0ODC_Msk /*!< P70 Nch open drain selection \hideinitializer */ +#define GPIO_P72ODC GPIO_IOPnODC_Pn2ODC_Msk /*!< P72 Nch open drain selection \hideinitializer */ +#define GPIO_P73ODC GPIO_IOPnODC_Pn3ODC_Msk /*!< P73 Nch open drain selection \hideinitializer */ +#define GPIO_P74ODC GPIO_IOPnODC_Pn4ODC_Msk /*!< P74 Nch open drain selection \hideinitializer */ +#define GPIO_P75ODC GPIO_IOPnODC_Pn5ODC_Msk /*!< P75 Nch open drain selection \hideinitializer */ +#define GPIO_P77ODC GPIO_IOPnODC_Pn7ODC_Msk /*!< P77 Nch open drain selection \hideinitializer */ +#define GPIO_PA5ODC GPIO_IOPnODC_Pn5ODC_Msk /*!< PA5 Nch open drain selection \hideinitializer */ +#define GPIO_PA6ODC GPIO_IOPnODC_Pn6ODC_Msk /*!< PA6 Nch open drain selection \hideinitializer */ +#define GPIO_PA7ODC GPIO_IOPnODC_Pn7ODC_Msk /*!< PA7 Nch open drain selection \hideinitializer */ + +/* Nch open drain output selection */ +#define GPIO_ODC_PUSHPULL (0U) /*!< Push-pull output \hideinitializer */ +#define GPIO_ODC_NCH_OPENDRAIN (1U) /*!< Nch open drain output \hideinitializer */ + +/*---------------------------------------------------------------------------------------------------------*/ +/* Pin-Function definitions */ +/*---------------------------------------------------------------------------------------------------------*/ +/********************* Bit definition of IOP0MD register **********************/ +#define GPIO_P00MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P00MD_TM07IOB (0x01UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< TM07IOB input/output pin. \hideinitializer */ +#define GPIO_P00MD_TM10IOB (0x02UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< TM10IOB input/output pin. \hideinitializer */ +#define GPIO_P00MD_SBI1A (0x04UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< SBI1A input pin. \hideinitializer */ +#define GPIO_P00MD_LED0 (0x09UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< LED0 output pin. \hideinitializer */ + +#define GPIO_P01MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P01MD_TM08IOB (0x01UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< TM08IOB input/output pin. \hideinitializer */ +#define GPIO_P01MD_TM09IOB (0x02UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< TM09IOB input/output pin. \hideinitializer */ +#define GPIO_P01MD_SBO1A (0x04UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< SBO1A input/output pin. (Nch open-drain control is valid when serial I/F input/output is selected.) \hideinitializer */ +#define GPIO_P01MD_LED1 (0x09UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< LED1 output pin. \hideinitializer */ + +#define GPIO_P02MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P02MD_SBT1A (0x04UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< SBT1A input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) \hideinitializer */ +#define GPIO_P02MD_LED2 (0x09UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< LED2 output pin. \hideinitializer */ + +#define GPIO_P03MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P03MD_TM00IOB (0x01UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< TM00IOB input/output pin. \hideinitializer */ +#define GPIO_P03MD_TM02IOB (0x02UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< TM02IOB input/output pin. \hideinitializer */ +#define GPIO_P03MD_TM15IOB (0x03UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< TM15IOB input/output pin. \hideinitializer */ +#define GPIO_P03MD_SBC1A (0x04UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< SBC1A input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) \hideinitializer */ +#define GPIO_P03MD_LED3 (0x09UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< LED3 output pin. \hideinitializer */ + +#define GPIO_P04MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P04MD_TM11IOA (0x03UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< TM11IOA input/output pin. \hideinitializer */ +#define GPIO_P04MD_LED4 (0x09UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< LED4 output pin. \hideinitializer */ + +#define GPIO_P05MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P05MD_TM12IOA (0x03UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< TM12IOA input/output pin. \hideinitializer */ +#define GPIO_P05MD_SBO3A (0x04UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< SBO3A input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) \hideinitializer */ +#define GPIO_P05MD_LED5 (0x09UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< LED5 output pin. \hideinitializer */ + +#define GPIO_P06MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn6MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P06MD_SBI3A (0x04UL << GPIO_MD_IOPnMD_Pn6MD_Pos) /*!< SBI3A input pin. \hideinitializer */ +#define GPIO_P06MD_LED6 (0x09UL << GPIO_MD_IOPnMD_Pn6MD_Pos) /*!< LED6 output pin. \hideinitializer */ + +/********************* Bit definition of IOP1MD register **********************/ +#define GPIO_P10MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P10MD_TM00IOC (0x01UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< TM00IOC input/output pin. \hideinitializer */ +#define GPIO_P10MD_TM15IOC (0x02UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< TM15IOC input/output pin. \hideinitializer */ +#define GPIO_P10MD_SBC4B (0x04UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< SBC4B input/output pin.(Nch open-drain control is valid when serial I/F output is selected.) \hideinitializer */ + +/********************* Bit definition of IOP2MD register **********************/ +#define GPIO_P20MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P20MD_SBT3A (0x04UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< SBT3A input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) \hideinitializer */ +#define GPIO_P20MD_SCL8 (0x05UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< IICSCL8 input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) \hideinitializer */ +#define GPIO_P20MD_DA1OUT0 (0x07UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< DA1OUT0 output pin. \hideinitializer */ +#define GPIO_P20MD_IRQ0A (0x0AUL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< External interrupt input 0A pin. \hideinitializer */ + +#define GPIO_P21MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P21MD_SBC3A (0x04UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< SBC3A input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) \hideinitializer */ +#define GPIO_P21MD_SDA8 (0x05UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< IICSDA8 input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) \hideinitializer */ +#define GPIO_P21MD_IRQ1A (0x0AUL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< External interrupt input 1A pin. \hideinitializer */ + +#define GPIO_P22MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P22MD_IRQ2A (0x0AUL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< External interrupt input 2A pin. \hideinitializer */ + +#define GPIO_P23MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P23MD_TM13IOA (0x01UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< TM13IOA input/output pin. \hideinitializer */ +#define GPIO_P23MD_IRQ3A (0x0AUL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< External interrupt input 3A pin. \hideinitializer */ + +#define GPIO_P24MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P24MD_TM14IOA (0x01UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< TM14IOA input/output pin. \hideinitializer */ +#define GPIO_P24MD_IRQ4A (0x0AUL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< External interrupt input 4A pin. \hideinitializer */ + +#define GPIO_P25MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P25MD_OSC1 (0x07UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< External high-speed vibration OSC1 pin. \hideinitializer */ + +#define GPIO_P26MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn6MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P26MD_OSC2 (0x07UL << GPIO_MD_IOPnMD_Pn6MD_Pos) /*!< External high-speed vibration OSC2 pin. \hideinitializer */ + +/********************* Bit definition of IOP3MD register **********************/ +#define GPIO_P33MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P33MD_SBO4B (0x04UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< SBO4B input/output pin. (Nch open-drain control is valid when serial I/F input/output is selected.) \hideinitializer */ +#define GPIO_P33MD_SDA6B (0x05UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< IICSDA6B input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) \hideinitializer */ + +#define GPIO_P34MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P34MD_SBT4B (0x04UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< SBT4B input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) \hideinitializer */ +#define GPIO_P34MD_SCL6B (0x05UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< IIC0SCL6B input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) \hideinitializer */ + +#define GPIO_P35MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P35MD_SBI4B (0x04UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< SBI4B input pin. \hideinitializer */ + +/********************* Bit definition of IOP4MD register **********************/ +#define GPIO_P43MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P43MD_SBO0B (0x04UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< SBO0B input/output pin. (Nch open-drain control is valid when serial I/F input/output is selected.) \hideinitializer */ +#define GPIO_P43MD_LTX0B (0x04UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< LTX0B input/output pin. (Nch open-drain control is valid when serial I/F input/output is selected.) \hideinitializer */ + +#define GPIO_P44MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P44MD_SBI0B (0x04UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< SBI0B input pin. \hideinitializer */ +#define GPIO_P44MD_LRX0B (0x04UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< LRX0B input pin. \hideinitializer */ + +#define GPIO_P45MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P45MD_SBT0B (0x04UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< SBT0B input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) \hideinitializer */ + +#define GPIO_P46MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn6MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P46MD_SDA7B (0x04UL << GPIO_MD_IOPnMD_Pn6MD_Pos) /*!< IICSDA7B input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) \hideinitializer */ + +#define GPIO_P47MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn7MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P47MD_SCL7B (0x04UL << GPIO_MD_IOPnMD_Pn7MD_Pos) /*!< IICSCL7B input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) \hideinitializer */ + +/********************* Bit definition of IOP5MD register **********************/ +#define GPIO_P50MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P50MD_TM07OUT0 (0x01UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< TM07OUT0 output pin. \hideinitializer */ +#define GPIO_P50MD_SBO0A (0x04UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< SBO0A input/output pin. (Nch open-drain control is valid when serial I/F input/output is selected.) \hideinitializer */ +#define GPIO_P50MD_LTX0A (0x04UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< LTX0A input/output pin. (Nch open-drain control is valid when serial I/F input/output is selected.) \hideinitializer */ +#define GPIO_P50MD_CMPREF1B (0x08UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< CMPREF1B input pin. \hideinitializer */ +#define GPIO_P50MD_KEY0 (0x0AUL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< Key interrupt input KEY0 pin. \hideinitializer */ + +#define GPIO_P51MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P51MD_TM07OUT1 (0x01UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< TM07OUT1 output pin. \hideinitializer */ +#define GPIO_P51MD_SBI0A (0x04UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< SBI0A input pin. \hideinitializer */ +#define GPIO_P51MD_LRX0A (0x04UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< LRX0A input pin. \hideinitializer */ +#define GPIO_P51MD_CMPIN1B (0x08UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< CMPIN1B input pin. \hideinitializer */ +#define GPIO_P51MD_KEY1 (0x0AUL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< Key interrupt input KEY1 pin. \hideinitializer */ + +#define GPIO_P52MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P52MD_TM07OUT2 (0x01UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< TM07OUT2 output pin. \hideinitializer */ +#define GPIO_P52MD_SBT0A (0x04UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< SBT0A input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) \hideinitializer */ +#define GPIO_P52MD_DA1OUT1 (0x07UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< DA1OUT1 output pin. \hideinitializer */ +#define GPIO_P52MD_KEY2 (0x0AUL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< Key interrupt input KEY2 pin. \hideinitializer */ + +#define GPIO_P53MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P53MD_TM07OUT3 (0x01UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< TM07OUT3 output pin. \hideinitializer */ +#define GPIO_P53MD_BUZZERA (0x02UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< BUZZERA output pin. \hideinitializer */ +#define GPIO_P53MD_CMPREF1A (0x08UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< CMPREF1A input pin. \hideinitializer */ +#define GPIO_P53MD_KEY3 (0x0AUL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< Key interrupt input KEY3 pin. \hideinitializer */ + +#define GPIO_P54MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P54MD_TM07OUT4 (0x01UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< TM07OUT4 output pin. \hideinitializer */ +#define GPIO_P54MD_NBUZZERA (0x02UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< NBUZZERA output pin. \hideinitializer */ +#define GPIO_P54MD_CMPIN1A (0x08UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< CMPIN1A input pin. \hideinitializer */ +#define GPIO_P54MD_KEY4 (0x0AUL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< Key interrupt input KEY4 pin. \hideinitializer */ + +#define GPIO_P55MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P55MD_TM07OUT5 (0x01UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< TM07OUT5 output pin. \hideinitializer */ +#define GPIO_P55MD_CMPOT1 (0x08UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< CMPOT1 output pin. \hideinitializer */ +#define GPIO_P55MD_KEY5 (0x0AUL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< Key interrupt input KEY5 pin. \hideinitializer */ + +#define GPIO_P56MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn6MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P56MD_KEY6 (0x0AUL << GPIO_MD_IOPnMD_Pn6MD_Pos) /*!< Key interrupt input KEY6 pin. \hideinitializer */ + +#define GPIO_P57MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn7MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P57MD_KEY7 (0x0AUL << GPIO_MD_IOPnMD_Pn7MD_Pos) /*!< Key interrupt input KEY7 pin. \hideinitializer */ + +/********************* Bit definition of IOP6MD register **********************/ +#define GPIO_P61MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ + +#define GPIO_P62MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P62MD_TM01IOB (0x01UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< TM01IOB input/output pin. \hideinitializer */ + +#define GPIO_P63MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P63MD_TM03IOB (0x01UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< TM03IOB input/output pin. \hideinitializer */ + +#define GPIO_P64MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P64MD_TM04IOB (0x01UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< TM04IOB input/output pin. \hideinitializer */ +#define GPIO_P64MD_SBC4A (0x04UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< SBC4A input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) \hideinitializer */ + +#define GPIO_P65MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P65MD_SBI4A (0x04UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< SBI4A input pin. \hideinitializer */ + +#define GPIO_P66MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn6MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P66MD_SBO4A (0x04UL << GPIO_MD_IOPnMD_Pn6MD_Pos) /*!< SBO4A input/output pin. (Nch open-drain control is valid when serial I/F input/output is selected.) \hideinitializer */ +#define GPIO_P66MD_SDA6A (0x05UL << GPIO_MD_IOPnMD_Pn6MD_Pos) /*!< IICSDA6A input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) \hideinitializer */ + +#define GPIO_P67MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn7MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P67MD_SBT4A (0x04UL << GPIO_MD_IOPnMD_Pn7MD_Pos) /*!< SBT4A input/output pin. (Nch open-drain control is valid when serial I/F input/output is selected.) \hideinitializer */ +#define GPIO_P67MD_SCL6A (0x05UL << GPIO_MD_IOPnMD_Pn7MD_Pos) /*!< IICSCL6A input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) \hideinitializer */ + +/********************* Bit definition of IOP7MD register **********************/ +#define GPIO_P70MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P70MD_SBO2A (0x04UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< SBO2A input/output pin. (Nch open-drain control is valid when serial I/F input/output is selected.) \hideinitializer */ + +#define GPIO_P71MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P71MD_SBI2A (0x04UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< SBI2A input pin. \hideinitializer */ + +#define GPIO_P72MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P72MD_SBT2A (0x04UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< SBT2A input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) \hideinitializer */ + +#define GPIO_P73MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P73MD_TM13IOB (0x01UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< TM13IOB input/output pin. \hideinitializer */ +#define GPIO_P73MD_SBC2A (0x04UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< SBC2A input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) \hideinitializer */ +#define GPIO_P73MD_SDA7A (0x05UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< IICSDA7A input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) \hideinitializer */ + +#define GPIO_P74MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P74MD_TM14IOB (0x01UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< TM14IOB input/output pin. \hideinitializer */ +#define GPIO_P74MD_SBC1B (0x04UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< SBC1B input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) \hideinitializer */ +#define GPIO_P74MD_SCL7A (0x05UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< IICSCL7A input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) \hideinitializer */ + +#define GPIO_P75MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P75MD_SBO1B (0x04UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< SBO1B input/output pin. (Nch open-drain control is valid when serial I/F input/output is selected.) \hideinitializer */ + +#define GPIO_P76MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn6MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P76MD_SBI1B (0x04UL << GPIO_MD_IOPnMD_Pn6MD_Pos) /*!< SBI1B input pin. \hideinitializer */ + +#define GPIO_P77MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn7MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P77MD_SBT1B (0x04UL << GPIO_MD_IOPnMD_Pn7MD_Pos) /*!< SBT1B input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) \hideinitializer */ + +/********************* Bit definition of IOP8MD register **********************/ +#define GPIO_P80MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P80MD_SDO0 (0x01UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< Timer synchronous output SDO0 pin. \hideinitializer */ +#define GPIO_P80MD_PWM0A (0x02UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< PWM0A output pin. \hideinitializer */ + +#define GPIO_P81MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P81MD_SDO1 (0x01UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< Timer synchronous output SDO1 pin. \hideinitializer */ +#define GPIO_P81MD_NPWM0A (0x02UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< NPWM0A output pin. \hideinitializer */ + +#define GPIO_P82MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P82MD_SDO2 (0x01UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< Timer synchronous output SDO2 pin. \hideinitializer */ +#define GPIO_P82MD_PWM1A (0x02UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< PWM1A output pin. \hideinitializer */ + +#define GPIO_P83MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P83MD_SDO3 (0x01UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< Timer synchronous output SDO3 pin. \hideinitializer */ +#define GPIO_P83MD_NPWM1A (0x02UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< NPWM1A output pin. \hideinitializer */ + +#define GPIO_P84MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P84MD_SDO4 (0x01UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< Timer synchronous output SDO4 pin. \hideinitializer */ +#define GPIO_P84MD_PWM2A (0x02UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< PWM2A output pin. \hideinitializer */ + +#define GPIO_P85MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P85MD_SDO5 (0x01UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< Timer synchronous output SDO5 pin. \hideinitializer */ +#define GPIO_P85MD_NPWM2A (0x02UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< NPWM2A output pin. \hideinitializer */ +#define GPIO_P85MD_DA0OUT0 (0x07UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< DA0OUT0 output pin. \hideinitializer */ + +#define GPIO_P86MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn6MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P86MD_SDO6 (0x01UL << GPIO_MD_IOPnMD_Pn6MD_Pos) /*!< Timer synchronous output SDO6 pin. \hideinitializer */ +#define GPIO_P86MD_PWMBCSTA (0x02UL << GPIO_MD_IOPnMD_Pn6MD_Pos) /*!< PWMBCSTA output pin. \hideinitializer */ + +#define GPIO_P87MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn7MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P87MD_SDO7 (0x01UL << GPIO_MD_IOPnMD_Pn7MD_Pos) /*!< Timer synchronous output SDO7 pin. \hideinitializer */ + +/********************* Bit definition of IOP9MD register **********************/ +#define GPIO_P90MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P90MD_XO (0x07UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< External low speed vibration XO pin. \hideinitializer */ + +#define GPIO_P91MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P91MD_XI (0x07UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< External low speed vibration XI pin. \hideinitializer */ + +#define GPIO_P92MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ + +#define GPIO_P93MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ + +#define GPIO_P94MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_P94MD_DA0OUT1 (0x07UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< DA0OUT1 output pin. \hideinitializer */ +#define GPIO_P94MD_CMPREF0B (0x08UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< CMPREF0B input pin. \hideinitializer */ + +#define GPIO_P95MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ + +/********************* Bit definition of IOPAMD register **********************/ +#define GPIO_PA0MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_PA0MD_TM00IOA (0x01UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< TM00IOA input/output pin. \hideinitializer */ +#define GPIO_PA0MD_TM15IOA (0x02UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< TM15IOA input/output pin. \hideinitializer */ +#define GPIO_PA0MD_AN0 (0x07UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< AN0 input pin. \hideinitializer */ + +#define GPIO_PA1MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_PA1MD_TM01IOA (0x01UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< TM01IOA input/output pin. \hideinitializer */ +#define GPIO_PA1MD_TM11IOB (0x02UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< TM11IOB input/output pin. \hideinitializer */ +#define GPIO_PA1MD_AN1 (0x07UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< AN1 input pin. \hideinitializer */ + +#define GPIO_PA2MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_PA2MD_TM02IOA (0x01UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< TM02IOA input/output pin. \hideinitializer */ +#define GPIO_PA2MD_TM12IOB (0x02UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< TM12IOB input/output pin. \hideinitializer */ +#define GPIO_PA2MD_AN2 (0x07UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< AN2 input pin. \hideinitializer */ + +#define GPIO_PA3MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_PA3MD_TM03IOA (0x01UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< TM03IOA input/output pin. \hideinitializer */ +#define GPIO_PA3MD_AN3 (0x07UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< AN3 input pin. \hideinitializer */ + +#define GPIO_PA4MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_PA4MD_TM04IOA (0x01UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< TM04IOA input/output pin. \hideinitializer */ +#define GPIO_PA4MD_SBI5 (0x04UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< SBI5 input pin. \hideinitializer */ +#define GPIO_PA4MD_AN4 (0x07UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< AN4 input pin. \hideinitializer */ +#define GPIO_PA4MD_CMPREF0A (0x08UL << GPIO_MD_IOPnMD_Pn4MD_Pos) /*!< CMPREF0A input pin. \hideinitializer */ + +#define GPIO_PA5MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_PA5MD_TM07IOA (0x01UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< TM07IOA input/output pin. \hideinitializer */ +#define GPIO_PA5MD_SBO5 (0x04UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< SBO5 input/output pin. (Nch open-drain control is valid when serial I/F input/output is selected.) \hideinitializer */ +#define GPIO_PA5MD_AN5 (0x07UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< AN5 input pin. \hideinitializer */ +#define GPIO_PA5MD_CMPIN0A (0x08UL << GPIO_MD_IOPnMD_Pn5MD_Pos) /*!< CMPIN0A input pin. \hideinitializer */ + +#define GPIO_PA6MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn6MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_PA6MD_TM08IOA (0x01UL << GPIO_MD_IOPnMD_Pn6MD_Pos) /*!< TM08IOA input/output pin. \hideinitializer */ +#define GPIO_PA6MD_TM10IOA (0x02UL << GPIO_MD_IOPnMD_Pn6MD_Pos) /*!< TM10IOA input/output pin. \hideinitializer */ +#define GPIO_PA6MD_SBT5 (0x04UL << GPIO_MD_IOPnMD_Pn6MD_Pos) /*!< SBT5 input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) \hideinitializer */ +#define GPIO_PA6MD_AN6 (0x07UL << GPIO_MD_IOPnMD_Pn6MD_Pos) /*!< AN6 input pin. \hideinitializer */ +#define GPIO_PA6MD_CMPOT0 (0x08UL << GPIO_MD_IOPnMD_Pn6MD_Pos) /*!< CMPOT0 output pin. \hideinitializer */ + +#define GPIO_PA7MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn7MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_PA7MD_MONITOR (0x01UL << GPIO_MD_IOPnMD_Pn7MD_Pos) /*!< Monitor output pin. \hideinitializer */ +#define GPIO_PA7MD_TM09IOA (0x02UL << GPIO_MD_IOPnMD_Pn7MD_Pos) /*!< TM09IOA input/output pin. \hideinitializer */ +#define GPIO_PA7MD_SBC5 (0x04UL << GPIO_MD_IOPnMD_Pn7MD_Pos) /*!< SBC5 input/output pin. (Nch open-drain control is valid when serial I/F output is selected.) \hideinitializer */ +#define GPIO_PA7MD_AN7 (0x07UL << GPIO_MD_IOPnMD_Pn7MD_Pos) /*!< AN7 input pin. \hideinitializer */ + +/********************* Bit definition of IOPBMD register **********************/ +#define GPIO_PB0MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_PB0MD_AN8 (0x07UL << GPIO_MD_IOPnMD_Pn0MD_Pos) /*!< AN8 input pin. \hideinitializer */ + +#define GPIO_PB1MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_PB1MD_AN9 (0x07UL << GPIO_MD_IOPnMD_Pn1MD_Pos) /*!< AN9 input pin. \hideinitializer */ + +#define GPIO_PB2MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_PB2MD_AN10 (0x07UL << GPIO_MD_IOPnMD_Pn2MD_Pos) /*!< AN10 input pin. \hideinitializer */ + +#define GPIO_PB3MD_GPIO (0x00UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< General-purpose input/output pin. \hideinitializer */ +#define GPIO_PB3MD_AN11 (0x07UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< AN11 input pin. \hideinitializer */ +#define GPIO_PB3MD_CMPIN0B (0x08UL << GPIO_MD_IOPnMD_Pn3MD_Pos) /*!< CMPIN0B input pin. \hideinitializer */ +/*---------------------------------------------------------------------------------------------------------*/ +/* Pin Interrupt control definitions */ +/*---------------------------------------------------------------------------------------------------------*/ +/* Interrupt definitions */ +#define GPIO_EXINT0 (EXINT_MD_EXTDEG_IRQEG4_Pos) /*!< External interrupt 0 \hideinitializer */ +#define GPIO_EXINT1 (EXINT_MD_EXTDEG_IRQEG5_Pos) /*!< External interrupt 1 \hideinitializer */ +#define GPIO_EXINT2 (EXINT_MD_EXTDEG_IRQEG6_Pos) /*!< External interrupt 2 \hideinitializer */ +#define GPIO_EXINT3 (EXINT_MD_EXTDEG_IRQEG7_Pos) /*!< External interrupt 3 \hideinitializer */ +#define GPIO_EXINT4 (EXINT_MD_EXTDEG_IRQEG8_Pos) /*!< External interrupt 4 \hideinitializer */ +#define GPIO_KEYINT0 (EXINT_MD_EXTDEG_IRQEG9_Pos) /*!< KEY interrupt 0 \hideinitializer */ +#define GPIO_KEYINT1 (EXINT_MD_EXTDEG_IRQEG10_Pos) /*!< KEY interrupt 1 \hideinitializer */ +#define GPIO_KEYINT2 (EXINT_MD_EXTDEG_IRQEG11_Pos) /*!< KEY interrupt 2 \hideinitializer */ +#define GPIO_KEYINT3 (EXINT_MD_EXTDEG_IRQEG12_Pos) /*!< KEY interrupt 3 \hideinitializer */ +#define GPIO_KEYINT4 (EXINT_MD_EXTDEG_IRQEG13_Pos) /*!< KEY interrupt 4 \hideinitializer */ +#define GPIO_KEYINT5 (EXINT_MD_EXTDEG_IRQEG14_Pos) /*!< KEY interrupt 5 \hideinitializer */ +#define GPIO_KEYINT6 (EXINT_MD_EXTDEG_IRQEG15_Pos) /*!< KEY interrupt 6 \hideinitializer */ +#define GPIO_KEYINT7 (EXINT_MD_EXTDEG_IRQEG16_Pos) /*!< KEY interrupt 7 \hideinitializer */ + +/* Both edge detect selection */ +#define GPIO_INTERRUPT_BOTHEDGE_DISABLE (0x00U) /*!< GPIO interrupt both-edge : disable \hideinitializer */ +#define GPIO_INTERRUPT_BOTHEDGE_ENABLE (0x01U) /*!< GPIO interrupt both-edge : enable \hideinitializer */ + +/* Interrupt trigger settings */ +#define GPIO_INTERRUPT_TRIGGER_RISINGEDGE (0x00U) /*!< GPIO interrupt trigger : rising edge \hideinitializer */ +#define GPIO_INTERRUPT_TRIGGER_FALLINGEDGE (0x01U) /*!< GPIO interrupt trigger : falling edge \hideinitializer */ +#define GPIO_INTERRUPT_TRIGGER_H_LEVEL (0x02U) /*!< GPIO interrupt trigger : "H" level \hideinitializer */ +#define GPIO_INTERRUPT_TRIGGER_L_LEVEL (0x03U) /*!< GPIO interrupt trigger : "L" level \hideinitializer */ + +/*---------------------------------------------------------------------------------------------------------*/ +/* Noise Filter Sampling clock frequency selection */ +/*---------------------------------------------------------------------------------------------------------*/ +#define GPIO_NF_SMP_SYSCLK (0x00U << NF_NFnCTR_CK_Pos) /*!< Noise Filter Sampling clock frequency : SYSCLK \hideinitializer */ +#define GPIO_NF_SMP_SYSCLK_DIV_32 (0x01U << NF_NFnCTR_CK_Pos) /*!< Noise Filter Sampling clock frequency : SYSCLK/32 \hideinitializer */ +#define GPIO_NF_SMP_SYSCLK_DIV_64 (0x02U << NF_NFnCTR_CK_Pos) /*!< Noise Filter Sampling clock frequency : SYSCLK/64 \hideinitializer */ +#define GPIO_NF_SMP_SYSCLK_DIV_128 (0x03U << NF_NFnCTR_CK_Pos) /*!< Noise Filter Sampling clock frequency : SYSCLK/128 \hideinitializer */ +#define GPIO_NF_SMP_SYSCLK_DIV_256 (0x04U << NF_NFnCTR_CK_Pos) /*!< Noise Filter Sampling clock frequency : SYSCLK/256 \hideinitializer */ +#define GPIO_NF_SMP_SYSCLK_DIV_512 (0x05U << NF_NFnCTR_CK_Pos) /*!< Noise Filter Sampling clock frequency : SYSCLK/512 \hideinitializer */ +#define GPIO_NF_SMP_SYSCLK_DIV_1024 (0x06U << NF_NFnCTR_CK_Pos) /*!< Noise Filter Sampling clock frequency : SYSCLK/1024 \hideinitializer */ +#define GPIO_NF_SMP_LPCLK (0x07U << NF_NFnCTR_CK_Pos) /*!< Noise Filter Sampling clock frequency : LPCLK \hideinitializer */ + +/*---------------------------------------------------------------------------------------------------------*/ +/* External interrupt number */ +/*---------------------------------------------------------------------------------------------------------*/ +/* The following is used to operate the registers GnIRCLR, GnIESET, GnIECLR, GnID. */ +/* Each bit of the register GnIRCLR, GnIESET, GnIECLR, GnID indicates the interrupt group number and is common to all. */ +/* Therefore, the following refers to the GnIRCLR macro, but they are used in common. */ +#define GPIO_EXTERNAL_INT0 (EXINT_CTRL_GnID_ID0_Msk) /*!< GPIO external interrupt0 \hideinitializer */ +#define GPIO_EXTERNAL_INT1 (EXINT_CTRL_GnID_ID1_Msk) /*!< GPIO external interrupt1 \hideinitializer */ +#define GPIO_EXTERNAL_INT2 (EXINT_CTRL_GnID_ID2_Msk) /*!< GPIO external interrupt2 \hideinitializer */ +#define GPIO_EXTERNAL_INT3 (EXINT_CTRL_GnID_ID3_Msk) /*!< GPIO external interrupt3 \hideinitializer */ +#define GPIO_EXTERNAL_INT4 (EXINT_CTRL_GnID_ID4_Msk) /*!< GPIO external interrupt4 \hideinitializer */ + +/*---------------------------------------------------------------------------------------------------------*/ +/* KEY interrupt number */ +/*---------------------------------------------------------------------------------------------------------*/ +/* The following is used to operate the registers GnIRCLR, GnIESET, GnIECLR, GnID. */ +/* Each bit of the register GnIRCLR, GnIESET, GnIECLR, GnID indicates the interrupt group number and is common to all. */ +/* Therefore, the following refers to the GnIRCLR macro, but they are used in common. */ +#define GPIO_KEY_INT0 (EXINT_CTRL_GnID_ID0_Msk) /*!< GPIO KEY interrupt0 \hideinitializer */ +#define GPIO_KEY_INT1 (EXINT_CTRL_GnID_ID1_Msk) /*!< GPIO KEY interrupt1 \hideinitializer */ +#define GPIO_KEY_INT2 (EXINT_CTRL_GnID_ID2_Msk) /*!< GPIO KEY interrupt2 \hideinitializer */ +#define GPIO_KEY_INT3 (EXINT_CTRL_GnID_ID3_Msk) /*!< GPIO KEY interrupt3 \hideinitializer */ +#define GPIO_KEY_INT4 (EXINT_CTRL_GnID_ID4_Msk) /*!< GPIO KEY interrupt4 \hideinitializer */ +#define GPIO_KEY_INT5 (EXINT_CTRL_GnID_ID5_Msk) /*!< GPIO KEY interrupt5 \hideinitializer */ +#define GPIO_KEY_INT6 (EXINT_CTRL_GnID_ID6_Msk) /*!< GPIO KEY interrupt6 \hideinitializer */ +#define GPIO_KEY_INT7 (EXINT_CTRL_GnID_ID7_Msk) /*!< GPIO KEY interrupt7 \hideinitializer */ + +/*---------------------------------------------------------------------------------------------------------*/ +/* Synchronous output definitions */ +/*---------------------------------------------------------------------------------------------------------*/ +/* Pin Output selection */ +#define GPIO_SYNC_P80 (GPIO_IOPnSYO_PnSYO0_Pos) /*!< GPIO P80 output \hideinitializer */ +#define GPIO_SYNC_P81 (GPIO_IOPnSYO_PnSYO1_Pos) /*!< GPIO P81 output \hideinitializer */ +#define GPIO_SYNC_P82 (GPIO_IOPnSYO_PnSYO2_Pos) /*!< GPIO P82 output \hideinitializer */ +#define GPIO_SYNC_P83 (GPIO_IOPnSYO_PnSYO3_Pos) /*!< GPIO P83 output \hideinitializer */ +#define GPIO_SYNC_P84 (GPIO_IOPnSYO_PnSYO4_Pos) /*!< GPIO P84 output \hideinitializer */ +#define GPIO_SYNC_P85 (GPIO_IOPnSYO_PnSYO5_Pos) /*!< GPIO P85 output \hideinitializer */ +#define GPIO_SYNC_P86 (GPIO_IOPnSYO_PnSYO6_Pos) /*!< GPIO P86 output \hideinitializer */ +#define GPIO_SYNC_P87 (GPIO_IOPnSYO_PnSYO7_Pos) /*!< GPIO P87 output \hideinitializer */ + +/* Output selection */ +#define GPIO_OUTPUT_IOPORT (0U) /*!< GPIO I/O port output \hideinitializer */ +#define GPIO_OUTPUT_SYNC (1U) /*!< GPIO Synchronous output \hideinitializer */ + +/* Synchronous output event */ +#define GPIO_SYNC_EVENT_IRQ2A (0x00U << GPIO_IOPnSEV_PnSEV_Pos) /*!< GPIO IRQ2A output \hideinitializer */ +#define GPIO_SYNC_EVENT_TM7IRQ (0x01U << GPIO_IOPnSEV_PnSEV_Pos) /*!< GPIO TM7IRQ output \hideinitializer */ +#define GPIO_SYNC_EVENT_TM2IRQ (0x02U << GPIO_IOPnSEV_PnSEV_Pos) /*!< GPIO TM2IRQ output \hideinitializer */ +#define GPIO_SYNC_EVENT_TM1IRQ (0x03U << GPIO_IOPnSEV_PnSEV_Pos) /*!< GPIO TM1IRQ output \hideinitializer */ + +/*---------------------------------------------------------------------------------------------------------*/ +/* Pin Real-time control (IRQ0A event) definitions */ +/*---------------------------------------------------------------------------------------------------------*/ +/* Register mask value */ +#define GPIO_IOPnCNT1_Msk (0x10U) /*!< IOPnCNT1 register \hideinitializer */ +#define GPIO_IOPnCNT2_Msk (0x20U) /*!< IOPnCNT2 register \hideinitializer */ +/* Pin Output Control */ +#define GPIO_P80CNT (GPIO_IOPnCNT1_Msk | 0x0U) /*!< P80 Output \hideinitializer */ +#define GPIO_P81CNT (GPIO_IOPnCNT1_Msk | 0x1U) /*!< P81 Output \hideinitializer */ +#define GPIO_P82CNT (GPIO_IOPnCNT1_Msk | 0x2U) /*!< P82 Output \hideinitializer */ +#define GPIO_P83CNT (GPIO_IOPnCNT1_Msk | 0x3U) /*!< P83 Output \hideinitializer */ +#define GPIO_P84CNT (GPIO_IOPnCNT2_Msk | 0x0U) /*!< P85 Output \hideinitializer */ +#define GPIO_P85CNT (GPIO_IOPnCNT2_Msk | 0x1U) /*!< P86 Output \hideinitializer */ +#define GPIO_PA0CNT (GPIO_IOPnCNT1_Msk | 0x0U) /*!< PA0 Output \hideinitializer */ +#define GPIO_PA2CNT (GPIO_IOPnCNT1_Msk | 0x1U) /*!< PA2 Output \hideinitializer */ +#define GPIO_PA4CNT (GPIO_IOPnCNT1_Msk | 0x2U) /*!< PA4 Output \hideinitializer */ +#define GPIO_PA5CNT (GPIO_IOPnCNT1_Msk | 0x3U) /*!< PA5 Output \hideinitializer */ +#define GPIO_PA6CNT (GPIO_IOPnCNT2_Msk | 0x0U) /*!< PA6 Output \hideinitializer */ +#define GPIO_PA7CNT (GPIO_IOPnCNT2_Msk | 0x1U) /*!< PA7 Output \hideinitializer */ +/* Real-time control selection */ +#define GPIO_REALTIME_CONTROL_DISABLE (0x0U) /*!< I/O port (Real-time control disabled) \hideinitializer */ +#define GPIO_REALTIME_CONTROL_HIGH (0x1U) /*!< "1"(High) output \hideinitializer */ +#define GPIO_REALTIME_CONTROL_LOW (0x2U) /*!< "0"(Low) output \hideinitializer */ +#define GPIO_REALTIME_CONTROL_HIZ (0x3U) /*!< "Hi-z" output \hideinitializer */ + +/*@}*/ /* end of group GPIO_EXPORTED_CONSTANTS */ + + +/** @addtogroup GPIO_EXPORTED_FUNCTIONS GPIO Exported Functions + @{ +*/ + +/* BSP inline API function definitions */ +/* Declare these inline functions here to avoid MISRA C 2004 rule 8.1 error */ +__STATIC_INLINE void GPIO_DisableNf(NF_T *nf); +__STATIC_INLINE void GPIO_EnableNf(NF_T *nf); +__STATIC_INLINE void GPIO_SetInputCtrl(GPIO_T *gpio, uint8_t u8Ctl); +__STATIC_INLINE void GPIO_SetInputCtrlClr(GPIO_T *gpio, uint8_t u8Ctl); +__STATIC_INLINE void GPIO_SetInputCtrlSet(GPIO_T *gpio, uint8_t u8Ctl); +__STATIC_INLINE void GPIO_SetOutputCtrl(GPIO_T *gpio, uint8_t u8Ctl); +__STATIC_INLINE void GPIO_SetOutputCtrlClr(GPIO_T *gpio, uint8_t u8Ctl); +__STATIC_INLINE void GPIO_SetOutputCtrlSet(GPIO_T *gpio, uint8_t u8Ctl); +__STATIC_INLINE uint8_t GPIO_GetInput(GPIO_T const *gpio); +__STATIC_INLINE void GPIO_SetOutput(GPIO_T *gpio, uint8_t u8Out); +__STATIC_INLINE void GPIO_SetOutputClr(GPIO_T *gpio, uint8_t u8Clr); +__STATIC_INLINE void GPIO_SetOutputSet(GPIO_T *gpio, uint8_t u8Set); +__STATIC_INLINE void GPIO_SetOutputToggle(GPIO_T *gpio, uint8_t u8Tgl); +__STATIC_INLINE void GPIO_SetOpenDrainCtrl(GPIO_T *gpio, uint8_t u8Odc, uint8_t u8Value); + +/** + * @brief Noise filter disabled + * @param[in] nf : The pointer of the specified NFn. + * - \ref NF0 + * - \ref NF1 + * - \ref NF2 + * - \ref NF3 + * - \ref NF4 + * @return None + * @details Disable the noise filter of the specified external interrupt. + * @note Disable the noise filter while the interrupt or the timer is disabled. + */ +__STATIC_INLINE void GPIO_DisableNf(NF_T *nf) +{ + nf->NFnCTR &= (~NF_NFnCTR_EN_Msk); +} + +/** + * @brief Noise filter enabled + * @param[in] nf : The pointer of the specified NFn. + * - \ref NF0 + * - \ref NF1 + * - \ref NF2 + * - \ref NF3 + * - \ref NF4 + * @return None + * @details Enable the noise filter of the specified external interrupt. + * @note Enable the noise filter while the interrupt or the timer is disabled. + */ +__STATIC_INLINE void GPIO_EnableNf(NF_T *nf) +{ + nf->NFnCTR |= NF_NFnCTR_EN_Msk; +} + +/** + * @brief Port input enable / disable + * @param[in] gpio : The pointer of the specified GPIO module(GPIO0, GPIO1, ...., GPIOA, GPIOB). + * - \ref GPIO0 + * - \ref GPIO1 + * - \ref GPIO2 + * - \ref GPIO3 + * - \ref GPIO4 + * - \ref GPIO5 + * - \ref GPIO6 + * - \ref GPIO7 + * - \ref GPIO8 + * - \ref GPIO9 + * - \ref GPIOA + * - \ref GPIOB + * @param[in] u8Ctl : For each pin (Pn0 to Pn7), set it to 1 for input enable and 0 for input disable. + * Each bit shows the pin information in the order of Pn0, Pn1.. Pn6, and Pn7 from the bottom. + * @return None + * @details Enable or disable the input of the specified pin + */ +__STATIC_INLINE void GPIO_SetInputCtrl(GPIO_T *gpio, uint8_t u8Ctl) +{ + gpio->IOPnIE = u8Ctl; +} + +/** + * @brief Port input disable + * @param[in] gpio : The pointer of the specified GPIO module(GPIO0, GPIO1, ...., GPIOA, GPIOB). + * - \ref GPIO0 + * - \ref GPIO1 + * - \ref GPIO2 + * - \ref GPIO3 + * - \ref GPIO4 + * - \ref GPIO5 + * - \ref GPIO6 + * - \ref GPIO7 + * - \ref GPIO8 + * - \ref GPIO9 + * - \ref GPIOA + * - \ref GPIOB + * @param[in] u8Ctl : For each pin (Pn0 to Pn7), set it to 1 for input disable. + * Each bit shows the pin information in the order of Pn0, Pn1.. Pn6, and Pn7 from the bottom. + * @return None + * @details Disable the input of the specified pin + */ +__STATIC_INLINE void GPIO_SetInputCtrlClr(GPIO_T *gpio, uint8_t u8Ctl) +{ + gpio->IOPnIE &= ~(u8Ctl); +} + +/** + * @brief Port input enable + * @param[in] gpio : The pointer of the specified GPIO module(GPIO0, GPIO1, ...., GPIOA, GPIOB). + * - \ref GPIO0 + * - \ref GPIO1 + * - \ref GPIO2 + * - \ref GPIO3 + * - \ref GPIO4 + * - \ref GPIO5 + * - \ref GPIO6 + * - \ref GPIO7 + * - \ref GPIO8 + * - \ref GPIO9 + * - \ref GPIOA + * - \ref GPIOB + * @param[in] u8Ctl : For each pin (Pn0 to Pn7), set it to 1 for input enable. + * Each bit shows the pin information in the order of Pn0, Pn1.. Pn6, and Pn7 from the bottom. + * @return None + * @details Enable the input of the specified pin + */ +__STATIC_INLINE void GPIO_SetInputCtrlSet(GPIO_T *gpio, uint8_t u8Ctl) +{ + gpio->IOPnIE |= u8Ctl; +} + +/** + * @brief Port output enable / disable + * @param[in] gpio : The pointer of the specified GPIO module(GPIO0, GPIO1, ...., GPIOA, GPIOB). + * - \ref GPIO0 + * - \ref GPIO1 + * - \ref GPIO2 + * - \ref GPIO3 + * - \ref GPIO4 + * - \ref GPIO5 + * - \ref GPIO6 + * - \ref GPIO7 + * - \ref GPIO8 + * - \ref GPIO9 + * - \ref GPIOA + * - \ref GPIOB + * @param[in] u8Ctl : For each pin (Pn0 to Pn7), set it to 1 for output enable and 0 for output disable. + * Each bit shows the pin information in the order of Pn0, Pn1.. Pn6, and Pn7 from the bottom. + * @return None + * @details Enable or disable the output of the specified pin + * @note When outputting data to a pin, enable the output after setting the data by GPIO_SetOutput. + */ +__STATIC_INLINE void GPIO_SetOutputCtrl(GPIO_T *gpio, uint8_t u8Ctl) +{ + gpio->IOPnOE = u8Ctl; +} + +/** + * @brief Port output disable + * @param[in] gpio : The pointer of the specified GPIO module(GPIO0, GPIO1, ...., GPIOA, GPIOB). + * - \ref GPIO0 + * - \ref GPIO1 + * - \ref GPIO2 + * - \ref GPIO3 + * - \ref GPIO4 + * - \ref GPIO5 + * - \ref GPIO6 + * - \ref GPIO7 + * - \ref GPIO8 + * - \ref GPIO9 + * - \ref GPIOA + * - \ref GPIOB + * @param[in] u8Ctl : For each pin (Pn0 to Pn7), set it to 1 for output disable. + * Each bit shows the pin information in the order of Pn0, Pn1.. Pn6, and Pn7 from the bottom. + * @return None + * @details Disable the output of the specified pin + */ +__STATIC_INLINE void GPIO_SetOutputCtrlClr(GPIO_T *gpio, uint8_t u8Ctl) +{ + gpio->IOPnOE &= ~(u8Ctl); +} + +/** + * @brief Port output enable + * @param[in] gpio : The pointer of the specified GPIO module(GPIO0, GPIO1, ...., GPIOA, GPIOB). + * - \ref GPIO0 + * - \ref GPIO1 + * - \ref GPIO2 + * - \ref GPIO3 + * - \ref GPIO4 + * - \ref GPIO5 + * - \ref GPIO6 + * - \ref GPIO7 + * - \ref GPIO8 + * - \ref GPIO9 + * - \ref GPIOA + * - \ref GPIOB + * @param[in] u8Ctl : For each pin (Pn0 to Pn7), set it to 1 for output enable. + * Each bit shows the pin information in the order of Pn0, Pn1.. Pn6, and Pn7 from the bottom. + * @return None + * @details Enable the output of the specified pin + * @note When outputting data to a pin, enable the output after setting the data by GPIO_SetOutput. + */ +__STATIC_INLINE void GPIO_SetOutputCtrlSet(GPIO_T *gpio, uint8_t u8Ctl) +{ + gpio->IOPnOE |= u8Ctl; +} + +/** + * @brief Get Port input data + * @param[in] gpio : The pointer of the specified GPIO module(GPIO0, GPIO1, ...., GPIOA, GPIOB). + * - \ref GPIO0 + * - \ref GPIO1 + * - \ref GPIO2 + * - \ref GPIO3 + * - \ref GPIO4 + * - \ref GPIO5 + * - \ref GPIO6 + * - \ref GPIO7 + * - \ref GPIO8 + * - \ref GPIO9 + * - \ref GPIOA + * - \ref GPIOB + * @return The specified port input data + * @details Get the IN register of specified GPIO port. + * @note When reading a pin input data, read the value after enabling the input by GPIO_SetInputCtrl. + * When the input is disabled, "0" is always read out. + */ +__STATIC_INLINE uint8_t GPIO_GetInput(GPIO_T const *gpio) +{ + return (gpio->IOPnIN); +} + +/** + * @brief Set GPIO Port OUT Data + * @param[in] gpio : The pointer of the specified GPIO module(GPIO0, GPIO1, ...., GPIOA, GPIOB). + * - \ref GPIO0 + * - \ref GPIO1 + * - \ref GPIO2 + * - \ref GPIO3 + * - \ref GPIO4 + * - \ref GPIO5 + * - \ref GPIO6 + * - \ref GPIO7 + * - \ref GPIO8 + * - \ref GPIO9 + * - \ref GPIOA + * - \ref GPIOB + * @param[in] u8Out : GPIO port data. + * @return None + * @details Set the Data into specified GPIO port. + */ +__STATIC_INLINE void GPIO_SetOutput(GPIO_T *gpio, uint8_t u8Out) +{ + gpio->IOPnOUT = u8Out; +} + +/** + * @brief Clear output data of specified pin + * @param[in] gpio : The pointer of the specified GPIO module(GPIO0, GPIO1, ...., GPIOA, GPIOB). + * - \ref GPIO0 + * - \ref GPIO1 + * - \ref GPIO2 + * - \ref GPIO3 + * - \ref GPIO4 + * - \ref GPIO5 + * - \ref GPIO6 + * - \ref GPIO7 + * - \ref GPIO8 + * - \ref GPIO9 + * - \ref GPIOA + * - \ref GPIOB + * @param[in] u8Clr : For each pin (Pn0 to Pn7), set it to 1 to clear it and 0 to not clear it. + * Each bit shows the pin information in the order of Pn0, Pn1.. Pn6, and Pn7 from the bottom. + * @return None + * @details Clear the output data of the specified pin of the GPIO port + */ +__STATIC_INLINE void GPIO_SetOutputClr(GPIO_T *gpio, uint8_t u8Clr) +{ + gpio->IOPnCLR = u8Clr; +} + +/** + * @brief Set output data of specified pin + * @param[in] gpio : The pointer of the specified GPIO module(GPIO0, GPIO1, ...., GPIOA, GPIOB). + * - \ref GPIO0 + * - \ref GPIO1 + * - \ref GPIO2 + * - \ref GPIO3 + * - \ref GPIO4 + * - \ref GPIO5 + * - \ref GPIO6 + * - \ref GPIO7 + * - \ref GPIO8 + * - \ref GPIO9 + * - \ref GPIOA + * - \ref GPIOB + * @param[in] u8Set : For each pin (Pn0 to Pn7), set it to 1 if you want to set it (set the output data to 1), + * or set it to 0 if you do not want to set it. + * Each bit shows the pin information in the order of Pn0, Pn1.. Pn6, and Pn7 from the bottom. + * @return None + * @details Set the output data of the specified pin of the GPIO port to 1. + */ +__STATIC_INLINE void GPIO_SetOutputSet(GPIO_T *gpio, uint8_t u8Set) +{ + gpio->IOPnSET = u8Set; +} + +/** + * @brief Invert the output data of the specified pin + * @param[in] gpio : The pointer of the specified GPIO module(GPIO0, GPIO1, ...., GPIOA, GPIOB). + * - \ref GPIO0 + * - \ref GPIO1 + * - \ref GPIO2 + * - \ref GPIO3 + * - \ref GPIO4 + * - \ref GPIO5 + * - \ref GPIO6 + * - \ref GPIO7 + * - \ref GPIO8 + * - \ref GPIO9 + * - \ref GPIOA + * - \ref GPIOB + * @param[in] u8Tgl : For each pin (Pn0 to Pn7), set it to 1 if you want to invert it, + * or set it to 0 if you do not want to invert it. + * Each bit shows the pin information in the order of Pn0, Pn1.. Pn6, and Pn7 from the bottom. + * @return None + * @details Invert the output data of the specified pin of the GPIO port. + */ +__STATIC_INLINE void GPIO_SetOutputToggle(GPIO_T *gpio, uint8_t u8Tgl) +{ + gpio->IOPnTGL = u8Tgl; +} + +/** + * @brief Nch open drain output control of the specified pin + * @param[in] gpio : The pointer of the specified GPIO module(GPIO0, GPIO1, GPIO2, GPIO3, GPIO4, GPIO5, GPIO6, GPIO7, GPIOA). + * - \ref GPIO0 + * - \ref GPIO1 + * - \ref GPIO2 + * - \ref GPIO3 + * - \ref GPIO4 + * - \ref GPIO5 + * - \ref GPIO6 + * - \ref GPIO7 + * - \ref GPIOA + * @param[in] u8Odc : Pin of the specified port. Select from the macros below. + * (The logical sum of multiple macros is also possible.) + * | GPIO0 | GPIO1 | GPIO2 | GPIO3 | GPIO4 | + * |:-----------------|:-----------------|:-----------------|:-----------------|:-----------------| + * | \ref GPIO_P01ODC | \ref GPIO_P10ODC | \ref GPIO_P20ODC | \ref GPIO_P33ODC | \ref GPIO_P43ODC | + * | \ref GPIO_P02ODC | | \ref GPIO_P21ODC | \ref GPIO_P34ODC | \ref GPIO_P45ODC | + * | \ref GPIO_P03ODC | | | | \ref GPIO_P46ODC | + * | \ref GPIO_P05ODC | | | | \ref GPIO_P47ODC | + * ------------------------------------------------------------------------------------------------ + * | GPIO5 | GPIO6 | GPIO7 | GPIOA | + * |:-----------------|:-----------------|:-----------------|:-----------------| + * | \ref GPIO_P50ODC | \ref GPIO_P64ODC | \ref GPIO_P70ODC | \ref GPIO_PA5ODC | + * | \ref GPIO_P52ODC | \ref GPIO_P66ODC | \ref GPIO_P72ODC | \ref GPIO_PA6ODC | + * | | \ref GPIO_P67ODC | \ref GPIO_P73ODC | \ref GPIO_PA7ODC | + * | | | \ref GPIO_P74ODC | | + * | | | \ref GPIO_P75ODC | | + * | | | \ref GPIO_P77ODC | | + * @param[in] u8Value : Nch open drain output selection. + * - \ref GPIO_ODC_PUSHPULL + * - \ref GPIO_ODC_NCH_OPENDRAIN + * @return None + * @details Set Nch open drain / push pull output of the specified pin of GPIO port + */ +__STATIC_INLINE void GPIO_SetOpenDrainCtrl(GPIO_T *gpio, uint8_t u8Odc, uint8_t u8Value) +{ + if (u8Value == GPIO_ODC_NCH_OPENDRAIN) + { + gpio->IOPnODC |= u8Odc; + } + else + { + gpio->IOPnODC &= ~(u8Odc); + } +} + +/*-----------------------------*/ +/* BSP API function prototypes */ +/*-----------------------------*/ +void GPIO_SetFunctionMode(GPIO_MD_T *gpio_md, uint8_t u8Pin, uint32_t u32Value); +void GPIO_SetPullCtrl(GPIO_T *gpio, uint8_t u8Pin, uint8_t u8Value); +void GPIO_SetNfClk(NF_T *nf, uint8_t u8Smp); +void GPIO_ClearNMIIntFlag(void); +void GPIO_EnableResist(GPIO_T *gpio, uint8_t u8Ctl); +void GPIO_DisableResist(GPIO_T *gpio, uint8_t u8Ctl); +void GPIO_SetPullUpDownCtrl(GPIO_T *gpio, uint8_t u8Pin, uint8_t u8Value); +void GPIO_SetLEDOutput(GPIO_T *gpio, uint8_t u8Pin, uint8_t u8Value); +void GPIO_SetInputLevel(GPIO_T *gpio, uint8_t u8Pin, uint8_t u8Level); +void GPIO_SetRealTimeCtrl(GPIO_T *gpio, uint8_t u8PinCnt, uint8_t u8RealTimeCtr); +void GPIO_SetSyncOutputCtrl(uint8_t u8PinSel, uint8_t u8OutSel, uint8_t u8OutCtr); +void GPIO_SetIntCond(uint32_t u32Irqtgn, uint32_t u32Edge, uint32_t u32Trigger); +void GPIO_ClearExternalIntFlag(uint32_t u32EintNum); +void GPIO_DisableExternalInt(uint32_t u32EintNum); +void GPIO_EnableExternalInt(uint32_t u32EintNum); +uint32_t GPIO_GetExternalIntFlag(uint32_t u32EintNum); +uint32_t GPIO_GetExternalIntDetectFlag(uint32_t u32EintNum); +void GPIO_ClearKEYIntFlag(uint32_t u32KeyNum); +void GPIO_DisableKEYInt(uint32_t u32KeyNum); +void GPIO_EnableKEYInt(uint32_t u32KeyNum); +uint32_t GPIO_GetKEYIntFlag(uint32_t u32KeyNum); +uint32_t GPIO_GetKEYIntDetectFlag(uint32_t u32KeyNum); + + +/*@}*/ /* end of group GPIO_EXPORTED_FUNCTIONS */ + +/*@}*/ /* end of group GPIO_Driver */ + +/*@}*/ /* end of group Standard_Driver */ + +#endif /* __GPIO_H__ */ + +/*** (C) COPYRIGHT 2023 Nuvoton Technology Corp. Japan ***/ diff --git a/Header/M2003C/sys.h b/Header/M2003/sys.h similarity index 100% rename from Header/M2003C/sys.h rename to Header/M2003/sys.h diff --git a/Header/M55M1/Pin_Assignment_V22_sys.h b/Header/M55M1/Pin_Assignment_V22_sys.h new file mode 100644 index 0000000..ba1dc17 --- /dev/null +++ b/Header/M55M1/Pin_Assignment_V22_sys.h @@ -0,0 +1,4426 @@ +/**************************************************************************//** + * @file sys.h + * @version V1.00 + * @brief SYS driver header file + * + * SPDX-License-Identifier: Apache-2.0 + * @copyright Copyright (C) 2023 Nuvoton Technology Corp. All rights reserved. + ******************************************************************************/ + +#ifndef __SYS_H__ +#define __SYS_H__ + +#ifdef __cplusplus +extern "C" +{ +#endif + +/** @addtogroup Standard_Driver Standard Driver + @{ +*/ + +/** @addtogroup SYS_Driver SYS Driver + @{ +*/ + +/** @addtogroup SYS_EXPORTED_CONSTANTS SYS Exported Constants + @{ +*/ + +/*---------------------------------------------------------------------------------------------------------*/ +/* SYS Timeout constant definitions. */ +/*---------------------------------------------------------------------------------------------------------*/ +#define SYS_TIMEOUT SystemCoreClock /*!< SYS time-out counter (1 second time-out) */ + +/*---------------------------------------------------------------------------------------------------------*/ +/* SYS Define Error Code */ +/*---------------------------------------------------------------------------------------------------------*/ +#define SYS_OK ( 0L) /*!< SYS operation OK */ +#define SYS_ERR_FAIL (-1L) /*!< SYS operation failed */ +#define SYS_ERR_TIMEOUT (-2L) /*!< SYS operation abort due to timeout error */ + +/*---------------------------------------------------------------------------------------------------------*/ +/* Module Reset Control Resister constant definitions. */ +/*---------------------------------------------------------------------------------------------------------*/ +#define SYS_ACMP01RST ((0x200UL<<20) | SYS_ACMPRST_ACMP01RST_Pos) /*!< Reset ACMP01 \hideinitializer*/ +#define SYS_ACMP23RST ((0x200UL<<20) | SYS_ACMPRST_ACMP23RST_Pos) /*!< Reset ACMP23 \hideinitializer*/ +#define SYS_AWF0RST ((0x204UL<<20) | SYS_AWFRST_AWF0RST_Pos) /*!< Reset AWF0 \hideinitializer*/ +#define SYS_BPWM0RST ((0x208UL<<20) | SYS_BPWMRST_BPWM0RST_Pos) /*!< Reset BPWM0 \hideinitializer*/ +#define SYS_BPWM1RST ((0x208UL<<20) | SYS_BPWMRST_BPWM1RST_Pos) /*!< Reset BPWM1 \hideinitializer*/ +#define SYS_CANFD0RST ((0x20CUL<<20) | SYS_CANFDRST_CANFD0RST_Pos) /*!< Reset CANFD0RST \hideinitializer*/ +#define SYS_CANFD1RST ((0x20CUL<<20) | SYS_CANFDRST_CANFD1RST_Pos) /*!< Reset CANFD1RST \hideinitializer*/ +#define SYS_CCAP0RST ((0x210UL<<20) | SYS_CCAPRST_CCAP0RST_Pos) /*!< Reset CCAP0RST \hideinitializer*/ +#define SYS_CRC0RST ((0x214UL<<20) | SYS_CRCRST_CRC0RST_Pos) /*!< Reset CRC0RST \hideinitializer*/ +#define SYS_CRYPTO0RST ((0x218UL<<20) | SYS_CRYPTORST_CRYPTO0RST_Pos) /*!< Reset CRYPTORST \hideinitializer*/ +#define SYS_DAC01RST ((0x21CUL<<20) | SYS_DACRST_DAC01RST_Pos) /*!< Reset DAC01RST \hideinitializer*/ +#define SYS_DMIC0RST ((0x220UL<<20) | SYS_DMICRST_DMIC0RST_Pos) /*!< Reset DMIC0RST \hideinitializer*/ +#define SYS_EADC0RST ((0x224UL<<20) | SYS_EADCRST_EADC0RST_Pos) /*!< Reset EADC0RST \hideinitializer*/ +#define SYS_EBI0RST ((0x228UL<<20) | SYS_EBIRST_EBI0RST_Pos) /*!< Reset EBI0RST \hideinitializer*/ +#define SYS_ECAP0RST ((0x22CUL<<20) | SYS_ECAPRST_ECAP0RST_Pos) /*!< Reset ECAP0RST \hideinitializer*/ +#define SYS_ECAP1RST ((0x22CUL<<20) | SYS_ECAPRST_ECAP1RST_Pos) /*!< Reset ECAP1RST \hideinitializer*/ +#define SYS_ECAP2RST ((0x22CUL<<20) | SYS_ECAPRST_ECAP2RST_Pos) /*!< Reset ECAP2RST \hideinitializer*/ +#define SYS_ECAP3RST ((0x22CUL<<20) | SYS_ECAPRST_ECAP3RST_Pos) /*!< Reset ECAP3RST \hideinitializer*/ +#define SYS_EMAC0RST ((0x230UL<<20) | SYS_EMACRST_EMAC0RST_Pos) /*!< Reset EMAC0RST \hideinitializer*/ +#define SYS_EPWM0RST ((0x234UL<<20) | SYS_EPWMRST_EPWM0RST_Pos) /*!< Reset EPWM0RST \hideinitializer*/ +#define SYS_EPWM1RST ((0x234UL<<20) | SYS_EPWMRST_EPWM1RST_Pos) /*!< Reset EPWM1RST \hideinitializer*/ +#define SYS_EQEI0RST ((0x238UL<<20) | SYS_EQEIRST_EQEI0RST_Pos) /*!< Reset EQEI0RST \hideinitializer*/ +#define SYS_EQEI1RST ((0x238UL<<20) | SYS_EQEIRST_EQEI1RST_Pos) /*!< Reset EQEI1RST \hideinitializer*/ +#define SYS_EQEI2RST ((0x238UL<<20) | SYS_EQEIRST_EQEI2RST_Pos) /*!< Reset EQEI2RST \hideinitializer*/ +#define SYS_EQEI3RST ((0x238UL<<20) | SYS_EQEIRST_EQEI3RST_Pos) /*!< Reset EQEI3RST \hideinitializer*/ +#define SYS_FMC0RST ((0x23CUL<<20) | SYS_FMCRST_FMC0RST_Pos) /*!< Reset FMC0RST \hideinitializer*/ +#define SYS_GDMA0RST ((0x240UL<<20) | SYS_GDMARST_GDMA0RST_Pos) /*!< Reset GDMA0RST \hideinitializer*/ +#define SYS_GPIO0RST ((0x244UL<<20) | SYS_GPIORST_GPIO0RST_Pos) /*!< Reset GPIO0RST \hideinitializer*/ +#define SYS_HSOTG0RST ((0x248UL<<20) | SYS_HSOTGRST_HSOTG0RST_Pos) /*!< Reset HSOTG0RST \hideinitializer*/ +#define SYS_HSUSBD0RST ((0x24CUL<<20) | SYS_HSUSBDRST_HSUSBD0RST_Pos) /*!< Reset HSUSBD0RST \hideinitializer*/ +#define SYS_HSUSBH0RST ((0x250UL<<20) | SYS_HSUSBHRST_HSUSBH0RST_Pos) /*!< Reset HSUSBH0RST \hideinitializer*/ +#define SYS_I2C0RST ((0x254UL<<20) | SYS_I2CRST_I2C0RST_Pos) /*!< Reset I2C0RST \hideinitializer*/ +#define SYS_I2C1RST ((0x254UL<<20) | SYS_I2CRST_I2C1RST_Pos) /*!< Reset I2C0RST \hideinitializer*/ +#define SYS_I2C2RST ((0x254UL<<20) | SYS_I2CRST_I2C2RST_Pos) /*!< Reset I2C0RST \hideinitializer*/ +#define SYS_I2C3RST ((0x254UL<<20) | SYS_I2CRST_I2C3RST_Pos) /*!< Reset I2C0RST \hideinitializer*/ +#define SYS_I2S0RST ((0x258UL<<20) | SYS_I2SRST_I2S0RST_Pos) /*!< Reset I2S0RST \hideinitializer*/ +#define SYS_I2S1RST ((0x258UL<<20) | SYS_I2SRST_I2S1RST_Pos) /*!< Reset I2S1RST \hideinitializer*/ +#define SYS_I3C0RST ((0x25CUL<<20) | SYS_I3CRST_I3C0RST_Pos) /*!< Reset I3C0RST \hideinitializer*/ +#define SYS_KDF0RST ((0x260UL<<20) | SYS_KDFRST_KDF0RST_Pos) /*!< Reset KDF0RST \hideinitializer*/ +#define SYS_KPI0RST ((0x264UL<<20) | SYS_KPIRST_KPI0RST_Pos) /*!< Reset KPI0RST \hideinitializer*/ +#define SYS_KS0RST ((0x268UL<<20) | SYS_KSRST_KS0RST_Pos) /*!< Reset KS0RST \hideinitializer*/ +#define SYS_LPADC0RST ((0x26CUL<<20) | SYS_LPADCRST_LPADC0RST_Pos) /*!< Reset LPADC0RST \hideinitializer*/ +#define SYS_LPPDMA0RST ((0x270UL<<20) | SYS_LPPDMARST_LPPDMA0RST_Pos) /*!< Reset LPDMA0RST \hideinitializer*/ +#define SYS_LPGPIO0RST ((0x274UL<<20) | SYS_LPGPIORST_LPGPIO0RST_Pos) /*!< Reset LPGPIO0RST \hideinitializer*/ +#define SYS_LPI2C0RST ((0x278UL<<20) | SYS_LPI2CRST_LPI2C0RST_Pos) /*!< Reset LPI2C0RST \hideinitializer*/ +#define SYS_LPSPI0RST ((0x27CUL<<20) | SYS_LPSPIRST_LPSPI0RST_Pos) /*!< Reset LPSPI0RST \hideinitializer*/ +#define SYS_LPTMR0RST ((0x280UL<<20) | SYS_LPTMRRST_LPTMR0RST_Pos) /*!< Reset LPTMR0RST \hideinitializer*/ +#define SYS_LPTMR1RST ((0x280UL<<20) | SYS_LPTMRRST_LPTMR1RST_Pos) /*!< Reset LPTMR1RST \hideinitializer*/ +#define SYS_LPUART0RST ((0x284UL<<20) | SYS_LPUARTRST_LPUART0RST_Pos) /*!< Reset LPUART0RST \hideinitializer*/ +#define SYS_OTFC0RST ((0x288UL<<20) | SYS_OTFCRST_OTFC0RST_Pos) /*!< Reset OTFC0RST \hideinitializer*/ +#define SYS_OTG0RST ((0x28CUL<<20) | SYS_OTGRST_OTG0RST_Pos) /*!< Reset OTG0RST \hideinitializer*/ +#define SYS_PDMA0RST ((0x290UL<<20) | SYS_PDMARST_PDMA0RST_Pos) /*!< Reset PDMA0RST \hideinitializer*/ +#define SYS_PDMA1RST ((0x290UL<<20) | SYS_PDMARST_PDMA1RST_Pos) /*!< Reset PDMA1RST \hideinitializer*/ +#define SYS_PSIO0RST ((0x294UL<<20) | SYS_PSIORST_PSIO0RST_Pos) /*!< Reset PSIO0RST \hideinitializer*/ +#define SYS_QSPI0RST ((0x298UL<<20) | SYS_QSPIRST_QSPI0RST_Pos) /*!< Reset QSPI0RST \hideinitializer*/ +#define SYS_QSPI1RST ((0x298UL<<20) | SYS_QSPIRST_QSPI1RST_Pos) /*!< Reset QSPI1RST \hideinitializer*/ +#define SYS_RTC0RST ((0x29CUL<<20) | SYS_RTCRST_RTC0RST_Pos) /*!< Reset RTC0RST \hideinitializer*/ +#define SYS_SC0RST ((0x2A0UL<<20) | SYS_SCRST_SC0RST_Pos) /*!< Reset SC0RST \hideinitializer*/ +#define SYS_SC1RST ((0x2A0UL<<20) | SYS_SCRST_SC1RST_Pos) /*!< Reset SC1RST \hideinitializer*/ +#define SYS_SC2RST ((0x2A0UL<<20) | SYS_SCRST_SC2RST_Pos) /*!< Reset SC2RST \hideinitializer*/ +#define SYS_SCU0RST ((0x2A4UL<<20) | SYS_SCURST_SCU0RST_Pos) /*!< Reset SCU0RST \hideinitializer*/ +#define SYS_SDH0RST ((0x2A8UL<<20) | SYS_SDHRST_SDH0RST_Pos) /*!< Reset SDH0RST \hideinitializer*/ +#define SYS_SDH1RST ((0x2A8UL<<20) | SYS_SDHRST_SDH1RST_Pos) /*!< Reset SDH1RST \hideinitializer*/ +#define SYS_SPI0RST ((0x2ACUL<<20) | SYS_SPIRST_SPI0RST_Pos) /*!< Reset SPI0RST \hideinitializer*/ +#define SYS_SPI1RST ((0x2ACUL<<20) | SYS_SPIRST_SPI1RST_Pos) /*!< Reset SPI1RST \hideinitializer*/ +#define SYS_SPI2RST ((0x2ACUL<<20) | SYS_SPIRST_SPI2RST_Pos) /*!< Reset SPI2RST \hideinitializer*/ +#define SYS_SPI3RST ((0x2ACUL<<20) | SYS_SPIRST_SPI3RST_Pos) /*!< Reset SPI3RST \hideinitializer*/ +#define SYS_SPIM0RST ((0x2B0UL<<20) | SYS_SPIMRST_SPIM0RST_Pos) /*!< Reset SPIM0RST \hideinitializer*/ +#define SYS_TMR0RST ((0x2C0UL<<20) | SYS_TMRRST_TMR0RST_Pos) /*!< Reset TMR0RST \hideinitializer*/ +#define SYS_TMR1RST ((0x2C0UL<<20) | SYS_TMRRST_TMR1RST_Pos) /*!< Reset TMR1RST \hideinitializer*/ +#define SYS_TMR2RST ((0x2C0UL<<20) | SYS_TMRRST_TMR2RST_Pos) /*!< Reset TMR2RST \hideinitializer*/ +#define SYS_TMR3RST ((0x2C0UL<<20) | SYS_TMRRST_TMR3RST_Pos) /*!< Reset TMR3RST \hideinitializer*/ +#define SYS_TRNG0RST ((0x2C4UL<<20) | SYS_TRNGRST_TRNG0RST_Pos) /*!< Reset TRNG0RST \hideinitializer*/ +#define SYS_TTMR0RST ((0x2C8UL<<20) | SYS_TTMRRST_TTMR0RST_Pos) /*!< Reset TTMR0RST \hideinitializer*/ +#define SYS_TTMR1RST ((0x2C8UL<<20) | SYS_TTMRRST_TTMR1RST_Pos) /*!< Reset TTMR1RST \hideinitializer*/ +#define SYS_UART0RST ((0x2CCUL<<20) | SYS_UARTRST_UART0RST_Pos) /*!< Reset UART0RST \hideinitializer*/ +#define SYS_UART1RST ((0x2CCUL<<20) | SYS_UARTRST_UART1RST_Pos) /*!< Reset UART1RST \hideinitializer*/ +#define SYS_UART2RST ((0x2CCUL<<20) | SYS_UARTRST_UART2RST_Pos) /*!< Reset UART2RST \hideinitializer*/ +#define SYS_UART3RST ((0x2CCUL<<20) | SYS_UARTRST_UART3RST_Pos) /*!< Reset UART3RST \hideinitializer*/ +#define SYS_UART4RST ((0x2CCUL<<20) | SYS_UARTRST_UART4RST_Pos) /*!< Reset UART4RST \hideinitializer*/ +#define SYS_UART5RST ((0x2CCUL<<20) | SYS_UARTRST_UART5RST_Pos) /*!< Reset UART5RST \hideinitializer*/ +#define SYS_UART6RST ((0x2CCUL<<20) | SYS_UARTRST_UART6RST_Pos) /*!< Reset UART6RST \hideinitializer*/ +#define SYS_UART7RST ((0x2CCUL<<20) | SYS_UARTRST_UART7RST_Pos) /*!< Reset UART7RST \hideinitializer*/ +#define SYS_UART8RST ((0x2CCUL<<20) | SYS_UARTRST_UART8RST_Pos) /*!< Reset UART8RST \hideinitializer*/ +#define SYS_UART9RST ((0x2CCUL<<20) | SYS_UARTRST_UART9RST_Pos) /*!< Reset UART9RST \hideinitializer*/ +#define SYS_USBD0RST ((0x2D0UL<<20) | SYS_USBDRST_USBD0RST_Pos) /*!< Reset USBD0RST \hideinitializer*/ +#define SYS_USBH0RST ((0x2D4UL<<20) | SYS_USBHRST_USBH0RST_Pos) /*!< Reset USBH0RST \hideinitializer*/ +#define SYS_USCI0RST ((0x2D8UL<<20) | SYS_USCIRST_USCI0RST_Pos) /*!< Reset USCI0RST \hideinitializer*/ +#define SYS_UTCPD0RST ((0x2DCUL<<20) | SYS_UTCPDRST_UTCPD0RST_Pos) /*!< Reset UTCPD0RST \hideinitializer*/ + +/*---------------------------------------------------------------------------------------------------------*/ +/* Brown Out Detector Threshold Voltage Selection constant definitions. */ +/*---------------------------------------------------------------------------------------------------------*/ +#define SYS_BODCTL_BOD_INTERRUPT_EN (0UL<GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB3MFP_Msk)) | SYS_GPB_MFP0_PB3MFP_ACMP0_N) /*!< Set PB3 function to ACMP0_N */ +#define SET_ACMP0_O_PB7() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB7MFP_Msk)) | SYS_GPB_MFP1_PB7MFP_ACMP0_O) /*!< Set PB7 function to ACMP0_O */ +#define SET_ACMP0_O_PC1() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC1MFP_Msk)) | SYS_GPC_MFP0_PC1MFP_ACMP0_O) /*!< Set PC1 function to ACMP0_O */ +#define SET_ACMP0_O_PC12() SYS->GPC_MFP3 = ((SYS->GPC_MFP3 & (~SYS_GPC_MFP3_PC12MFP_Msk)) | SYS_GPC_MFP3_PC12MFP_ACMP0_O) /*!< Set PC12 function to ACMP0_O */ +#define SET_ACMP0_O_PF0() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF0MFP_Msk)) | SYS_GPF_MFP0_PF0MFP_ACMP0_O) /*!< Set PF0 function to ACMP0_O */ +#define SET_ACMP0_O_PG14() SYS->GPG_MFP3 = ((SYS->GPG_MFP3 & (~SYS_GPG_MFP3_PG14MFP_Msk)) | SYS_GPG_MFP3_PG14MFP_ACMP0_O) /*!< Set PG14 function to ACMP0_O */ +#define SET_ACMP0_P0_PA11() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA11MFP_Msk)) | SYS_GPA_MFP2_PA11MFP_ACMP0_P0) /*!< Set PA11 function to ACMP0_P0 */ +#define SET_ACMP0_P1_PB2() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB2MFP_Msk)) | SYS_GPB_MFP0_PB2MFP_ACMP0_P1) /*!< Set PB2 function to ACMP0_P1 */ +#define SET_ACMP0_P2_PB12() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB12MFP_Msk)) | SYS_GPB_MFP3_PB12MFP_ACMP0_P2) /*!< Set PB12 function to ACMP0_P2 */ +#define SET_ACMP0_P3_PB13() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB13MFP_Msk)) | SYS_GPB_MFP3_PB13MFP_ACMP0_P3) /*!< Set PB13 function to ACMP0_P3 */ +#define SET_ACMP0_WLAT_PA7() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA7MFP_Msk)) | SYS_GPA_MFP1_PA7MFP_ACMP0_WLAT) /*!< Set PA7 function to ACMP0_WLAT */ +#define SET_ACMP1_N_PB5() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB5MFP_Msk)) | SYS_GPB_MFP1_PB5MFP_ACMP1_N) /*!< Set PB5 function to ACMP1_N */ +#define SET_ACMP1_O_PB6() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB6MFP_Msk)) | SYS_GPB_MFP1_PB6MFP_ACMP1_O) /*!< Set PB6 function to ACMP1_O */ +#define SET_ACMP1_O_PC0() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC0MFP_Msk)) | SYS_GPC_MFP0_PC0MFP_ACMP1_O) /*!< Set PC0 function to ACMP1_O */ +#define SET_ACMP1_O_PC11() SYS->GPC_MFP2 = ((SYS->GPC_MFP2 & (~SYS_GPC_MFP2_PC11MFP_Msk)) | SYS_GPC_MFP2_PC11MFP_ACMP1_O) /*!< Set PC11 function to ACMP1_O */ +#define SET_ACMP1_O_PF1() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF1MFP_Msk)) | SYS_GPF_MFP0_PF1MFP_ACMP1_O) /*!< Set PF1 function to ACMP1_O */ +#define SET_ACMP1_O_PG15() SYS->GPG_MFP3 = ((SYS->GPG_MFP3 & (~SYS_GPG_MFP3_PG15MFP_Msk)) | SYS_GPG_MFP3_PG15MFP_ACMP1_O) /*!< Set PG15 function to ACMP1_O */ +#define SET_ACMP1_P0_PA10() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA10MFP_Msk)) | SYS_GPA_MFP2_PA10MFP_ACMP1_P0) /*!< Set PA10 function to ACMP1_P0 */ +#define SET_ACMP1_P1_PB4() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB4MFP_Msk)) | SYS_GPB_MFP1_PB4MFP_ACMP1_P1) /*!< Set PB4 function to ACMP1_P1 */ +#define SET_ACMP1_P2_PB12() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB12MFP_Msk)) | SYS_GPB_MFP3_PB12MFP_ACMP1_P2) /*!< Set PB12 function to ACMP1_P2 */ +#define SET_ACMP1_P3_PB13() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB13MFP_Msk)) | SYS_GPB_MFP3_PB13MFP_ACMP1_P3) /*!< Set PB13 function to ACMP1_P3 */ +#define SET_ACMP1_WLAT_PA6() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA6MFP_Msk)) | SYS_GPA_MFP1_PA6MFP_ACMP1_WLAT) /*!< Set PA6 function to ACMP1_WLAT */ +#define SET_ACMP2_N_PB6() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB6MFP_Msk)) | SYS_GPB_MFP1_PB6MFP_ACMP2_N) /*!< Set PB6 function to ACMP2_N */ +#define SET_ACMP2_O_PB1() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB1MFP_Msk)) | SYS_GPB_MFP0_PB1MFP_ACMP2_O) /*!< Set PB1 function to ACMP2_O */ +#define SET_ACMP2_O_PE7() SYS->GPE_MFP1 = ((SYS->GPE_MFP1 & (~SYS_GPE_MFP1_PE7MFP_Msk)) | SYS_GPE_MFP1_PE7MFP_ACMP2_O) /*!< Set PE7 function to ACMP2_O */ +#define SET_ACMP2_O_PF3() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF3MFP_Msk)) | SYS_GPF_MFP0_PF3MFP_ACMP2_O) /*!< Set PF3 function to ACMP2_O */ +#define SET_ACMP2_P0_PB7() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB7MFP_Msk)) | SYS_GPB_MFP1_PB7MFP_ACMP2_P0) /*!< Set PB7 function to ACMP2_P0 */ +#define SET_ACMP2_P1_PB8() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB8MFP_Msk)) | SYS_GPB_MFP2_PB8MFP_ACMP2_P1) /*!< Set PB8 function to ACMP2_P1 */ +#define SET_ACMP2_P2_PB9() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB9MFP_Msk)) | SYS_GPB_MFP2_PB9MFP_ACMP2_P2) /*!< Set PB9 function to ACMP2_P2 */ +#define SET_ACMP2_P3_PB10() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB10MFP_Msk)) | SYS_GPB_MFP2_PB10MFP_ACMP2_P3) /*!< Set PB10 function to ACMP2_P3 */ +#define SET_ACMP2_WLAT_PC7() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC7MFP_Msk)) | SYS_GPC_MFP1_PC7MFP_ACMP2_WLAT) /*!< Set PC7 function to ACMP2_WLAT */ +#define SET_ACMP3_N_PB0() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB0MFP_Msk)) | SYS_GPB_MFP0_PB0MFP_ACMP3_N) /*!< Set PB0 function to ACMP3_N */ +#define SET_ACMP3_O_PB0() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB0MFP_Msk)) | SYS_GPB_MFP0_PB0MFP_ACMP3_O) /*!< Set PB0 function to ACMP3_O */ +#define SET_ACMP3_O_PE6() SYS->GPE_MFP1 = ((SYS->GPE_MFP1 & (~SYS_GPE_MFP1_PE6MFP_Msk)) | SYS_GPE_MFP1_PE6MFP_ACMP3_O) /*!< Set PE6 function to ACMP3_O */ +#define SET_ACMP3_O_PF2() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF2MFP_Msk)) | SYS_GPF_MFP0_PF2MFP_ACMP3_O) /*!< Set PF2 function to ACMP3_O */ +#define SET_ACMP3_P0_PB1() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB1MFP_Msk)) | SYS_GPB_MFP0_PB1MFP_ACMP3_P0) /*!< Set PB1 function to ACMP3_P0 */ +#define SET_ACMP3_P1_PC9() SYS->GPC_MFP2 = ((SYS->GPC_MFP2 & (~SYS_GPC_MFP2_PC9MFP_Msk)) | SYS_GPC_MFP2_PC9MFP_ACMP3_P1) /*!< Set PC9 function to ACMP3_P1 */ +#define SET_ACMP3_P2_PC10() SYS->GPC_MFP2 = ((SYS->GPC_MFP2 & (~SYS_GPC_MFP2_PC10MFP_Msk)) | SYS_GPC_MFP2_PC10MFP_ACMP3_P2) /*!< Set PC10 function to ACMP3_P2 */ +#define SET_ACMP3_P3_PC11() SYS->GPC_MFP2 = ((SYS->GPC_MFP2 & (~SYS_GPC_MFP2_PC11MFP_Msk)) | SYS_GPC_MFP2_PC11MFP_ACMP3_P3) /*!< Set PC11 function to ACMP3_P3 */ +#define SET_ACMP3_WLAT_PC6() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC6MFP_Msk)) | SYS_GPC_MFP1_PC6MFP_ACMP3_WLAT) /*!< Set PC6 function to ACMP3_WLAT */ +#define SET_BPWM0_CH0_PA0() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA0MFP_Msk)) | SYS_GPA_MFP0_PA0MFP_BPWM0_CH0) /*!< Set PA0 function to BPWM0_CH0 */ +#define SET_BPWM0_CH0_PA11() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA11MFP_Msk)) | SYS_GPA_MFP2_PA11MFP_BPWM0_CH0) /*!< Set PA11 function to BPWM0_CH0 */ +#define SET_BPWM0_CH0_PD13() SYS->GPD_MFP3 = ((SYS->GPD_MFP3 & (~SYS_GPD_MFP3_PD13MFP_Msk)) | SYS_GPD_MFP3_PD13MFP_BPWM0_CH0) /*!< Set PD13 function to BPWM0_CH0 */ +#define SET_BPWM0_CH0_PD6() SYS->GPD_MFP1 = ((SYS->GPD_MFP1 & (~SYS_GPD_MFP1_PD6MFP_Msk)) | SYS_GPD_MFP1_PD6MFP_BPWM0_CH0) /*!< Set PD6 function to BPWM0_CH0 */ +#define SET_BPWM0_CH0_PE2() SYS->GPE_MFP0 = ((SYS->GPE_MFP0 & (~SYS_GPE_MFP0_PE2MFP_Msk)) | SYS_GPE_MFP0_PE2MFP_BPWM0_CH0) /*!< Set PE2 function to BPWM0_CH0 */ +#define SET_BPWM0_CH0_PJ13() SYS->GPJ_MFP3 = ((SYS->GPJ_MFP3 & (~SYS_GPJ_MFP3_PJ13MFP_Msk)) | SYS_GPJ_MFP3_PJ13MFP_BPWM0_CH0) /*!< Set PJ13 function to BPWM0_CH0 */ +#define SET_BPWM0_CH1_PA1() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA1MFP_Msk)) | SYS_GPA_MFP0_PA1MFP_BPWM0_CH1) /*!< Set PA1 function to BPWM0_CH1 */ +#define SET_BPWM0_CH1_PA10() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA10MFP_Msk)) | SYS_GPA_MFP2_PA10MFP_BPWM0_CH1) /*!< Set PA10 function to BPWM0_CH1 */ +#define SET_BPWM0_CH1_PD7() SYS->GPD_MFP1 = ((SYS->GPD_MFP1 & (~SYS_GPD_MFP1_PD7MFP_Msk)) | SYS_GPD_MFP1_PD7MFP_BPWM0_CH1) /*!< Set PD7 function to BPWM0_CH1 */ +#define SET_BPWM0_CH1_PE3() SYS->GPE_MFP0 = ((SYS->GPE_MFP0 & (~SYS_GPE_MFP0_PE3MFP_Msk)) | SYS_GPE_MFP0_PE3MFP_BPWM0_CH1) /*!< Set PE3 function to BPWM0_CH1 */ +#define SET_BPWM0_CH1_PJ12() SYS->GPJ_MFP3 = ((SYS->GPJ_MFP3 & (~SYS_GPJ_MFP3_PJ12MFP_Msk)) | SYS_GPJ_MFP3_PJ12MFP_BPWM0_CH1) /*!< Set PJ12 function to BPWM0_CH1 */ +#define SET_BPWM0_CH2_PA2() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA2MFP_Msk)) | SYS_GPA_MFP0_PA2MFP_BPWM0_CH2) /*!< Set PA2 function to BPWM0_CH2 */ +#define SET_BPWM0_CH2_PA9() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA9MFP_Msk)) | SYS_GPA_MFP2_PA9MFP_BPWM0_CH2) /*!< Set PA9 function to BPWM0_CH2 */ +#define SET_BPWM0_CH2_PE4() SYS->GPE_MFP1 = ((SYS->GPE_MFP1 & (~SYS_GPE_MFP1_PE4MFP_Msk)) | SYS_GPE_MFP1_PE4MFP_BPWM0_CH2) /*!< Set PE4 function to BPWM0_CH2 */ +#define SET_BPWM0_CH2_PG12() SYS->GPG_MFP3 = ((SYS->GPG_MFP3 & (~SYS_GPG_MFP3_PG12MFP_Msk)) | SYS_GPG_MFP3_PG12MFP_BPWM0_CH2) /*!< Set PG12 function to BPWM0_CH2 */ +#define SET_BPWM0_CH2_PJ11() SYS->GPJ_MFP2 = ((SYS->GPJ_MFP2 & (~SYS_GPJ_MFP2_PJ11MFP_Msk)) | SYS_GPJ_MFP2_PJ11MFP_BPWM0_CH2) /*!< Set PJ11 function to BPWM0_CH2 */ +#define SET_BPWM0_CH3_PA3() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA3MFP_Msk)) | SYS_GPA_MFP0_PA3MFP_BPWM0_CH3) /*!< Set PA3 function to BPWM0_CH3 */ +#define SET_BPWM0_CH3_PA8() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA8MFP_Msk)) | SYS_GPA_MFP2_PA8MFP_BPWM0_CH3) /*!< Set PA8 function to BPWM0_CH3 */ +#define SET_BPWM0_CH3_PE5() SYS->GPE_MFP1 = ((SYS->GPE_MFP1 & (~SYS_GPE_MFP1_PE5MFP_Msk)) | SYS_GPE_MFP1_PE5MFP_BPWM0_CH3) /*!< Set PE5 function to BPWM0_CH3 */ +#define SET_BPWM0_CH3_PG11() SYS->GPG_MFP2 = ((SYS->GPG_MFP2 & (~SYS_GPG_MFP2_PG11MFP_Msk)) | SYS_GPG_MFP2_PG11MFP_BPWM0_CH3) /*!< Set PG11 function to BPWM0_CH3 */ +#define SET_BPWM0_CH3_PJ10() SYS->GPJ_MFP2 = ((SYS->GPJ_MFP2 & (~SYS_GPJ_MFP2_PJ10MFP_Msk)) | SYS_GPJ_MFP2_PJ10MFP_BPWM0_CH3) /*!< Set PJ10 function to BPWM0_CH3 */ +#define SET_BPWM0_CH4_PA4() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA4MFP_Msk)) | SYS_GPA_MFP1_PA4MFP_BPWM0_CH4) /*!< Set PA4 function to BPWM0_CH4 */ +#define SET_BPWM0_CH4_PC13() SYS->GPC_MFP3 = ((SYS->GPC_MFP3 & (~SYS_GPC_MFP3_PC13MFP_Msk)) | SYS_GPC_MFP3_PC13MFP_BPWM0_CH4) /*!< Set PC13 function to BPWM0_CH4 */ +#define SET_BPWM0_CH4_PE6() SYS->GPE_MFP1 = ((SYS->GPE_MFP1 & (~SYS_GPE_MFP1_PE6MFP_Msk)) | SYS_GPE_MFP1_PE6MFP_BPWM0_CH4) /*!< Set PE6 function to BPWM0_CH4 */ +#define SET_BPWM0_CH4_PF5() SYS->GPF_MFP1 = ((SYS->GPF_MFP1 & (~SYS_GPF_MFP1_PF5MFP_Msk)) | SYS_GPF_MFP1_PF5MFP_BPWM0_CH4) /*!< Set PF5 function to BPWM0_CH4 */ +#define SET_BPWM0_CH4_PG10() SYS->GPG_MFP2 = ((SYS->GPG_MFP2 & (~SYS_GPG_MFP2_PG10MFP_Msk)) | SYS_GPG_MFP2_PG10MFP_BPWM0_CH4) /*!< Set PG10 function to BPWM0_CH4 */ +#define SET_BPWM0_CH4_PJ9() SYS->GPJ_MFP2 = ((SYS->GPJ_MFP2 & (~SYS_GPJ_MFP2_PJ9MFP_Msk)) | SYS_GPJ_MFP2_PJ9MFP_BPWM0_CH4) /*!< Set PJ9 function to BPWM0_CH4 */ +#define SET_BPWM0_CH5_PA5() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA5MFP_Msk)) | SYS_GPA_MFP1_PA5MFP_BPWM0_CH5) /*!< Set PA5 function to BPWM0_CH5 */ +#define SET_BPWM0_CH5_PD12() SYS->GPD_MFP3 = ((SYS->GPD_MFP3 & (~SYS_GPD_MFP3_PD12MFP_Msk)) | SYS_GPD_MFP3_PD12MFP_BPWM0_CH5) /*!< Set PD12 function to BPWM0_CH5 */ +#define SET_BPWM0_CH5_PE7() SYS->GPE_MFP1 = ((SYS->GPE_MFP1 & (~SYS_GPE_MFP1_PE7MFP_Msk)) | SYS_GPE_MFP1_PE7MFP_BPWM0_CH5) /*!< Set PE7 function to BPWM0_CH5 */ +#define SET_BPWM0_CH5_PF4() SYS->GPF_MFP1 = ((SYS->GPF_MFP1 & (~SYS_GPF_MFP1_PF4MFP_Msk)) | SYS_GPF_MFP1_PF4MFP_BPWM0_CH5) /*!< Set PF4 function to BPWM0_CH5 */ +#define SET_BPWM0_CH5_PG9() SYS->GPG_MFP2 = ((SYS->GPG_MFP2 & (~SYS_GPG_MFP2_PG9MFP_Msk)) | SYS_GPG_MFP2_PG9MFP_BPWM0_CH5) /*!< Set PG9 function to BPWM0_CH5 */ +#define SET_BPWM0_CH5_PJ8() SYS->GPJ_MFP2 = ((SYS->GPJ_MFP2 & (~SYS_GPJ_MFP2_PJ8MFP_Msk)) | SYS_GPJ_MFP2_PJ8MFP_BPWM0_CH5) /*!< Set PJ8 function to BPWM0_CH5 */ +#define SET_BPWM1_CH0_PB11() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB11MFP_Msk)) | SYS_GPB_MFP2_PB11MFP_BPWM1_CH0) /*!< Set PB11 function to BPWM1_CH0 */ +#define SET_BPWM1_CH0_PC7() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC7MFP_Msk)) | SYS_GPC_MFP1_PC7MFP_BPWM1_CH0) /*!< Set PC7 function to BPWM1_CH0 */ +#define SET_BPWM1_CH0_PF0() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF0MFP_Msk)) | SYS_GPF_MFP0_PF0MFP_BPWM1_CH0) /*!< Set PF0 function to BPWM1_CH0 */ +#define SET_BPWM1_CH0_PF3() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF3MFP_Msk)) | SYS_GPF_MFP0_PF3MFP_BPWM1_CH0) /*!< Set PF3 function to BPWM1_CH0 */ +#define SET_BPWM1_CH1_PB10() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB10MFP_Msk)) | SYS_GPB_MFP2_PB10MFP_BPWM1_CH1) /*!< Set PB10 function to BPWM1_CH1 */ +#define SET_BPWM1_CH1_PC6() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC6MFP_Msk)) | SYS_GPC_MFP1_PC6MFP_BPWM1_CH1) /*!< Set PC6 function to BPWM1_CH1 */ +#define SET_BPWM1_CH1_PF1() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF1MFP_Msk)) | SYS_GPF_MFP0_PF1MFP_BPWM1_CH1) /*!< Set PF1 function to BPWM1_CH1 */ +#define SET_BPWM1_CH1_PF2() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF2MFP_Msk)) | SYS_GPF_MFP0_PF2MFP_BPWM1_CH1) /*!< Set PF2 function to BPWM1_CH1 */ +#define SET_BPWM1_CH2_PA12() SYS->GPA_MFP3 = ((SYS->GPA_MFP3 & (~SYS_GPA_MFP3_PA12MFP_Msk)) | SYS_GPA_MFP3_PA12MFP_BPWM1_CH2) /*!< Set PA12 function to BPWM1_CH2 */ +#define SET_BPWM1_CH2_PA7() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA7MFP_Msk)) | SYS_GPA_MFP1_PA7MFP_BPWM1_CH2) /*!< Set PA7 function to BPWM1_CH2 */ +#define SET_BPWM1_CH2_PB9() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB9MFP_Msk)) | SYS_GPB_MFP2_PB9MFP_BPWM1_CH2) /*!< Set PB9 function to BPWM1_CH2 */ +#define SET_BPWM1_CH3_PA13() SYS->GPA_MFP3 = ((SYS->GPA_MFP3 & (~SYS_GPA_MFP3_PA13MFP_Msk)) | SYS_GPA_MFP3_PA13MFP_BPWM1_CH3) /*!< Set PA13 function to BPWM1_CH3 */ +#define SET_BPWM1_CH3_PA6() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA6MFP_Msk)) | SYS_GPA_MFP1_PA6MFP_BPWM1_CH3) /*!< Set PA6 function to BPWM1_CH3 */ +#define SET_BPWM1_CH3_PB8() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB8MFP_Msk)) | SYS_GPB_MFP2_PB8MFP_BPWM1_CH3) /*!< Set PB8 function to BPWM1_CH3 */ +#define SET_BPWM1_CH4_PA14() SYS->GPA_MFP3 = ((SYS->GPA_MFP3 & (~SYS_GPA_MFP3_PA14MFP_Msk)) | SYS_GPA_MFP3_PA14MFP_BPWM1_CH4) /*!< Set PA14 function to BPWM1_CH4 */ +#define SET_BPWM1_CH4_PB7() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB7MFP_Msk)) | SYS_GPB_MFP1_PB7MFP_BPWM1_CH4) /*!< Set PB7 function to BPWM1_CH4 */ +#define SET_BPWM1_CH4_PC8() SYS->GPC_MFP2 = ((SYS->GPC_MFP2 & (~SYS_GPC_MFP2_PC8MFP_Msk)) | SYS_GPC_MFP2_PC8MFP_BPWM1_CH4) /*!< Set PC8 function to BPWM1_CH4 */ +#define SET_BPWM1_CH5_PA15() SYS->GPA_MFP3 = ((SYS->GPA_MFP3 & (~SYS_GPA_MFP3_PA15MFP_Msk)) | SYS_GPA_MFP3_PA15MFP_BPWM1_CH5) /*!< Set PA15 function to BPWM1_CH5 */ +#define SET_BPWM1_CH5_PB6() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB6MFP_Msk)) | SYS_GPB_MFP1_PB6MFP_BPWM1_CH5) /*!< Set PB6 function to BPWM1_CH5 */ +#define SET_BPWM1_CH5_PE13() SYS->GPE_MFP3 = ((SYS->GPE_MFP3 & (~SYS_GPE_MFP3_PE13MFP_Msk)) | SYS_GPE_MFP3_PE13MFP_BPWM1_CH5) /*!< Set PE13 function to BPWM1_CH5 */ +#define SET_CANFD0_RXD_PA13() SYS->GPA_MFP3 = ((SYS->GPA_MFP3 & (~SYS_GPA_MFP3_PA13MFP_Msk)) | SYS_GPA_MFP3_PA13MFP_CANFD0_RXD) /*!< Set PA13 function to CANFD0_RXD */ +#define SET_CANFD0_RXD_PA4() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA4MFP_Msk)) | SYS_GPA_MFP1_PA4MFP_CANFD0_RXD) /*!< Set PA4 function to CANFD0_RXD */ +#define SET_CANFD0_RXD_PB10() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB10MFP_Msk)) | SYS_GPB_MFP2_PB10MFP_CANFD0_RXD) /*!< Set PB10 function to CANFD0_RXD */ +#define SET_CANFD0_RXD_PC4() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC4MFP_Msk)) | SYS_GPC_MFP1_PC4MFP_CANFD0_RXD) /*!< Set PC4 function to CANFD0_RXD */ +#define SET_CANFD0_RXD_PD10() SYS->GPD_MFP2 = ((SYS->GPD_MFP2 & (~SYS_GPD_MFP2_PD10MFP_Msk)) | SYS_GPD_MFP2_PD10MFP_CANFD0_RXD) /*!< Set PD10 function to CANFD0_RXD */ +#define SET_CANFD0_RXD_PE15() SYS->GPE_MFP3 = ((SYS->GPE_MFP3 & (~SYS_GPE_MFP3_PE15MFP_Msk)) | SYS_GPE_MFP3_PE15MFP_CANFD0_RXD) /*!< Set PE15 function to CANFD0_RXD */ +#define SET_CANFD0_RXD_PI13() SYS->GPI_MFP3 = ((SYS->GPI_MFP3 & (~SYS_GPI_MFP3_PI13MFP_Msk)) | SYS_GPI_MFP3_PI13MFP_CANFD0_RXD) /*!< Set PI13 function to CANFD0_RXD */ +#define SET_CANFD0_RXD_PJ11() SYS->GPJ_MFP2 = ((SYS->GPJ_MFP2 & (~SYS_GPJ_MFP2_PJ11MFP_Msk)) | SYS_GPJ_MFP2_PJ11MFP_CANFD0_RXD) /*!< Set PJ11 function to CANFD0_RXD */ +#define SET_CANFD0_RXD_PJ3() SYS->GPJ_MFP0 = ((SYS->GPJ_MFP0 & (~SYS_GPJ_MFP0_PJ3MFP_Msk)) | SYS_GPJ_MFP0_PJ3MFP_CANFD0_RXD) /*!< Set PJ3 function to CANFD0_RXD */ +#define SET_CANFD0_TXD_PA12() SYS->GPA_MFP3 = ((SYS->GPA_MFP3 & (~SYS_GPA_MFP3_PA12MFP_Msk)) | SYS_GPA_MFP3_PA12MFP_CANFD0_TXD) /*!< Set PA12 function to CANFD0_TXD */ +#define SET_CANFD0_TXD_PA5() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA5MFP_Msk)) | SYS_GPA_MFP1_PA5MFP_CANFD0_TXD) /*!< Set PA5 function to CANFD0_TXD */ +#define SET_CANFD0_TXD_PB11() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB11MFP_Msk)) | SYS_GPB_MFP2_PB11MFP_CANFD0_TXD) /*!< Set PB11 function to CANFD0_TXD */ +#define SET_CANFD0_TXD_PC5() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC5MFP_Msk)) | SYS_GPC_MFP1_PC5MFP_CANFD0_TXD) /*!< Set PC5 function to CANFD0_TXD */ +#define SET_CANFD0_TXD_PD11() SYS->GPD_MFP2 = ((SYS->GPD_MFP2 & (~SYS_GPD_MFP2_PD11MFP_Msk)) | SYS_GPD_MFP2_PD11MFP_CANFD0_TXD) /*!< Set PD11 function to CANFD0_TXD */ +#define SET_CANFD0_TXD_PE14() SYS->GPE_MFP3 = ((SYS->GPE_MFP3 & (~SYS_GPE_MFP3_PE14MFP_Msk)) | SYS_GPE_MFP3_PE14MFP_CANFD0_TXD) /*!< Set PE14 function to CANFD0_TXD */ +#define SET_CANFD0_TXD_PI12() SYS->GPI_MFP3 = ((SYS->GPI_MFP3 & (~SYS_GPI_MFP3_PI12MFP_Msk)) | SYS_GPI_MFP3_PI12MFP_CANFD0_TXD) /*!< Set PI12 function to CANFD0_TXD */ +#define SET_CANFD0_TXD_PJ10() SYS->GPJ_MFP2 = ((SYS->GPJ_MFP2 & (~SYS_GPJ_MFP2_PJ10MFP_Msk)) | SYS_GPJ_MFP2_PJ10MFP_CANFD0_TXD) /*!< Set PJ10 function to CANFD0_TXD */ +#define SET_CANFD0_TXD_PJ2() SYS->GPJ_MFP0 = ((SYS->GPJ_MFP0 & (~SYS_GPJ_MFP0_PJ2MFP_Msk)) | SYS_GPJ_MFP0_PJ2MFP_CANFD0_TXD) /*!< Set PJ2 function to CANFD0_TXD */ +#define SET_CANFD1_RXD_PB6() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB6MFP_Msk)) | SYS_GPB_MFP1_PB6MFP_CANFD1_RXD) /*!< Set PB6 function to CANFD1_RXD */ +#define SET_CANFD1_RXD_PC2() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC2MFP_Msk)) | SYS_GPC_MFP0_PC2MFP_CANFD1_RXD) /*!< Set PC2 function to CANFD1_RXD */ +#define SET_CANFD1_RXD_PC9() SYS->GPC_MFP2 = ((SYS->GPC_MFP2 & (~SYS_GPC_MFP2_PC9MFP_Msk)) | SYS_GPC_MFP2_PC9MFP_CANFD1_RXD) /*!< Set PC9 function to CANFD1_RXD */ +#define SET_CANFD1_RXD_PD12() SYS->GPD_MFP3 = ((SYS->GPD_MFP3 & (~SYS_GPD_MFP3_PD12MFP_Msk)) | SYS_GPD_MFP3_PD12MFP_CANFD1_RXD) /*!< Set PD12 function to CANFD1_RXD */ +#define SET_CANFD1_RXD_PE6() SYS->GPE_MFP1 = ((SYS->GPE_MFP1 & (~SYS_GPE_MFP1_PE6MFP_Msk)) | SYS_GPE_MFP1_PE6MFP_CANFD1_RXD) /*!< Set PE6 function to CANFD1_RXD */ +#define SET_CANFD1_RXD_PF8() SYS->GPF_MFP2 = ((SYS->GPF_MFP2 & (~SYS_GPF_MFP2_PF8MFP_Msk)) | SYS_GPF_MFP2_PF8MFP_CANFD1_RXD) /*!< Set PF8 function to CANFD1_RXD */ +#define SET_CANFD1_RXD_PG1() SYS->GPG_MFP0 = ((SYS->GPG_MFP0 & (~SYS_GPG_MFP0_PG1MFP_Msk)) | SYS_GPG_MFP0_PG1MFP_CANFD1_RXD) /*!< Set PG1 function to CANFD1_RXD */ +#define SET_CANFD1_RXD_PI15() SYS->GPI_MFP3 = ((SYS->GPI_MFP3 & (~SYS_GPI_MFP3_PI15MFP_Msk)) | SYS_GPI_MFP3_PI15MFP_CANFD1_RXD) /*!< Set PI15 function to CANFD1_RXD */ +#define SET_CANFD1_RXD_PJ13() SYS->GPJ_MFP3 = ((SYS->GPJ_MFP3 & (~SYS_GPJ_MFP3_PJ13MFP_Msk)) | SYS_GPJ_MFP3_PJ13MFP_CANFD1_RXD) /*!< Set PJ13 function to CANFD1_RXD */ +#define SET_CANFD1_RXD_PJ5() SYS->GPJ_MFP1 = ((SYS->GPJ_MFP1 & (~SYS_GPJ_MFP1_PJ5MFP_Msk)) | SYS_GPJ_MFP1_PJ5MFP_CANFD1_RXD) /*!< Set PJ5 function to CANFD1_RXD */ +#define SET_CANFD1_TXD_PB7() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB7MFP_Msk)) | SYS_GPB_MFP1_PB7MFP_CANFD1_TXD) /*!< Set PB7 function to CANFD1_TXD */ +#define SET_CANFD1_TXD_PC10() SYS->GPC_MFP2 = ((SYS->GPC_MFP2 & (~SYS_GPC_MFP2_PC10MFP_Msk)) | SYS_GPC_MFP2_PC10MFP_CANFD1_TXD) /*!< Set PC10 function to CANFD1_TXD */ +#define SET_CANFD1_TXD_PC13() SYS->GPC_MFP3 = ((SYS->GPC_MFP3 & (~SYS_GPC_MFP3_PC13MFP_Msk)) | SYS_GPC_MFP3_PC13MFP_CANFD1_TXD) /*!< Set PC13 function to CANFD1_TXD */ +#define SET_CANFD1_TXD_PC3() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC3MFP_Msk)) | SYS_GPC_MFP0_PC3MFP_CANFD1_TXD) /*!< Set PC3 function to CANFD1_TXD */ +#define SET_CANFD1_TXD_PE7() SYS->GPE_MFP1 = ((SYS->GPE_MFP1 & (~SYS_GPE_MFP1_PE7MFP_Msk)) | SYS_GPE_MFP1_PE7MFP_CANFD1_TXD) /*!< Set PE7 function to CANFD1_TXD */ +#define SET_CANFD1_TXD_PF9() SYS->GPF_MFP2 = ((SYS->GPF_MFP2 & (~SYS_GPF_MFP2_PF9MFP_Msk)) | SYS_GPF_MFP2_PF9MFP_CANFD1_TXD) /*!< Set PF9 function to CANFD1_TXD */ +#define SET_CANFD1_TXD_PG0() SYS->GPG_MFP0 = ((SYS->GPG_MFP0 & (~SYS_GPG_MFP0_PG0MFP_Msk)) | SYS_GPG_MFP0_PG0MFP_CANFD1_TXD) /*!< Set PG0 function to CANFD1_TXD */ +#define SET_CANFD1_TXD_PI14() SYS->GPI_MFP3 = ((SYS->GPI_MFP3 & (~SYS_GPI_MFP3_PI14MFP_Msk)) | SYS_GPI_MFP3_PI14MFP_CANFD1_TXD) /*!< Set PI14 function to CANFD1_TXD */ +#define SET_CANFD1_TXD_PJ12() SYS->GPJ_MFP3 = ((SYS->GPJ_MFP3 & (~SYS_GPJ_MFP3_PJ12MFP_Msk)) | SYS_GPJ_MFP3_PJ12MFP_CANFD1_TXD) /*!< Set PJ12 function to CANFD1_TXD */ +#define SET_CANFD1_TXD_PJ4() SYS->GPJ_MFP1 = ((SYS->GPJ_MFP1 & (~SYS_GPJ_MFP1_PJ4MFP_Msk)) | SYS_GPJ_MFP1_PJ4MFP_CANFD1_TXD) /*!< Set PJ4 function to CANFD1_TXD */ +#define SET_CCAP_DATA0_PB14() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB14MFP_Msk)) | SYS_GPB_MFP3_PB14MFP_CCAP_DATA0) /*!< Set PB14 function to CCAP_DATA0 */ +#define SET_CCAP_DATA0_PB7() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB7MFP_Msk)) | SYS_GPB_MFP1_PB7MFP_CCAP_DATA0) /*!< Set PB7 function to CCAP_DATA0 */ +#define SET_CCAP_DATA0_PC0() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC0MFP_Msk)) | SYS_GPC_MFP0_PC0MFP_CCAP_DATA0) /*!< Set PC0 function to CCAP_DATA0 */ +#define SET_CCAP_DATA0_PF7() SYS->GPF_MFP1 = ((SYS->GPF_MFP1 & (~SYS_GPF_MFP1_PF7MFP_Msk)) | SYS_GPF_MFP1_PF7MFP_CCAP_DATA0) /*!< Set PF7 function to CCAP_DATA0 */ +#define SET_CCAP_DATA0_PJ7() SYS->GPJ_MFP1 = ((SYS->GPJ_MFP1 & (~SYS_GPJ_MFP1_PJ7MFP_Msk)) | SYS_GPJ_MFP1_PJ7MFP_CCAP_DATA0) /*!< Set PJ7 function to CCAP_DATA0 */ +#define SET_CCAP_DATA1_PB15() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB15MFP_Msk)) | SYS_GPB_MFP3_PB15MFP_CCAP_DATA1) /*!< Set PB15 function to CCAP_DATA1 */ +#define SET_CCAP_DATA1_PB8() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB8MFP_Msk)) | SYS_GPB_MFP2_PB8MFP_CCAP_DATA1) /*!< Set PB8 function to CCAP_DATA1 */ +#define SET_CCAP_DATA1_PC1() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC1MFP_Msk)) | SYS_GPC_MFP0_PC1MFP_CCAP_DATA1) /*!< Set PC1 function to CCAP_DATA1 */ +#define SET_CCAP_DATA1_PF8() SYS->GPF_MFP2 = ((SYS->GPF_MFP2 & (~SYS_GPF_MFP2_PF8MFP_Msk)) | SYS_GPF_MFP2_PF8MFP_CCAP_DATA1) /*!< Set PF8 function to CCAP_DATA1 */ +#define SET_CCAP_DATA1_PJ6() SYS->GPJ_MFP1 = ((SYS->GPJ_MFP1 & (~SYS_GPJ_MFP1_PJ6MFP_Msk)) | SYS_GPJ_MFP1_PJ6MFP_CCAP_DATA1) /*!< Set PJ6 function to CCAP_DATA1 */ +#define SET_CCAP_DATA2_PA2() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA2MFP_Msk)) | SYS_GPA_MFP0_PA2MFP_CCAP_DATA2) /*!< Set PA2 function to CCAP_DATA2 */ +#define SET_CCAP_DATA2_PC2() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC2MFP_Msk)) | SYS_GPC_MFP0_PC2MFP_CCAP_DATA2) /*!< Set PC2 function to CCAP_DATA2 */ +#define SET_CCAP_DATA2_PF9() SYS->GPF_MFP2 = ((SYS->GPF_MFP2 & (~SYS_GPF_MFP2_PF9MFP_Msk)) | SYS_GPF_MFP2_PF9MFP_CCAP_DATA2) /*!< Set PF9 function to CCAP_DATA2 */ +#define SET_CCAP_DATA2_PJ5() SYS->GPJ_MFP1 = ((SYS->GPJ_MFP1 & (~SYS_GPJ_MFP1_PJ5MFP_Msk)) | SYS_GPJ_MFP1_PJ5MFP_CCAP_DATA2) /*!< Set PJ5 function to CCAP_DATA2 */ +#define SET_CCAP_DATA3_PA3() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA3MFP_Msk)) | SYS_GPA_MFP0_PA3MFP_CCAP_DATA3) /*!< Set PA3 function to CCAP_DATA3 */ +#define SET_CCAP_DATA3_PC3() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC3MFP_Msk)) | SYS_GPC_MFP0_PC3MFP_CCAP_DATA3) /*!< Set PC3 function to CCAP_DATA3 */ +#define SET_CCAP_DATA3_PF10() SYS->GPF_MFP2 = ((SYS->GPF_MFP2 & (~SYS_GPF_MFP2_PF10MFP_Msk)) | SYS_GPF_MFP2_PF10MFP_CCAP_DATA3) /*!< Set PF10 function to CCAP_DATA3 */ +#define SET_CCAP_DATA3_PJ4() SYS->GPJ_MFP1 = ((SYS->GPJ_MFP1 & (~SYS_GPJ_MFP1_PJ4MFP_Msk)) | SYS_GPJ_MFP1_PJ4MFP_CCAP_DATA3) /*!< Set PJ4 function to CCAP_DATA3 */ +#define SET_CCAP_DATA4_PC4() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC4MFP_Msk)) | SYS_GPC_MFP1_PC4MFP_CCAP_DATA4) /*!< Set PC4 function to CCAP_DATA4 */ +#define SET_CCAP_DATA4_PF11() SYS->GPF_MFP2 = ((SYS->GPF_MFP2 & (~SYS_GPF_MFP2_PF11MFP_Msk)) | SYS_GPF_MFP2_PF11MFP_CCAP_DATA4) /*!< Set PF11 function to CCAP_DATA4 */ +#define SET_CCAP_DATA4_PJ3() SYS->GPJ_MFP0 = ((SYS->GPJ_MFP0 & (~SYS_GPJ_MFP0_PJ3MFP_Msk)) | SYS_GPJ_MFP0_PJ3MFP_CCAP_DATA4) /*!< Set PJ3 function to CCAP_DATA4 */ +#define SET_CCAP_DATA5_PC5() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC5MFP_Msk)) | SYS_GPC_MFP1_PC5MFP_CCAP_DATA5) /*!< Set PC5 function to CCAP_DATA5 */ +#define SET_CCAP_DATA5_PG4() SYS->GPG_MFP1 = ((SYS->GPG_MFP1 & (~SYS_GPG_MFP1_PG4MFP_Msk)) | SYS_GPG_MFP1_PG4MFP_CCAP_DATA5) /*!< Set PG4 function to CCAP_DATA5 */ +#define SET_CCAP_DATA5_PJ2() SYS->GPJ_MFP0 = ((SYS->GPJ_MFP0 & (~SYS_GPJ_MFP0_PJ2MFP_Msk)) | SYS_GPJ_MFP0_PJ2MFP_CCAP_DATA5) /*!< Set PJ2 function to CCAP_DATA5 */ +#define SET_CCAP_DATA6_PA0() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA0MFP_Msk)) | SYS_GPA_MFP0_PA0MFP_CCAP_DATA6) /*!< Set PA0 function to CCAP_DATA6 */ +#define SET_CCAP_DATA6_PG3() SYS->GPG_MFP0 = ((SYS->GPG_MFP0 & (~SYS_GPG_MFP0_PG3MFP_Msk)) | SYS_GPG_MFP0_PG3MFP_CCAP_DATA6) /*!< Set PG3 function to CCAP_DATA6 */ +#define SET_CCAP_DATA7_PA1() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA1MFP_Msk)) | SYS_GPA_MFP0_PA1MFP_CCAP_DATA7) /*!< Set PA1 function to CCAP_DATA7 */ +#define SET_CCAP_DATA7_PG2() SYS->GPG_MFP0 = ((SYS->GPG_MFP0 & (~SYS_GPG_MFP0_PG2MFP_Msk)) | SYS_GPG_MFP0_PG2MFP_CCAP_DATA7) /*!< Set PG2 function to CCAP_DATA7 */ +#define SET_CCAP_HSYNC_PB9() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB9MFP_Msk)) | SYS_GPB_MFP2_PB9MFP_CCAP_HSYNC) /*!< Set PB9 function to CCAP_HSYNC */ +#define SET_CCAP_HSYNC_PD7() SYS->GPD_MFP1 = ((SYS->GPD_MFP1 & (~SYS_GPD_MFP1_PD7MFP_Msk)) | SYS_GPD_MFP1_PD7MFP_CCAP_HSYNC) /*!< Set PD7 function to CCAP_HSYNC */ +#define SET_CCAP_HSYNC_PG13() SYS->GPG_MFP3 = ((SYS->GPG_MFP3 & (~SYS_GPG_MFP3_PG13MFP_Msk)) | SYS_GPG_MFP3_PG13MFP_CCAP_HSYNC) /*!< Set PG13 function to CCAP_HSYNC */ +#define SET_CCAP_PIXCLK_PA5() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA5MFP_Msk)) | SYS_GPA_MFP1_PA5MFP_CCAP_PIXCLK) /*!< Set PA5 function to CCAP_PIXCLK */ +#define SET_CCAP_PIXCLK_PB13() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB13MFP_Msk)) | SYS_GPB_MFP3_PB13MFP_CCAP_PIXCLK) /*!< Set PB13 function to CCAP_PIXCLK */ +#define SET_CCAP_PIXCLK_PG0() SYS->GPG_MFP0 = ((SYS->GPG_MFP0 & (~SYS_GPG_MFP0_PG0MFP_Msk)) | SYS_GPG_MFP0_PG0MFP_CCAP_PIXCLK) /*!< Set PG0 function to CCAP_PIXCLK */ +#define SET_CCAP_PIXCLK_PG9() SYS->GPG_MFP2 = ((SYS->GPG_MFP2 & (~SYS_GPG_MFP2_PG9MFP_Msk)) | SYS_GPG_MFP2_PG9MFP_CCAP_PIXCLK) /*!< Set PG9 function to CCAP_PIXCLK */ +#define SET_CCAP_PIXCLK_PH12() SYS->GPH_MFP3 = ((SYS->GPH_MFP3 & (~SYS_GPH_MFP3_PH12MFP_Msk)) | SYS_GPH_MFP3_PH12MFP_CCAP_PIXCLK) /*!< Set PH12 function to CCAP_PIXCLK */ +#define SET_CCAP_SCLK_PA4() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA4MFP_Msk)) | SYS_GPA_MFP1_PA4MFP_CCAP_SCLK) /*!< Set PA4 function to CCAP_SCLK */ +#define SET_CCAP_SCLK_PB12() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB12MFP_Msk)) | SYS_GPB_MFP3_PB12MFP_CCAP_SCLK) /*!< Set PB12 function to CCAP_SCLK */ +#define SET_CCAP_SCLK_PG1() SYS->GPG_MFP0 = ((SYS->GPG_MFP0 & (~SYS_GPG_MFP0_PG1MFP_Msk)) | SYS_GPG_MFP0_PG1MFP_CCAP_SCLK) /*!< Set PG1 function to CCAP_SCLK */ +#define SET_CCAP_SCLK_PG10() SYS->GPG_MFP2 = ((SYS->GPG_MFP2 & (~SYS_GPG_MFP2_PG10MFP_Msk)) | SYS_GPG_MFP2_PG10MFP_CCAP_SCLK) /*!< Set PG10 function to CCAP_SCLK */ +#define SET_CCAP_SCLK_PH13() SYS->GPH_MFP3 = ((SYS->GPH_MFP3 & (~SYS_GPH_MFP3_PH13MFP_Msk)) | SYS_GPH_MFP3_PH13MFP_CCAP_SCLK) /*!< Set PH13 function to CCAP_SCLK */ +#define SET_CCAP_SFIELD_PB11() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB11MFP_Msk)) | SYS_GPB_MFP2_PB11MFP_CCAP_SFIELD) /*!< Set PB11 function to CCAP_SFIELD */ +#define SET_CCAP_SFIELD_PG11() SYS->GPG_MFP2 = ((SYS->GPG_MFP2 & (~SYS_GPG_MFP2_PG11MFP_Msk)) | SYS_GPG_MFP2_PG11MFP_CCAP_SFIELD) /*!< Set PG11 function to CCAP_SFIELD */ +#define SET_CCAP_SFIELD_PH14() SYS->GPH_MFP3 = ((SYS->GPH_MFP3 & (~SYS_GPH_MFP3_PH14MFP_Msk)) | SYS_GPH_MFP3_PH14MFP_CCAP_SFIELD) /*!< Set PH14 function to CCAP_SFIELD */ +#define SET_CCAP_VSYNC_PB10() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB10MFP_Msk)) | SYS_GPB_MFP2_PB10MFP_CCAP_VSYNC) /*!< Set PB10 function to CCAP_VSYNC */ +#define SET_CCAP_VSYNC_PG12() SYS->GPG_MFP3 = ((SYS->GPG_MFP3 & (~SYS_GPG_MFP3_PG12MFP_Msk)) | SYS_GPG_MFP3_PG12MFP_CCAP_VSYNC) /*!< Set PG12 function to CCAP_VSYNC */ +#define SET_CCAP_VSYNC_PH15() SYS->GPH_MFP3 = ((SYS->GPH_MFP3 & (~SYS_GPH_MFP3_PH15MFP_Msk)) | SYS_GPH_MFP3_PH15MFP_CCAP_VSYNC) /*!< Set PH15 function to CCAP_VSYNC */ +#define SET_CLKO_PB13() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB13MFP_Msk)) | SYS_GPB_MFP3_PB13MFP_CLKO) /*!< Set PB13 function to CLKO */ +#define SET_CLKO_PB14() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB14MFP_Msk)) | SYS_GPB_MFP3_PB14MFP_CLKO) /*!< Set PB14 function to CLKO */ +#define SET_CLKO_PC13() SYS->GPC_MFP3 = ((SYS->GPC_MFP3 & (~SYS_GPC_MFP3_PC13MFP_Msk)) | SYS_GPC_MFP3_PC13MFP_CLKO) /*!< Set PC13 function to CLKO */ +#define SET_CLKO_PD12() SYS->GPD_MFP3 = ((SYS->GPD_MFP3 & (~SYS_GPD_MFP3_PD12MFP_Msk)) | SYS_GPD_MFP3_PD12MFP_CLKO) /*!< Set PD12 function to CLKO */ +#define SET_CLKO_PD13() SYS->GPD_MFP3 = ((SYS->GPD_MFP3 & (~SYS_GPD_MFP3_PD13MFP_Msk)) | SYS_GPD_MFP3_PD13MFP_CLKO) /*!< Set PD13 function to CLKO */ +#define SET_CLKO_PD5() SYS->GPD_MFP1 = ((SYS->GPD_MFP1 & (~SYS_GPD_MFP1_PD5MFP_Msk)) | SYS_GPD_MFP1_PD5MFP_CLKO) /*!< Set PD5 function to CLKO */ +#define SET_DAC0_OUT_PB12() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB12MFP_Msk)) | SYS_GPB_MFP3_PB12MFP_DAC0_OUT) /*!< Set PB12 function to DAC0_OUT */ +#define SET_DAC0_ST_PA0() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA0MFP_Msk)) | SYS_GPA_MFP0_PA0MFP_DAC0_ST) /*!< Set PA0 function to DAC0_ST */ +#define SET_DAC0_ST_PA10() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA10MFP_Msk)) | SYS_GPA_MFP2_PA10MFP_DAC0_ST) /*!< Set PA10 function to DAC0_ST */ +#define SET_DAC1_OUT_PB13() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB13MFP_Msk)) | SYS_GPB_MFP3_PB13MFP_DAC1_OUT) /*!< Set PB13 function to DAC1_OUT */ +#define SET_DAC1_ST_PA1() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA1MFP_Msk)) | SYS_GPA_MFP0_PA1MFP_DAC1_ST) /*!< Set PA1 function to DAC1_ST */ +#define SET_DAC1_ST_PA11() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA11MFP_Msk)) | SYS_GPA_MFP2_PA11MFP_DAC1_ST) /*!< Set PA11 function to DAC1_ST */ +#define SET_DMIC0_CLKLP_PA3() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA3MFP_Msk)) | SYS_GPA_MFP0_PA3MFP_DMIC0_CLKLP) /*!< Set PA3 function to DMIC0_CLKLP */ +#define SET_DMIC0_CLKLP_PB6() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB6MFP_Msk)) | SYS_GPB_MFP1_PB6MFP_DMIC0_CLKLP) /*!< Set PB6 function to DMIC0_CLKLP */ +#define SET_DMIC0_CLKLP_PE10() SYS->GPE_MFP2 = ((SYS->GPE_MFP2 & (~SYS_GPE_MFP2_PE10MFP_Msk)) | SYS_GPE_MFP2_PE10MFP_DMIC0_CLKLP) /*!< Set PE10 function to DMIC0_CLKLP */ +#define SET_DMIC0_CLK_PA4() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA4MFP_Msk)) | SYS_GPA_MFP1_PA4MFP_DMIC0_CLK) /*!< Set PA4 function to DMIC0_CLK */ +#define SET_DMIC0_CLK_PB4() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB4MFP_Msk)) | SYS_GPB_MFP1_PB4MFP_DMIC0_CLK) /*!< Set PB4 function to DMIC0_CLK */ +#define SET_DMIC0_CLK_PE9() SYS->GPE_MFP2 = ((SYS->GPE_MFP2 & (~SYS_GPE_MFP2_PE9MFP_Msk)) | SYS_GPE_MFP2_PE9MFP_DMIC0_CLK) /*!< Set PE9 function to DMIC0_CLK */ +#define SET_DMIC0_DAT_PA5() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA5MFP_Msk)) | SYS_GPA_MFP1_PA5MFP_DMIC0_DAT) /*!< Set PA5 function to DMIC0_DAT */ +#define SET_DMIC0_DAT_PB5() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB5MFP_Msk)) | SYS_GPB_MFP1_PB5MFP_DMIC0_DAT) /*!< Set PB5 function to DMIC0_DAT */ +#define SET_DMIC0_DAT_PE8() SYS->GPE_MFP2 = ((SYS->GPE_MFP2 & (~SYS_GPE_MFP2_PE8MFP_Msk)) | SYS_GPE_MFP2_PE8MFP_DMIC0_DAT) /*!< Set PE8 function to DMIC0_DAT */ +#define SET_DMIC1_CLK_PA1() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA1MFP_Msk)) | SYS_GPA_MFP0_PA1MFP_DMIC1_CLK) /*!< Set PA1 function to DMIC1_CLK */ +#define SET_DMIC1_CLK_PB2() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB2MFP_Msk)) | SYS_GPB_MFP0_PB2MFP_DMIC1_CLK) /*!< Set PB2 function to DMIC1_CLK */ +#define SET_DMIC1_CLK_PE12() SYS->GPE_MFP3 = ((SYS->GPE_MFP3 & (~SYS_GPE_MFP3_PE12MFP_Msk)) | SYS_GPE_MFP3_PE12MFP_DMIC1_CLK) /*!< Set PE12 function to DMIC1_CLK */ +#define SET_DMIC1_DAT_PA2() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA2MFP_Msk)) | SYS_GPA_MFP0_PA2MFP_DMIC1_DAT) /*!< Set PA2 function to DMIC1_DAT */ +#define SET_DMIC1_DAT_PB3() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB3MFP_Msk)) | SYS_GPB_MFP0_PB3MFP_DMIC1_DAT) /*!< Set PB3 function to DMIC1_DAT */ +#define SET_DMIC1_DAT_PE11() SYS->GPE_MFP2 = ((SYS->GPE_MFP2 & (~SYS_GPE_MFP2_PE11MFP_Msk)) | SYS_GPE_MFP2_PE11MFP_DMIC1_DAT) /*!< Set PE11 function to DMIC1_DAT */ +#define SET_EADC0_CH0_PB0() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB0MFP_Msk)) | SYS_GPB_MFP0_PB0MFP_EADC0_CH0) /*!< Set PB0 function to EADC0_CH0 */ +#define SET_EADC0_CH10_PB10() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB10MFP_Msk)) | SYS_GPB_MFP2_PB10MFP_EADC0_CH10) /*!< Set PB10 function to EADC0_CH10 */ +#define SET_EADC0_CH11_PB11() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB11MFP_Msk)) | SYS_GPB_MFP2_PB11MFP_EADC0_CH11) /*!< Set PB11 function to EADC0_CH11 */ +#define SET_EADC0_CH12_PB12() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB12MFP_Msk)) | SYS_GPB_MFP3_PB12MFP_EADC0_CH12) /*!< Set PB12 function to EADC0_CH12 */ +#define SET_EADC0_CH13_PB13() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB13MFP_Msk)) | SYS_GPB_MFP3_PB13MFP_EADC0_CH13) /*!< Set PB13 function to EADC0_CH13 */ +#define SET_EADC0_CH14_PB14() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB14MFP_Msk)) | SYS_GPB_MFP3_PB14MFP_EADC0_CH14) /*!< Set PB14 function to EADC0_CH14 */ +#define SET_EADC0_CH15_PB15() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB15MFP_Msk)) | SYS_GPB_MFP3_PB15MFP_EADC0_CH15) /*!< Set PB15 function to EADC0_CH15 */ +#define SET_EADC0_CH16_PD10() SYS->GPD_MFP2 = ((SYS->GPD_MFP2 & (~SYS_GPD_MFP2_PD10MFP_Msk)) | SYS_GPD_MFP2_PD10MFP_EADC0_CH16) /*!< Set PD10 function to EADC0_CH16 */ +#define SET_EADC0_CH17_PD11() SYS->GPD_MFP2 = ((SYS->GPD_MFP2 & (~SYS_GPD_MFP2_PD11MFP_Msk)) | SYS_GPD_MFP2_PD11MFP_EADC0_CH17) /*!< Set PD11 function to EADC0_CH17 */ +#define SET_EADC0_CH18_PD12() SYS->GPD_MFP3 = ((SYS->GPD_MFP3 & (~SYS_GPD_MFP3_PD12MFP_Msk)) | SYS_GPD_MFP3_PD12MFP_EADC0_CH18) /*!< Set PD12 function to EADC0_CH18 */ +#define SET_EADC0_CH19_PC13() SYS->GPC_MFP3 = ((SYS->GPC_MFP3 & (~SYS_GPC_MFP3_PC13MFP_Msk)) | SYS_GPC_MFP3_PC13MFP_EADC0_CH19) /*!< Set PC13 function to EADC0_CH19 */ +#define SET_EADC0_CH1_PB1() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB1MFP_Msk)) | SYS_GPB_MFP0_PB1MFP_EADC0_CH1) /*!< Set PB1 function to EADC0_CH1 */ +#define SET_EADC0_CH20_PA8() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA8MFP_Msk)) | SYS_GPA_MFP2_PA8MFP_EADC0_CH20) /*!< Set PA8 function to EADC0_CH20 */ +#define SET_EADC0_CH21_PA9() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA9MFP_Msk)) | SYS_GPA_MFP2_PA9MFP_EADC0_CH21) /*!< Set PA9 function to EADC0_CH21 */ +#define SET_EADC0_CH22_PA10() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA10MFP_Msk)) | SYS_GPA_MFP2_PA10MFP_EADC0_CH22) /*!< Set PA10 function to EADC0_CH22 */ +#define SET_EADC0_CH23_PA11() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA11MFP_Msk)) | SYS_GPA_MFP2_PA11MFP_EADC0_CH23) /*!< Set PA11 function to EADC0_CH23 */ +#define SET_EADC0_CH2_PB2() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB2MFP_Msk)) | SYS_GPB_MFP0_PB2MFP_EADC0_CH2) /*!< Set PB2 function to EADC0_CH2 */ +#define SET_EADC0_CH3_PB3() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB3MFP_Msk)) | SYS_GPB_MFP0_PB3MFP_EADC0_CH3) /*!< Set PB3 function to EADC0_CH3 */ +#define SET_EADC0_CH4_PB4() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB4MFP_Msk)) | SYS_GPB_MFP1_PB4MFP_EADC0_CH4) /*!< Set PB4 function to EADC0_CH4 */ +#define SET_EADC0_CH5_PB5() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB5MFP_Msk)) | SYS_GPB_MFP1_PB5MFP_EADC0_CH5) /*!< Set PB5 function to EADC0_CH5 */ +#define SET_EADC0_CH6_PB6() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB6MFP_Msk)) | SYS_GPB_MFP1_PB6MFP_EADC0_CH6) /*!< Set PB6 function to EADC0_CH6 */ +#define SET_EADC0_CH7_PB7() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB7MFP_Msk)) | SYS_GPB_MFP1_PB7MFP_EADC0_CH7) /*!< Set PB7 function to EADC0_CH7 */ +#define SET_EADC0_CH8_PB8() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB8MFP_Msk)) | SYS_GPB_MFP2_PB8MFP_EADC0_CH8) /*!< Set PB8 function to EADC0_CH8 */ +#define SET_EADC0_CH9_PB9() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB9MFP_Msk)) | SYS_GPB_MFP2_PB9MFP_EADC0_CH9) /*!< Set PB9 function to EADC0_CH9 */ +#define SET_EADC0_ST_PC1() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC1MFP_Msk)) | SYS_GPC_MFP0_PC1MFP_EADC0_ST) /*!< Set PC1 function to EADC0_ST */ +#define SET_EADC0_ST_PC13() SYS->GPC_MFP3 = ((SYS->GPC_MFP3 & (~SYS_GPC_MFP3_PC13MFP_Msk)) | SYS_GPC_MFP3_PC13MFP_EADC0_ST) /*!< Set PC13 function to EADC0_ST */ +#define SET_EADC0_ST_PD12() SYS->GPD_MFP3 = ((SYS->GPD_MFP3 & (~SYS_GPD_MFP3_PD12MFP_Msk)) | SYS_GPD_MFP3_PD12MFP_EADC0_ST) /*!< Set PD12 function to EADC0_ST */ +#define SET_EADC0_ST_PD13() SYS->GPD_MFP3 = ((SYS->GPD_MFP3 & (~SYS_GPD_MFP3_PD13MFP_Msk)) | SYS_GPD_MFP3_PD13MFP_EADC0_ST) /*!< Set PD13 function to EADC0_ST */ +#define SET_EADC0_ST_PD5() SYS->GPD_MFP1 = ((SYS->GPD_MFP1 & (~SYS_GPD_MFP1_PD5MFP_Msk)) | SYS_GPD_MFP1_PD5MFP_EADC0_ST) /*!< Set PD5 function to EADC0_ST */ +#define SET_EADC0_ST_PF0() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF0MFP_Msk)) | SYS_GPF_MFP0_PF0MFP_EADC0_ST) /*!< Set PF0 function to EADC0_ST */ +#define SET_EADC0_ST_PF5() SYS->GPF_MFP1 = ((SYS->GPF_MFP1 & (~SYS_GPF_MFP1_PF5MFP_Msk)) | SYS_GPF_MFP1_PF5MFP_EADC0_ST) /*!< Set PF5 function to EADC0_ST */ +#define SET_EADC0_ST_PG14() SYS->GPG_MFP3 = ((SYS->GPG_MFP3 & (~SYS_GPG_MFP3_PG14MFP_Msk)) | SYS_GPG_MFP3_PG14MFP_EADC0_ST) /*!< Set PG14 function to EADC0_ST */ +#define SET_EBI_AD0_PA5() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA5MFP_Msk)) | SYS_GPA_MFP1_PA5MFP_EBI_AD0) /*!< Set PA5 function to EBI_AD0 */ +#define SET_EBI_AD0_PC0() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC0MFP_Msk)) | SYS_GPC_MFP0_PC0MFP_EBI_AD0) /*!< Set PC0 function to EBI_AD0 */ +#define SET_EBI_AD0_PF4() SYS->GPF_MFP1 = ((SYS->GPF_MFP1 & (~SYS_GPF_MFP1_PF4MFP_Msk)) | SYS_GPF_MFP1_PF4MFP_EBI_AD0) /*!< Set PF4 function to EBI_AD0 */ +#define SET_EBI_AD0_PG9() SYS->GPG_MFP2 = ((SYS->GPG_MFP2 & (~SYS_GPG_MFP2_PG9MFP_Msk)) | SYS_GPG_MFP2_PG9MFP_EBI_AD0) /*!< Set PG9 function to EBI_AD0 */ +#define SET_EBI_AD0_PH12() SYS->GPH_MFP3 = ((SYS->GPH_MFP3 & (~SYS_GPH_MFP3_PH12MFP_Msk)) | SYS_GPH_MFP3_PH12MFP_EBI_AD0) /*!< Set PH12 function to EBI_AD0 */ +#define SET_EBI_AD0_PJ7() SYS->GPJ_MFP1 = ((SYS->GPJ_MFP1 & (~SYS_GPJ_MFP1_PJ7MFP_Msk)) | SYS_GPJ_MFP1_PJ7MFP_EBI_AD0) /*!< Set PJ7 function to EBI_AD0 */ +#define SET_EBI_AD10_PD13() SYS->GPD_MFP3 = ((SYS->GPD_MFP3 & (~SYS_GPD_MFP3_PD13MFP_Msk)) | SYS_GPD_MFP3_PD13MFP_EBI_AD10) /*!< Set PD13 function to EBI_AD10 */ +#define SET_EBI_AD10_PD3() SYS->GPD_MFP0 = ((SYS->GPD_MFP0 & (~SYS_GPD_MFP0_PD3MFP_Msk)) | SYS_GPD_MFP0_PD3MFP_EBI_AD10) /*!< Set PD3 function to EBI_AD10 */ +#define SET_EBI_AD10_PE1() SYS->GPE_MFP0 = ((SYS->GPE_MFP0 & (~SYS_GPE_MFP0_PE1MFP_Msk)) | SYS_GPE_MFP0_PE1MFP_EBI_AD10) /*!< Set PE1 function to EBI_AD10 */ +#define SET_EBI_AD10_PE7() SYS->GPE_MFP1 = ((SYS->GPE_MFP1 & (~SYS_GPE_MFP1_PE7MFP_Msk)) | SYS_GPE_MFP1_PE7MFP_EBI_AD10) /*!< Set PE7 function to EBI_AD10 */ +#define SET_EBI_AD11_PB12() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB12MFP_Msk)) | SYS_GPB_MFP3_PB12MFP_EBI_AD11) /*!< Set PB12 function to EBI_AD11 */ +#define SET_EBI_AD11_PC14() SYS->GPC_MFP3 = ((SYS->GPC_MFP3 & (~SYS_GPC_MFP3_PC14MFP_Msk)) | SYS_GPC_MFP3_PC14MFP_EBI_AD11) /*!< Set PC14 function to EBI_AD11 */ +#define SET_EBI_AD11_PD2() SYS->GPD_MFP0 = ((SYS->GPD_MFP0 & (~SYS_GPD_MFP0_PD2MFP_Msk)) | SYS_GPD_MFP0_PD2MFP_EBI_AD11) /*!< Set PD2 function to EBI_AD11 */ +#define SET_EBI_AD11_PE0() SYS->GPE_MFP0 = ((SYS->GPE_MFP0 & (~SYS_GPE_MFP0_PE0MFP_Msk)) | SYS_GPE_MFP0_PE0MFP_EBI_AD11) /*!< Set PE0 function to EBI_AD11 */ +#define SET_EBI_AD11_PE6() SYS->GPE_MFP1 = ((SYS->GPE_MFP1 & (~SYS_GPE_MFP1_PE6MFP_Msk)) | SYS_GPE_MFP1_PE6MFP_EBI_AD11) /*!< Set PE6 function to EBI_AD11 */ +#define SET_EBI_AD12_PB15() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB15MFP_Msk)) | SYS_GPB_MFP3_PB15MFP_EBI_AD12) /*!< Set PB15 function to EBI_AD12 */ +#define SET_EBI_AD12_PD1() SYS->GPD_MFP0 = ((SYS->GPD_MFP0 & (~SYS_GPD_MFP0_PD1MFP_Msk)) | SYS_GPD_MFP0_PD1MFP_EBI_AD12) /*!< Set PD1 function to EBI_AD12 */ +#define SET_EBI_AD12_PH8() SYS->GPH_MFP2 = ((SYS->GPH_MFP2 & (~SYS_GPH_MFP2_PH8MFP_Msk)) | SYS_GPH_MFP2_PH8MFP_EBI_AD12) /*!< Set PH8 function to EBI_AD12 */ +#define SET_EBI_AD13_PB14() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB14MFP_Msk)) | SYS_GPB_MFP3_PB14MFP_EBI_AD13) /*!< Set PB14 function to EBI_AD13 */ +#define SET_EBI_AD13_PD0() SYS->GPD_MFP0 = ((SYS->GPD_MFP0 & (~SYS_GPD_MFP0_PD0MFP_Msk)) | SYS_GPD_MFP0_PD0MFP_EBI_AD13) /*!< Set PD0 function to EBI_AD13 */ +#define SET_EBI_AD13_PH9() SYS->GPH_MFP2 = ((SYS->GPH_MFP2 & (~SYS_GPH_MFP2_PH9MFP_Msk)) | SYS_GPH_MFP2_PH9MFP_EBI_AD13) /*!< Set PH9 function to EBI_AD13 */ +#define SET_EBI_AD14_PB13() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB13MFP_Msk)) | SYS_GPB_MFP3_PB13MFP_EBI_AD14) /*!< Set PB13 function to EBI_AD14 */ +#define SET_EBI_AD14_PH10() SYS->GPH_MFP2 = ((SYS->GPH_MFP2 & (~SYS_GPH_MFP2_PH10MFP_Msk)) | SYS_GPH_MFP2_PH10MFP_EBI_AD14) /*!< Set PH10 function to EBI_AD14 */ +#define SET_EBI_AD15_PB12() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB12MFP_Msk)) | SYS_GPB_MFP3_PB12MFP_EBI_AD15) /*!< Set PB12 function to EBI_AD15 */ +#define SET_EBI_AD15_PD5() SYS->GPD_MFP1 = ((SYS->GPD_MFP1 & (~SYS_GPD_MFP1_PD5MFP_Msk)) | SYS_GPD_MFP1_PD5MFP_EBI_AD15) /*!< Set PD5 function to EBI_AD15 */ +#define SET_EBI_AD15_PH11() SYS->GPH_MFP2 = ((SYS->GPH_MFP2 & (~SYS_GPH_MFP2_PH11MFP_Msk)) | SYS_GPH_MFP2_PH11MFP_EBI_AD15) /*!< Set PH11 function to EBI_AD15 */ +#define SET_EBI_AD1_PA4() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA4MFP_Msk)) | SYS_GPA_MFP1_PA4MFP_EBI_AD1) /*!< Set PA4 function to EBI_AD1 */ +#define SET_EBI_AD1_PC1() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC1MFP_Msk)) | SYS_GPC_MFP0_PC1MFP_EBI_AD1) /*!< Set PC1 function to EBI_AD1 */ +#define SET_EBI_AD1_PF5() SYS->GPF_MFP1 = ((SYS->GPF_MFP1 & (~SYS_GPF_MFP1_PF5MFP_Msk)) | SYS_GPF_MFP1_PF5MFP_EBI_AD1) /*!< Set PF5 function to EBI_AD1 */ +#define SET_EBI_AD1_PG10() SYS->GPG_MFP2 = ((SYS->GPG_MFP2 & (~SYS_GPG_MFP2_PG10MFP_Msk)) | SYS_GPG_MFP2_PG10MFP_EBI_AD1) /*!< Set PG10 function to EBI_AD1 */ +#define SET_EBI_AD1_PH13() SYS->GPH_MFP3 = ((SYS->GPH_MFP3 & (~SYS_GPH_MFP3_PH13MFP_Msk)) | SYS_GPH_MFP3_PH13MFP_EBI_AD1) /*!< Set PH13 function to EBI_AD1 */ +#define SET_EBI_AD1_PJ6() SYS->GPJ_MFP1 = ((SYS->GPJ_MFP1 & (~SYS_GPJ_MFP1_PJ6MFP_Msk)) | SYS_GPJ_MFP1_PJ6MFP_EBI_AD1) /*!< Set PJ6 function to EBI_AD1 */ +#define SET_EBI_AD2_PC2() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC2MFP_Msk)) | SYS_GPC_MFP0_PC2MFP_EBI_AD2) /*!< Set PC2 function to EBI_AD2 */ +#define SET_EBI_AD2_PG11() SYS->GPG_MFP2 = ((SYS->GPG_MFP2 & (~SYS_GPG_MFP2_PG11MFP_Msk)) | SYS_GPG_MFP2_PG11MFP_EBI_AD2) /*!< Set PG11 function to EBI_AD2 */ +#define SET_EBI_AD2_PH14() SYS->GPH_MFP3 = ((SYS->GPH_MFP3 & (~SYS_GPH_MFP3_PH14MFP_Msk)) | SYS_GPH_MFP3_PH14MFP_EBI_AD2) /*!< Set PH14 function to EBI_AD2 */ +#define SET_EBI_AD2_PJ5() SYS->GPJ_MFP1 = ((SYS->GPJ_MFP1 & (~SYS_GPJ_MFP1_PJ5MFP_Msk)) | SYS_GPJ_MFP1_PJ5MFP_EBI_AD2) /*!< Set PJ5 function to EBI_AD2 */ +#define SET_EBI_AD3_PC3() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC3MFP_Msk)) | SYS_GPC_MFP0_PC3MFP_EBI_AD3) /*!< Set PC3 function to EBI_AD3 */ +#define SET_EBI_AD3_PG12() SYS->GPG_MFP3 = ((SYS->GPG_MFP3 & (~SYS_GPG_MFP3_PG12MFP_Msk)) | SYS_GPG_MFP3_PG12MFP_EBI_AD3) /*!< Set PG12 function to EBI_AD3 */ +#define SET_EBI_AD3_PH15() SYS->GPH_MFP3 = ((SYS->GPH_MFP3 & (~SYS_GPH_MFP3_PH15MFP_Msk)) | SYS_GPH_MFP3_PH15MFP_EBI_AD3) /*!< Set PH15 function to EBI_AD3 */ +#define SET_EBI_AD3_PJ4() SYS->GPJ_MFP1 = ((SYS->GPJ_MFP1 & (~SYS_GPJ_MFP1_PJ4MFP_Msk)) | SYS_GPJ_MFP1_PJ4MFP_EBI_AD3) /*!< Set PJ4 function to EBI_AD3 */ +#define SET_EBI_AD4_PC4() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC4MFP_Msk)) | SYS_GPC_MFP1_PC4MFP_EBI_AD4) /*!< Set PC4 function to EBI_AD4 */ +#define SET_EBI_AD4_PD7() SYS->GPD_MFP1 = ((SYS->GPD_MFP1 & (~SYS_GPD_MFP1_PD7MFP_Msk)) | SYS_GPD_MFP1_PD7MFP_EBI_AD4) /*!< Set PD7 function to EBI_AD4 */ +#define SET_EBI_AD4_PG13() SYS->GPG_MFP3 = ((SYS->GPG_MFP3 & (~SYS_GPG_MFP3_PG13MFP_Msk)) | SYS_GPG_MFP3_PG13MFP_EBI_AD4) /*!< Set PG13 function to EBI_AD4 */ +#define SET_EBI_AD4_PJ3() SYS->GPJ_MFP0 = ((SYS->GPJ_MFP0 & (~SYS_GPJ_MFP0_PJ3MFP_Msk)) | SYS_GPJ_MFP0_PJ3MFP_EBI_AD4) /*!< Set PJ3 function to EBI_AD4 */ +#define SET_EBI_AD5_PA14() SYS->GPA_MFP3 = ((SYS->GPA_MFP3 & (~SYS_GPA_MFP3_PA14MFP_Msk)) | SYS_GPA_MFP3_PA14MFP_EBI_AD5) /*!< Set PA14 function to EBI_AD5 */ +#define SET_EBI_AD5_PC5() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC5MFP_Msk)) | SYS_GPC_MFP1_PC5MFP_EBI_AD5) /*!< Set PC5 function to EBI_AD5 */ +#define SET_EBI_AD5_PD6() SYS->GPD_MFP1 = ((SYS->GPD_MFP1 & (~SYS_GPD_MFP1_PD6MFP_Msk)) | SYS_GPD_MFP1_PD6MFP_EBI_AD5) /*!< Set PD6 function to EBI_AD5 */ +#define SET_EBI_AD5_PG14() SYS->GPG_MFP3 = ((SYS->GPG_MFP3 & (~SYS_GPG_MFP3_PG14MFP_Msk)) | SYS_GPG_MFP3_PG14MFP_EBI_AD5) /*!< Set PG14 function to EBI_AD5 */ +#define SET_EBI_AD5_PJ2() SYS->GPJ_MFP0 = ((SYS->GPJ_MFP0 & (~SYS_GPJ_MFP0_PJ2MFP_Msk)) | SYS_GPJ_MFP0_PJ2MFP_EBI_AD5) /*!< Set PJ2 function to EBI_AD5 */ +#define SET_EBI_AD6_PD8() SYS->GPD_MFP2 = ((SYS->GPD_MFP2 & (~SYS_GPD_MFP2_PD8MFP_Msk)) | SYS_GPD_MFP2_PD8MFP_EBI_AD6) /*!< Set PD8 function to EBI_AD6 */ +#define SET_EBI_AD7_PA7() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA7MFP_Msk)) | SYS_GPA_MFP1_PA7MFP_EBI_AD7) /*!< Set PA7 function to EBI_AD7 */ +#define SET_EBI_AD7_PD9() SYS->GPD_MFP2 = ((SYS->GPD_MFP2 & (~SYS_GPD_MFP2_PD9MFP_Msk)) | SYS_GPD_MFP2_PD9MFP_EBI_AD7) /*!< Set PD9 function to EBI_AD7 */ +#define SET_EBI_AD8_PC6() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC6MFP_Msk)) | SYS_GPC_MFP1_PC6MFP_EBI_AD8) /*!< Set PC6 function to EBI_AD8 */ +#define SET_EBI_AD8_PE14() SYS->GPE_MFP3 = ((SYS->GPE_MFP3 & (~SYS_GPE_MFP3_PE14MFP_Msk)) | SYS_GPE_MFP3_PE14MFP_EBI_AD8) /*!< Set PE14 function to EBI_AD8 */ +#define SET_EBI_AD9_PC7() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC7MFP_Msk)) | SYS_GPC_MFP1_PC7MFP_EBI_AD9) /*!< Set PC7 function to EBI_AD9 */ +#define SET_EBI_AD9_PE15() SYS->GPE_MFP3 = ((SYS->GPE_MFP3 & (~SYS_GPE_MFP3_PE15MFP_Msk)) | SYS_GPE_MFP3_PE15MFP_EBI_AD9) /*!< Set PE15 function to EBI_AD9 */ +#define SET_EBI_ADR0_PB5() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB5MFP_Msk)) | SYS_GPB_MFP1_PB5MFP_EBI_ADR0) /*!< Set PB5 function to EBI_ADR0 */ +#define SET_EBI_ADR0_PH7() SYS->GPH_MFP1 = ((SYS->GPH_MFP1 & (~SYS_GPH_MFP1_PH7MFP_Msk)) | SYS_GPH_MFP1_PH7MFP_EBI_ADR0) /*!< Set PH7 function to EBI_ADR0 */ +#define SET_EBI_ADR10_PC13() SYS->GPC_MFP3 = ((SYS->GPC_MFP3 & (~SYS_GPC_MFP3_PC13MFP_Msk)) | SYS_GPC_MFP3_PC13MFP_EBI_ADR10) /*!< Set PC13 function to EBI_ADR10 */ +#define SET_EBI_ADR10_PE8() SYS->GPE_MFP2 = ((SYS->GPE_MFP2 & (~SYS_GPE_MFP2_PE8MFP_Msk)) | SYS_GPE_MFP2_PE8MFP_EBI_ADR10) /*!< Set PE8 function to EBI_ADR10 */ +#define SET_EBI_ADR11_PE9() SYS->GPE_MFP2 = ((SYS->GPE_MFP2 & (~SYS_GPE_MFP2_PE9MFP_Msk)) | SYS_GPE_MFP2_PE9MFP_EBI_ADR11) /*!< Set PE9 function to EBI_ADR11 */ +#define SET_EBI_ADR11_PG2() SYS->GPG_MFP0 = ((SYS->GPG_MFP0 & (~SYS_GPG_MFP0_PG2MFP_Msk)) | SYS_GPG_MFP0_PG2MFP_EBI_ADR11) /*!< Set PG2 function to EBI_ADR11 */ +#define SET_EBI_ADR12_PE10() SYS->GPE_MFP2 = ((SYS->GPE_MFP2 & (~SYS_GPE_MFP2_PE10MFP_Msk)) | SYS_GPE_MFP2_PE10MFP_EBI_ADR12) /*!< Set PE10 function to EBI_ADR12 */ +#define SET_EBI_ADR12_PG3() SYS->GPG_MFP0 = ((SYS->GPG_MFP0 & (~SYS_GPG_MFP0_PG3MFP_Msk)) | SYS_GPG_MFP0_PG3MFP_EBI_ADR12) /*!< Set PG3 function to EBI_ADR12 */ +#define SET_EBI_ADR13_PE11() SYS->GPE_MFP2 = ((SYS->GPE_MFP2 & (~SYS_GPE_MFP2_PE11MFP_Msk)) | SYS_GPE_MFP2_PE11MFP_EBI_ADR13) /*!< Set PE11 function to EBI_ADR13 */ +#define SET_EBI_ADR13_PG4() SYS->GPG_MFP1 = ((SYS->GPG_MFP1 & (~SYS_GPG_MFP1_PG4MFP_Msk)) | SYS_GPG_MFP1_PG4MFP_EBI_ADR13) /*!< Set PG4 function to EBI_ADR13 */ +#define SET_EBI_ADR14_PE12() SYS->GPE_MFP3 = ((SYS->GPE_MFP3 & (~SYS_GPE_MFP3_PE12MFP_Msk)) | SYS_GPE_MFP3_PE12MFP_EBI_ADR14) /*!< Set PE12 function to EBI_ADR14 */ +#define SET_EBI_ADR14_PF11() SYS->GPF_MFP2 = ((SYS->GPF_MFP2 & (~SYS_GPF_MFP2_PF11MFP_Msk)) | SYS_GPF_MFP2_PF11MFP_EBI_ADR14) /*!< Set PF11 function to EBI_ADR14 */ +#define SET_EBI_ADR15_PE13() SYS->GPE_MFP3 = ((SYS->GPE_MFP3 & (~SYS_GPE_MFP3_PE13MFP_Msk)) | SYS_GPE_MFP3_PE13MFP_EBI_ADR15) /*!< Set PE13 function to EBI_ADR15 */ +#define SET_EBI_ADR15_PF10() SYS->GPF_MFP2 = ((SYS->GPF_MFP2 & (~SYS_GPF_MFP2_PF10MFP_Msk)) | SYS_GPF_MFP2_PF10MFP_EBI_ADR15) /*!< Set PF10 function to EBI_ADR15 */ +#define SET_EBI_ADR16_PB11() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB11MFP_Msk)) | SYS_GPB_MFP2_PB11MFP_EBI_ADR16) /*!< Set PB11 function to EBI_ADR16 */ +#define SET_EBI_ADR16_PC8() SYS->GPC_MFP2 = ((SYS->GPC_MFP2 & (~SYS_GPC_MFP2_PC8MFP_Msk)) | SYS_GPC_MFP2_PC8MFP_EBI_ADR16) /*!< Set PC8 function to EBI_ADR16 */ +#define SET_EBI_ADR16_PF9() SYS->GPF_MFP2 = ((SYS->GPF_MFP2 & (~SYS_GPF_MFP2_PF9MFP_Msk)) | SYS_GPF_MFP2_PF9MFP_EBI_ADR16) /*!< Set PF9 function to EBI_ADR16 */ +#define SET_EBI_ADR17_PB10() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB10MFP_Msk)) | SYS_GPB_MFP2_PB10MFP_EBI_ADR17) /*!< Set PB10 function to EBI_ADR17 */ +#define SET_EBI_ADR17_PF8() SYS->GPF_MFP2 = ((SYS->GPF_MFP2 & (~SYS_GPF_MFP2_PF8MFP_Msk)) | SYS_GPF_MFP2_PF8MFP_EBI_ADR17) /*!< Set PF8 function to EBI_ADR17 */ +#define SET_EBI_ADR18_PB9() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB9MFP_Msk)) | SYS_GPB_MFP2_PB9MFP_EBI_ADR18) /*!< Set PB9 function to EBI_ADR18 */ +#define SET_EBI_ADR18_PF7() SYS->GPF_MFP1 = ((SYS->GPF_MFP1 & (~SYS_GPF_MFP1_PF7MFP_Msk)) | SYS_GPF_MFP1_PF7MFP_EBI_ADR18) /*!< Set PF7 function to EBI_ADR18 */ +#define SET_EBI_ADR19_PB8() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB8MFP_Msk)) | SYS_GPB_MFP2_PB8MFP_EBI_ADR19) /*!< Set PB8 function to EBI_ADR19 */ +#define SET_EBI_ADR19_PF6() SYS->GPF_MFP1 = ((SYS->GPF_MFP1 & (~SYS_GPF_MFP1_PF6MFP_Msk)) | SYS_GPF_MFP1_PF6MFP_EBI_ADR19) /*!< Set PF6 function to EBI_ADR19 */ +#define SET_EBI_ADR1_PB4() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB4MFP_Msk)) | SYS_GPB_MFP1_PB4MFP_EBI_ADR1) /*!< Set PB4 function to EBI_ADR1 */ +#define SET_EBI_ADR1_PH6() SYS->GPH_MFP1 = ((SYS->GPH_MFP1 & (~SYS_GPH_MFP1_PH6MFP_Msk)) | SYS_GPH_MFP1_PH6MFP_EBI_ADR1) /*!< Set PH6 function to EBI_ADR1 */ +#define SET_EBI_ADR2_PB3() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB3MFP_Msk)) | SYS_GPB_MFP0_PB3MFP_EBI_ADR2) /*!< Set PB3 function to EBI_ADR2 */ +#define SET_EBI_ADR2_PH5() SYS->GPH_MFP1 = ((SYS->GPH_MFP1 & (~SYS_GPH_MFP1_PH5MFP_Msk)) | SYS_GPH_MFP1_PH5MFP_EBI_ADR2) /*!< Set PH5 function to EBI_ADR2 */ +#define SET_EBI_ADR3_PB2() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB2MFP_Msk)) | SYS_GPB_MFP0_PB2MFP_EBI_ADR3) /*!< Set PB2 function to EBI_ADR3 */ +#define SET_EBI_ADR3_PH4() SYS->GPH_MFP1 = ((SYS->GPH_MFP1 & (~SYS_GPH_MFP1_PH4MFP_Msk)) | SYS_GPH_MFP1_PH4MFP_EBI_ADR3) /*!< Set PH4 function to EBI_ADR3 */ +#define SET_EBI_ADR4_PC12() SYS->GPC_MFP3 = ((SYS->GPC_MFP3 & (~SYS_GPC_MFP3_PC12MFP_Msk)) | SYS_GPC_MFP3_PC12MFP_EBI_ADR4) /*!< Set PC12 function to EBI_ADR4 */ +#define SET_EBI_ADR4_PH3() SYS->GPH_MFP0 = ((SYS->GPH_MFP0 & (~SYS_GPH_MFP0_PH3MFP_Msk)) | SYS_GPH_MFP0_PH3MFP_EBI_ADR4) /*!< Set PH3 function to EBI_ADR4 */ +#define SET_EBI_ADR5_PC11() SYS->GPC_MFP2 = ((SYS->GPC_MFP2 & (~SYS_GPC_MFP2_PC11MFP_Msk)) | SYS_GPC_MFP2_PC11MFP_EBI_ADR5) /*!< Set PC11 function to EBI_ADR5 */ +#define SET_EBI_ADR5_PH2() SYS->GPH_MFP0 = ((SYS->GPH_MFP0 & (~SYS_GPH_MFP0_PH2MFP_Msk)) | SYS_GPH_MFP0_PH2MFP_EBI_ADR5) /*!< Set PH2 function to EBI_ADR5 */ +#define SET_EBI_ADR6_PC10() SYS->GPC_MFP2 = ((SYS->GPC_MFP2 & (~SYS_GPC_MFP2_PC10MFP_Msk)) | SYS_GPC_MFP2_PC10MFP_EBI_ADR6) /*!< Set PC10 function to EBI_ADR6 */ +#define SET_EBI_ADR6_PH1() SYS->GPH_MFP0 = ((SYS->GPH_MFP0 & (~SYS_GPH_MFP0_PH1MFP_Msk)) | SYS_GPH_MFP0_PH1MFP_EBI_ADR6) /*!< Set PH1 function to EBI_ADR6 */ +#define SET_EBI_ADR7_PC9() SYS->GPC_MFP2 = ((SYS->GPC_MFP2 & (~SYS_GPC_MFP2_PC9MFP_Msk)) | SYS_GPC_MFP2_PC9MFP_EBI_ADR7) /*!< Set PC9 function to EBI_ADR7 */ +#define SET_EBI_ADR7_PH0() SYS->GPH_MFP0 = ((SYS->GPH_MFP0 & (~SYS_GPH_MFP0_PH0MFP_Msk)) | SYS_GPH_MFP0_PH0MFP_EBI_ADR7) /*!< Set PH0 function to EBI_ADR7 */ +#define SET_EBI_ADR8_PB1() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB1MFP_Msk)) | SYS_GPB_MFP0_PB1MFP_EBI_ADR8) /*!< Set PB1 function to EBI_ADR8 */ +#define SET_EBI_ADR8_PG0() SYS->GPG_MFP0 = ((SYS->GPG_MFP0 & (~SYS_GPG_MFP0_PG0MFP_Msk)) | SYS_GPG_MFP0_PG0MFP_EBI_ADR8) /*!< Set PG0 function to EBI_ADR8 */ +#define SET_EBI_ADR9_PB0() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB0MFP_Msk)) | SYS_GPB_MFP0_PB0MFP_EBI_ADR9) /*!< Set PB0 function to EBI_ADR9 */ +#define SET_EBI_ADR9_PG1() SYS->GPG_MFP0 = ((SYS->GPG_MFP0 & (~SYS_GPG_MFP0_PG1MFP_Msk)) | SYS_GPG_MFP0_PG1MFP_EBI_ADR9) /*!< Set PG1 function to EBI_ADR9 */ +#define SET_EBI_ALE_PA8() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA8MFP_Msk)) | SYS_GPA_MFP2_PA8MFP_EBI_ALE) /*!< Set PA8 function to EBI_ALE */ +#define SET_EBI_ALE_PE2() SYS->GPE_MFP0 = ((SYS->GPE_MFP0 & (~SYS_GPE_MFP0_PE2MFP_Msk)) | SYS_GPE_MFP0_PE2MFP_EBI_ALE) /*!< Set PE2 function to EBI_ALE */ +#define SET_EBI_ALE_PJ11() SYS->GPJ_MFP2 = ((SYS->GPJ_MFP2 & (~SYS_GPJ_MFP2_PJ11MFP_Msk)) | SYS_GPJ_MFP2_PJ11MFP_EBI_ALE) /*!< Set PJ11 function to EBI_ALE */ +#define SET_EBI_MCLK_PA9() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA9MFP_Msk)) | SYS_GPA_MFP2_PA9MFP_EBI_MCLK) /*!< Set PA9 function to EBI_MCLK */ +#define SET_EBI_MCLK_PE3() SYS->GPE_MFP0 = ((SYS->GPE_MFP0 & (~SYS_GPE_MFP0_PE3MFP_Msk)) | SYS_GPE_MFP0_PE3MFP_EBI_MCLK) /*!< Set PE3 function to EBI_MCLK */ +#define SET_EBI_MCLK_PJ10() SYS->GPJ_MFP2 = ((SYS->GPJ_MFP2 & (~SYS_GPJ_MFP2_PJ10MFP_Msk)) | SYS_GPJ_MFP2_PJ10MFP_EBI_MCLK) /*!< Set PJ10 function to EBI_MCLK */ +#define SET_EBI_nCS0_PB7() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB7MFP_Msk)) | SYS_GPB_MFP1_PB7MFP_EBI_nCS0) /*!< Set PB7 function to EBI_nCS0 */ +#define SET_EBI_nCS0_PD12() SYS->GPD_MFP3 = ((SYS->GPD_MFP3 & (~SYS_GPD_MFP3_PD12MFP_Msk)) | SYS_GPD_MFP3_PD12MFP_EBI_nCS0) /*!< Set PD12 function to EBI_nCS0 */ +#define SET_EBI_nCS0_PD14() SYS->GPD_MFP3 = ((SYS->GPD_MFP3 & (~SYS_GPD_MFP3_PD14MFP_Msk)) | SYS_GPD_MFP3_PD14MFP_EBI_nCS0) /*!< Set PD14 function to EBI_nCS0 */ +#define SET_EBI_nCS0_PD5() SYS->GPD_MFP1 = ((SYS->GPD_MFP1 & (~SYS_GPD_MFP1_PD5MFP_Msk)) | SYS_GPD_MFP1_PD5MFP_EBI_nCS0) /*!< Set PD5 function to EBI_nCS0 */ +#define SET_EBI_nCS0_PF3() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF3MFP_Msk)) | SYS_GPF_MFP0_PF3MFP_EBI_nCS0) /*!< Set PF3 function to EBI_nCS0 */ +#define SET_EBI_nCS0_PF6() SYS->GPF_MFP1 = ((SYS->GPF_MFP1 & (~SYS_GPF_MFP1_PF6MFP_Msk)) | SYS_GPF_MFP1_PF6MFP_EBI_nCS0) /*!< Set PF6 function to EBI_nCS0 */ +#define SET_EBI_nCS0_PJ12() SYS->GPJ_MFP3 = ((SYS->GPJ_MFP3 & (~SYS_GPJ_MFP3_PJ12MFP_Msk)) | SYS_GPJ_MFP3_PJ12MFP_EBI_nCS0) /*!< Set PJ12 function to EBI_nCS0 */ +#define SET_EBI_nCS1_PB6() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB6MFP_Msk)) | SYS_GPB_MFP1_PB6MFP_EBI_nCS1) /*!< Set PB6 function to EBI_nCS1 */ +#define SET_EBI_nCS1_PD11() SYS->GPD_MFP2 = ((SYS->GPD_MFP2 & (~SYS_GPD_MFP2_PD11MFP_Msk)) | SYS_GPD_MFP2_PD11MFP_EBI_nCS1) /*!< Set PD11 function to EBI_nCS1 */ +#define SET_EBI_nCS1_PF2() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF2MFP_Msk)) | SYS_GPF_MFP0_PF2MFP_EBI_nCS1) /*!< Set PF2 function to EBI_nCS1 */ +#define SET_EBI_nCS1_PG5() SYS->GPG_MFP1 = ((SYS->GPG_MFP1 & (~SYS_GPG_MFP1_PG5MFP_Msk)) | SYS_GPG_MFP1_PG5MFP_EBI_nCS1) /*!< Set PG5 function to EBI_nCS1 */ +#define SET_EBI_nCS2_PD10() SYS->GPD_MFP2 = ((SYS->GPD_MFP2 & (~SYS_GPD_MFP2_PD10MFP_Msk)) | SYS_GPD_MFP2_PD10MFP_EBI_nCS2) /*!< Set PD10 function to EBI_nCS2 */ +#define SET_EBI_nCS2_PG6() SYS->GPG_MFP1 = ((SYS->GPG_MFP1 & (~SYS_GPG_MFP1_PG6MFP_Msk)) | SYS_GPG_MFP1_PG6MFP_EBI_nCS2) /*!< Set PG6 function to EBI_nCS2 */ +#define SET_EBI_nRD_PA11() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA11MFP_Msk)) | SYS_GPA_MFP2_PA11MFP_EBI_nRD) /*!< Set PA11 function to EBI_nRD */ +#define SET_EBI_nRD_PE5() SYS->GPE_MFP1 = ((SYS->GPE_MFP1 & (~SYS_GPE_MFP1_PE5MFP_Msk)) | SYS_GPE_MFP1_PE5MFP_EBI_nRD) /*!< Set PE5 function to EBI_nRD */ +#define SET_EBI_nRD_PJ8() SYS->GPJ_MFP2 = ((SYS->GPJ_MFP2 & (~SYS_GPJ_MFP2_PJ8MFP_Msk)) | SYS_GPJ_MFP2_PJ8MFP_EBI_nRD) /*!< Set PJ8 function to EBI_nRD */ +#define SET_EBI_nWRH_PB6() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB6MFP_Msk)) | SYS_GPB_MFP1_PB6MFP_EBI_nWRH) /*!< Set PB6 function to EBI_nWRH */ +#define SET_EBI_nWRH_PG6() SYS->GPG_MFP1 = ((SYS->GPG_MFP1 & (~SYS_GPG_MFP1_PG6MFP_Msk)) | SYS_GPG_MFP1_PG6MFP_EBI_nWRH) /*!< Set PG6 function to EBI_nWRH */ +#define SET_EBI_nWRH_PG8() SYS->GPG_MFP2 = ((SYS->GPG_MFP2 & (~SYS_GPG_MFP2_PG8MFP_Msk)) | SYS_GPG_MFP2_PG8MFP_EBI_nWRH) /*!< Set PG8 function to EBI_nWRH */ +#define SET_EBI_nWRL_PB7() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB7MFP_Msk)) | SYS_GPB_MFP1_PB7MFP_EBI_nWRL) /*!< Set PB7 function to EBI_nWRL */ +#define SET_EBI_nWRL_PG5() SYS->GPG_MFP1 = ((SYS->GPG_MFP1 & (~SYS_GPG_MFP1_PG5MFP_Msk)) | SYS_GPG_MFP1_PG5MFP_EBI_nWRL) /*!< Set PG5 function to EBI_nWRL */ +#define SET_EBI_nWRL_PG7() SYS->GPG_MFP1 = ((SYS->GPG_MFP1 & (~SYS_GPG_MFP1_PG7MFP_Msk)) | SYS_GPG_MFP1_PG7MFP_EBI_nWRL) /*!< Set PG7 function to EBI_nWRL */ +#define SET_EBI_nWR_PA10() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA10MFP_Msk)) | SYS_GPA_MFP2_PA10MFP_EBI_nWR) /*!< Set PA10 function to EBI_nWR */ +#define SET_EBI_nWR_PE4() SYS->GPE_MFP1 = ((SYS->GPE_MFP1 & (~SYS_GPE_MFP1_PE4MFP_Msk)) | SYS_GPE_MFP1_PE4MFP_EBI_nWR) /*!< Set PE4 function to EBI_nWR */ +#define SET_EBI_nWR_PJ9() SYS->GPJ_MFP2 = ((SYS->GPJ_MFP2 & (~SYS_GPJ_MFP2_PJ9MFP_Msk)) | SYS_GPJ_MFP2_PJ9MFP_EBI_nWR) /*!< Set PJ9 function to EBI_nWR */ +#define SET_ECAP0_IC0_PA10() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA10MFP_Msk)) | SYS_GPA_MFP2_PA10MFP_ECAP0_IC0) /*!< Set PA10 function to ECAP0_IC0 */ +#define SET_ECAP0_IC0_PE8() SYS->GPE_MFP2 = ((SYS->GPE_MFP2 & (~SYS_GPE_MFP2_PE8MFP_Msk)) | SYS_GPE_MFP2_PE8MFP_ECAP0_IC0) /*!< Set PE8 function to ECAP0_IC0 */ +#define SET_ECAP0_IC1_PA9() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA9MFP_Msk)) | SYS_GPA_MFP2_PA9MFP_ECAP0_IC1) /*!< Set PA9 function to ECAP0_IC1 */ +#define SET_ECAP0_IC1_PE9() SYS->GPE_MFP2 = ((SYS->GPE_MFP2 & (~SYS_GPE_MFP2_PE9MFP_Msk)) | SYS_GPE_MFP2_PE9MFP_ECAP0_IC1) /*!< Set PE9 function to ECAP0_IC1 */ +#define SET_ECAP0_IC2_PA8() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA8MFP_Msk)) | SYS_GPA_MFP2_PA8MFP_ECAP0_IC2) /*!< Set PA8 function to ECAP0_IC2 */ +#define SET_ECAP0_IC2_PE10() SYS->GPE_MFP2 = ((SYS->GPE_MFP2 & (~SYS_GPE_MFP2_PE10MFP_Msk)) | SYS_GPE_MFP2_PE10MFP_ECAP0_IC2) /*!< Set PE10 function to ECAP0_IC2 */ +#define SET_ECAP1_IC0_PC10() SYS->GPC_MFP2 = ((SYS->GPC_MFP2 & (~SYS_GPC_MFP2_PC10MFP_Msk)) | SYS_GPC_MFP2_PC10MFP_ECAP1_IC0) /*!< Set PC10 function to ECAP1_IC0 */ +#define SET_ECAP1_IC0_PE13() SYS->GPE_MFP3 = ((SYS->GPE_MFP3 & (~SYS_GPE_MFP3_PE13MFP_Msk)) | SYS_GPE_MFP3_PE13MFP_ECAP1_IC0) /*!< Set PE13 function to ECAP1_IC0 */ +#define SET_ECAP1_IC1_PC11() SYS->GPC_MFP2 = ((SYS->GPC_MFP2 & (~SYS_GPC_MFP2_PC11MFP_Msk)) | SYS_GPC_MFP2_PC11MFP_ECAP1_IC1) /*!< Set PC11 function to ECAP1_IC1 */ +#define SET_ECAP1_IC1_PE12() SYS->GPE_MFP3 = ((SYS->GPE_MFP3 & (~SYS_GPE_MFP3_PE12MFP_Msk)) | SYS_GPE_MFP3_PE12MFP_ECAP1_IC1) /*!< Set PE12 function to ECAP1_IC1 */ +#define SET_ECAP1_IC2_PC12() SYS->GPC_MFP3 = ((SYS->GPC_MFP3 & (~SYS_GPC_MFP3_PC12MFP_Msk)) | SYS_GPC_MFP3_PC12MFP_ECAP1_IC2) /*!< Set PC12 function to ECAP1_IC2 */ +#define SET_ECAP1_IC2_PE11() SYS->GPE_MFP2 = ((SYS->GPE_MFP2 & (~SYS_GPE_MFP2_PE11MFP_Msk)) | SYS_GPE_MFP2_PE11MFP_ECAP1_IC2) /*!< Set PE11 function to ECAP1_IC2 */ +#define SET_ECAP2_IC0_PD1() SYS->GPD_MFP0 = ((SYS->GPD_MFP0 & (~SYS_GPD_MFP0_PD1MFP_Msk)) | SYS_GPD_MFP0_PD1MFP_ECAP2_IC0) /*!< Set PD1 function to ECAP2_IC0 */ +#define SET_ECAP2_IC0_PG9() SYS->GPG_MFP2 = ((SYS->GPG_MFP2 & (~SYS_GPG_MFP2_PG9MFP_Msk)) | SYS_GPG_MFP2_PG9MFP_ECAP2_IC0) /*!< Set PG9 function to ECAP2_IC0 */ +#define SET_ECAP2_IC0_PJ10() SYS->GPJ_MFP2 = ((SYS->GPJ_MFP2 & (~SYS_GPJ_MFP2_PJ10MFP_Msk)) | SYS_GPJ_MFP2_PJ10MFP_ECAP2_IC0) /*!< Set PJ10 function to ECAP2_IC0 */ +#define SET_ECAP2_IC1_PD0() SYS->GPD_MFP0 = ((SYS->GPD_MFP0 & (~SYS_GPD_MFP0_PD0MFP_Msk)) | SYS_GPD_MFP0_PD0MFP_ECAP2_IC1) /*!< Set PD0 function to ECAP2_IC1 */ +#define SET_ECAP2_IC1_PG10() SYS->GPG_MFP2 = ((SYS->GPG_MFP2 & (~SYS_GPG_MFP2_PG10MFP_Msk)) | SYS_GPG_MFP2_PG10MFP_ECAP2_IC1) /*!< Set PG10 function to ECAP2_IC1 */ +#define SET_ECAP2_IC1_PJ11() SYS->GPJ_MFP2 = ((SYS->GPJ_MFP2 & (~SYS_GPJ_MFP2_PJ11MFP_Msk)) | SYS_GPJ_MFP2_PJ11MFP_ECAP2_IC1) /*!< Set PJ11 function to ECAP2_IC1 */ +#define SET_ECAP2_IC2_PD13() SYS->GPD_MFP3 = ((SYS->GPD_MFP3 & (~SYS_GPD_MFP3_PD13MFP_Msk)) | SYS_GPD_MFP3_PD13MFP_ECAP2_IC2) /*!< Set PD13 function to ECAP2_IC2 */ +#define SET_ECAP2_IC2_PG11() SYS->GPG_MFP2 = ((SYS->GPG_MFP2 & (~SYS_GPG_MFP2_PG11MFP_Msk)) | SYS_GPG_MFP2_PG11MFP_ECAP2_IC2) /*!< Set PG11 function to ECAP2_IC2 */ +#define SET_ECAP2_IC2_PJ12() SYS->GPJ_MFP3 = ((SYS->GPJ_MFP3 & (~SYS_GPJ_MFP3_PJ12MFP_Msk)) | SYS_GPJ_MFP3_PJ12MFP_ECAP2_IC2) /*!< Set PJ12 function to ECAP2_IC2 */ +#define SET_ECAP3_IC0_PA12() SYS->GPA_MFP3 = ((SYS->GPA_MFP3 & (~SYS_GPA_MFP3_PA12MFP_Msk)) | SYS_GPA_MFP3_PA12MFP_ECAP3_IC0) /*!< Set PA12 function to ECAP3_IC0 */ +#define SET_ECAP3_IC0_PD12() SYS->GPD_MFP3 = ((SYS->GPD_MFP3 & (~SYS_GPD_MFP3_PD12MFP_Msk)) | SYS_GPD_MFP3_PD12MFP_ECAP3_IC0) /*!< Set PD12 function to ECAP3_IC0 */ +#define SET_ECAP3_IC0_PE8() SYS->GPE_MFP2 = ((SYS->GPE_MFP2 & (~SYS_GPE_MFP2_PE8MFP_Msk)) | SYS_GPE_MFP2_PE8MFP_ECAP3_IC0) /*!< Set PE8 function to ECAP3_IC0 */ +#define SET_ECAP3_IC1_PA13() SYS->GPA_MFP3 = ((SYS->GPA_MFP3 & (~SYS_GPA_MFP3_PA13MFP_Msk)) | SYS_GPA_MFP3_PA13MFP_ECAP3_IC1) /*!< Set PA13 function to ECAP3_IC1 */ +#define SET_ECAP3_IC1_PD11() SYS->GPD_MFP2 = ((SYS->GPD_MFP2 & (~SYS_GPD_MFP2_PD11MFP_Msk)) | SYS_GPD_MFP2_PD11MFP_ECAP3_IC1) /*!< Set PD11 function to ECAP3_IC1 */ +#define SET_ECAP3_IC1_PE9() SYS->GPE_MFP2 = ((SYS->GPE_MFP2 & (~SYS_GPE_MFP2_PE9MFP_Msk)) | SYS_GPE_MFP2_PE9MFP_ECAP3_IC1) /*!< Set PE9 function to ECAP3_IC1 */ +#define SET_ECAP3_IC2_PA14() SYS->GPA_MFP3 = ((SYS->GPA_MFP3 & (~SYS_GPA_MFP3_PA14MFP_Msk)) | SYS_GPA_MFP3_PA14MFP_ECAP3_IC2) /*!< Set PA14 function to ECAP3_IC2 */ +#define SET_ECAP3_IC2_PD10() SYS->GPD_MFP2 = ((SYS->GPD_MFP2 & (~SYS_GPD_MFP2_PD10MFP_Msk)) | SYS_GPD_MFP2_PD10MFP_ECAP3_IC2) /*!< Set PD10 function to ECAP3_IC2 */ +#define SET_ECAP3_IC2_PE10() SYS->GPE_MFP2 = ((SYS->GPE_MFP2 & (~SYS_GPE_MFP2_PE10MFP_Msk)) | SYS_GPE_MFP2_PE10MFP_ECAP3_IC2) /*!< Set PE10 function to ECAP3_IC2 */ +#define SET_EMAC0_PPS_PB6() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB6MFP_Msk)) | SYS_GPB_MFP1_PB6MFP_EMAC0_PPS) /*!< Set PB6 function to EMAC0_PPS */ +#define SET_EMAC0_PPS_PE13() SYS->GPE_MFP3 = ((SYS->GPE_MFP3 & (~SYS_GPE_MFP3_PE13MFP_Msk)) | SYS_GPE_MFP3_PE13MFP_EMAC0_PPS) /*!< Set PE13 function to EMAC0_PPS */ +#define SET_EMAC0_RMII_CRSDV_PA7() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA7MFP_Msk)) | SYS_GPA_MFP1_PA7MFP_EMAC0_RMII_CRSDV) /*!< Set PA7 function to EMAC0_RMII_CRSDV */ +#define SET_EMAC0_RMII_CRSDV_PB2() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB2MFP_Msk)) | SYS_GPB_MFP0_PB2MFP_EMAC0_RMII_CRSDV) /*!< Set PB2 function to EMAC0_RMII_CRSDV */ +#define SET_EMAC0_RMII_MDC_PB11() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB11MFP_Msk)) | SYS_GPB_MFP2_PB11MFP_EMAC0_RMII_MDC) /*!< Set PB11 function to EMAC0_RMII_MDC */ +#define SET_EMAC0_RMII_MDC_PE8() SYS->GPE_MFP2 = ((SYS->GPE_MFP2 & (~SYS_GPE_MFP2_PE8MFP_Msk)) | SYS_GPE_MFP2_PE8MFP_EMAC0_RMII_MDC) /*!< Set PE8 function to EMAC0_RMII_MDC */ +#define SET_EMAC0_RMII_MDIO_PB10() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB10MFP_Msk)) | SYS_GPB_MFP2_PB10MFP_EMAC0_RMII_MDIO) /*!< Set PB10 function to EMAC0_RMII_MDIO */ +#define SET_EMAC0_RMII_MDIO_PE9() SYS->GPE_MFP2 = ((SYS->GPE_MFP2 & (~SYS_GPE_MFP2_PE9MFP_Msk)) | SYS_GPE_MFP2_PE9MFP_EMAC0_RMII_MDIO) /*!< Set PE9 function to EMAC0_RMII_MDIO */ +#define SET_EMAC0_RMII_REFCLK_PB5() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB5MFP_Msk)) | SYS_GPB_MFP1_PB5MFP_EMAC0_RMII_REFCLK) /*!< Set PB5 function to EMAC0_RMII_REFCLK */ +#define SET_EMAC0_RMII_REFCLK_PC8() SYS->GPC_MFP2 = ((SYS->GPC_MFP2 & (~SYS_GPC_MFP2_PC8MFP_Msk)) | SYS_GPC_MFP2_PC8MFP_EMAC0_RMII_REFCLK) /*!< Set PC8 function to EMAC0_RMII_REFCLK */ +#define SET_EMAC0_RMII_RXD0_PB4() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB4MFP_Msk)) | SYS_GPB_MFP1_PB4MFP_EMAC0_RMII_RXD0) /*!< Set PB4 function to EMAC0_RMII_RXD0 */ +#define SET_EMAC0_RMII_RXD0_PC7() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC7MFP_Msk)) | SYS_GPC_MFP1_PC7MFP_EMAC0_RMII_RXD0) /*!< Set PC7 function to EMAC0_RMII_RXD0 */ +#define SET_EMAC0_RMII_RXD1_PB3() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB3MFP_Msk)) | SYS_GPB_MFP0_PB3MFP_EMAC0_RMII_RXD1) /*!< Set PB3 function to EMAC0_RMII_RXD1 */ +#define SET_EMAC0_RMII_RXD1_PC6() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC6MFP_Msk)) | SYS_GPC_MFP1_PC6MFP_EMAC0_RMII_RXD1) /*!< Set PC6 function to EMAC0_RMII_RXD1 */ +#define SET_EMAC0_RMII_RXERR_PA6() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA6MFP_Msk)) | SYS_GPA_MFP1_PA6MFP_EMAC0_RMII_RXERR) /*!< Set PA6 function to EMAC0_RMII_RXERR */ +#define SET_EMAC0_RMII_RXERR_PB1() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB1MFP_Msk)) | SYS_GPB_MFP0_PB1MFP_EMAC0_RMII_RXERR) /*!< Set PB1 function to EMAC0_RMII_RXERR */ +#define SET_EMAC0_RMII_TXD0_PB9() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB9MFP_Msk)) | SYS_GPB_MFP2_PB9MFP_EMAC0_RMII_TXD0) /*!< Set PB9 function to EMAC0_RMII_TXD0 */ +#define SET_EMAC0_RMII_TXD0_PE10() SYS->GPE_MFP2 = ((SYS->GPE_MFP2 & (~SYS_GPE_MFP2_PE10MFP_Msk)) | SYS_GPE_MFP2_PE10MFP_EMAC0_RMII_TXD0) /*!< Set PE10 function to EMAC0_RMII_TXD0 */ +#define SET_EMAC0_RMII_TXD1_PB8() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB8MFP_Msk)) | SYS_GPB_MFP2_PB8MFP_EMAC0_RMII_TXD1) /*!< Set PB8 function to EMAC0_RMII_TXD1 */ +#define SET_EMAC0_RMII_TXD1_PE11() SYS->GPE_MFP2 = ((SYS->GPE_MFP2 & (~SYS_GPE_MFP2_PE11MFP_Msk)) | SYS_GPE_MFP2_PE11MFP_EMAC0_RMII_TXD1) /*!< Set PE11 function to EMAC0_RMII_TXD1 */ +#define SET_EMAC0_RMII_TXEN_PB7() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB7MFP_Msk)) | SYS_GPB_MFP1_PB7MFP_EMAC0_RMII_TXEN) /*!< Set PB7 function to EMAC0_RMII_TXEN */ +#define SET_EMAC0_RMII_TXEN_PE12() SYS->GPE_MFP3 = ((SYS->GPE_MFP3 & (~SYS_GPE_MFP3_PE12MFP_Msk)) | SYS_GPE_MFP3_PE12MFP_EMAC0_RMII_TXEN) /*!< Set PE12 function to EMAC0_RMII_TXEN */ +#define SET_EPWM0_BRAKE0_PB1() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB1MFP_Msk)) | SYS_GPB_MFP0_PB1MFP_EPWM0_BRAKE0) /*!< Set PB1 function to EPWM0_BRAKE0 */ +#define SET_EPWM0_BRAKE0_PE8() SYS->GPE_MFP2 = ((SYS->GPE_MFP2 & (~SYS_GPE_MFP2_PE8MFP_Msk)) | SYS_GPE_MFP2_PE8MFP_EPWM0_BRAKE0) /*!< Set PE8 function to EPWM0_BRAKE0 */ +#define SET_EPWM0_BRAKE1_PA11() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA11MFP_Msk)) | SYS_GPA_MFP2_PA11MFP_EPWM0_BRAKE1) /*!< Set PA11 function to EPWM0_BRAKE1 */ +#define SET_EPWM0_BRAKE1_PB0() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB0MFP_Msk)) | SYS_GPB_MFP0_PB0MFP_EPWM0_BRAKE1) /*!< Set PB0 function to EPWM0_BRAKE1 */ +#define SET_EPWM0_BRAKE1_PB15() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB15MFP_Msk)) | SYS_GPB_MFP3_PB15MFP_EPWM0_BRAKE1) /*!< Set PB15 function to EPWM0_BRAKE1 */ +#define SET_EPWM0_BRAKE1_PE9() SYS->GPE_MFP2 = ((SYS->GPE_MFP2 & (~SYS_GPE_MFP2_PE9MFP_Msk)) | SYS_GPE_MFP2_PE9MFP_EPWM0_BRAKE1) /*!< Set PE9 function to EPWM0_BRAKE1 */ +#define SET_EPWM0_CH0_PA5() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA5MFP_Msk)) | SYS_GPA_MFP1_PA5MFP_EPWM0_CH0) /*!< Set PA5 function to EPWM0_CH0 */ +#define SET_EPWM0_CH0_PB5() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB5MFP_Msk)) | SYS_GPB_MFP1_PB5MFP_EPWM0_CH0) /*!< Set PB5 function to EPWM0_CH0 */ +#define SET_EPWM0_CH0_PE7() SYS->GPE_MFP1 = ((SYS->GPE_MFP1 & (~SYS_GPE_MFP1_PE7MFP_Msk)) | SYS_GPE_MFP1_PE7MFP_EPWM0_CH0) /*!< Set PE7 function to EPWM0_CH0 */ +#define SET_EPWM0_CH0_PE8() SYS->GPE_MFP2 = ((SYS->GPE_MFP2 & (~SYS_GPE_MFP2_PE8MFP_Msk)) | SYS_GPE_MFP2_PE8MFP_EPWM0_CH0) /*!< Set PE8 function to EPWM0_CH0 */ +#define SET_EPWM0_CH0_PF5() SYS->GPF_MFP1 = ((SYS->GPF_MFP1 & (~SYS_GPF_MFP1_PF5MFP_Msk)) | SYS_GPF_MFP1_PF5MFP_EPWM0_CH0) /*!< Set PF5 function to EPWM0_CH0 */ +#define SET_EPWM0_CH0_PG1() SYS->GPG_MFP0 = ((SYS->GPG_MFP0 & (~SYS_GPG_MFP0_PG1MFP_Msk)) | SYS_GPG_MFP0_PG1MFP_EPWM0_CH0) /*!< Set PG1 function to EPWM0_CH0 */ +#define SET_EPWM0_CH0_PG8() SYS->GPG_MFP2 = ((SYS->GPG_MFP2 & (~SYS_GPG_MFP2_PG8MFP_Msk)) | SYS_GPG_MFP2_PG8MFP_EPWM0_CH0) /*!< Set PG8 function to EPWM0_CH0 */ +#define SET_EPWM0_CH1_PA4() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA4MFP_Msk)) | SYS_GPA_MFP1_PA4MFP_EPWM0_CH1) /*!< Set PA4 function to EPWM0_CH1 */ +#define SET_EPWM0_CH1_PB4() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB4MFP_Msk)) | SYS_GPB_MFP1_PB4MFP_EPWM0_CH1) /*!< Set PB4 function to EPWM0_CH1 */ +#define SET_EPWM0_CH1_PE6() SYS->GPE_MFP1 = ((SYS->GPE_MFP1 & (~SYS_GPE_MFP1_PE6MFP_Msk)) | SYS_GPE_MFP1_PE6MFP_EPWM0_CH1) /*!< Set PE6 function to EPWM0_CH1 */ +#define SET_EPWM0_CH1_PE9() SYS->GPE_MFP2 = ((SYS->GPE_MFP2 & (~SYS_GPE_MFP2_PE9MFP_Msk)) | SYS_GPE_MFP2_PE9MFP_EPWM0_CH1) /*!< Set PE9 function to EPWM0_CH1 */ +#define SET_EPWM0_CH1_PF4() SYS->GPF_MFP1 = ((SYS->GPF_MFP1 & (~SYS_GPF_MFP1_PF4MFP_Msk)) | SYS_GPF_MFP1_PF4MFP_EPWM0_CH1) /*!< Set PF4 function to EPWM0_CH1 */ +#define SET_EPWM0_CH1_PG0() SYS->GPG_MFP0 = ((SYS->GPG_MFP0 & (~SYS_GPG_MFP0_PG0MFP_Msk)) | SYS_GPG_MFP0_PG0MFP_EPWM0_CH1) /*!< Set PG0 function to EPWM0_CH1 */ +#define SET_EPWM0_CH1_PG7() SYS->GPG_MFP1 = ((SYS->GPG_MFP1 & (~SYS_GPG_MFP1_PG7MFP_Msk)) | SYS_GPG_MFP1_PG7MFP_EPWM0_CH1) /*!< Set PG7 function to EPWM0_CH1 */ +#define SET_EPWM0_CH2_PA3() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA3MFP_Msk)) | SYS_GPA_MFP0_PA3MFP_EPWM0_CH2) /*!< Set PA3 function to EPWM0_CH2 */ +#define SET_EPWM0_CH2_PB3() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB3MFP_Msk)) | SYS_GPB_MFP0_PB3MFP_EPWM0_CH2) /*!< Set PB3 function to EPWM0_CH2 */ +#define SET_EPWM0_CH2_PE10() SYS->GPE_MFP2 = ((SYS->GPE_MFP2 & (~SYS_GPE_MFP2_PE10MFP_Msk)) | SYS_GPE_MFP2_PE10MFP_EPWM0_CH2) /*!< Set PE10 function to EPWM0_CH2 */ +#define SET_EPWM0_CH2_PE5() SYS->GPE_MFP1 = ((SYS->GPE_MFP1 & (~SYS_GPE_MFP1_PE5MFP_Msk)) | SYS_GPE_MFP1_PE5MFP_EPWM0_CH2) /*!< Set PE5 function to EPWM0_CH2 */ +#define SET_EPWM0_CH2_PG6() SYS->GPG_MFP1 = ((SYS->GPG_MFP1 & (~SYS_GPG_MFP1_PG6MFP_Msk)) | SYS_GPG_MFP1_PG6MFP_EPWM0_CH2) /*!< Set PG6 function to EPWM0_CH2 */ +#define SET_EPWM0_CH3_PA2() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA2MFP_Msk)) | SYS_GPA_MFP0_PA2MFP_EPWM0_CH3) /*!< Set PA2 function to EPWM0_CH3 */ +#define SET_EPWM0_CH3_PB2() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB2MFP_Msk)) | SYS_GPB_MFP0_PB2MFP_EPWM0_CH3) /*!< Set PB2 function to EPWM0_CH3 */ +#define SET_EPWM0_CH3_PE11() SYS->GPE_MFP2 = ((SYS->GPE_MFP2 & (~SYS_GPE_MFP2_PE11MFP_Msk)) | SYS_GPE_MFP2_PE11MFP_EPWM0_CH3) /*!< Set PE11 function to EPWM0_CH3 */ +#define SET_EPWM0_CH3_PE4() SYS->GPE_MFP1 = ((SYS->GPE_MFP1 & (~SYS_GPE_MFP1_PE4MFP_Msk)) | SYS_GPE_MFP1_PE4MFP_EPWM0_CH3) /*!< Set PE4 function to EPWM0_CH3 */ +#define SET_EPWM0_CH3_PG5() SYS->GPG_MFP1 = ((SYS->GPG_MFP1 & (~SYS_GPG_MFP1_PG5MFP_Msk)) | SYS_GPG_MFP1_PG5MFP_EPWM0_CH3) /*!< Set PG5 function to EPWM0_CH3 */ +#define SET_EPWM0_CH4_PA1() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA1MFP_Msk)) | SYS_GPA_MFP0_PA1MFP_EPWM0_CH4) /*!< Set PA1 function to EPWM0_CH4 */ +#define SET_EPWM0_CH4_PB1() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB1MFP_Msk)) | SYS_GPB_MFP0_PB1MFP_EPWM0_CH4) /*!< Set PB1 function to EPWM0_CH4 */ +#define SET_EPWM0_CH4_PD14() SYS->GPD_MFP3 = ((SYS->GPD_MFP3 & (~SYS_GPD_MFP3_PD14MFP_Msk)) | SYS_GPD_MFP3_PD14MFP_EPWM0_CH4) /*!< Set PD14 function to EPWM0_CH4 */ +#define SET_EPWM0_CH4_PE12() SYS->GPE_MFP3 = ((SYS->GPE_MFP3 & (~SYS_GPE_MFP3_PE12MFP_Msk)) | SYS_GPE_MFP3_PE12MFP_EPWM0_CH4) /*!< Set PE12 function to EPWM0_CH4 */ +#define SET_EPWM0_CH4_PE3() SYS->GPE_MFP0 = ((SYS->GPE_MFP0 & (~SYS_GPE_MFP0_PE3MFP_Msk)) | SYS_GPE_MFP0_PE3MFP_EPWM0_CH4) /*!< Set PE3 function to EPWM0_CH4 */ +#define SET_EPWM0_CH4_PH5() SYS->GPH_MFP1 = ((SYS->GPH_MFP1 & (~SYS_GPH_MFP1_PH5MFP_Msk)) | SYS_GPH_MFP1_PH5MFP_EPWM0_CH4) /*!< Set PH5 function to EPWM0_CH4 */ +#define SET_EPWM0_CH5_PA0() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA0MFP_Msk)) | SYS_GPA_MFP0_PA0MFP_EPWM0_CH5) /*!< Set PA0 function to EPWM0_CH5 */ +#define SET_EPWM0_CH5_PB0() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB0MFP_Msk)) | SYS_GPB_MFP0_PB0MFP_EPWM0_CH5) /*!< Set PB0 function to EPWM0_CH5 */ +#define SET_EPWM0_CH5_PE13() SYS->GPE_MFP3 = ((SYS->GPE_MFP3 & (~SYS_GPE_MFP3_PE13MFP_Msk)) | SYS_GPE_MFP3_PE13MFP_EPWM0_CH5) /*!< Set PE13 function to EPWM0_CH5 */ +#define SET_EPWM0_CH5_PE2() SYS->GPE_MFP0 = ((SYS->GPE_MFP0 & (~SYS_GPE_MFP0_PE2MFP_Msk)) | SYS_GPE_MFP0_PE2MFP_EPWM0_CH5) /*!< Set PE2 function to EPWM0_CH5 */ +#define SET_EPWM0_CH5_PH11() SYS->GPH_MFP2 = ((SYS->GPH_MFP2 & (~SYS_GPH_MFP2_PH11MFP_Msk)) | SYS_GPH_MFP2_PH11MFP_EPWM0_CH5) /*!< Set PH11 function to EPWM0_CH5 */ +#define SET_EPWM0_CH5_PH4() SYS->GPH_MFP1 = ((SYS->GPH_MFP1 & (~SYS_GPH_MFP1_PH4MFP_Msk)) | SYS_GPH_MFP1_PH4MFP_EPWM0_CH5) /*!< Set PH4 function to EPWM0_CH5 */ +#define SET_EPWM0_SYNC_IN_PA15() SYS->GPA_MFP3 = ((SYS->GPA_MFP3 & (~SYS_GPA_MFP3_PA15MFP_Msk)) | SYS_GPA_MFP3_PA15MFP_EPWM0_SYNC_IN) /*!< Set PA15 function to EPWM0_SYNC_IN */ +#define SET_EPWM0_SYNC_IN_PB6() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB6MFP_Msk)) | SYS_GPB_MFP1_PB6MFP_EPWM0_SYNC_IN) /*!< Set PB6 function to EPWM0_SYNC_IN */ +#define SET_EPWM0_SYNC_IN_PC14() SYS->GPC_MFP3 = ((SYS->GPC_MFP3 & (~SYS_GPC_MFP3_PC14MFP_Msk)) | SYS_GPC_MFP3_PC14MFP_EPWM0_SYNC_IN) /*!< Set PC14 function to EPWM0_SYNC_IN */ +#define SET_EPWM0_SYNC_OUT_PA11() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA11MFP_Msk)) | SYS_GPA_MFP2_PA11MFP_EPWM0_SYNC_OUT) /*!< Set PA11 function to EPWM0_SYNC_OUT */ +#define SET_EPWM0_SYNC_OUT_PF5() SYS->GPF_MFP1 = ((SYS->GPF_MFP1 & (~SYS_GPF_MFP1_PF5MFP_Msk)) | SYS_GPF_MFP1_PF5MFP_EPWM0_SYNC_OUT) /*!< Set PF5 function to EPWM0_SYNC_OUT */ +#define SET_EPWM1_BRAKE0_PB7() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB7MFP_Msk)) | SYS_GPB_MFP1_PB7MFP_EPWM1_BRAKE0) /*!< Set PB7 function to EPWM1_BRAKE0 */ +#define SET_EPWM1_BRAKE0_PE10() SYS->GPE_MFP2 = ((SYS->GPE_MFP2 & (~SYS_GPE_MFP2_PE10MFP_Msk)) | SYS_GPE_MFP2_PE10MFP_EPWM1_BRAKE0) /*!< Set PE10 function to EPWM1_BRAKE0 */ +#define SET_EPWM1_BRAKE1_PA3() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA3MFP_Msk)) | SYS_GPA_MFP0_PA3MFP_EPWM1_BRAKE1) /*!< Set PA3 function to EPWM1_BRAKE1 */ +#define SET_EPWM1_BRAKE1_PB6() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB6MFP_Msk)) | SYS_GPB_MFP1_PB6MFP_EPWM1_BRAKE1) /*!< Set PB6 function to EPWM1_BRAKE1 */ +#define SET_EPWM1_BRAKE1_PE11() SYS->GPE_MFP2 = ((SYS->GPE_MFP2 & (~SYS_GPE_MFP2_PE11MFP_Msk)) | SYS_GPE_MFP2_PE11MFP_EPWM1_BRAKE1) /*!< Set PE11 function to EPWM1_BRAKE1 */ +#define SET_EPWM1_CH0_PB15() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB15MFP_Msk)) | SYS_GPB_MFP3_PB15MFP_EPWM1_CH0) /*!< Set PB15 function to EPWM1_CH0 */ +#define SET_EPWM1_CH0_PC12() SYS->GPC_MFP3 = ((SYS->GPC_MFP3 & (~SYS_GPC_MFP3_PC12MFP_Msk)) | SYS_GPC_MFP3_PC12MFP_EPWM1_CH0) /*!< Set PC12 function to EPWM1_CH0 */ +#define SET_EPWM1_CH0_PC5() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC5MFP_Msk)) | SYS_GPC_MFP1_PC5MFP_EPWM1_CH0) /*!< Set PC5 function to EPWM1_CH0 */ +#define SET_EPWM1_CH0_PE13() SYS->GPE_MFP3 = ((SYS->GPE_MFP3 & (~SYS_GPE_MFP3_PE13MFP_Msk)) | SYS_GPE_MFP3_PE13MFP_EPWM1_CH0) /*!< Set PE13 function to EPWM1_CH0 */ +#define SET_EPWM1_CH0_PF3() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF3MFP_Msk)) | SYS_GPF_MFP0_PF3MFP_EPWM1_CH0) /*!< Set PF3 function to EPWM1_CH0 */ +#define SET_EPWM1_CH0_PI12() SYS->GPI_MFP3 = ((SYS->GPI_MFP3 & (~SYS_GPI_MFP3_PI12MFP_Msk)) | SYS_GPI_MFP3_PI12MFP_EPWM1_CH0) /*!< Set PI12 function to EPWM1_CH0 */ +#define SET_EPWM1_CH1_PB14() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB14MFP_Msk)) | SYS_GPB_MFP3_PB14MFP_EPWM1_CH1) /*!< Set PB14 function to EPWM1_CH1 */ +#define SET_EPWM1_CH1_PC11() SYS->GPC_MFP2 = ((SYS->GPC_MFP2 & (~SYS_GPC_MFP2_PC11MFP_Msk)) | SYS_GPC_MFP2_PC11MFP_EPWM1_CH1) /*!< Set PC11 function to EPWM1_CH1 */ +#define SET_EPWM1_CH1_PC4() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC4MFP_Msk)) | SYS_GPC_MFP1_PC4MFP_EPWM1_CH1) /*!< Set PC4 function to EPWM1_CH1 */ +#define SET_EPWM1_CH1_PC8() SYS->GPC_MFP2 = ((SYS->GPC_MFP2 & (~SYS_GPC_MFP2_PC8MFP_Msk)) | SYS_GPC_MFP2_PC8MFP_EPWM1_CH1) /*!< Set PC8 function to EPWM1_CH1 */ +#define SET_EPWM1_CH1_PF2() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF2MFP_Msk)) | SYS_GPF_MFP0_PF2MFP_EPWM1_CH1) /*!< Set PF2 function to EPWM1_CH1 */ +#define SET_EPWM1_CH1_PI13() SYS->GPI_MFP3 = ((SYS->GPI_MFP3 & (~SYS_GPI_MFP3_PI13MFP_Msk)) | SYS_GPI_MFP3_PI13MFP_EPWM1_CH1) /*!< Set PI13 function to EPWM1_CH1 */ +#define SET_EPWM1_CH2_PB13() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB13MFP_Msk)) | SYS_GPB_MFP3_PB13MFP_EPWM1_CH2) /*!< Set PB13 function to EPWM1_CH2 */ +#define SET_EPWM1_CH2_PC10() SYS->GPC_MFP2 = ((SYS->GPC_MFP2 & (~SYS_GPC_MFP2_PC10MFP_Msk)) | SYS_GPC_MFP2_PC10MFP_EPWM1_CH2) /*!< Set PC10 function to EPWM1_CH2 */ +#define SET_EPWM1_CH2_PC3() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC3MFP_Msk)) | SYS_GPC_MFP0_PC3MFP_EPWM1_CH2) /*!< Set PC3 function to EPWM1_CH2 */ +#define SET_EPWM1_CH2_PC7() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC7MFP_Msk)) | SYS_GPC_MFP1_PC7MFP_EPWM1_CH2) /*!< Set PC7 function to EPWM1_CH2 */ +#define SET_EPWM1_CH2_PI14() SYS->GPI_MFP3 = ((SYS->GPI_MFP3 & (~SYS_GPI_MFP3_PI14MFP_Msk)) | SYS_GPI_MFP3_PI14MFP_EPWM1_CH2) /*!< Set PI14 function to EPWM1_CH2 */ +#define SET_EPWM1_CH3_PB12() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB12MFP_Msk)) | SYS_GPB_MFP3_PB12MFP_EPWM1_CH3) /*!< Set PB12 function to EPWM1_CH3 */ +#define SET_EPWM1_CH3_PC2() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC2MFP_Msk)) | SYS_GPC_MFP0_PC2MFP_EPWM1_CH3) /*!< Set PC2 function to EPWM1_CH3 */ +#define SET_EPWM1_CH3_PC6() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC6MFP_Msk)) | SYS_GPC_MFP1_PC6MFP_EPWM1_CH3) /*!< Set PC6 function to EPWM1_CH3 */ +#define SET_EPWM1_CH3_PC9() SYS->GPC_MFP2 = ((SYS->GPC_MFP2 & (~SYS_GPC_MFP2_PC9MFP_Msk)) | SYS_GPC_MFP2_PC9MFP_EPWM1_CH3) /*!< Set PC9 function to EPWM1_CH3 */ +#define SET_EPWM1_CH3_PI15() SYS->GPI_MFP3 = ((SYS->GPI_MFP3 & (~SYS_GPI_MFP3_PI15MFP_Msk)) | SYS_GPI_MFP3_PI15MFP_EPWM1_CH3) /*!< Set PI15 function to EPWM1_CH3 */ +#define SET_EPWM1_CH4_PA7() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA7MFP_Msk)) | SYS_GPA_MFP1_PA7MFP_EPWM1_CH4) /*!< Set PA7 function to EPWM1_CH4 */ +#define SET_EPWM1_CH4_PB1() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB1MFP_Msk)) | SYS_GPB_MFP0_PB1MFP_EPWM1_CH4) /*!< Set PB1 function to EPWM1_CH4 */ +#define SET_EPWM1_CH4_PB7() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB7MFP_Msk)) | SYS_GPB_MFP1_PB7MFP_EPWM1_CH4) /*!< Set PB7 function to EPWM1_CH4 */ +#define SET_EPWM1_CH4_PC1() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC1MFP_Msk)) | SYS_GPC_MFP0_PC1MFP_EPWM1_CH4) /*!< Set PC1 function to EPWM1_CH4 */ +#define SET_EPWM1_CH4_PF0() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF0MFP_Msk)) | SYS_GPF_MFP0_PF0MFP_EPWM1_CH4) /*!< Set PF0 function to EPWM1_CH4 */ +#define SET_EPWM1_CH4_PJ0() SYS->GPJ_MFP0 = ((SYS->GPJ_MFP0 & (~SYS_GPJ_MFP0_PJ0MFP_Msk)) | SYS_GPJ_MFP0_PJ0MFP_EPWM1_CH4) /*!< Set PJ0 function to EPWM1_CH4 */ +#define SET_EPWM1_CH5_PA6() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA6MFP_Msk)) | SYS_GPA_MFP1_PA6MFP_EPWM1_CH5) /*!< Set PA6 function to EPWM1_CH5 */ +#define SET_EPWM1_CH5_PB0() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB0MFP_Msk)) | SYS_GPB_MFP0_PB0MFP_EPWM1_CH5) /*!< Set PB0 function to EPWM1_CH5 */ +#define SET_EPWM1_CH5_PB6() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB6MFP_Msk)) | SYS_GPB_MFP1_PB6MFP_EPWM1_CH5) /*!< Set PB6 function to EPWM1_CH5 */ +#define SET_EPWM1_CH5_PC0() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC0MFP_Msk)) | SYS_GPC_MFP0_PC0MFP_EPWM1_CH5) /*!< Set PC0 function to EPWM1_CH5 */ +#define SET_EPWM1_CH5_PF1() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF1MFP_Msk)) | SYS_GPF_MFP0_PF1MFP_EPWM1_CH5) /*!< Set PF1 function to EPWM1_CH5 */ +#define SET_EPWM1_CH5_PJ1() SYS->GPJ_MFP0 = ((SYS->GPJ_MFP0 & (~SYS_GPJ_MFP0_PJ1MFP_Msk)) | SYS_GPJ_MFP0_PJ1MFP_EPWM1_CH5) /*!< Set PJ1 function to EPWM1_CH5 */ +#define SET_EQEI0_A_PA4() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA4MFP_Msk)) | SYS_GPA_MFP1_PA4MFP_EQEI0_A) /*!< Set PA4 function to EQEI0_A */ +#define SET_EQEI0_A_PD11() SYS->GPD_MFP2 = ((SYS->GPD_MFP2 & (~SYS_GPD_MFP2_PD11MFP_Msk)) | SYS_GPD_MFP2_PD11MFP_EQEI0_A) /*!< Set PD11 function to EQEI0_A */ +#define SET_EQEI0_A_PE3() SYS->GPE_MFP0 = ((SYS->GPE_MFP0 & (~SYS_GPE_MFP0_PE3MFP_Msk)) | SYS_GPE_MFP0_PE3MFP_EQEI0_A) /*!< Set PE3 function to EQEI0_A */ +#define SET_EQEI0_B_PA3() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA3MFP_Msk)) | SYS_GPA_MFP0_PA3MFP_EQEI0_B) /*!< Set PA3 function to EQEI0_B */ +#define SET_EQEI0_B_PD10() SYS->GPD_MFP2 = ((SYS->GPD_MFP2 & (~SYS_GPD_MFP2_PD10MFP_Msk)) | SYS_GPD_MFP2_PD10MFP_EQEI0_B) /*!< Set PD10 function to EQEI0_B */ +#define SET_EQEI0_B_PE2() SYS->GPE_MFP0 = ((SYS->GPE_MFP0 & (~SYS_GPE_MFP0_PE2MFP_Msk)) | SYS_GPE_MFP0_PE2MFP_EQEI0_B) /*!< Set PE2 function to EQEI0_B */ +#define SET_EQEI0_INDEX_PA5() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA5MFP_Msk)) | SYS_GPA_MFP1_PA5MFP_EQEI0_INDEX) /*!< Set PA5 function to EQEI0_INDEX */ +#define SET_EQEI0_INDEX_PD12() SYS->GPD_MFP3 = ((SYS->GPD_MFP3 & (~SYS_GPD_MFP3_PD12MFP_Msk)) | SYS_GPD_MFP3_PD12MFP_EQEI0_INDEX) /*!< Set PD12 function to EQEI0_INDEX */ +#define SET_EQEI0_INDEX_PE4() SYS->GPE_MFP1 = ((SYS->GPE_MFP1 & (~SYS_GPE_MFP1_PE4MFP_Msk)) | SYS_GPE_MFP1_PE4MFP_EQEI0_INDEX) /*!< Set PE4 function to EQEI0_INDEX */ +#define SET_EQEI1_A_PA13() SYS->GPA_MFP3 = ((SYS->GPA_MFP3 & (~SYS_GPA_MFP3_PA13MFP_Msk)) | SYS_GPA_MFP3_PA13MFP_EQEI1_A) /*!< Set PA13 function to EQEI1_A */ +#define SET_EQEI1_A_PA9() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA9MFP_Msk)) | SYS_GPA_MFP2_PA9MFP_EQEI1_A) /*!< Set PA9 function to EQEI1_A */ +#define SET_EQEI1_A_PE6() SYS->GPE_MFP1 = ((SYS->GPE_MFP1 & (~SYS_GPE_MFP1_PE6MFP_Msk)) | SYS_GPE_MFP1_PE6MFP_EQEI1_A) /*!< Set PE6 function to EQEI1_A */ +#define SET_EQEI1_B_PA14() SYS->GPA_MFP3 = ((SYS->GPA_MFP3 & (~SYS_GPA_MFP3_PA14MFP_Msk)) | SYS_GPA_MFP3_PA14MFP_EQEI1_B) /*!< Set PA14 function to EQEI1_B */ +#define SET_EQEI1_B_PA8() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA8MFP_Msk)) | SYS_GPA_MFP2_PA8MFP_EQEI1_B) /*!< Set PA8 function to EQEI1_B */ +#define SET_EQEI1_B_PE5() SYS->GPE_MFP1 = ((SYS->GPE_MFP1 & (~SYS_GPE_MFP1_PE5MFP_Msk)) | SYS_GPE_MFP1_PE5MFP_EQEI1_B) /*!< Set PE5 function to EQEI1_B */ +#define SET_EQEI1_INDEX_PA10() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA10MFP_Msk)) | SYS_GPA_MFP2_PA10MFP_EQEI1_INDEX) /*!< Set PA10 function to EQEI1_INDEX */ +#define SET_EQEI1_INDEX_PA12() SYS->GPA_MFP3 = ((SYS->GPA_MFP3 & (~SYS_GPA_MFP3_PA12MFP_Msk)) | SYS_GPA_MFP3_PA12MFP_EQEI1_INDEX) /*!< Set PA12 function to EQEI1_INDEX */ +#define SET_EQEI1_INDEX_PE7() SYS->GPE_MFP1 = ((SYS->GPE_MFP1 & (~SYS_GPE_MFP1_PE7MFP_Msk)) | SYS_GPE_MFP1_PE7MFP_EQEI1_INDEX) /*!< Set PE7 function to EQEI1_INDEX */ +#define SET_EQEI2_A_PD0() SYS->GPD_MFP0 = ((SYS->GPD_MFP0 & (~SYS_GPD_MFP0_PD0MFP_Msk)) | SYS_GPD_MFP0_PD0MFP_EQEI2_A) /*!< Set PD0 function to EQEI2_A */ +#define SET_EQEI2_A_PE9() SYS->GPE_MFP2 = ((SYS->GPE_MFP2 & (~SYS_GPE_MFP2_PE9MFP_Msk)) | SYS_GPE_MFP2_PE9MFP_EQEI2_A) /*!< Set PE9 function to EQEI2_A */ +#define SET_EQEI2_A_PF5() SYS->GPF_MFP1 = ((SYS->GPF_MFP1 & (~SYS_GPF_MFP1_PF5MFP_Msk)) | SYS_GPF_MFP1_PF5MFP_EQEI2_A) /*!< Set PF5 function to EQEI2_A */ +#define SET_EQEI2_B_PD13() SYS->GPD_MFP3 = ((SYS->GPD_MFP3 & (~SYS_GPD_MFP3_PD13MFP_Msk)) | SYS_GPD_MFP3_PD13MFP_EQEI2_B) /*!< Set PD13 function to EQEI2_B */ +#define SET_EQEI2_B_PE10() SYS->GPE_MFP2 = ((SYS->GPE_MFP2 & (~SYS_GPE_MFP2_PE10MFP_Msk)) | SYS_GPE_MFP2_PE10MFP_EQEI2_B) /*!< Set PE10 function to EQEI2_B */ +#define SET_EQEI2_B_PF4() SYS->GPF_MFP1 = ((SYS->GPF_MFP1 & (~SYS_GPF_MFP1_PF4MFP_Msk)) | SYS_GPF_MFP1_PF4MFP_EQEI2_B) /*!< Set PF4 function to EQEI2_B */ +#define SET_EQEI2_INDEX_PD1() SYS->GPD_MFP0 = ((SYS->GPD_MFP0 & (~SYS_GPD_MFP0_PD1MFP_Msk)) | SYS_GPD_MFP0_PD1MFP_EQEI2_INDEX) /*!< Set PD1 function to EQEI2_INDEX */ +#define SET_EQEI2_INDEX_PE8() SYS->GPE_MFP2 = ((SYS->GPE_MFP2 & (~SYS_GPE_MFP2_PE8MFP_Msk)) | SYS_GPE_MFP2_PE8MFP_EQEI2_INDEX) /*!< Set PE8 function to EQEI2_INDEX */ +#define SET_EQEI2_INDEX_PF6() SYS->GPF_MFP1 = ((SYS->GPF_MFP1 & (~SYS_GPF_MFP1_PF6MFP_Msk)) | SYS_GPF_MFP1_PF6MFP_EQEI2_INDEX) /*!< Set PF6 function to EQEI2_INDEX */ +#define SET_EQEI3_A_PA1() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA1MFP_Msk)) | SYS_GPA_MFP0_PA1MFP_EQEI3_A) /*!< Set PA1 function to EQEI3_A */ +#define SET_EQEI3_A_PD3() SYS->GPD_MFP0 = ((SYS->GPD_MFP0 & (~SYS_GPD_MFP0_PD3MFP_Msk)) | SYS_GPD_MFP0_PD3MFP_EQEI3_A) /*!< Set PD3 function to EQEI3_A */ +#define SET_EQEI3_B_PA0() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA0MFP_Msk)) | SYS_GPA_MFP0_PA0MFP_EQEI3_B) /*!< Set PA0 function to EQEI3_B */ +#define SET_EQEI3_B_PD2() SYS->GPD_MFP0 = ((SYS->GPD_MFP0 & (~SYS_GPD_MFP0_PD2MFP_Msk)) | SYS_GPD_MFP0_PD2MFP_EQEI3_B) /*!< Set PD2 function to EQEI3_B */ +#define SET_EQEI3_INDEX_PA15() SYS->GPA_MFP3 = ((SYS->GPA_MFP3 & (~SYS_GPA_MFP3_PA15MFP_Msk)) | SYS_GPA_MFP3_PA15MFP_EQEI3_INDEX) /*!< Set PA15 function to EQEI3_INDEX */ +#define SET_EQEI3_INDEX_PA2() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA2MFP_Msk)) | SYS_GPA_MFP0_PA2MFP_EQEI3_INDEX) /*!< Set PA2 function to EQEI3_INDEX */ +#define SET_ETMC_TRACE_CLK_PB11() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB11MFP_Msk)) | SYS_GPB_MFP2_PB11MFP_ETMC_TRACE_CLK) /*!< Set PB11 function to ETMC_TRACE_CLK */ +#define SET_ETMC_TRACE_CLK_PC14() SYS->GPC_MFP3 = ((SYS->GPC_MFP3 & (~SYS_GPC_MFP3_PC14MFP_Msk)) | SYS_GPC_MFP3_PC14MFP_ETMC_TRACE_CLK) /*!< Set PC14 function to ETMC_TRACE_CLK */ +#define SET_ETMC_TRACE_DATA0_PB10() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB10MFP_Msk)) | SYS_GPB_MFP2_PB10MFP_ETMC_TRACE_DATA0) /*!< Set PB10 function to ETMC_TRACE_DATA0 */ +#define SET_ETMC_TRACE_DATA0_PB15() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB15MFP_Msk)) | SYS_GPB_MFP3_PB15MFP_ETMC_TRACE_DATA0) /*!< Set PB15 function to ETMC_TRACE_DATA0 */ +#define SET_ETMC_TRACE_DATA1_PB14() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB14MFP_Msk)) | SYS_GPB_MFP3_PB14MFP_ETMC_TRACE_DATA1) /*!< Set PB14 function to ETMC_TRACE_DATA1 */ +#define SET_ETMC_TRACE_DATA1_PB9() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB9MFP_Msk)) | SYS_GPB_MFP2_PB9MFP_ETMC_TRACE_DATA1) /*!< Set PB9 function to ETMC_TRACE_DATA1 */ +#define SET_ETMC_TRACE_DATA2_PB13() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB13MFP_Msk)) | SYS_GPB_MFP3_PB13MFP_ETMC_TRACE_DATA2) /*!< Set PB13 function to ETMC_TRACE_DATA2 */ +#define SET_ETMC_TRACE_DATA2_PB8() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB8MFP_Msk)) | SYS_GPB_MFP2_PB8MFP_ETMC_TRACE_DATA2) /*!< Set PB8 function to ETMC_TRACE_DATA2 */ +#define SET_ETMC_TRACE_DATA3_PB12() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB12MFP_Msk)) | SYS_GPB_MFP3_PB12MFP_ETMC_TRACE_DATA3) /*!< Set PB12 function to ETMC_TRACE_DATA3 */ +#define SET_ETMC_TRACE_DATA3_PB7() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB7MFP_Msk)) | SYS_GPB_MFP1_PB7MFP_ETMC_TRACE_DATA3) /*!< Set PB7 function to ETMC_TRACE_DATA3 */ +#define SET_GPIO_PA0() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA0MFP_Msk)) | SYS_GPA_MFP0_PA0MFP_GPIO) /*!< Set PA0 function to GPIO */ +#define SET_GPIO_PA1() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA1MFP_Msk)) | SYS_GPA_MFP0_PA1MFP_GPIO) /*!< Set PA1 function to GPIO */ +#define SET_GPIO_PA10() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA10MFP_Msk)) | SYS_GPA_MFP2_PA10MFP_GPIO) /*!< Set PA10 function to GPIO */ +#define SET_GPIO_PA11() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA11MFP_Msk)) | SYS_GPA_MFP2_PA11MFP_GPIO) /*!< Set PA11 function to GPIO */ +#define SET_GPIO_PA12() SYS->GPA_MFP3 = ((SYS->GPA_MFP3 & (~SYS_GPA_MFP3_PA12MFP_Msk)) | SYS_GPA_MFP3_PA12MFP_GPIO) /*!< Set PA12 function to GPIO */ +#define SET_GPIO_PA13() SYS->GPA_MFP3 = ((SYS->GPA_MFP3 & (~SYS_GPA_MFP3_PA13MFP_Msk)) | SYS_GPA_MFP3_PA13MFP_GPIO) /*!< Set PA13 function to GPIO */ +#define SET_GPIO_PA14() SYS->GPA_MFP3 = ((SYS->GPA_MFP3 & (~SYS_GPA_MFP3_PA14MFP_Msk)) | SYS_GPA_MFP3_PA14MFP_GPIO) /*!< Set PA14 function to GPIO */ +#define SET_GPIO_PA15() SYS->GPA_MFP3 = ((SYS->GPA_MFP3 & (~SYS_GPA_MFP3_PA15MFP_Msk)) | SYS_GPA_MFP3_PA15MFP_GPIO) /*!< Set PA15 function to GPIO */ +#define SET_GPIO_PA2() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA2MFP_Msk)) | SYS_GPA_MFP0_PA2MFP_GPIO) /*!< Set PA2 function to GPIO */ +#define SET_GPIO_PA3() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA3MFP_Msk)) | SYS_GPA_MFP0_PA3MFP_GPIO) /*!< Set PA3 function to GPIO */ +#define SET_GPIO_PA4() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA4MFP_Msk)) | SYS_GPA_MFP1_PA4MFP_GPIO) /*!< Set PA4 function to GPIO */ +#define SET_GPIO_PA5() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA5MFP_Msk)) | SYS_GPA_MFP1_PA5MFP_GPIO) /*!< Set PA5 function to GPIO */ +#define SET_GPIO_PA6() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA6MFP_Msk)) | SYS_GPA_MFP1_PA6MFP_GPIO) /*!< Set PA6 function to GPIO */ +#define SET_GPIO_PA7() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA7MFP_Msk)) | SYS_GPA_MFP1_PA7MFP_GPIO) /*!< Set PA7 function to GPIO */ +#define SET_GPIO_PA8() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA8MFP_Msk)) | SYS_GPA_MFP2_PA8MFP_GPIO) /*!< Set PA8 function to GPIO */ +#define SET_GPIO_PA9() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA9MFP_Msk)) | SYS_GPA_MFP2_PA9MFP_GPIO) /*!< Set PA9 function to GPIO */ +#define SET_GPIO_PB0() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB0MFP_Msk)) | SYS_GPB_MFP0_PB0MFP_GPIO) /*!< Set PB0 function to GPIO */ +#define SET_GPIO_PB1() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB1MFP_Msk)) | SYS_GPB_MFP0_PB1MFP_GPIO) /*!< Set PB1 function to GPIO */ +#define SET_GPIO_PB10() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB10MFP_Msk)) | SYS_GPB_MFP2_PB10MFP_GPIO) /*!< Set PB10 function to GPIO */ +#define SET_GPIO_PB11() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB11MFP_Msk)) | SYS_GPB_MFP2_PB11MFP_GPIO) /*!< Set PB11 function to GPIO */ +#define SET_GPIO_PB12() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB12MFP_Msk)) | SYS_GPB_MFP3_PB12MFP_GPIO) /*!< Set PB12 function to GPIO */ +#define SET_GPIO_PB13() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB13MFP_Msk)) | SYS_GPB_MFP3_PB13MFP_GPIO) /*!< Set PB13 function to GPIO */ +#define SET_GPIO_PB14() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB14MFP_Msk)) | SYS_GPB_MFP3_PB14MFP_GPIO) /*!< Set PB14 function to GPIO */ +#define SET_GPIO_PB15() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB15MFP_Msk)) | SYS_GPB_MFP3_PB15MFP_GPIO) /*!< Set PB15 function to GPIO */ +#define SET_GPIO_PB2() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB2MFP_Msk)) | SYS_GPB_MFP0_PB2MFP_GPIO) /*!< Set PB2 function to GPIO */ +#define SET_GPIO_PB3() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB3MFP_Msk)) | SYS_GPB_MFP0_PB3MFP_GPIO) /*!< Set PB3 function to GPIO */ +#define SET_GPIO_PB4() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB4MFP_Msk)) | SYS_GPB_MFP1_PB4MFP_GPIO) /*!< Set PB4 function to GPIO */ +#define SET_GPIO_PB5() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB5MFP_Msk)) | SYS_GPB_MFP1_PB5MFP_GPIO) /*!< Set PB5 function to GPIO */ +#define SET_GPIO_PB6() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB6MFP_Msk)) | SYS_GPB_MFP1_PB6MFP_GPIO) /*!< Set PB6 function to GPIO */ +#define SET_GPIO_PB7() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB7MFP_Msk)) | SYS_GPB_MFP1_PB7MFP_GPIO) /*!< Set PB7 function to GPIO */ +#define SET_GPIO_PB8() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB8MFP_Msk)) | SYS_GPB_MFP2_PB8MFP_GPIO) /*!< Set PB8 function to GPIO */ +#define SET_GPIO_PB9() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB9MFP_Msk)) | SYS_GPB_MFP2_PB9MFP_GPIO) /*!< Set PB9 function to GPIO */ +#define SET_GPIO_PC0() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC0MFP_Msk)) | SYS_GPC_MFP0_PC0MFP_GPIO) /*!< Set PC0 function to GPIO */ +#define SET_GPIO_PC1() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC1MFP_Msk)) | SYS_GPC_MFP0_PC1MFP_GPIO) /*!< Set PC1 function to GPIO */ +#define SET_GPIO_PC10() SYS->GPC_MFP2 = ((SYS->GPC_MFP2 & (~SYS_GPC_MFP2_PC10MFP_Msk)) | SYS_GPC_MFP2_PC10MFP_GPIO) /*!< Set PC10 function to GPIO */ +#define SET_GPIO_PC11() SYS->GPC_MFP2 = ((SYS->GPC_MFP2 & (~SYS_GPC_MFP2_PC11MFP_Msk)) | SYS_GPC_MFP2_PC11MFP_GPIO) /*!< Set PC11 function to GPIO */ +#define SET_GPIO_PC12() SYS->GPC_MFP3 = ((SYS->GPC_MFP3 & (~SYS_GPC_MFP3_PC12MFP_Msk)) | SYS_GPC_MFP3_PC12MFP_GPIO) /*!< Set PC12 function to GPIO */ +#define SET_GPIO_PC13() SYS->GPC_MFP3 = ((SYS->GPC_MFP3 & (~SYS_GPC_MFP3_PC13MFP_Msk)) | SYS_GPC_MFP3_PC13MFP_GPIO) /*!< Set PC13 function to GPIO */ +#define SET_GPIO_PC14() SYS->GPC_MFP3 = ((SYS->GPC_MFP3 & (~SYS_GPC_MFP3_PC14MFP_Msk)) | SYS_GPC_MFP3_PC14MFP_GPIO) /*!< Set PC14 function to GPIO */ +#define SET_GPIO_PC2() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC2MFP_Msk)) | SYS_GPC_MFP0_PC2MFP_GPIO) /*!< Set PC2 function to GPIO */ +#define SET_GPIO_PC3() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC3MFP_Msk)) | SYS_GPC_MFP0_PC3MFP_GPIO) /*!< Set PC3 function to GPIO */ +#define SET_GPIO_PC4() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC4MFP_Msk)) | SYS_GPC_MFP1_PC4MFP_GPIO) /*!< Set PC4 function to GPIO */ +#define SET_GPIO_PC5() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC5MFP_Msk)) | SYS_GPC_MFP1_PC5MFP_GPIO) /*!< Set PC5 function to GPIO */ +#define SET_GPIO_PC6() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC6MFP_Msk)) | SYS_GPC_MFP1_PC6MFP_GPIO) /*!< Set PC6 function to GPIO */ +#define SET_GPIO_PC7() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC7MFP_Msk)) | SYS_GPC_MFP1_PC7MFP_GPIO) /*!< Set PC7 function to GPIO */ +#define SET_GPIO_PC8() SYS->GPC_MFP2 = ((SYS->GPC_MFP2 & (~SYS_GPC_MFP2_PC8MFP_Msk)) | SYS_GPC_MFP2_PC8MFP_GPIO) /*!< Set PC8 function to GPIO */ +#define SET_GPIO_PC9() SYS->GPC_MFP2 = ((SYS->GPC_MFP2 & (~SYS_GPC_MFP2_PC9MFP_Msk)) | SYS_GPC_MFP2_PC9MFP_GPIO) /*!< Set PC9 function to GPIO */ +#define SET_GPIO_PD0() SYS->GPD_MFP0 = ((SYS->GPD_MFP0 & (~SYS_GPD_MFP0_PD0MFP_Msk)) | SYS_GPD_MFP0_PD0MFP_GPIO) /*!< Set PD0 function to GPIO */ +#define SET_GPIO_PD1() SYS->GPD_MFP0 = ((SYS->GPD_MFP0 & (~SYS_GPD_MFP0_PD1MFP_Msk)) | SYS_GPD_MFP0_PD1MFP_GPIO) /*!< Set PD1 function to GPIO */ +#define SET_GPIO_PD10() SYS->GPD_MFP2 = ((SYS->GPD_MFP2 & (~SYS_GPD_MFP2_PD10MFP_Msk)) | SYS_GPD_MFP2_PD10MFP_GPIO) /*!< Set PD10 function to GPIO */ +#define SET_GPIO_PD11() SYS->GPD_MFP2 = ((SYS->GPD_MFP2 & (~SYS_GPD_MFP2_PD11MFP_Msk)) | SYS_GPD_MFP2_PD11MFP_GPIO) /*!< Set PD11 function to GPIO */ +#define SET_GPIO_PD12() SYS->GPD_MFP3 = ((SYS->GPD_MFP3 & (~SYS_GPD_MFP3_PD12MFP_Msk)) | SYS_GPD_MFP3_PD12MFP_GPIO) /*!< Set PD12 function to GPIO */ +#define SET_GPIO_PD13() SYS->GPD_MFP3 = ((SYS->GPD_MFP3 & (~SYS_GPD_MFP3_PD13MFP_Msk)) | SYS_GPD_MFP3_PD13MFP_GPIO) /*!< Set PD13 function to GPIO */ +#define SET_GPIO_PD14() SYS->GPD_MFP3 = ((SYS->GPD_MFP3 & (~SYS_GPD_MFP3_PD14MFP_Msk)) | SYS_GPD_MFP3_PD14MFP_GPIO) /*!< Set PD14 function to GPIO */ +#define SET_GPIO_PD2() SYS->GPD_MFP0 = ((SYS->GPD_MFP0 & (~SYS_GPD_MFP0_PD2MFP_Msk)) | SYS_GPD_MFP0_PD2MFP_GPIO) /*!< Set PD2 function to GPIO */ +#define SET_GPIO_PD3() SYS->GPD_MFP0 = ((SYS->GPD_MFP0 & (~SYS_GPD_MFP0_PD3MFP_Msk)) | SYS_GPD_MFP0_PD3MFP_GPIO) /*!< Set PD3 function to GPIO */ +#define SET_GPIO_PD4() SYS->GPD_MFP1 = ((SYS->GPD_MFP1 & (~SYS_GPD_MFP1_PD4MFP_Msk)) | SYS_GPD_MFP1_PD4MFP_GPIO) /*!< Set PD4 function to GPIO */ +#define SET_GPIO_PD5() SYS->GPD_MFP1 = ((SYS->GPD_MFP1 & (~SYS_GPD_MFP1_PD5MFP_Msk)) | SYS_GPD_MFP1_PD5MFP_GPIO) /*!< Set PD5 function to GPIO */ +#define SET_GPIO_PD6() SYS->GPD_MFP1 = ((SYS->GPD_MFP1 & (~SYS_GPD_MFP1_PD6MFP_Msk)) | SYS_GPD_MFP1_PD6MFP_GPIO) /*!< Set PD6 function to GPIO */ +#define SET_GPIO_PD7() SYS->GPD_MFP1 = ((SYS->GPD_MFP1 & (~SYS_GPD_MFP1_PD7MFP_Msk)) | SYS_GPD_MFP1_PD7MFP_GPIO) /*!< Set PD7 function to GPIO */ +#define SET_GPIO_PD8() SYS->GPD_MFP2 = ((SYS->GPD_MFP2 & (~SYS_GPD_MFP2_PD8MFP_Msk)) | SYS_GPD_MFP2_PD8MFP_GPIO) /*!< Set PD8 function to GPIO */ +#define SET_GPIO_PD9() SYS->GPD_MFP2 = ((SYS->GPD_MFP2 & (~SYS_GPD_MFP2_PD9MFP_Msk)) | SYS_GPD_MFP2_PD9MFP_GPIO) /*!< Set PD9 function to GPIO */ +#define SET_GPIO_PE0() SYS->GPE_MFP0 = ((SYS->GPE_MFP0 & (~SYS_GPE_MFP0_PE0MFP_Msk)) | SYS_GPE_MFP0_PE0MFP_GPIO) /*!< Set PE0 function to GPIO */ +#define SET_GPIO_PE1() SYS->GPE_MFP0 = ((SYS->GPE_MFP0 & (~SYS_GPE_MFP0_PE1MFP_Msk)) | SYS_GPE_MFP0_PE1MFP_GPIO) /*!< Set PE1 function to GPIO */ +#define SET_GPIO_PE10() SYS->GPE_MFP2 = ((SYS->GPE_MFP2 & (~SYS_GPE_MFP2_PE10MFP_Msk)) | SYS_GPE_MFP2_PE10MFP_GPIO) /*!< Set PE10 function to GPIO */ +#define SET_GPIO_PE11() SYS->GPE_MFP2 = ((SYS->GPE_MFP2 & (~SYS_GPE_MFP2_PE11MFP_Msk)) | SYS_GPE_MFP2_PE11MFP_GPIO) /*!< Set PE11 function to GPIO */ +#define SET_GPIO_PE12() SYS->GPE_MFP3 = ((SYS->GPE_MFP3 & (~SYS_GPE_MFP3_PE12MFP_Msk)) | SYS_GPE_MFP3_PE12MFP_GPIO) /*!< Set PE12 function to GPIO */ +#define SET_GPIO_PE13() SYS->GPE_MFP3 = ((SYS->GPE_MFP3 & (~SYS_GPE_MFP3_PE13MFP_Msk)) | SYS_GPE_MFP3_PE13MFP_GPIO) /*!< Set PE13 function to GPIO */ +#define SET_GPIO_PE14() SYS->GPE_MFP3 = ((SYS->GPE_MFP3 & (~SYS_GPE_MFP3_PE14MFP_Msk)) | SYS_GPE_MFP3_PE14MFP_GPIO) /*!< Set PE14 function to GPIO */ +#define SET_GPIO_PE15() SYS->GPE_MFP3 = ((SYS->GPE_MFP3 & (~SYS_GPE_MFP3_PE15MFP_Msk)) | SYS_GPE_MFP3_PE15MFP_GPIO) /*!< Set PE15 function to GPIO */ +#define SET_GPIO_PE2() SYS->GPE_MFP0 = ((SYS->GPE_MFP0 & (~SYS_GPE_MFP0_PE2MFP_Msk)) | SYS_GPE_MFP0_PE2MFP_GPIO) /*!< Set PE2 function to GPIO */ +#define SET_GPIO_PE3() SYS->GPE_MFP0 = ((SYS->GPE_MFP0 & (~SYS_GPE_MFP0_PE3MFP_Msk)) | SYS_GPE_MFP0_PE3MFP_GPIO) /*!< Set PE3 function to GPIO */ +#define SET_GPIO_PE4() SYS->GPE_MFP1 = ((SYS->GPE_MFP1 & (~SYS_GPE_MFP1_PE4MFP_Msk)) | SYS_GPE_MFP1_PE4MFP_GPIO) /*!< Set PE4 function to GPIO */ +#define SET_GPIO_PE5() SYS->GPE_MFP1 = ((SYS->GPE_MFP1 & (~SYS_GPE_MFP1_PE5MFP_Msk)) | SYS_GPE_MFP1_PE5MFP_GPIO) /*!< Set PE5 function to GPIO */ +#define SET_GPIO_PE6() SYS->GPE_MFP1 = ((SYS->GPE_MFP1 & (~SYS_GPE_MFP1_PE6MFP_Msk)) | SYS_GPE_MFP1_PE6MFP_GPIO) /*!< Set PE6 function to GPIO */ +#define SET_GPIO_PE7() SYS->GPE_MFP1 = ((SYS->GPE_MFP1 & (~SYS_GPE_MFP1_PE7MFP_Msk)) | SYS_GPE_MFP1_PE7MFP_GPIO) /*!< Set PE7 function to GPIO */ +#define SET_GPIO_PE8() SYS->GPE_MFP2 = ((SYS->GPE_MFP2 & (~SYS_GPE_MFP2_PE8MFP_Msk)) | SYS_GPE_MFP2_PE8MFP_GPIO) /*!< Set PE8 function to GPIO */ +#define SET_GPIO_PE9() SYS->GPE_MFP2 = ((SYS->GPE_MFP2 & (~SYS_GPE_MFP2_PE9MFP_Msk)) | SYS_GPE_MFP2_PE9MFP_GPIO) /*!< Set PE9 function to GPIO */ +#define SET_GPIO_PF0() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF0MFP_Msk)) | SYS_GPF_MFP0_PF0MFP_GPIO) /*!< Set PF0 function to GPIO */ +#define SET_GPIO_PF1() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF1MFP_Msk)) | SYS_GPF_MFP0_PF1MFP_GPIO) /*!< Set PF1 function to GPIO */ +#define SET_GPIO_PF10() SYS->GPF_MFP2 = ((SYS->GPF_MFP2 & (~SYS_GPF_MFP2_PF10MFP_Msk)) | SYS_GPF_MFP2_PF10MFP_GPIO) /*!< Set PF10 function to GPIO */ +#define SET_GPIO_PF11() SYS->GPF_MFP2 = ((SYS->GPF_MFP2 & (~SYS_GPF_MFP2_PF11MFP_Msk)) | SYS_GPF_MFP2_PF11MFP_GPIO) /*!< Set PF11 function to GPIO */ +#define SET_GPIO_PF2() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF2MFP_Msk)) | SYS_GPF_MFP0_PF2MFP_GPIO) /*!< Set PF2 function to GPIO */ +#define SET_GPIO_PF3() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF3MFP_Msk)) | SYS_GPF_MFP0_PF3MFP_GPIO) /*!< Set PF3 function to GPIO */ +#define SET_GPIO_PF4() SYS->GPF_MFP1 = ((SYS->GPF_MFP1 & (~SYS_GPF_MFP1_PF4MFP_Msk)) | SYS_GPF_MFP1_PF4MFP_GPIO) /*!< Set PF4 function to GPIO */ +#define SET_GPIO_PF5() SYS->GPF_MFP1 = ((SYS->GPF_MFP1 & (~SYS_GPF_MFP1_PF5MFP_Msk)) | SYS_GPF_MFP1_PF5MFP_GPIO) /*!< Set PF5 function to GPIO */ +#define SET_GPIO_PF6() SYS->GPF_MFP1 = ((SYS->GPF_MFP1 & (~SYS_GPF_MFP1_PF6MFP_Msk)) | SYS_GPF_MFP1_PF6MFP_GPIO) /*!< Set PF6 function to GPIO */ +#define SET_GPIO_PF7() SYS->GPF_MFP1 = ((SYS->GPF_MFP1 & (~SYS_GPF_MFP1_PF7MFP_Msk)) | SYS_GPF_MFP1_PF7MFP_GPIO) /*!< Set PF7 function to GPIO */ +#define SET_GPIO_PF8() SYS->GPF_MFP2 = ((SYS->GPF_MFP2 & (~SYS_GPF_MFP2_PF8MFP_Msk)) | SYS_GPF_MFP2_PF8MFP_GPIO) /*!< Set PF8 function to GPIO */ +#define SET_GPIO_PF9() SYS->GPF_MFP2 = ((SYS->GPF_MFP2 & (~SYS_GPF_MFP2_PF9MFP_Msk)) | SYS_GPF_MFP2_PF9MFP_GPIO) /*!< Set PF9 function to GPIO */ +#define SET_GPIO_PG0() SYS->GPG_MFP0 = ((SYS->GPG_MFP0 & (~SYS_GPG_MFP0_PG0MFP_Msk)) | SYS_GPG_MFP0_PG0MFP_GPIO) /*!< Set PG0 function to GPIO */ +#define SET_GPIO_PG1() SYS->GPG_MFP0 = ((SYS->GPG_MFP0 & (~SYS_GPG_MFP0_PG1MFP_Msk)) | SYS_GPG_MFP0_PG1MFP_GPIO) /*!< Set PG1 function to GPIO */ +#define SET_GPIO_PG10() SYS->GPG_MFP2 = ((SYS->GPG_MFP2 & (~SYS_GPG_MFP2_PG10MFP_Msk)) | SYS_GPG_MFP2_PG10MFP_GPIO) /*!< Set PG10 function to GPIO */ +#define SET_GPIO_PG11() SYS->GPG_MFP2 = ((SYS->GPG_MFP2 & (~SYS_GPG_MFP2_PG11MFP_Msk)) | SYS_GPG_MFP2_PG11MFP_GPIO) /*!< Set PG11 function to GPIO */ +#define SET_GPIO_PG12() SYS->GPG_MFP3 = ((SYS->GPG_MFP3 & (~SYS_GPG_MFP3_PG12MFP_Msk)) | SYS_GPG_MFP3_PG12MFP_GPIO) /*!< Set PG12 function to GPIO */ +#define SET_GPIO_PG13() SYS->GPG_MFP3 = ((SYS->GPG_MFP3 & (~SYS_GPG_MFP3_PG13MFP_Msk)) | SYS_GPG_MFP3_PG13MFP_GPIO) /*!< Set PG13 function to GPIO */ +#define SET_GPIO_PG14() SYS->GPG_MFP3 = ((SYS->GPG_MFP3 & (~SYS_GPG_MFP3_PG14MFP_Msk)) | SYS_GPG_MFP3_PG14MFP_GPIO) /*!< Set PG14 function to GPIO */ +#define SET_GPIO_PG15() SYS->GPG_MFP3 = ((SYS->GPG_MFP3 & (~SYS_GPG_MFP3_PG15MFP_Msk)) | SYS_GPG_MFP3_PG15MFP_GPIO) /*!< Set PG15 function to GPIO */ +#define SET_GPIO_PG2() SYS->GPG_MFP0 = ((SYS->GPG_MFP0 & (~SYS_GPG_MFP0_PG2MFP_Msk)) | SYS_GPG_MFP0_PG2MFP_GPIO) /*!< Set PG2 function to GPIO */ +#define SET_GPIO_PG3() SYS->GPG_MFP0 = ((SYS->GPG_MFP0 & (~SYS_GPG_MFP0_PG3MFP_Msk)) | SYS_GPG_MFP0_PG3MFP_GPIO) /*!< Set PG3 function to GPIO */ +#define SET_GPIO_PG4() SYS->GPG_MFP1 = ((SYS->GPG_MFP1 & (~SYS_GPG_MFP1_PG4MFP_Msk)) | SYS_GPG_MFP1_PG4MFP_GPIO) /*!< Set PG4 function to GPIO */ +#define SET_GPIO_PG5() SYS->GPG_MFP1 = ((SYS->GPG_MFP1 & (~SYS_GPG_MFP1_PG5MFP_Msk)) | SYS_GPG_MFP1_PG5MFP_GPIO) /*!< Set PG5 function to GPIO */ +#define SET_GPIO_PG6() SYS->GPG_MFP1 = ((SYS->GPG_MFP1 & (~SYS_GPG_MFP1_PG6MFP_Msk)) | SYS_GPG_MFP1_PG6MFP_GPIO) /*!< Set PG6 function to GPIO */ +#define SET_GPIO_PG7() SYS->GPG_MFP1 = ((SYS->GPG_MFP1 & (~SYS_GPG_MFP1_PG7MFP_Msk)) | SYS_GPG_MFP1_PG7MFP_GPIO) /*!< Set PG7 function to GPIO */ +#define SET_GPIO_PG8() SYS->GPG_MFP2 = ((SYS->GPG_MFP2 & (~SYS_GPG_MFP2_PG8MFP_Msk)) | SYS_GPG_MFP2_PG8MFP_GPIO) /*!< Set PG8 function to GPIO */ +#define SET_GPIO_PG9() SYS->GPG_MFP2 = ((SYS->GPG_MFP2 & (~SYS_GPG_MFP2_PG9MFP_Msk)) | SYS_GPG_MFP2_PG9MFP_GPIO) /*!< Set PG9 function to GPIO */ +#define SET_GPIO_PH0() SYS->GPH_MFP0 = ((SYS->GPH_MFP0 & (~SYS_GPH_MFP0_PH0MFP_Msk)) | SYS_GPH_MFP0_PH0MFP_GPIO) /*!< Set PH0 function to GPIO */ +#define SET_GPIO_PH1() SYS->GPH_MFP0 = ((SYS->GPH_MFP0 & (~SYS_GPH_MFP0_PH1MFP_Msk)) | SYS_GPH_MFP0_PH1MFP_GPIO) /*!< Set PH1 function to GPIO */ +#define SET_GPIO_PH10() SYS->GPH_MFP2 = ((SYS->GPH_MFP2 & (~SYS_GPH_MFP2_PH10MFP_Msk)) | SYS_GPH_MFP2_PH10MFP_GPIO) /*!< Set PH10 function to GPIO */ +#define SET_GPIO_PH11() SYS->GPH_MFP2 = ((SYS->GPH_MFP2 & (~SYS_GPH_MFP2_PH11MFP_Msk)) | SYS_GPH_MFP2_PH11MFP_GPIO) /*!< Set PH11 function to GPIO */ +#define SET_GPIO_PH12() SYS->GPH_MFP3 = ((SYS->GPH_MFP3 & (~SYS_GPH_MFP3_PH12MFP_Msk)) | SYS_GPH_MFP3_PH12MFP_GPIO) /*!< Set PH12 function to GPIO */ +#define SET_GPIO_PH13() SYS->GPH_MFP3 = ((SYS->GPH_MFP3 & (~SYS_GPH_MFP3_PH13MFP_Msk)) | SYS_GPH_MFP3_PH13MFP_GPIO) /*!< Set PH13 function to GPIO */ +#define SET_GPIO_PH14() SYS->GPH_MFP3 = ((SYS->GPH_MFP3 & (~SYS_GPH_MFP3_PH14MFP_Msk)) | SYS_GPH_MFP3_PH14MFP_GPIO) /*!< Set PH14 function to GPIO */ +#define SET_GPIO_PH15() SYS->GPH_MFP3 = ((SYS->GPH_MFP3 & (~SYS_GPH_MFP3_PH15MFP_Msk)) | SYS_GPH_MFP3_PH15MFP_GPIO) /*!< Set PH15 function to GPIO */ +#define SET_GPIO_PH2() SYS->GPH_MFP0 = ((SYS->GPH_MFP0 & (~SYS_GPH_MFP0_PH2MFP_Msk)) | SYS_GPH_MFP0_PH2MFP_GPIO) /*!< Set PH2 function to GPIO */ +#define SET_GPIO_PH3() SYS->GPH_MFP0 = ((SYS->GPH_MFP0 & (~SYS_GPH_MFP0_PH3MFP_Msk)) | SYS_GPH_MFP0_PH3MFP_GPIO) /*!< Set PH3 function to GPIO */ +#define SET_GPIO_PH4() SYS->GPH_MFP1 = ((SYS->GPH_MFP1 & (~SYS_GPH_MFP1_PH4MFP_Msk)) | SYS_GPH_MFP1_PH4MFP_GPIO) /*!< Set PH4 function to GPIO */ +#define SET_GPIO_PH5() SYS->GPH_MFP1 = ((SYS->GPH_MFP1 & (~SYS_GPH_MFP1_PH5MFP_Msk)) | SYS_GPH_MFP1_PH5MFP_GPIO) /*!< Set PH5 function to GPIO */ +#define SET_GPIO_PH6() SYS->GPH_MFP1 = ((SYS->GPH_MFP1 & (~SYS_GPH_MFP1_PH6MFP_Msk)) | SYS_GPH_MFP1_PH6MFP_GPIO) /*!< Set PH6 function to GPIO */ +#define SET_GPIO_PH7() SYS->GPH_MFP1 = ((SYS->GPH_MFP1 & (~SYS_GPH_MFP1_PH7MFP_Msk)) | SYS_GPH_MFP1_PH7MFP_GPIO) /*!< Set PH7 function to GPIO */ +#define SET_GPIO_PH8() SYS->GPH_MFP2 = ((SYS->GPH_MFP2 & (~SYS_GPH_MFP2_PH8MFP_Msk)) | SYS_GPH_MFP2_PH8MFP_GPIO) /*!< Set PH8 function to GPIO */ +#define SET_GPIO_PH9() SYS->GPH_MFP2 = ((SYS->GPH_MFP2 & (~SYS_GPH_MFP2_PH9MFP_Msk)) | SYS_GPH_MFP2_PH9MFP_GPIO) /*!< Set PH9 function to GPIO */ +#define SET_GPIO_PI10() SYS->GPI_MFP2 = ((SYS->GPI_MFP2 & (~SYS_GPI_MFP2_PI10MFP_Msk)) | SYS_GPI_MFP2_PI10MFP_GPIO) /*!< Set PI10 function to GPIO */ +#define SET_GPIO_PI11() SYS->GPI_MFP2 = ((SYS->GPI_MFP2 & (~SYS_GPI_MFP2_PI11MFP_Msk)) | SYS_GPI_MFP2_PI11MFP_GPIO) /*!< Set PI11 function to GPIO */ +#define SET_GPIO_PI12() SYS->GPI_MFP3 = ((SYS->GPI_MFP3 & (~SYS_GPI_MFP3_PI12MFP_Msk)) | SYS_GPI_MFP3_PI12MFP_GPIO) /*!< Set PI12 function to GPIO */ +#define SET_GPIO_PI13() SYS->GPI_MFP3 = ((SYS->GPI_MFP3 & (~SYS_GPI_MFP3_PI13MFP_Msk)) | SYS_GPI_MFP3_PI13MFP_GPIO) /*!< Set PI13 function to GPIO */ +#define SET_GPIO_PI14() SYS->GPI_MFP3 = ((SYS->GPI_MFP3 & (~SYS_GPI_MFP3_PI14MFP_Msk)) | SYS_GPI_MFP3_PI14MFP_GPIO) /*!< Set PI14 function to GPIO */ +#define SET_GPIO_PI15() SYS->GPI_MFP3 = ((SYS->GPI_MFP3 & (~SYS_GPI_MFP3_PI15MFP_Msk)) | SYS_GPI_MFP3_PI15MFP_GPIO) /*!< Set PI15 function to GPIO */ +#define SET_GPIO_PI6() SYS->GPI_MFP1 = ((SYS->GPI_MFP1 & (~SYS_GPI_MFP1_PI6MFP_Msk)) | SYS_GPI_MFP1_PI6MFP_GPIO) /*!< Set PI6 function to GPIO */ +#define SET_GPIO_PI7() SYS->GPI_MFP1 = ((SYS->GPI_MFP1 & (~SYS_GPI_MFP1_PI7MFP_Msk)) | SYS_GPI_MFP1_PI7MFP_GPIO) /*!< Set PI7 function to GPIO */ +#define SET_GPIO_PI8() SYS->GPI_MFP2 = ((SYS->GPI_MFP2 & (~SYS_GPI_MFP2_PI8MFP_Msk)) | SYS_GPI_MFP2_PI8MFP_GPIO) /*!< Set PI8 function to GPIO */ +#define SET_GPIO_PI9() SYS->GPI_MFP2 = ((SYS->GPI_MFP2 & (~SYS_GPI_MFP2_PI9MFP_Msk)) | SYS_GPI_MFP2_PI9MFP_GPIO) /*!< Set PI9 function to GPIO */ +#define SET_GPIO_PJ0() SYS->GPJ_MFP0 = ((SYS->GPJ_MFP0 & (~SYS_GPJ_MFP0_PJ0MFP_Msk)) | SYS_GPJ_MFP0_PJ0MFP_GPIO) /*!< Set PJ0 function to GPIO */ +#define SET_GPIO_PJ1() SYS->GPJ_MFP0 = ((SYS->GPJ_MFP0 & (~SYS_GPJ_MFP0_PJ1MFP_Msk)) | SYS_GPJ_MFP0_PJ1MFP_GPIO) /*!< Set PJ1 function to GPIO */ +#define SET_GPIO_PJ10() SYS->GPJ_MFP2 = ((SYS->GPJ_MFP2 & (~SYS_GPJ_MFP2_PJ10MFP_Msk)) | SYS_GPJ_MFP2_PJ10MFP_GPIO) /*!< Set PJ10 function to GPIO */ +#define SET_GPIO_PJ11() SYS->GPJ_MFP2 = ((SYS->GPJ_MFP2 & (~SYS_GPJ_MFP2_PJ11MFP_Msk)) | SYS_GPJ_MFP2_PJ11MFP_GPIO) /*!< Set PJ11 function to GPIO */ +#define SET_GPIO_PJ12() SYS->GPJ_MFP3 = ((SYS->GPJ_MFP3 & (~SYS_GPJ_MFP3_PJ12MFP_Msk)) | SYS_GPJ_MFP3_PJ12MFP_GPIO) /*!< Set PJ12 function to GPIO */ +#define SET_GPIO_PJ13() SYS->GPJ_MFP3 = ((SYS->GPJ_MFP3 & (~SYS_GPJ_MFP3_PJ13MFP_Msk)) | SYS_GPJ_MFP3_PJ13MFP_GPIO) /*!< Set PJ13 function to GPIO */ +#define SET_GPIO_PJ2() SYS->GPJ_MFP0 = ((SYS->GPJ_MFP0 & (~SYS_GPJ_MFP0_PJ2MFP_Msk)) | SYS_GPJ_MFP0_PJ2MFP_GPIO) /*!< Set PJ2 function to GPIO */ +#define SET_GPIO_PJ3() SYS->GPJ_MFP0 = ((SYS->GPJ_MFP0 & (~SYS_GPJ_MFP0_PJ3MFP_Msk)) | SYS_GPJ_MFP0_PJ3MFP_GPIO) /*!< Set PJ3 function to GPIO */ +#define SET_GPIO_PJ4() SYS->GPJ_MFP1 = ((SYS->GPJ_MFP1 & (~SYS_GPJ_MFP1_PJ4MFP_Msk)) | SYS_GPJ_MFP1_PJ4MFP_GPIO) /*!< Set PJ4 function to GPIO */ +#define SET_GPIO_PJ5() SYS->GPJ_MFP1 = ((SYS->GPJ_MFP1 & (~SYS_GPJ_MFP1_PJ5MFP_Msk)) | SYS_GPJ_MFP1_PJ5MFP_GPIO) /*!< Set PJ5 function to GPIO */ +#define SET_GPIO_PJ6() SYS->GPJ_MFP1 = ((SYS->GPJ_MFP1 & (~SYS_GPJ_MFP1_PJ6MFP_Msk)) | SYS_GPJ_MFP1_PJ6MFP_GPIO) /*!< Set PJ6 function to GPIO */ +#define SET_GPIO_PJ7() SYS->GPJ_MFP1 = ((SYS->GPJ_MFP1 & (~SYS_GPJ_MFP1_PJ7MFP_Msk)) | SYS_GPJ_MFP1_PJ7MFP_GPIO) /*!< Set PJ7 function to GPIO */ +#define SET_GPIO_PJ8() SYS->GPJ_MFP2 = ((SYS->GPJ_MFP2 & (~SYS_GPJ_MFP2_PJ8MFP_Msk)) | SYS_GPJ_MFP2_PJ8MFP_GPIO) /*!< Set PJ8 function to GPIO */ +#define SET_GPIO_PJ9() SYS->GPJ_MFP2 = ((SYS->GPJ_MFP2 & (~SYS_GPJ_MFP2_PJ9MFP_Msk)) | SYS_GPJ_MFP2_PJ9MFP_GPIO) /*!< Set PJ9 function to GPIO */ +#define SET_HSUSB_VBUS_EN_PB10() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB10MFP_Msk)) | SYS_GPB_MFP2_PB10MFP_HSUSB_VBUS_EN) /*!< Set PB10 function to HSUSB_VBUS_EN */ +#define SET_HSUSB_VBUS_EN_PB15() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB15MFP_Msk)) | SYS_GPB_MFP3_PB15MFP_HSUSB_VBUS_EN) /*!< Set PB15 function to HSUSB_VBUS_EN */ +#define SET_HSUSB_VBUS_EN_PB6() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB6MFP_Msk)) | SYS_GPB_MFP1_PB6MFP_HSUSB_VBUS_EN) /*!< Set PB6 function to HSUSB_VBUS_EN */ +#define SET_HSUSB_VBUS_EN_PJ13() SYS->GPJ_MFP3 = ((SYS->GPJ_MFP3 & (~SYS_GPJ_MFP3_PJ13MFP_Msk)) | SYS_GPJ_MFP3_PJ13MFP_HSUSB_VBUS_EN) /*!< Set PJ13 function to HSUSB_VBUS_EN */ +#define SET_HSUSB_VBUS_ST_PB11() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB11MFP_Msk)) | SYS_GPB_MFP2_PB11MFP_HSUSB_VBUS_ST) /*!< Set PB11 function to HSUSB_VBUS_ST */ +#define SET_HSUSB_VBUS_ST_PB13() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB13MFP_Msk)) | SYS_GPB_MFP3_PB13MFP_HSUSB_VBUS_ST) /*!< Set PB13 function to HSUSB_VBUS_ST */ +#define SET_HSUSB_VBUS_ST_PB7() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB7MFP_Msk)) | SYS_GPB_MFP1_PB7MFP_HSUSB_VBUS_ST) /*!< Set PB7 function to HSUSB_VBUS_ST */ +#define SET_HSUSB_VBUS_ST_PC14() SYS->GPC_MFP3 = ((SYS->GPC_MFP3 & (~SYS_GPC_MFP3_PC14MFP_Msk)) | SYS_GPC_MFP3_PC14MFP_HSUSB_VBUS_ST) /*!< Set PC14 function to HSUSB_VBUS_ST */ +#define SET_HSUSB_VBUS_ST_PJ12() SYS->GPJ_MFP3 = ((SYS->GPJ_MFP3 & (~SYS_GPJ_MFP3_PJ12MFP_Msk)) | SYS_GPJ_MFP3_PJ12MFP_HSUSB_VBUS_ST) /*!< Set PJ12 function to HSUSB_VBUS_ST */ +#define SET_I2C0_SCL_PA5() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA5MFP_Msk)) | SYS_GPA_MFP1_PA5MFP_I2C0_SCL) /*!< Set PA5 function to I2C0_SCL */ +#define SET_I2C0_SCL_PB5() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB5MFP_Msk)) | SYS_GPB_MFP1_PB5MFP_I2C0_SCL) /*!< Set PB5 function to I2C0_SCL */ +#define SET_I2C0_SCL_PB9() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB9MFP_Msk)) | SYS_GPB_MFP2_PB9MFP_I2C0_SCL) /*!< Set PB9 function to I2C0_SCL */ +#define SET_I2C0_SCL_PC1() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC1MFP_Msk)) | SYS_GPC_MFP0_PC1MFP_I2C0_SCL) /*!< Set PC1 function to I2C0_SCL */ +#define SET_I2C0_SCL_PC12() SYS->GPC_MFP3 = ((SYS->GPC_MFP3 & (~SYS_GPC_MFP3_PC12MFP_Msk)) | SYS_GPC_MFP3_PC12MFP_I2C0_SCL) /*!< Set PC12 function to I2C0_SCL */ +#define SET_I2C0_SCL_PE13() SYS->GPE_MFP3 = ((SYS->GPE_MFP3 & (~SYS_GPE_MFP3_PE13MFP_Msk)) | SYS_GPE_MFP3_PE13MFP_I2C0_SCL) /*!< Set PE13 function to I2C0_SCL */ +#define SET_I2C0_SCL_PF0() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF0MFP_Msk)) | SYS_GPF_MFP0_PF0MFP_I2C0_SCL) /*!< Set PF0 function to I2C0_SCL */ +#define SET_I2C0_SCL_PF3() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF3MFP_Msk)) | SYS_GPF_MFP0_PF3MFP_I2C0_SCL) /*!< Set PF3 function to I2C0_SCL */ +#define SET_I2C0_SCL_PG0() SYS->GPG_MFP0 = ((SYS->GPG_MFP0 & (~SYS_GPG_MFP0_PG0MFP_Msk)) | SYS_GPG_MFP0_PG0MFP_I2C0_SCL) /*!< Set PG0 function to I2C0_SCL */ +#define SET_I2C0_SCL_PG13() SYS->GPG_MFP3 = ((SYS->GPG_MFP3 & (~SYS_GPG_MFP3_PG13MFP_Msk)) | SYS_GPG_MFP3_PG13MFP_I2C0_SCL) /*!< Set PG13 function to I2C0_SCL */ +#define SET_I2C0_SCL_PH2() SYS->GPH_MFP0 = ((SYS->GPH_MFP0 & (~SYS_GPH_MFP0_PH2MFP_Msk)) | SYS_GPH_MFP0_PH2MFP_I2C0_SCL) /*!< Set PH2 function to I2C0_SCL */ +#define SET_I2C0_SCL_PI10() SYS->GPI_MFP2 = ((SYS->GPI_MFP2 & (~SYS_GPI_MFP2_PI10MFP_Msk)) | SYS_GPI_MFP2_PI10MFP_I2C0_SCL) /*!< Set PI10 function to I2C0_SCL */ +#define SET_I2C0_SDA_PA4() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA4MFP_Msk)) | SYS_GPA_MFP1_PA4MFP_I2C0_SDA) /*!< Set PA4 function to I2C0_SDA */ +#define SET_I2C0_SDA_PB4() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB4MFP_Msk)) | SYS_GPB_MFP1_PB4MFP_I2C0_SDA) /*!< Set PB4 function to I2C0_SDA */ +#define SET_I2C0_SDA_PB8() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB8MFP_Msk)) | SYS_GPB_MFP2_PB8MFP_I2C0_SDA) /*!< Set PB8 function to I2C0_SDA */ +#define SET_I2C0_SDA_PC0() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC0MFP_Msk)) | SYS_GPC_MFP0_PC0MFP_I2C0_SDA) /*!< Set PC0 function to I2C0_SDA */ +#define SET_I2C0_SDA_PC11() SYS->GPC_MFP2 = ((SYS->GPC_MFP2 & (~SYS_GPC_MFP2_PC11MFP_Msk)) | SYS_GPC_MFP2_PC11MFP_I2C0_SDA) /*!< Set PC11 function to I2C0_SDA */ +#define SET_I2C0_SDA_PC8() SYS->GPC_MFP2 = ((SYS->GPC_MFP2 & (~SYS_GPC_MFP2_PC8MFP_Msk)) | SYS_GPC_MFP2_PC8MFP_I2C0_SDA) /*!< Set PC8 function to I2C0_SDA */ +#define SET_I2C0_SDA_PF1() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF1MFP_Msk)) | SYS_GPF_MFP0_PF1MFP_I2C0_SDA) /*!< Set PF1 function to I2C0_SDA */ +#define SET_I2C0_SDA_PF2() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF2MFP_Msk)) | SYS_GPF_MFP0_PF2MFP_I2C0_SDA) /*!< Set PF2 function to I2C0_SDA */ +#define SET_I2C0_SDA_PG1() SYS->GPG_MFP0 = ((SYS->GPG_MFP0 & (~SYS_GPG_MFP0_PG1MFP_Msk)) | SYS_GPG_MFP0_PG1MFP_I2C0_SDA) /*!< Set PG1 function to I2C0_SDA */ +#define SET_I2C0_SDA_PG14() SYS->GPG_MFP3 = ((SYS->GPG_MFP3 & (~SYS_GPG_MFP3_PG14MFP_Msk)) | SYS_GPG_MFP3_PG14MFP_I2C0_SDA) /*!< Set PG14 function to I2C0_SDA */ +#define SET_I2C0_SDA_PH3() SYS->GPH_MFP0 = ((SYS->GPH_MFP0 & (~SYS_GPH_MFP0_PH3MFP_Msk)) | SYS_GPH_MFP0_PH3MFP_I2C0_SDA) /*!< Set PH3 function to I2C0_SDA */ +#define SET_I2C0_SDA_PI11() SYS->GPI_MFP2 = ((SYS->GPI_MFP2 & (~SYS_GPI_MFP2_PI11MFP_Msk)) | SYS_GPI_MFP2_PI11MFP_I2C0_SDA) /*!< Set PI11 function to I2C0_SDA */ +#define SET_I2C0_SMBAL_PA3() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA3MFP_Msk)) | SYS_GPA_MFP0_PA3MFP_I2C0_SMBAL) /*!< Set PA3 function to I2C0_SMBAL */ +#define SET_I2C0_SMBAL_PC3() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC3MFP_Msk)) | SYS_GPC_MFP0_PC3MFP_I2C0_SMBAL) /*!< Set PC3 function to I2C0_SMBAL */ +#define SET_I2C0_SMBAL_PG2() SYS->GPG_MFP0 = ((SYS->GPG_MFP0 & (~SYS_GPG_MFP0_PG2MFP_Msk)) | SYS_GPG_MFP0_PG2MFP_I2C0_SMBAL) /*!< Set PG2 function to I2C0_SMBAL */ +#define SET_I2C0_SMBAL_PI8() SYS->GPI_MFP2 = ((SYS->GPI_MFP2 & (~SYS_GPI_MFP2_PI8MFP_Msk)) | SYS_GPI_MFP2_PI8MFP_I2C0_SMBAL) /*!< Set PI8 function to I2C0_SMBAL */ +#define SET_I2C0_SMBSUS_PA2() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA2MFP_Msk)) | SYS_GPA_MFP0_PA2MFP_I2C0_SMBSUS) /*!< Set PA2 function to I2C0_SMBSUS */ +#define SET_I2C0_SMBSUS_PC2() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC2MFP_Msk)) | SYS_GPC_MFP0_PC2MFP_I2C0_SMBSUS) /*!< Set PC2 function to I2C0_SMBSUS */ +#define SET_I2C0_SMBSUS_PG3() SYS->GPG_MFP0 = ((SYS->GPG_MFP0 & (~SYS_GPG_MFP0_PG3MFP_Msk)) | SYS_GPG_MFP0_PG3MFP_I2C0_SMBSUS) /*!< Set PG3 function to I2C0_SMBSUS */ +#define SET_I2C0_SMBSUS_PI9() SYS->GPI_MFP2 = ((SYS->GPI_MFP2 & (~SYS_GPI_MFP2_PI9MFP_Msk)) | SYS_GPI_MFP2_PI9MFP_I2C0_SMBSUS) /*!< Set PI9 function to I2C0_SMBSUS */ +#define SET_I2C1_SCL_PA12() SYS->GPA_MFP3 = ((SYS->GPA_MFP3 & (~SYS_GPA_MFP3_PA12MFP_Msk)) | SYS_GPA_MFP3_PA12MFP_I2C1_SCL) /*!< Set PA12 function to I2C1_SCL */ +#define SET_I2C1_SCL_PA3() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA3MFP_Msk)) | SYS_GPA_MFP0_PA3MFP_I2C1_SCL) /*!< Set PA3 function to I2C1_SCL */ +#define SET_I2C1_SCL_PA7() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA7MFP_Msk)) | SYS_GPA_MFP1_PA7MFP_I2C1_SCL) /*!< Set PA7 function to I2C1_SCL */ +#define SET_I2C1_SCL_PB1() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB1MFP_Msk)) | SYS_GPB_MFP0_PB1MFP_I2C1_SCL) /*!< Set PB1 function to I2C1_SCL */ +#define SET_I2C1_SCL_PB11() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB11MFP_Msk)) | SYS_GPB_MFP2_PB11MFP_I2C1_SCL) /*!< Set PB11 function to I2C1_SCL */ +#define SET_I2C1_SCL_PB3() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB3MFP_Msk)) | SYS_GPB_MFP0_PB3MFP_I2C1_SCL) /*!< Set PB3 function to I2C1_SCL */ +#define SET_I2C1_SCL_PC5() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC5MFP_Msk)) | SYS_GPC_MFP1_PC5MFP_I2C1_SCL) /*!< Set PC5 function to I2C1_SCL */ +#define SET_I2C1_SCL_PE1() SYS->GPE_MFP0 = ((SYS->GPE_MFP0 & (~SYS_GPE_MFP0_PE1MFP_Msk)) | SYS_GPE_MFP0_PE1MFP_I2C1_SCL) /*!< Set PE1 function to I2C1_SCL */ +#define SET_I2C1_SCL_PE14() SYS->GPE_MFP3 = ((SYS->GPE_MFP3 & (~SYS_GPE_MFP3_PE14MFP_Msk)) | SYS_GPE_MFP3_PE14MFP_I2C1_SCL) /*!< Set PE14 function to I2C1_SCL */ +#define SET_I2C1_SCL_PF0() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF0MFP_Msk)) | SYS_GPF_MFP0_PF0MFP_I2C1_SCL) /*!< Set PF0 function to I2C1_SCL */ +#define SET_I2C1_SCL_PG15() SYS->GPG_MFP3 = ((SYS->GPG_MFP3 & (~SYS_GPG_MFP3_PG15MFP_Msk)) | SYS_GPG_MFP3_PG15MFP_I2C1_SCL) /*!< Set PG15 function to I2C1_SCL */ +#define SET_I2C1_SCL_PG2() SYS->GPG_MFP0 = ((SYS->GPG_MFP0 & (~SYS_GPG_MFP0_PG2MFP_Msk)) | SYS_GPG_MFP0_PG2MFP_I2C1_SCL) /*!< Set PG2 function to I2C1_SCL */ +#define SET_I2C1_SCL_PI6() SYS->GPI_MFP1 = ((SYS->GPI_MFP1 & (~SYS_GPI_MFP1_PI6MFP_Msk)) | SYS_GPI_MFP1_PI6MFP_I2C1_SCL) /*!< Set PI6 function to I2C1_SCL */ +#define SET_I2C1_SDA_PA13() SYS->GPA_MFP3 = ((SYS->GPA_MFP3 & (~SYS_GPA_MFP3_PA13MFP_Msk)) | SYS_GPA_MFP3_PA13MFP_I2C1_SDA) /*!< Set PA13 function to I2C1_SDA */ +#define SET_I2C1_SDA_PA2() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA2MFP_Msk)) | SYS_GPA_MFP0_PA2MFP_I2C1_SDA) /*!< Set PA2 function to I2C1_SDA */ +#define SET_I2C1_SDA_PA6() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA6MFP_Msk)) | SYS_GPA_MFP1_PA6MFP_I2C1_SDA) /*!< Set PA6 function to I2C1_SDA */ +#define SET_I2C1_SDA_PB0() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB0MFP_Msk)) | SYS_GPB_MFP0_PB0MFP_I2C1_SDA) /*!< Set PB0 function to I2C1_SDA */ +#define SET_I2C1_SDA_PB10() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB10MFP_Msk)) | SYS_GPB_MFP2_PB10MFP_I2C1_SDA) /*!< Set PB10 function to I2C1_SDA */ +#define SET_I2C1_SDA_PB2() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB2MFP_Msk)) | SYS_GPB_MFP0_PB2MFP_I2C1_SDA) /*!< Set PB2 function to I2C1_SDA */ +#define SET_I2C1_SDA_PC4() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC4MFP_Msk)) | SYS_GPC_MFP1_PC4MFP_I2C1_SDA) /*!< Set PC4 function to I2C1_SDA */ +#define SET_I2C1_SDA_PD4() SYS->GPD_MFP1 = ((SYS->GPD_MFP1 & (~SYS_GPD_MFP1_PD4MFP_Msk)) | SYS_GPD_MFP1_PD4MFP_I2C1_SDA) /*!< Set PD4 function to I2C1_SDA */ +#define SET_I2C1_SDA_PE0() SYS->GPE_MFP0 = ((SYS->GPE_MFP0 & (~SYS_GPE_MFP0_PE0MFP_Msk)) | SYS_GPE_MFP0_PE0MFP_I2C1_SDA) /*!< Set PE0 function to I2C1_SDA */ +#define SET_I2C1_SDA_PE15() SYS->GPE_MFP3 = ((SYS->GPE_MFP3 & (~SYS_GPE_MFP3_PE15MFP_Msk)) | SYS_GPE_MFP3_PE15MFP_I2C1_SDA) /*!< Set PE15 function to I2C1_SDA */ +#define SET_I2C1_SDA_PF1() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF1MFP_Msk)) | SYS_GPF_MFP0_PF1MFP_I2C1_SDA) /*!< Set PF1 function to I2C1_SDA */ +#define SET_I2C1_SDA_PG3() SYS->GPG_MFP0 = ((SYS->GPG_MFP0 & (~SYS_GPG_MFP0_PG3MFP_Msk)) | SYS_GPG_MFP0_PG3MFP_I2C1_SDA) /*!< Set PG3 function to I2C1_SDA */ +#define SET_I2C1_SDA_PI7() SYS->GPI_MFP1 = ((SYS->GPI_MFP1 & (~SYS_GPI_MFP1_PI7MFP_Msk)) | SYS_GPI_MFP1_PI7MFP_I2C1_SDA) /*!< Set PI7 function to I2C1_SDA */ +#define SET_I2C1_SMBAL_PB9() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB9MFP_Msk)) | SYS_GPB_MFP2_PB9MFP_I2C1_SMBAL) /*!< Set PB9 function to I2C1_SMBAL */ +#define SET_I2C1_SMBAL_PC7() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC7MFP_Msk)) | SYS_GPC_MFP1_PC7MFP_I2C1_SMBAL) /*!< Set PC7 function to I2C1_SMBAL */ +#define SET_I2C1_SMBAL_PG0() SYS->GPG_MFP0 = ((SYS->GPG_MFP0 & (~SYS_GPG_MFP0_PG0MFP_Msk)) | SYS_GPG_MFP0_PG0MFP_I2C1_SMBAL) /*!< Set PG0 function to I2C1_SMBAL */ +#define SET_I2C1_SMBAL_PH8() SYS->GPH_MFP2 = ((SYS->GPH_MFP2 & (~SYS_GPH_MFP2_PH8MFP_Msk)) | SYS_GPH_MFP2_PH8MFP_I2C1_SMBAL) /*!< Set PH8 function to I2C1_SMBAL */ +#define SET_I2C1_SMBSUS_PB8() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB8MFP_Msk)) | SYS_GPB_MFP2_PB8MFP_I2C1_SMBSUS) /*!< Set PB8 function to I2C1_SMBSUS */ +#define SET_I2C1_SMBSUS_PC6() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC6MFP_Msk)) | SYS_GPC_MFP1_PC6MFP_I2C1_SMBSUS) /*!< Set PC6 function to I2C1_SMBSUS */ +#define SET_I2C1_SMBSUS_PG1() SYS->GPG_MFP0 = ((SYS->GPG_MFP0 & (~SYS_GPG_MFP0_PG1MFP_Msk)) | SYS_GPG_MFP0_PG1MFP_I2C1_SMBSUS) /*!< Set PG1 function to I2C1_SMBSUS */ +#define SET_I2C1_SMBSUS_PH9() SYS->GPH_MFP2 = ((SYS->GPH_MFP2 & (~SYS_GPH_MFP2_PH9MFP_Msk)) | SYS_GPH_MFP2_PH9MFP_I2C1_SMBSUS) /*!< Set PH9 function to I2C1_SMBSUS */ +#define SET_I2C2_SCL_PA1() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA1MFP_Msk)) | SYS_GPA_MFP0_PA1MFP_I2C2_SCL) /*!< Set PA1 function to I2C2_SCL */ +#define SET_I2C2_SCL_PA11() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA11MFP_Msk)) | SYS_GPA_MFP2_PA11MFP_I2C2_SCL) /*!< Set PA11 function to I2C2_SCL */ +#define SET_I2C2_SCL_PA14() SYS->GPA_MFP3 = ((SYS->GPA_MFP3 & (~SYS_GPA_MFP3_PA14MFP_Msk)) | SYS_GPA_MFP3_PA14MFP_I2C2_SCL) /*!< Set PA14 function to I2C2_SCL */ +#define SET_I2C2_SCL_PB13() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB13MFP_Msk)) | SYS_GPB_MFP3_PB13MFP_I2C2_SCL) /*!< Set PB13 function to I2C2_SCL */ +#define SET_I2C2_SCL_PD1() SYS->GPD_MFP0 = ((SYS->GPD_MFP0 & (~SYS_GPD_MFP0_PD1MFP_Msk)) | SYS_GPD_MFP0_PD1MFP_I2C2_SCL) /*!< Set PD1 function to I2C2_SCL */ +#define SET_I2C2_SCL_PD9() SYS->GPD_MFP2 = ((SYS->GPD_MFP2 & (~SYS_GPD_MFP2_PD9MFP_Msk)) | SYS_GPD_MFP2_PD9MFP_I2C2_SCL) /*!< Set PD9 function to I2C2_SCL */ +#define SET_I2C2_SCL_PH8() SYS->GPH_MFP2 = ((SYS->GPH_MFP2 & (~SYS_GPH_MFP2_PH8MFP_Msk)) | SYS_GPH_MFP2_PH8MFP_I2C2_SCL) /*!< Set PH8 function to I2C2_SCL */ +#define SET_I2C2_SDA_PA0() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA0MFP_Msk)) | SYS_GPA_MFP0_PA0MFP_I2C2_SDA) /*!< Set PA0 function to I2C2_SDA */ +#define SET_I2C2_SDA_PA10() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA10MFP_Msk)) | SYS_GPA_MFP2_PA10MFP_I2C2_SDA) /*!< Set PA10 function to I2C2_SDA */ +#define SET_I2C2_SDA_PA15() SYS->GPA_MFP3 = ((SYS->GPA_MFP3 & (~SYS_GPA_MFP3_PA15MFP_Msk)) | SYS_GPA_MFP3_PA15MFP_I2C2_SDA) /*!< Set PA15 function to I2C2_SDA */ +#define SET_I2C2_SDA_PB12() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB12MFP_Msk)) | SYS_GPB_MFP3_PB12MFP_I2C2_SDA) /*!< Set PB12 function to I2C2_SDA */ +#define SET_I2C2_SDA_PD0() SYS->GPD_MFP0 = ((SYS->GPD_MFP0 & (~SYS_GPD_MFP0_PD0MFP_Msk)) | SYS_GPD_MFP0_PD0MFP_I2C2_SDA) /*!< Set PD0 function to I2C2_SDA */ +#define SET_I2C2_SDA_PD8() SYS->GPD_MFP2 = ((SYS->GPD_MFP2 & (~SYS_GPD_MFP2_PD8MFP_Msk)) | SYS_GPD_MFP2_PD8MFP_I2C2_SDA) /*!< Set PD8 function to I2C2_SDA */ +#define SET_I2C2_SDA_PH9() SYS->GPH_MFP2 = ((SYS->GPH_MFP2 & (~SYS_GPH_MFP2_PH9MFP_Msk)) | SYS_GPH_MFP2_PH9MFP_I2C2_SDA) /*!< Set PH9 function to I2C2_SDA */ +#define SET_I2C2_SMBAL_PB15() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB15MFP_Msk)) | SYS_GPB_MFP3_PB15MFP_I2C2_SMBAL) /*!< Set PB15 function to I2C2_SMBAL */ +#define SET_I2C2_SMBAL_PF3() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF3MFP_Msk)) | SYS_GPF_MFP0_PF3MFP_I2C2_SMBAL) /*!< Set PF3 function to I2C2_SMBAL */ +#define SET_I2C2_SMBSUS_PB14() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB14MFP_Msk)) | SYS_GPB_MFP3_PB14MFP_I2C2_SMBSUS) /*!< Set PB14 function to I2C2_SMBSUS */ +#define SET_I2C2_SMBSUS_PF2() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF2MFP_Msk)) | SYS_GPF_MFP0_PF2MFP_I2C2_SMBSUS) /*!< Set PF2 function to I2C2_SMBSUS */ +#define SET_I2C3_SCL_PC3() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC3MFP_Msk)) | SYS_GPC_MFP0_PC3MFP_I2C3_SCL) /*!< Set PC3 function to I2C3_SCL */ +#define SET_I2C3_SCL_PG0() SYS->GPG_MFP0 = ((SYS->GPG_MFP0 & (~SYS_GPG_MFP0_PG0MFP_Msk)) | SYS_GPG_MFP0_PG0MFP_I2C3_SCL) /*!< Set PG0 function to I2C3_SCL */ +#define SET_I2C3_SCL_PG7() SYS->GPG_MFP1 = ((SYS->GPG_MFP1 & (~SYS_GPG_MFP1_PG7MFP_Msk)) | SYS_GPG_MFP1_PG7MFP_I2C3_SCL) /*!< Set PG7 function to I2C3_SCL */ +#define SET_I2C3_SCL_PH0() SYS->GPH_MFP0 = ((SYS->GPH_MFP0 & (~SYS_GPH_MFP0_PH0MFP_Msk)) | SYS_GPH_MFP0_PH0MFP_I2C3_SCL) /*!< Set PH0 function to I2C3_SCL */ +#define SET_I2C3_SCL_PI14() SYS->GPI_MFP3 = ((SYS->GPI_MFP3 & (~SYS_GPI_MFP3_PI14MFP_Msk)) | SYS_GPI_MFP3_PI14MFP_I2C3_SCL) /*!< Set PI14 function to I2C3_SCL */ +#define SET_I2C3_SCL_PJ4() SYS->GPJ_MFP1 = ((SYS->GPJ_MFP1 & (~SYS_GPJ_MFP1_PJ4MFP_Msk)) | SYS_GPJ_MFP1_PJ4MFP_I2C3_SCL) /*!< Set PJ4 function to I2C3_SCL */ +#define SET_I2C3_SDA_PC2() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC2MFP_Msk)) | SYS_GPC_MFP0_PC2MFP_I2C3_SDA) /*!< Set PC2 function to I2C3_SDA */ +#define SET_I2C3_SDA_PG1() SYS->GPG_MFP0 = ((SYS->GPG_MFP0 & (~SYS_GPG_MFP0_PG1MFP_Msk)) | SYS_GPG_MFP0_PG1MFP_I2C3_SDA) /*!< Set PG1 function to I2C3_SDA */ +#define SET_I2C3_SDA_PG8() SYS->GPG_MFP2 = ((SYS->GPG_MFP2 & (~SYS_GPG_MFP2_PG8MFP_Msk)) | SYS_GPG_MFP2_PG8MFP_I2C3_SDA) /*!< Set PG8 function to I2C3_SDA */ +#define SET_I2C3_SDA_PH1() SYS->GPH_MFP0 = ((SYS->GPH_MFP0 & (~SYS_GPH_MFP0_PH1MFP_Msk)) | SYS_GPH_MFP0_PH1MFP_I2C3_SDA) /*!< Set PH1 function to I2C3_SDA */ +#define SET_I2C3_SDA_PI15() SYS->GPI_MFP3 = ((SYS->GPI_MFP3 & (~SYS_GPI_MFP3_PI15MFP_Msk)) | SYS_GPI_MFP3_PI15MFP_I2C3_SDA) /*!< Set PI15 function to I2C3_SDA */ +#define SET_I2C3_SDA_PJ5() SYS->GPJ_MFP1 = ((SYS->GPJ_MFP1 & (~SYS_GPJ_MFP1_PJ5MFP_Msk)) | SYS_GPJ_MFP1_PJ5MFP_I2C3_SDA) /*!< Set PJ5 function to I2C3_SDA */ +#define SET_I2C3_SMBAL_PC5() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC5MFP_Msk)) | SYS_GPC_MFP1_PC5MFP_I2C3_SMBAL) /*!< Set PC5 function to I2C3_SMBAL */ +#define SET_I2C3_SMBAL_PG2() SYS->GPG_MFP0 = ((SYS->GPG_MFP0 & (~SYS_GPG_MFP0_PG2MFP_Msk)) | SYS_GPG_MFP0_PG2MFP_I2C3_SMBAL) /*!< Set PG2 function to I2C3_SMBAL */ +#define SET_I2C3_SMBAL_PG5() SYS->GPG_MFP1 = ((SYS->GPG_MFP1 & (~SYS_GPG_MFP1_PG5MFP_Msk)) | SYS_GPG_MFP1_PG5MFP_I2C3_SMBAL) /*!< Set PG5 function to I2C3_SMBAL */ +#define SET_I2C3_SMBAL_PI12() SYS->GPI_MFP3 = ((SYS->GPI_MFP3 & (~SYS_GPI_MFP3_PI12MFP_Msk)) | SYS_GPI_MFP3_PI12MFP_I2C3_SMBAL) /*!< Set PI12 function to I2C3_SMBAL */ +#define SET_I2C3_SMBAL_PJ2() SYS->GPJ_MFP0 = ((SYS->GPJ_MFP0 & (~SYS_GPJ_MFP0_PJ2MFP_Msk)) | SYS_GPJ_MFP0_PJ2MFP_I2C3_SMBAL) /*!< Set PJ2 function to I2C3_SMBAL */ +#define SET_I2C3_SMBSUS_PC4() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC4MFP_Msk)) | SYS_GPC_MFP1_PC4MFP_I2C3_SMBSUS) /*!< Set PC4 function to I2C3_SMBSUS */ +#define SET_I2C3_SMBSUS_PG3() SYS->GPG_MFP0 = ((SYS->GPG_MFP0 & (~SYS_GPG_MFP0_PG3MFP_Msk)) | SYS_GPG_MFP0_PG3MFP_I2C3_SMBSUS) /*!< Set PG3 function to I2C3_SMBSUS */ +#define SET_I2C3_SMBSUS_PG6() SYS->GPG_MFP1 = ((SYS->GPG_MFP1 & (~SYS_GPG_MFP1_PG6MFP_Msk)) | SYS_GPG_MFP1_PG6MFP_I2C3_SMBSUS) /*!< Set PG6 function to I2C3_SMBSUS */ +#define SET_I2C3_SMBSUS_PI13() SYS->GPI_MFP3 = ((SYS->GPI_MFP3 & (~SYS_GPI_MFP3_PI13MFP_Msk)) | SYS_GPI_MFP3_PI13MFP_I2C3_SMBSUS) /*!< Set PI13 function to I2C3_SMBSUS */ +#define SET_I2C3_SMBSUS_PJ3() SYS->GPJ_MFP0 = ((SYS->GPJ_MFP0 & (~SYS_GPJ_MFP0_PJ3MFP_Msk)) | SYS_GPJ_MFP0_PJ3MFP_I2C3_SMBSUS) /*!< Set PJ3 function to I2C3_SMBSUS */ +#define SET_I2S0_BCLK_PA12() SYS->GPA_MFP3 = ((SYS->GPA_MFP3 & (~SYS_GPA_MFP3_PA12MFP_Msk)) | SYS_GPA_MFP3_PA12MFP_I2S0_BCLK) /*!< Set PA12 function to I2S0_BCLK */ +#define SET_I2S0_BCLK_PB5() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB5MFP_Msk)) | SYS_GPB_MFP1_PB5MFP_I2S0_BCLK) /*!< Set PB5 function to I2S0_BCLK */ +#define SET_I2S0_BCLK_PC4() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC4MFP_Msk)) | SYS_GPC_MFP1_PC4MFP_I2S0_BCLK) /*!< Set PC4 function to I2S0_BCLK */ +#define SET_I2S0_BCLK_PE1() SYS->GPE_MFP0 = ((SYS->GPE_MFP0 & (~SYS_GPE_MFP0_PE1MFP_Msk)) | SYS_GPE_MFP0_PE1MFP_I2S0_BCLK) /*!< Set PE1 function to I2S0_BCLK */ +#define SET_I2S0_BCLK_PE3() SYS->GPE_MFP0 = ((SYS->GPE_MFP0 & (~SYS_GPE_MFP0_PE3MFP_Msk)) | SYS_GPE_MFP0_PE3MFP_I2S0_BCLK) /*!< Set PE3 function to I2S0_BCLK */ +#define SET_I2S0_BCLK_PE8() SYS->GPE_MFP2 = ((SYS->GPE_MFP2 & (~SYS_GPE_MFP2_PE8MFP_Msk)) | SYS_GPE_MFP2_PE8MFP_I2S0_BCLK) /*!< Set PE8 function to I2S0_BCLK */ +#define SET_I2S0_BCLK_PF10() SYS->GPF_MFP2 = ((SYS->GPF_MFP2 & (~SYS_GPF_MFP2_PF10MFP_Msk)) | SYS_GPF_MFP2_PF10MFP_I2S0_BCLK) /*!< Set PF10 function to I2S0_BCLK */ +#define SET_I2S0_BCLK_PI6() SYS->GPI_MFP1 = ((SYS->GPI_MFP1 & (~SYS_GPI_MFP1_PI6MFP_Msk)) | SYS_GPI_MFP1_PI6MFP_I2S0_BCLK) /*!< Set PI6 function to I2S0_BCLK */ +#define SET_I2S0_DI_PA14() SYS->GPA_MFP3 = ((SYS->GPA_MFP3 & (~SYS_GPA_MFP3_PA14MFP_Msk)) | SYS_GPA_MFP3_PA14MFP_I2S0_DI) /*!< Set PA14 function to I2S0_DI */ +#define SET_I2S0_DI_PB3() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB3MFP_Msk)) | SYS_GPB_MFP0_PB3MFP_I2S0_DI) /*!< Set PB3 function to I2S0_DI */ +#define SET_I2S0_DI_PC2() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC2MFP_Msk)) | SYS_GPC_MFP0_PC2MFP_I2S0_DI) /*!< Set PC2 function to I2S0_DI */ +#define SET_I2S0_DI_PE10() SYS->GPE_MFP2 = ((SYS->GPE_MFP2 & (~SYS_GPE_MFP2_PE10MFP_Msk)) | SYS_GPE_MFP2_PE10MFP_I2S0_DI) /*!< Set PE10 function to I2S0_DI */ +#define SET_I2S0_DI_PF8() SYS->GPF_MFP2 = ((SYS->GPF_MFP2 & (~SYS_GPF_MFP2_PF8MFP_Msk)) | SYS_GPF_MFP2_PF8MFP_I2S0_DI) /*!< Set PF8 function to I2S0_DI */ +#define SET_I2S0_DI_PH8() SYS->GPH_MFP2 = ((SYS->GPH_MFP2 & (~SYS_GPH_MFP2_PH8MFP_Msk)) | SYS_GPH_MFP2_PH8MFP_I2S0_DI) /*!< Set PH8 function to I2S0_DI */ +#define SET_I2S0_DI_PI8() SYS->GPI_MFP2 = ((SYS->GPI_MFP2 & (~SYS_GPI_MFP2_PI8MFP_Msk)) | SYS_GPI_MFP2_PI8MFP_I2S0_DI) /*!< Set PI8 function to I2S0_DI */ +#define SET_I2S0_DO_PA15() SYS->GPA_MFP3 = ((SYS->GPA_MFP3 & (~SYS_GPA_MFP3_PA15MFP_Msk)) | SYS_GPA_MFP3_PA15MFP_I2S0_DO) /*!< Set PA15 function to I2S0_DO */ +#define SET_I2S0_DO_PB2() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB2MFP_Msk)) | SYS_GPB_MFP0_PB2MFP_I2S0_DO) /*!< Set PB2 function to I2S0_DO */ +#define SET_I2S0_DO_PC1() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC1MFP_Msk)) | SYS_GPC_MFP0_PC1MFP_I2S0_DO) /*!< Set PC1 function to I2S0_DO */ +#define SET_I2S0_DO_PE11() SYS->GPE_MFP2 = ((SYS->GPE_MFP2 & (~SYS_GPE_MFP2_PE11MFP_Msk)) | SYS_GPE_MFP2_PE11MFP_I2S0_DO) /*!< Set PE11 function to I2S0_DO */ +#define SET_I2S0_DO_PF0() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF0MFP_Msk)) | SYS_GPF_MFP0_PF0MFP_I2S0_DO) /*!< Set PF0 function to I2S0_DO */ +#define SET_I2S0_DO_PF7() SYS->GPF_MFP1 = ((SYS->GPF_MFP1 & (~SYS_GPF_MFP1_PF7MFP_Msk)) | SYS_GPF_MFP1_PF7MFP_I2S0_DO) /*!< Set PF7 function to I2S0_DO */ +#define SET_I2S0_DO_PH9() SYS->GPH_MFP2 = ((SYS->GPH_MFP2 & (~SYS_GPH_MFP2_PH9MFP_Msk)) | SYS_GPH_MFP2_PH9MFP_I2S0_DO) /*!< Set PH9 function to I2S0_DO */ +#define SET_I2S0_DO_PI9() SYS->GPI_MFP2 = ((SYS->GPI_MFP2 & (~SYS_GPI_MFP2_PI9MFP_Msk)) | SYS_GPI_MFP2_PI9MFP_I2S0_DO) /*!< Set PI9 function to I2S0_DO */ +#define SET_I2S0_LRCK_PB1() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB1MFP_Msk)) | SYS_GPB_MFP0_PB1MFP_I2S0_LRCK) /*!< Set PB1 function to I2S0_LRCK */ +#define SET_I2S0_LRCK_PC0() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC0MFP_Msk)) | SYS_GPC_MFP0_PC0MFP_I2S0_LRCK) /*!< Set PC0 function to I2S0_LRCK */ +#define SET_I2S0_LRCK_PE12() SYS->GPE_MFP3 = ((SYS->GPE_MFP3 & (~SYS_GPE_MFP3_PE12MFP_Msk)) | SYS_GPE_MFP3_PE12MFP_I2S0_LRCK) /*!< Set PE12 function to I2S0_LRCK */ +#define SET_I2S0_LRCK_PF1() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF1MFP_Msk)) | SYS_GPF_MFP0_PF1MFP_I2S0_LRCK) /*!< Set PF1 function to I2S0_LRCK */ +#define SET_I2S0_LRCK_PF6() SYS->GPF_MFP1 = ((SYS->GPF_MFP1 & (~SYS_GPF_MFP1_PF6MFP_Msk)) | SYS_GPF_MFP1_PF6MFP_I2S0_LRCK) /*!< Set PF6 function to I2S0_LRCK */ +#define SET_I2S0_LRCK_PH10() SYS->GPH_MFP2 = ((SYS->GPH_MFP2 & (~SYS_GPH_MFP2_PH10MFP_Msk)) | SYS_GPH_MFP2_PH10MFP_I2S0_LRCK) /*!< Set PH10 function to I2S0_LRCK */ +#define SET_I2S0_LRCK_PI10() SYS->GPI_MFP2 = ((SYS->GPI_MFP2 & (~SYS_GPI_MFP2_PI10MFP_Msk)) | SYS_GPI_MFP2_PI10MFP_I2S0_LRCK) /*!< Set PI10 function to I2S0_LRCK */ +#define SET_I2S0_MCLK_PA13() SYS->GPA_MFP3 = ((SYS->GPA_MFP3 & (~SYS_GPA_MFP3_PA13MFP_Msk)) | SYS_GPA_MFP3_PA13MFP_I2S0_MCLK) /*!< Set PA13 function to I2S0_MCLK */ +#define SET_I2S0_MCLK_PB4() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB4MFP_Msk)) | SYS_GPB_MFP1_PB4MFP_I2S0_MCLK) /*!< Set PB4 function to I2S0_MCLK */ +#define SET_I2S0_MCLK_PC3() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC3MFP_Msk)) | SYS_GPC_MFP0_PC3MFP_I2S0_MCLK) /*!< Set PC3 function to I2S0_MCLK */ +#define SET_I2S0_MCLK_PE0() SYS->GPE_MFP0 = ((SYS->GPE_MFP0 & (~SYS_GPE_MFP0_PE0MFP_Msk)) | SYS_GPE_MFP0_PE0MFP_I2S0_MCLK) /*!< Set PE0 function to I2S0_MCLK */ +#define SET_I2S0_MCLK_PE2() SYS->GPE_MFP0 = ((SYS->GPE_MFP0 & (~SYS_GPE_MFP0_PE2MFP_Msk)) | SYS_GPE_MFP0_PE2MFP_I2S0_MCLK) /*!< Set PE2 function to I2S0_MCLK */ +#define SET_I2S0_MCLK_PE9() SYS->GPE_MFP2 = ((SYS->GPE_MFP2 & (~SYS_GPE_MFP2_PE9MFP_Msk)) | SYS_GPE_MFP2_PE9MFP_I2S0_MCLK) /*!< Set PE9 function to I2S0_MCLK */ +#define SET_I2S0_MCLK_PF9() SYS->GPF_MFP2 = ((SYS->GPF_MFP2 & (~SYS_GPF_MFP2_PF9MFP_Msk)) | SYS_GPF_MFP2_PF9MFP_I2S0_MCLK) /*!< Set PF9 function to I2S0_MCLK */ +#define SET_I2S0_MCLK_PI7() SYS->GPI_MFP1 = ((SYS->GPI_MFP1 & (~SYS_GPI_MFP1_PI7MFP_Msk)) | SYS_GPI_MFP1_PI7MFP_I2S0_MCLK) /*!< Set PI7 function to I2S0_MCLK */ +#define SET_I2S1_BCLK_PA11() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA11MFP_Msk)) | SYS_GPA_MFP2_PA11MFP_I2S1_BCLK) /*!< Set PA11 function to I2S1_BCLK */ +#define SET_I2S1_BCLK_PD14() SYS->GPD_MFP3 = ((SYS->GPD_MFP3 & (~SYS_GPD_MFP3_PD14MFP_Msk)) | SYS_GPD_MFP3_PD14MFP_I2S1_BCLK) /*!< Set PD14 function to I2S1_BCLK */ +#define SET_I2S1_BCLK_PD3() SYS->GPD_MFP0 = ((SYS->GPD_MFP0 & (~SYS_GPD_MFP0_PD3MFP_Msk)) | SYS_GPD_MFP0_PD3MFP_I2S1_BCLK) /*!< Set PD3 function to I2S1_BCLK */ +#define SET_I2S1_BCLK_PH7() SYS->GPH_MFP1 = ((SYS->GPH_MFP1 & (~SYS_GPH_MFP1_PH7MFP_Msk)) | SYS_GPH_MFP1_PH7MFP_I2S1_BCLK) /*!< Set PH7 function to I2S1_BCLK */ +#define SET_I2S1_DI_PA9() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA9MFP_Msk)) | SYS_GPA_MFP2_PA9MFP_I2S1_DI) /*!< Set PA9 function to I2S1_DI */ +#define SET_I2S1_DI_PD1() SYS->GPD_MFP0 = ((SYS->GPD_MFP0 & (~SYS_GPD_MFP0_PD1MFP_Msk)) | SYS_GPD_MFP0_PD1MFP_I2S1_DI) /*!< Set PD1 function to I2S1_DI */ +#define SET_I2S1_DI_PG6() SYS->GPG_MFP1 = ((SYS->GPG_MFP1 & (~SYS_GPG_MFP1_PG6MFP_Msk)) | SYS_GPG_MFP1_PG6MFP_I2S1_DI) /*!< Set PG6 function to I2S1_DI */ +#define SET_I2S1_DO_PA8() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA8MFP_Msk)) | SYS_GPA_MFP2_PA8MFP_I2S1_DO) /*!< Set PA8 function to I2S1_DO */ +#define SET_I2S1_DO_PD0() SYS->GPD_MFP0 = ((SYS->GPD_MFP0 & (~SYS_GPD_MFP0_PD0MFP_Msk)) | SYS_GPD_MFP0_PD0MFP_I2S1_DO) /*!< Set PD0 function to I2S1_DO */ +#define SET_I2S1_DO_PG0() SYS->GPG_MFP0 = ((SYS->GPG_MFP0 & (~SYS_GPG_MFP0_PG0MFP_Msk)) | SYS_GPG_MFP0_PG0MFP_I2S1_DO) /*!< Set PG0 function to I2S1_DO */ +#define SET_I2S1_DO_PG7() SYS->GPG_MFP1 = ((SYS->GPG_MFP1 & (~SYS_GPG_MFP1_PG7MFP_Msk)) | SYS_GPG_MFP1_PG7MFP_I2S1_DO) /*!< Set PG7 function to I2S1_DO */ +#define SET_I2S1_LRCK_PB0() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB0MFP_Msk)) | SYS_GPB_MFP0_PB0MFP_I2S1_LRCK) /*!< Set PB0 function to I2S1_LRCK */ +#define SET_I2S1_LRCK_PD13() SYS->GPD_MFP3 = ((SYS->GPD_MFP3 & (~SYS_GPD_MFP3_PD13MFP_Msk)) | SYS_GPD_MFP3_PD13MFP_I2S1_LRCK) /*!< Set PD13 function to I2S1_LRCK */ +#define SET_I2S1_LRCK_PG1() SYS->GPG_MFP0 = ((SYS->GPG_MFP0 & (~SYS_GPG_MFP0_PG1MFP_Msk)) | SYS_GPG_MFP0_PG1MFP_I2S1_LRCK) /*!< Set PG1 function to I2S1_LRCK */ +#define SET_I2S1_LRCK_PG8() SYS->GPG_MFP2 = ((SYS->GPG_MFP2 & (~SYS_GPG_MFP2_PG8MFP_Msk)) | SYS_GPG_MFP2_PG8MFP_I2S1_LRCK) /*!< Set PG8 function to I2S1_LRCK */ +#define SET_I2S1_MCLK_PA10() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA10MFP_Msk)) | SYS_GPA_MFP2_PA10MFP_I2S1_MCLK) /*!< Set PA10 function to I2S1_MCLK */ +#define SET_I2S1_MCLK_PD2() SYS->GPD_MFP0 = ((SYS->GPD_MFP0 & (~SYS_GPD_MFP0_PD2MFP_Msk)) | SYS_GPD_MFP0_PD2MFP_I2S1_MCLK) /*!< Set PD2 function to I2S1_MCLK */ +#define SET_I2S1_MCLK_PG5() SYS->GPG_MFP1 = ((SYS->GPG_MFP1 & (~SYS_GPG_MFP1_PG5MFP_Msk)) | SYS_GPG_MFP1_PG5MFP_I2S1_MCLK) /*!< Set PG5 function to I2S1_MCLK */ +#define SET_I3C0_PUPEN_PA2() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA2MFP_Msk)) | SYS_GPA_MFP0_PA2MFP_I3C0_PUPEN) /*!< Set PA2 function to I3C0_PUPEN */ +#define SET_I3C0_PUPEN_PC5() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC5MFP_Msk)) | SYS_GPC_MFP1_PC5MFP_I3C0_PUPEN) /*!< Set PC5 function to I3C0_PUPEN */ +#define SET_I3C0_PUPEN_PC9() SYS->GPC_MFP2 = ((SYS->GPC_MFP2 & (~SYS_GPC_MFP2_PC9MFP_Msk)) | SYS_GPC_MFP2_PC9MFP_I3C0_PUPEN) /*!< Set PC9 function to I3C0_PUPEN */ +#define SET_I3C0_PUPEN_PH10() SYS->GPH_MFP2 = ((SYS->GPH_MFP2 & (~SYS_GPH_MFP2_PH10MFP_Msk)) | SYS_GPH_MFP2_PH10MFP_I3C0_PUPEN) /*!< Set PH10 function to I3C0_PUPEN */ +#define SET_I3C0_SCL_PA1() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA1MFP_Msk)) | SYS_GPA_MFP0_PA1MFP_I3C0_SCL) /*!< Set PA1 function to I3C0_SCL */ +#define SET_I3C0_SCL_PA5() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA5MFP_Msk)) | SYS_GPA_MFP1_PA5MFP_I3C0_SCL) /*!< Set PA5 function to I3C0_SCL */ +#define SET_I3C0_SCL_PB1() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB1MFP_Msk)) | SYS_GPB_MFP0_PB1MFP_I3C0_SCL) /*!< Set PB1 function to I3C0_SCL */ +#define SET_I3C0_SCL_PF0() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF0MFP_Msk)) | SYS_GPF_MFP0_PF0MFP_I3C0_SCL) /*!< Set PF0 function to I3C0_SCL */ +#define SET_I3C0_SCL_PH8() SYS->GPH_MFP2 = ((SYS->GPH_MFP2 & (~SYS_GPH_MFP2_PH8MFP_Msk)) | SYS_GPH_MFP2_PH8MFP_I3C0_SCL) /*!< Set PH8 function to I3C0_SCL */ +#define SET_I3C0_SDA_PA0() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA0MFP_Msk)) | SYS_GPA_MFP0_PA0MFP_I3C0_SDA) /*!< Set PA0 function to I3C0_SDA */ +#define SET_I3C0_SDA_PA4() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA4MFP_Msk)) | SYS_GPA_MFP1_PA4MFP_I3C0_SDA) /*!< Set PA4 function to I3C0_SDA */ +#define SET_I3C0_SDA_PB0() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB0MFP_Msk)) | SYS_GPB_MFP0_PB0MFP_I3C0_SDA) /*!< Set PB0 function to I3C0_SDA */ +#define SET_I3C0_SDA_PF1() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF1MFP_Msk)) | SYS_GPF_MFP0_PF1MFP_I3C0_SDA) /*!< Set PF1 function to I3C0_SDA */ +#define SET_I3C0_SDA_PH9() SYS->GPH_MFP2 = ((SYS->GPH_MFP2 & (~SYS_GPH_MFP2_PH9MFP_Msk)) | SYS_GPH_MFP2_PH9MFP_I3C0_SDA) /*!< Set PH9 function to I3C0_SDA */ +#define SET_ICE_CLK_PF1() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF1MFP_Msk)) | SYS_GPF_MFP0_PF1MFP_ICE_CLK) /*!< Set PF1 function to ICE_CLK */ +#define SET_ICE_DAT_PF0() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF0MFP_Msk)) | SYS_GPF_MFP0_PF0MFP_ICE_DAT) /*!< Set PF0 function to ICE_DAT */ +#define SET_INT0_PA6() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA6MFP_Msk)) | SYS_GPA_MFP1_PA6MFP_INT0) /*!< Set PA6 function to INT0 */ +#define SET_INT0_PB5() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB5MFP_Msk)) | SYS_GPB_MFP1_PB5MFP_INT0) /*!< Set PB5 function to INT0 */ +#define SET_INT1_PA7() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA7MFP_Msk)) | SYS_GPA_MFP1_PA7MFP_INT1) /*!< Set PA7 function to INT1 */ +#define SET_INT1_PB4() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB4MFP_Msk)) | SYS_GPB_MFP1_PB4MFP_INT1) /*!< Set PB4 function to INT1 */ +#define SET_INT2_PB3() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB3MFP_Msk)) | SYS_GPB_MFP0_PB3MFP_INT2) /*!< Set PB3 function to INT2 */ +#define SET_INT2_PC6() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC6MFP_Msk)) | SYS_GPC_MFP1_PC6MFP_INT2) /*!< Set PC6 function to INT2 */ +#define SET_INT3_PB2() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB2MFP_Msk)) | SYS_GPB_MFP0_PB2MFP_INT3) /*!< Set PB2 function to INT3 */ +#define SET_INT3_PC7() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC7MFP_Msk)) | SYS_GPC_MFP1_PC7MFP_INT3) /*!< Set PC7 function to INT3 */ +#define SET_INT4_PA8() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA8MFP_Msk)) | SYS_GPA_MFP2_PA8MFP_INT4) /*!< Set PA8 function to INT4 */ +#define SET_INT4_PB6() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB6MFP_Msk)) | SYS_GPB_MFP1_PB6MFP_INT4) /*!< Set PB6 function to INT4 */ +#define SET_INT5_PB7() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB7MFP_Msk)) | SYS_GPB_MFP1_PB7MFP_INT5) /*!< Set PB7 function to INT5 */ +#define SET_INT5_PD12() SYS->GPD_MFP3 = ((SYS->GPD_MFP3 & (~SYS_GPD_MFP3_PD12MFP_Msk)) | SYS_GPD_MFP3_PD12MFP_INT5) /*!< Set PD12 function to INT5 */ +#define SET_INT6_PB8() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB8MFP_Msk)) | SYS_GPB_MFP2_PB8MFP_INT6) /*!< Set PB8 function to INT6 */ +#define SET_INT6_PD11() SYS->GPD_MFP2 = ((SYS->GPD_MFP2 & (~SYS_GPD_MFP2_PD11MFP_Msk)) | SYS_GPD_MFP2_PD11MFP_INT6) /*!< Set PD11 function to INT6 */ +#define SET_INT7_PB9() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB9MFP_Msk)) | SYS_GPB_MFP2_PB9MFP_INT7) /*!< Set PB9 function to INT7 */ +#define SET_INT7_PD10() SYS->GPD_MFP2 = ((SYS->GPD_MFP2 & (~SYS_GPD_MFP2_PD10MFP_Msk)) | SYS_GPD_MFP2_PD10MFP_INT7) /*!< Set PD10 function to INT7 */ +#define SET_KPI_COL0_PA6() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA6MFP_Msk)) | SYS_GPA_MFP1_PA6MFP_KPI_COL0) /*!< Set PA6 function to KPI_COL0 */ +#define SET_KPI_COL0_PB15() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB15MFP_Msk)) | SYS_GPB_MFP3_PB15MFP_KPI_COL0) /*!< Set PB15 function to KPI_COL0 */ +#define SET_KPI_COL0_PF5() SYS->GPF_MFP1 = ((SYS->GPF_MFP1 & (~SYS_GPF_MFP1_PF5MFP_Msk)) | SYS_GPF_MFP1_PF5MFP_KPI_COL0) /*!< Set PF5 function to KPI_COL0 */ +#define SET_KPI_COL1_PA7() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA7MFP_Msk)) | SYS_GPA_MFP1_PA7MFP_KPI_COL1) /*!< Set PA7 function to KPI_COL1 */ +#define SET_KPI_COL1_PB14() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB14MFP_Msk)) | SYS_GPB_MFP3_PB14MFP_KPI_COL1) /*!< Set PB14 function to KPI_COL1 */ +#define SET_KPI_COL1_PF4() SYS->GPF_MFP1 = ((SYS->GPF_MFP1 & (~SYS_GPF_MFP1_PF4MFP_Msk)) | SYS_GPF_MFP1_PF4MFP_KPI_COL1) /*!< Set PF4 function to KPI_COL1 */ +#define SET_KPI_COL2_PB13() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB13MFP_Msk)) | SYS_GPB_MFP3_PB13MFP_KPI_COL2) /*!< Set PB13 function to KPI_COL2 */ +#define SET_KPI_COL2_PC6() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC6MFP_Msk)) | SYS_GPC_MFP1_PC6MFP_KPI_COL2) /*!< Set PC6 function to KPI_COL2 */ +#define SET_KPI_COL3_PB12() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB12MFP_Msk)) | SYS_GPB_MFP3_PB12MFP_KPI_COL3) /*!< Set PB12 function to KPI_COL3 */ +#define SET_KPI_COL3_PC7() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC7MFP_Msk)) | SYS_GPC_MFP1_PC7MFP_KPI_COL3) /*!< Set PC7 function to KPI_COL3 */ +#define SET_KPI_COL4_PB7() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB7MFP_Msk)) | SYS_GPB_MFP1_PB7MFP_KPI_COL4) /*!< Set PB7 function to KPI_COL4 */ +#define SET_KPI_COL4_PC8() SYS->GPC_MFP2 = ((SYS->GPC_MFP2 & (~SYS_GPC_MFP2_PC8MFP_Msk)) | SYS_GPC_MFP2_PC8MFP_KPI_COL4) /*!< Set PC8 function to KPI_COL4 */ +#define SET_KPI_COL5_PB6() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB6MFP_Msk)) | SYS_GPB_MFP1_PB6MFP_KPI_COL5) /*!< Set PB6 function to KPI_COL5 */ +#define SET_KPI_COL5_PE13() SYS->GPE_MFP3 = ((SYS->GPE_MFP3 & (~SYS_GPE_MFP3_PE13MFP_Msk)) | SYS_GPE_MFP3_PE13MFP_KPI_COL5) /*!< Set PE13 function to KPI_COL5 */ +#define SET_KPI_COL6_PB5() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB5MFP_Msk)) | SYS_GPB_MFP1_PB5MFP_KPI_COL6) /*!< Set PB5 function to KPI_COL6 */ +#define SET_KPI_COL6_PE12() SYS->GPE_MFP3 = ((SYS->GPE_MFP3 & (~SYS_GPE_MFP3_PE12MFP_Msk)) | SYS_GPE_MFP3_PE12MFP_KPI_COL6) /*!< Set PE12 function to KPI_COL6 */ +#define SET_KPI_COL7_PB4() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB4MFP_Msk)) | SYS_GPB_MFP1_PB4MFP_KPI_COL7) /*!< Set PB4 function to KPI_COL7 */ +#define SET_KPI_COL7_PE11() SYS->GPE_MFP2 = ((SYS->GPE_MFP2 & (~SYS_GPE_MFP2_PE11MFP_Msk)) | SYS_GPE_MFP2_PE11MFP_KPI_COL7) /*!< Set PE11 function to KPI_COL7 */ +#define SET_KPI_ROW0_PB3() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB3MFP_Msk)) | SYS_GPB_MFP0_PB3MFP_KPI_ROW0) /*!< Set PB3 function to KPI_ROW0 */ +#define SET_KPI_ROW0_PC5() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC5MFP_Msk)) | SYS_GPC_MFP1_PC5MFP_KPI_ROW0) /*!< Set PC5 function to KPI_ROW0 */ +#define SET_KPI_ROW1_PB2() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB2MFP_Msk)) | SYS_GPB_MFP0_PB2MFP_KPI_ROW1) /*!< Set PB2 function to KPI_ROW1 */ +#define SET_KPI_ROW1_PC4() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC4MFP_Msk)) | SYS_GPC_MFP1_PC4MFP_KPI_ROW1) /*!< Set PC4 function to KPI_ROW1 */ +#define SET_KPI_ROW2_PB1() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB1MFP_Msk)) | SYS_GPB_MFP0_PB1MFP_KPI_ROW2) /*!< Set PB1 function to KPI_ROW2 */ +#define SET_KPI_ROW2_PC3() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC3MFP_Msk)) | SYS_GPC_MFP0_PC3MFP_KPI_ROW2) /*!< Set PC3 function to KPI_ROW2 */ +#define SET_KPI_ROW3_PB0() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB0MFP_Msk)) | SYS_GPB_MFP0_PB0MFP_KPI_ROW3) /*!< Set PB0 function to KPI_ROW3 */ +#define SET_KPI_ROW3_PC2() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC2MFP_Msk)) | SYS_GPC_MFP0_PC2MFP_KPI_ROW3) /*!< Set PC2 function to KPI_ROW3 */ +#define SET_KPI_ROW4_PA11() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA11MFP_Msk)) | SYS_GPA_MFP2_PA11MFP_KPI_ROW4) /*!< Set PA11 function to KPI_ROW4 */ +#define SET_KPI_ROW4_PC1() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC1MFP_Msk)) | SYS_GPC_MFP0_PC1MFP_KPI_ROW4) /*!< Set PC1 function to KPI_ROW4 */ +#define SET_KPI_ROW5_PA10() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA10MFP_Msk)) | SYS_GPA_MFP2_PA10MFP_KPI_ROW5) /*!< Set PA10 function to KPI_ROW5 */ +#define SET_KPI_ROW5_PC0() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC0MFP_Msk)) | SYS_GPC_MFP0_PC0MFP_KPI_ROW5) /*!< Set PC0 function to KPI_ROW5 */ +#define SET_LPADC0_CH0_PB0() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB0MFP_Msk)) | SYS_GPB_MFP0_PB0MFP_LPADC0_CH0) /*!< Set PB0 function to LPADC0_CH0 */ +#define SET_LPADC0_CH10_PB10() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB10MFP_Msk)) | SYS_GPB_MFP2_PB10MFP_LPADC0_CH10) /*!< Set PB10 function to LPADC0_CH10 */ +#define SET_LPADC0_CH11_PB11() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB11MFP_Msk)) | SYS_GPB_MFP2_PB11MFP_LPADC0_CH11) /*!< Set PB11 function to LPADC0_CH11 */ +#define SET_LPADC0_CH12_PB12() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB12MFP_Msk)) | SYS_GPB_MFP3_PB12MFP_LPADC0_CH12) /*!< Set PB12 function to LPADC0_CH12 */ +#define SET_LPADC0_CH13_PB13() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB13MFP_Msk)) | SYS_GPB_MFP3_PB13MFP_LPADC0_CH13) /*!< Set PB13 function to LPADC0_CH13 */ +#define SET_LPADC0_CH14_PB14() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB14MFP_Msk)) | SYS_GPB_MFP3_PB14MFP_LPADC0_CH14) /*!< Set PB14 function to LPADC0_CH14 */ +#define SET_LPADC0_CH15_PB15() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB15MFP_Msk)) | SYS_GPB_MFP3_PB15MFP_LPADC0_CH15) /*!< Set PB15 function to LPADC0_CH15 */ +#define SET_LPADC0_CH16_PD10() SYS->GPD_MFP2 = ((SYS->GPD_MFP2 & (~SYS_GPD_MFP2_PD10MFP_Msk)) | SYS_GPD_MFP2_PD10MFP_LPADC0_CH16) /*!< Set PD10 function to LPADC0_CH16 */ +#define SET_LPADC0_CH17_PD11() SYS->GPD_MFP2 = ((SYS->GPD_MFP2 & (~SYS_GPD_MFP2_PD11MFP_Msk)) | SYS_GPD_MFP2_PD11MFP_LPADC0_CH17) /*!< Set PD11 function to LPADC0_CH17 */ +#define SET_LPADC0_CH18_PD12() SYS->GPD_MFP3 = ((SYS->GPD_MFP3 & (~SYS_GPD_MFP3_PD12MFP_Msk)) | SYS_GPD_MFP3_PD12MFP_LPADC0_CH18) /*!< Set PD12 function to LPADC0_CH18 */ +#define SET_LPADC0_CH19_PC13() SYS->GPC_MFP3 = ((SYS->GPC_MFP3 & (~SYS_GPC_MFP3_PC13MFP_Msk)) | SYS_GPC_MFP3_PC13MFP_LPADC0_CH19) /*!< Set PC13 function to LPADC0_CH19 */ +#define SET_LPADC0_CH1_PB1() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB1MFP_Msk)) | SYS_GPB_MFP0_PB1MFP_LPADC0_CH1) /*!< Set PB1 function to LPADC0_CH1 */ +#define SET_LPADC0_CH20_PA8() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA8MFP_Msk)) | SYS_GPA_MFP2_PA8MFP_LPADC0_CH20) /*!< Set PA8 function to LPADC0_CH20 */ +#define SET_LPADC0_CH21_PA9() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA9MFP_Msk)) | SYS_GPA_MFP2_PA9MFP_LPADC0_CH21) /*!< Set PA9 function to LPADC0_CH21 */ +#define SET_LPADC0_CH22_PA10() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA10MFP_Msk)) | SYS_GPA_MFP2_PA10MFP_LPADC0_CH22) /*!< Set PA10 function to LPADC0_CH22 */ +#define SET_LPADC0_CH23_PA11() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA11MFP_Msk)) | SYS_GPA_MFP2_PA11MFP_LPADC0_CH23) /*!< Set PA11 function to LPADC0_CH23 */ +#define SET_LPADC0_CH2_PB2() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB2MFP_Msk)) | SYS_GPB_MFP0_PB2MFP_LPADC0_CH2) /*!< Set PB2 function to LPADC0_CH2 */ +#define SET_LPADC0_CH3_PB3() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB3MFP_Msk)) | SYS_GPB_MFP0_PB3MFP_LPADC0_CH3) /*!< Set PB3 function to LPADC0_CH3 */ +#define SET_LPADC0_CH4_PB4() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB4MFP_Msk)) | SYS_GPB_MFP1_PB4MFP_LPADC0_CH4) /*!< Set PB4 function to LPADC0_CH4 */ +#define SET_LPADC0_CH5_PB5() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB5MFP_Msk)) | SYS_GPB_MFP1_PB5MFP_LPADC0_CH5) /*!< Set PB5 function to LPADC0_CH5 */ +#define SET_LPADC0_CH6_PB6() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB6MFP_Msk)) | SYS_GPB_MFP1_PB6MFP_LPADC0_CH6) /*!< Set PB6 function to LPADC0_CH6 */ +#define SET_LPADC0_CH7_PB7() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB7MFP_Msk)) | SYS_GPB_MFP1_PB7MFP_LPADC0_CH7) /*!< Set PB7 function to LPADC0_CH7 */ +#define SET_LPADC0_CH8_PB8() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB8MFP_Msk)) | SYS_GPB_MFP2_PB8MFP_LPADC0_CH8) /*!< Set PB8 function to LPADC0_CH8 */ +#define SET_LPADC0_CH9_PB9() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB9MFP_Msk)) | SYS_GPB_MFP2_PB9MFP_LPADC0_CH9) /*!< Set PB9 function to LPADC0_CH9 */ +#define SET_LPADC0_ST_PC1() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC1MFP_Msk)) | SYS_GPC_MFP0_PC1MFP_LPADC0_ST) /*!< Set PC1 function to LPADC0_ST */ +#define SET_LPADC0_ST_PC13() SYS->GPC_MFP3 = ((SYS->GPC_MFP3 & (~SYS_GPC_MFP3_PC13MFP_Msk)) | SYS_GPC_MFP3_PC13MFP_LPADC0_ST) /*!< Set PC13 function to LPADC0_ST */ +#define SET_LPADC0_ST_PD12() SYS->GPD_MFP3 = ((SYS->GPD_MFP3 & (~SYS_GPD_MFP3_PD12MFP_Msk)) | SYS_GPD_MFP3_PD12MFP_LPADC0_ST) /*!< Set PD12 function to LPADC0_ST */ +#define SET_LPADC0_ST_PD13() SYS->GPD_MFP3 = ((SYS->GPD_MFP3 & (~SYS_GPD_MFP3_PD13MFP_Msk)) | SYS_GPD_MFP3_PD13MFP_LPADC0_ST) /*!< Set PD13 function to LPADC0_ST */ +#define SET_LPADC0_ST_PD5() SYS->GPD_MFP1 = ((SYS->GPD_MFP1 & (~SYS_GPD_MFP1_PD5MFP_Msk)) | SYS_GPD_MFP1_PD5MFP_LPADC0_ST) /*!< Set PD5 function to LPADC0_ST */ +#define SET_LPADC0_ST_PF0() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF0MFP_Msk)) | SYS_GPF_MFP0_PF0MFP_LPADC0_ST) /*!< Set PF0 function to LPADC0_ST */ +#define SET_LPADC0_ST_PF5() SYS->GPF_MFP1 = ((SYS->GPF_MFP1 & (~SYS_GPF_MFP1_PF5MFP_Msk)) | SYS_GPF_MFP1_PF5MFP_LPADC0_ST) /*!< Set PF5 function to LPADC0_ST */ +#define SET_LPI2C0_SCL_PA5() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA5MFP_Msk)) | SYS_GPA_MFP1_PA5MFP_LPI2C0_SCL) /*!< Set PA5 function to LPI2C0_SCL */ +#define SET_LPI2C0_SCL_PB5() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB5MFP_Msk)) | SYS_GPB_MFP1_PB5MFP_LPI2C0_SCL) /*!< Set PB5 function to LPI2C0_SCL */ +#define SET_LPI2C0_SCL_PC1() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC1MFP_Msk)) | SYS_GPC_MFP0_PC1MFP_LPI2C0_SCL) /*!< Set PC1 function to LPI2C0_SCL */ +#define SET_LPI2C0_SCL_PC12() SYS->GPC_MFP3 = ((SYS->GPC_MFP3 & (~SYS_GPC_MFP3_PC12MFP_Msk)) | SYS_GPC_MFP3_PC12MFP_LPI2C0_SCL) /*!< Set PC12 function to LPI2C0_SCL */ +#define SET_LPI2C0_SCL_PE13() SYS->GPE_MFP3 = ((SYS->GPE_MFP3 & (~SYS_GPE_MFP3_PE13MFP_Msk)) | SYS_GPE_MFP3_PE13MFP_LPI2C0_SCL) /*!< Set PE13 function to LPI2C0_SCL */ +#define SET_LPI2C0_SCL_PF3() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF3MFP_Msk)) | SYS_GPF_MFP0_PF3MFP_LPI2C0_SCL) /*!< Set PF3 function to LPI2C0_SCL */ +#define SET_LPI2C0_SCL_PG13() SYS->GPG_MFP3 = ((SYS->GPG_MFP3 & (~SYS_GPG_MFP3_PG13MFP_Msk)) | SYS_GPG_MFP3_PG13MFP_LPI2C0_SCL) /*!< Set PG13 function to LPI2C0_SCL */ +#define SET_LPI2C0_SDA_PA4() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA4MFP_Msk)) | SYS_GPA_MFP1_PA4MFP_LPI2C0_SDA) /*!< Set PA4 function to LPI2C0_SDA */ +#define SET_LPI2C0_SDA_PB4() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB4MFP_Msk)) | SYS_GPB_MFP1_PB4MFP_LPI2C0_SDA) /*!< Set PB4 function to LPI2C0_SDA */ +#define SET_LPI2C0_SDA_PC0() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC0MFP_Msk)) | SYS_GPC_MFP0_PC0MFP_LPI2C0_SDA) /*!< Set PC0 function to LPI2C0_SDA */ +#define SET_LPI2C0_SDA_PC11() SYS->GPC_MFP2 = ((SYS->GPC_MFP2 & (~SYS_GPC_MFP2_PC11MFP_Msk)) | SYS_GPC_MFP2_PC11MFP_LPI2C0_SDA) /*!< Set PC11 function to LPI2C0_SDA */ +#define SET_LPI2C0_SDA_PC8() SYS->GPC_MFP2 = ((SYS->GPC_MFP2 & (~SYS_GPC_MFP2_PC8MFP_Msk)) | SYS_GPC_MFP2_PC8MFP_LPI2C0_SDA) /*!< Set PC8 function to LPI2C0_SDA */ +#define SET_LPI2C0_SDA_PF2() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF2MFP_Msk)) | SYS_GPF_MFP0_PF2MFP_LPI2C0_SDA) /*!< Set PF2 function to LPI2C0_SDA */ +#define SET_LPI2C0_SDA_PG14() SYS->GPG_MFP3 = ((SYS->GPG_MFP3 & (~SYS_GPG_MFP3_PG14MFP_Msk)) | SYS_GPG_MFP3_PG14MFP_LPI2C0_SDA) /*!< Set PG14 function to LPI2C0_SDA */ +#define SET_LPIO0_PA0() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA0MFP_Msk)) | SYS_GPA_MFP0_PA0MFP_LPIO0) /*!< Set PA0 function to LPIO0 */ +#define SET_LPIO0_PE0() SYS->GPE_MFP0 = ((SYS->GPE_MFP0 & (~SYS_GPE_MFP0_PE0MFP_Msk)) | SYS_GPE_MFP0_PE0MFP_LPIO0) /*!< Set PE0 function to LPIO0 */ +#define SET_LPIO1_PA1() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA1MFP_Msk)) | SYS_GPA_MFP0_PA1MFP_LPIO1) /*!< Set PA1 function to LPIO1 */ +#define SET_LPIO1_PE1() SYS->GPE_MFP0 = ((SYS->GPE_MFP0 & (~SYS_GPE_MFP0_PE1MFP_Msk)) | SYS_GPE_MFP0_PE1MFP_LPIO1) /*!< Set PE1 function to LPIO1 */ +#define SET_LPIO2_PB0() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB0MFP_Msk)) | SYS_GPB_MFP0_PB0MFP_LPIO2) /*!< Set PB0 function to LPIO2 */ +#define SET_LPIO2_PF0() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF0MFP_Msk)) | SYS_GPF_MFP0_PF0MFP_LPIO2) /*!< Set PF0 function to LPIO2 */ +#define SET_LPIO3_PB1() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB1MFP_Msk)) | SYS_GPB_MFP0_PB1MFP_LPIO3) /*!< Set PB1 function to LPIO3 */ +#define SET_LPIO3_PF1() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF1MFP_Msk)) | SYS_GPF_MFP0_PF1MFP_LPIO3) /*!< Set PF1 function to LPIO3 */ +#define SET_LPIO4_PA6() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA6MFP_Msk)) | SYS_GPA_MFP1_PA6MFP_LPIO4) /*!< Set PA6 function to LPIO4 */ +#define SET_LPIO4_PC0() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC0MFP_Msk)) | SYS_GPC_MFP0_PC0MFP_LPIO4) /*!< Set PC0 function to LPIO4 */ +#define SET_LPIO5_PA7() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA7MFP_Msk)) | SYS_GPA_MFP1_PA7MFP_LPIO5) /*!< Set PA7 function to LPIO5 */ +#define SET_LPIO5_PC1() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC1MFP_Msk)) | SYS_GPC_MFP0_PC1MFP_LPIO5) /*!< Set PC1 function to LPIO5 */ +#define SET_LPIO6_PB2() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB2MFP_Msk)) | SYS_GPB_MFP0_PB2MFP_LPIO6) /*!< Set PB2 function to LPIO6 */ +#define SET_LPIO6_PD0() SYS->GPD_MFP0 = ((SYS->GPD_MFP0 & (~SYS_GPD_MFP0_PD0MFP_Msk)) | SYS_GPD_MFP0_PD0MFP_LPIO6) /*!< Set PD0 function to LPIO6 */ +#define SET_LPIO7_PB3() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB3MFP_Msk)) | SYS_GPB_MFP0_PB3MFP_LPIO7) /*!< Set PB3 function to LPIO7 */ +#define SET_LPIO7_PD1() SYS->GPD_MFP0 = ((SYS->GPD_MFP0 & (~SYS_GPD_MFP0_PD1MFP_Msk)) | SYS_GPD_MFP0_PD1MFP_LPIO7) /*!< Set PD1 function to LPIO7 */ +#define SET_LPSPI0_CLK_PA13() SYS->GPA_MFP3 = ((SYS->GPA_MFP3 & (~SYS_GPA_MFP3_PA13MFP_Msk)) | SYS_GPA_MFP3_PA13MFP_LPSPI0_CLK) /*!< Set PA13 function to LPSPI0_CLK */ +#define SET_LPSPI0_CLK_PA2() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA2MFP_Msk)) | SYS_GPA_MFP0_PA2MFP_LPSPI0_CLK) /*!< Set PA2 function to LPSPI0_CLK */ +#define SET_LPSPI0_CLK_PB14() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB14MFP_Msk)) | SYS_GPB_MFP3_PB14MFP_LPSPI0_CLK) /*!< Set PB14 function to LPSPI0_CLK */ +#define SET_LPSPI0_CLK_PD2() SYS->GPD_MFP0 = ((SYS->GPD_MFP0 & (~SYS_GPD_MFP0_PD2MFP_Msk)) | SYS_GPD_MFP0_PD2MFP_LPSPI0_CLK) /*!< Set PD2 function to LPSPI0_CLK */ +#define SET_LPSPI0_MISO_PA1() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA1MFP_Msk)) | SYS_GPA_MFP0_PA1MFP_LPSPI0_MISO) /*!< Set PA1 function to LPSPI0_MISO */ +#define SET_LPSPI0_MISO_PA14() SYS->GPA_MFP3 = ((SYS->GPA_MFP3 & (~SYS_GPA_MFP3_PA14MFP_Msk)) | SYS_GPA_MFP3_PA14MFP_LPSPI0_MISO) /*!< Set PA14 function to LPSPI0_MISO */ +#define SET_LPSPI0_MISO_PB13() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB13MFP_Msk)) | SYS_GPB_MFP3_PB13MFP_LPSPI0_MISO) /*!< Set PB13 function to LPSPI0_MISO */ +#define SET_LPSPI0_MISO_PD1() SYS->GPD_MFP0 = ((SYS->GPD_MFP0 & (~SYS_GPD_MFP0_PD1MFP_Msk)) | SYS_GPD_MFP0_PD1MFP_LPSPI0_MISO) /*!< Set PD1 function to LPSPI0_MISO */ +#define SET_LPSPI0_MOSI_PA0() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA0MFP_Msk)) | SYS_GPA_MFP0_PA0MFP_LPSPI0_MOSI) /*!< Set PA0 function to LPSPI0_MOSI */ +#define SET_LPSPI0_MOSI_PA15() SYS->GPA_MFP3 = ((SYS->GPA_MFP3 & (~SYS_GPA_MFP3_PA15MFP_Msk)) | SYS_GPA_MFP3_PA15MFP_LPSPI0_MOSI) /*!< Set PA15 function to LPSPI0_MOSI */ +#define SET_LPSPI0_MOSI_PB12() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB12MFP_Msk)) | SYS_GPB_MFP3_PB12MFP_LPSPI0_MOSI) /*!< Set PB12 function to LPSPI0_MOSI */ +#define SET_LPSPI0_MOSI_PD0() SYS->GPD_MFP0 = ((SYS->GPD_MFP0 & (~SYS_GPD_MFP0_PD0MFP_Msk)) | SYS_GPD_MFP0_PD0MFP_LPSPI0_MOSI) /*!< Set PD0 function to LPSPI0_MOSI */ +#define SET_LPSPI0_SS_PA12() SYS->GPA_MFP3 = ((SYS->GPA_MFP3 & (~SYS_GPA_MFP3_PA12MFP_Msk)) | SYS_GPA_MFP3_PA12MFP_LPSPI0_SS) /*!< Set PA12 function to LPSPI0_SS */ +#define SET_LPSPI0_SS_PA3() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA3MFP_Msk)) | SYS_GPA_MFP0_PA3MFP_LPSPI0_SS) /*!< Set PA3 function to LPSPI0_SS */ +#define SET_LPSPI0_SS_PB15() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB15MFP_Msk)) | SYS_GPB_MFP3_PB15MFP_LPSPI0_SS) /*!< Set PB15 function to LPSPI0_SS */ +#define SET_LPSPI0_SS_PD3() SYS->GPD_MFP0 = ((SYS->GPD_MFP0 & (~SYS_GPD_MFP0_PD3MFP_Msk)) | SYS_GPD_MFP0_PD3MFP_LPSPI0_SS) /*!< Set PD3 function to LPSPI0_SS */ +#define SET_LPTM0_EXT_PA11() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA11MFP_Msk)) | SYS_GPA_MFP2_PA11MFP_LPTM0_EXT) /*!< Set PA11 function to LPTM0_EXT */ +#define SET_LPTM0_EXT_PB15() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB15MFP_Msk)) | SYS_GPB_MFP3_PB15MFP_LPTM0_EXT) /*!< Set PB15 function to LPTM0_EXT */ +#define SET_LPTM0_PB5() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB5MFP_Msk)) | SYS_GPB_MFP1_PB5MFP_LPTM0) /*!< Set PB5 function to LPTM0 */ +#define SET_LPTM0_PC7() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC7MFP_Msk)) | SYS_GPC_MFP1_PC7MFP_LPTM0) /*!< Set PC7 function to LPTM0 */ +#define SET_LPTM0_PG2() SYS->GPG_MFP0 = ((SYS->GPG_MFP0 & (~SYS_GPG_MFP0_PG2MFP_Msk)) | SYS_GPG_MFP0_PG2MFP_LPTM0) /*!< Set PG2 function to LPTM0 */ +#define SET_LPTM1_EXT_PA10() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA10MFP_Msk)) | SYS_GPA_MFP2_PA10MFP_LPTM1_EXT) /*!< Set PA10 function to LPTM1_EXT */ +#define SET_LPTM1_EXT_PB14() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB14MFP_Msk)) | SYS_GPB_MFP3_PB14MFP_LPTM1_EXT) /*!< Set PB14 function to LPTM1_EXT */ +#define SET_LPTM1_PB13() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB13MFP_Msk)) | SYS_GPB_MFP3_PB13MFP_LPTM1) /*!< Set PB13 function to LPTM1 */ +#define SET_LPTM1_PB4() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB4MFP_Msk)) | SYS_GPB_MFP1_PB4MFP_LPTM1) /*!< Set PB4 function to LPTM1 */ +#define SET_LPTM1_PC14() SYS->GPC_MFP3 = ((SYS->GPC_MFP3 & (~SYS_GPC_MFP3_PC14MFP_Msk)) | SYS_GPC_MFP3_PC14MFP_LPTM1) /*!< Set PC14 function to LPTM1 */ +#define SET_LPTM1_PC6() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC6MFP_Msk)) | SYS_GPC_MFP1_PC6MFP_LPTM1) /*!< Set PC6 function to LPTM1 */ +#define SET_LPTM1_PG3() SYS->GPG_MFP0 = ((SYS->GPG_MFP0 & (~SYS_GPG_MFP0_PG3MFP_Msk)) | SYS_GPG_MFP0_PG3MFP_LPTM1) /*!< Set PG3 function to LPTM1 */ +#define SET_LPUART0_RXD_PA0() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA0MFP_Msk)) | SYS_GPA_MFP0_PA0MFP_LPUART0_RXD) /*!< Set PA0 function to LPUART0_RXD */ +#define SET_LPUART0_RXD_PA4() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA4MFP_Msk)) | SYS_GPA_MFP1_PA4MFP_LPUART0_RXD) /*!< Set PA4 function to LPUART0_RXD */ +#define SET_LPUART0_RXD_PA6() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA6MFP_Msk)) | SYS_GPA_MFP1_PA6MFP_LPUART0_RXD) /*!< Set PA6 function to LPUART0_RXD */ +#define SET_LPUART0_RXD_PB12() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB12MFP_Msk)) | SYS_GPB_MFP3_PB12MFP_LPUART0_RXD) /*!< Set PB12 function to LPUART0_RXD */ +#define SET_LPUART0_RXD_PB8() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB8MFP_Msk)) | SYS_GPB_MFP2_PB8MFP_LPUART0_RXD) /*!< Set PB8 function to LPUART0_RXD */ +#define SET_LPUART0_RXD_PC11() SYS->GPC_MFP2 = ((SYS->GPC_MFP2 & (~SYS_GPC_MFP2_PC11MFP_Msk)) | SYS_GPC_MFP2_PC11MFP_LPUART0_RXD) /*!< Set PC11 function to LPUART0_RXD */ +#define SET_LPUART0_RXD_PD2() SYS->GPD_MFP0 = ((SYS->GPD_MFP0 & (~SYS_GPD_MFP0_PD2MFP_Msk)) | SYS_GPD_MFP0_PD2MFP_LPUART0_RXD) /*!< Set PD2 function to LPUART0_RXD */ +#define SET_LPUART0_RXD_PF1() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF1MFP_Msk)) | SYS_GPF_MFP0_PF1MFP_LPUART0_RXD) /*!< Set PF1 function to LPUART0_RXD */ +#define SET_LPUART0_RXD_PF2() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF2MFP_Msk)) | SYS_GPF_MFP0_PF2MFP_LPUART0_RXD) /*!< Set PF2 function to LPUART0_RXD */ +#define SET_LPUART0_RXD_PH11() SYS->GPH_MFP2 = ((SYS->GPH_MFP2 & (~SYS_GPH_MFP2_PH11MFP_Msk)) | SYS_GPH_MFP2_PH11MFP_LPUART0_RXD) /*!< Set PH11 function to LPUART0_RXD */ +#define SET_LPUART0_TXD_PA1() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA1MFP_Msk)) | SYS_GPA_MFP0_PA1MFP_LPUART0_TXD) /*!< Set PA1 function to LPUART0_TXD */ +#define SET_LPUART0_TXD_PA5() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA5MFP_Msk)) | SYS_GPA_MFP1_PA5MFP_LPUART0_TXD) /*!< Set PA5 function to LPUART0_TXD */ +#define SET_LPUART0_TXD_PA7() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA7MFP_Msk)) | SYS_GPA_MFP1_PA7MFP_LPUART0_TXD) /*!< Set PA7 function to LPUART0_TXD */ +#define SET_LPUART0_TXD_PB13() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB13MFP_Msk)) | SYS_GPB_MFP3_PB13MFP_LPUART0_TXD) /*!< Set PB13 function to LPUART0_TXD */ +#define SET_LPUART0_TXD_PB9() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB9MFP_Msk)) | SYS_GPB_MFP2_PB9MFP_LPUART0_TXD) /*!< Set PB9 function to LPUART0_TXD */ +#define SET_LPUART0_TXD_PC12() SYS->GPC_MFP3 = ((SYS->GPC_MFP3 & (~SYS_GPC_MFP3_PC12MFP_Msk)) | SYS_GPC_MFP3_PC12MFP_LPUART0_TXD) /*!< Set PC12 function to LPUART0_TXD */ +#define SET_LPUART0_TXD_PD3() SYS->GPD_MFP0 = ((SYS->GPD_MFP0 & (~SYS_GPD_MFP0_PD3MFP_Msk)) | SYS_GPD_MFP0_PD3MFP_LPUART0_TXD) /*!< Set PD3 function to LPUART0_TXD */ +#define SET_LPUART0_TXD_PF0() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF0MFP_Msk)) | SYS_GPF_MFP0_PF0MFP_LPUART0_TXD) /*!< Set PF0 function to LPUART0_TXD */ +#define SET_LPUART0_TXD_PF3() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF3MFP_Msk)) | SYS_GPF_MFP0_PF3MFP_LPUART0_TXD) /*!< Set PF3 function to LPUART0_TXD */ +#define SET_LPUART0_TXD_PH10() SYS->GPH_MFP2 = ((SYS->GPH_MFP2 & (~SYS_GPH_MFP2_PH10MFP_Msk)) | SYS_GPH_MFP2_PH10MFP_LPUART0_TXD) /*!< Set PH10 function to LPUART0_TXD */ +#define SET_LPUART0_nCTS_PA5() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA5MFP_Msk)) | SYS_GPA_MFP1_PA5MFP_LPUART0_nCTS) /*!< Set PA5 function to LPUART0_nCTS */ +#define SET_LPUART0_nCTS_PB11() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB11MFP_Msk)) | SYS_GPB_MFP2_PB11MFP_LPUART0_nCTS) /*!< Set PB11 function to LPUART0_nCTS */ +#define SET_LPUART0_nCTS_PB15() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB15MFP_Msk)) | SYS_GPB_MFP3_PB15MFP_LPUART0_nCTS) /*!< Set PB15 function to LPUART0_nCTS */ +#define SET_LPUART0_nCTS_PC7() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC7MFP_Msk)) | SYS_GPC_MFP1_PC7MFP_LPUART0_nCTS) /*!< Set PC7 function to LPUART0_nCTS */ +#define SET_LPUART0_nRTS_PA4() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA4MFP_Msk)) | SYS_GPA_MFP1_PA4MFP_LPUART0_nRTS) /*!< Set PA4 function to LPUART0_nRTS */ +#define SET_LPUART0_nRTS_PB10() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB10MFP_Msk)) | SYS_GPB_MFP2_PB10MFP_LPUART0_nRTS) /*!< Set PB10 function to LPUART0_nRTS */ +#define SET_LPUART0_nRTS_PB14() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB14MFP_Msk)) | SYS_GPB_MFP3_PB14MFP_LPUART0_nRTS) /*!< Set PB14 function to LPUART0_nRTS */ +#define SET_LPUART0_nRTS_PC6() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC6MFP_Msk)) | SYS_GPC_MFP1_PC6MFP_LPUART0_nRTS) /*!< Set PC6 function to LPUART0_nRTS */ +#define SET_PSIO0_CH0_PB15() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB15MFP_Msk)) | SYS_GPB_MFP3_PB15MFP_PSIO0_CH0) /*!< Set PB15 function to PSIO0_CH0 */ +#define SET_PSIO0_CH0_PC5() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC5MFP_Msk)) | SYS_GPC_MFP1_PC5MFP_PSIO0_CH0) /*!< Set PC5 function to PSIO0_CH0 */ +#define SET_PSIO0_CH0_PE14() SYS->GPE_MFP3 = ((SYS->GPE_MFP3 & (~SYS_GPE_MFP3_PE14MFP_Msk)) | SYS_GPE_MFP3_PE14MFP_PSIO0_CH0) /*!< Set PE14 function to PSIO0_CH0 */ +#define SET_PSIO0_CH0_PE7() SYS->GPE_MFP1 = ((SYS->GPE_MFP1 & (~SYS_GPE_MFP1_PE7MFP_Msk)) | SYS_GPE_MFP1_PE7MFP_PSIO0_CH0) /*!< Set PE7 function to PSIO0_CH0 */ +#define SET_PSIO0_CH0_PF5() SYS->GPF_MFP1 = ((SYS->GPF_MFP1 & (~SYS_GPF_MFP1_PF5MFP_Msk)) | SYS_GPF_MFP1_PF5MFP_PSIO0_CH0) /*!< Set PF5 function to PSIO0_CH0 */ +#define SET_PSIO0_CH1_PB14() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB14MFP_Msk)) | SYS_GPB_MFP3_PB14MFP_PSIO0_CH1) /*!< Set PB14 function to PSIO0_CH1 */ +#define SET_PSIO0_CH1_PC4() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC4MFP_Msk)) | SYS_GPC_MFP1_PC4MFP_PSIO0_CH1) /*!< Set PC4 function to PSIO0_CH1 */ +#define SET_PSIO0_CH1_PE15() SYS->GPE_MFP3 = ((SYS->GPE_MFP3 & (~SYS_GPE_MFP3_PE15MFP_Msk)) | SYS_GPE_MFP3_PE15MFP_PSIO0_CH1) /*!< Set PE15 function to PSIO0_CH1 */ +#define SET_PSIO0_CH1_PE6() SYS->GPE_MFP1 = ((SYS->GPE_MFP1 & (~SYS_GPE_MFP1_PE6MFP_Msk)) | SYS_GPE_MFP1_PE6MFP_PSIO0_CH1) /*!< Set PE6 function to PSIO0_CH1 */ +#define SET_PSIO0_CH1_PF4() SYS->GPF_MFP1 = ((SYS->GPF_MFP1 & (~SYS_GPF_MFP1_PF4MFP_Msk)) | SYS_GPF_MFP1_PF4MFP_PSIO0_CH1) /*!< Set PF4 function to PSIO0_CH1 */ +#define SET_PSIO0_CH2_PB13() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB13MFP_Msk)) | SYS_GPB_MFP3_PB13MFP_PSIO0_CH2) /*!< Set PB13 function to PSIO0_CH2 */ +#define SET_PSIO0_CH2_PC3() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC3MFP_Msk)) | SYS_GPC_MFP0_PC3MFP_PSIO0_CH2) /*!< Set PC3 function to PSIO0_CH2 */ +#define SET_PSIO0_CH2_PD9() SYS->GPD_MFP2 = ((SYS->GPD_MFP2 & (~SYS_GPD_MFP2_PD9MFP_Msk)) | SYS_GPD_MFP2_PD9MFP_PSIO0_CH2) /*!< Set PD9 function to PSIO0_CH2 */ +#define SET_PSIO0_CH2_PE5() SYS->GPE_MFP1 = ((SYS->GPE_MFP1 & (~SYS_GPE_MFP1_PE5MFP_Msk)) | SYS_GPE_MFP1_PE5MFP_PSIO0_CH2) /*!< Set PE5 function to PSIO0_CH2 */ +#define SET_PSIO0_CH3_PB12() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB12MFP_Msk)) | SYS_GPB_MFP3_PB12MFP_PSIO0_CH3) /*!< Set PB12 function to PSIO0_CH3 */ +#define SET_PSIO0_CH3_PC2() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC2MFP_Msk)) | SYS_GPC_MFP0_PC2MFP_PSIO0_CH3) /*!< Set PC2 function to PSIO0_CH3 */ +#define SET_PSIO0_CH3_PD8() SYS->GPD_MFP2 = ((SYS->GPD_MFP2 & (~SYS_GPD_MFP2_PD8MFP_Msk)) | SYS_GPD_MFP2_PD8MFP_PSIO0_CH3) /*!< Set PD8 function to PSIO0_CH3 */ +#define SET_PSIO0_CH3_PE4() SYS->GPE_MFP1 = ((SYS->GPE_MFP1 & (~SYS_GPE_MFP1_PE4MFP_Msk)) | SYS_GPE_MFP1_PE4MFP_PSIO0_CH3) /*!< Set PE4 function to PSIO0_CH3 */ +#define SET_PSIO0_CH4_PA12() SYS->GPA_MFP3 = ((SYS->GPA_MFP3 & (~SYS_GPA_MFP3_PA12MFP_Msk)) | SYS_GPA_MFP3_PA12MFP_PSIO0_CH4) /*!< Set PA12 function to PSIO0_CH4 */ +#define SET_PSIO0_CH4_PA3() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA3MFP_Msk)) | SYS_GPA_MFP0_PA3MFP_PSIO0_CH4) /*!< Set PA3 function to PSIO0_CH4 */ +#define SET_PSIO0_CH4_PB5() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB5MFP_Msk)) | SYS_GPB_MFP1_PB5MFP_PSIO0_CH4) /*!< Set PB5 function to PSIO0_CH4 */ +#define SET_PSIO0_CH4_PG13() SYS->GPG_MFP3 = ((SYS->GPG_MFP3 & (~SYS_GPG_MFP3_PG13MFP_Msk)) | SYS_GPG_MFP3_PG13MFP_PSIO0_CH4) /*!< Set PG13 function to PSIO0_CH4 */ +#define SET_PSIO0_CH5_PA13() SYS->GPA_MFP3 = ((SYS->GPA_MFP3 & (~SYS_GPA_MFP3_PA13MFP_Msk)) | SYS_GPA_MFP3_PA13MFP_PSIO0_CH5) /*!< Set PA13 function to PSIO0_CH5 */ +#define SET_PSIO0_CH5_PA2() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA2MFP_Msk)) | SYS_GPA_MFP0_PA2MFP_PSIO0_CH5) /*!< Set PA2 function to PSIO0_CH5 */ +#define SET_PSIO0_CH5_PB4() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB4MFP_Msk)) | SYS_GPB_MFP1_PB4MFP_PSIO0_CH5) /*!< Set PB4 function to PSIO0_CH5 */ +#define SET_PSIO0_CH5_PG14() SYS->GPG_MFP3 = ((SYS->GPG_MFP3 & (~SYS_GPG_MFP3_PG14MFP_Msk)) | SYS_GPG_MFP3_PG14MFP_PSIO0_CH5) /*!< Set PG14 function to PSIO0_CH5 */ +#define SET_PSIO0_CH6_PA1() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA1MFP_Msk)) | SYS_GPA_MFP0_PA1MFP_PSIO0_CH6) /*!< Set PA1 function to PSIO0_CH6 */ +#define SET_PSIO0_CH6_PA14() SYS->GPA_MFP3 = ((SYS->GPA_MFP3 & (~SYS_GPA_MFP3_PA14MFP_Msk)) | SYS_GPA_MFP3_PA14MFP_PSIO0_CH6) /*!< Set PA14 function to PSIO0_CH6 */ +#define SET_PSIO0_CH6_PB3() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB3MFP_Msk)) | SYS_GPB_MFP0_PB3MFP_PSIO0_CH6) /*!< Set PB3 function to PSIO0_CH6 */ +#define SET_PSIO0_CH6_PG15() SYS->GPG_MFP3 = ((SYS->GPG_MFP3 & (~SYS_GPG_MFP3_PG15MFP_Msk)) | SYS_GPG_MFP3_PG15MFP_PSIO0_CH6) /*!< Set PG15 function to PSIO0_CH6 */ +#define SET_PSIO0_CH7_PA0() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA0MFP_Msk)) | SYS_GPA_MFP0_PA0MFP_PSIO0_CH7) /*!< Set PA0 function to PSIO0_CH7 */ +#define SET_PSIO0_CH7_PA15() SYS->GPA_MFP3 = ((SYS->GPA_MFP3 & (~SYS_GPA_MFP3_PA15MFP_Msk)) | SYS_GPA_MFP3_PA15MFP_PSIO0_CH7) /*!< Set PA15 function to PSIO0_CH7 */ +#define SET_PSIO0_CH7_PB2() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB2MFP_Msk)) | SYS_GPB_MFP0_PB2MFP_PSIO0_CH7) /*!< Set PB2 function to PSIO0_CH7 */ +#define SET_PSIO0_CH7_PD4() SYS->GPD_MFP1 = ((SYS->GPD_MFP1 & (~SYS_GPD_MFP1_PD4MFP_Msk)) | SYS_GPD_MFP1_PD4MFP_PSIO0_CH7) /*!< Set PD4 function to PSIO0_CH7 */ +#define SET_QSPI0_CLK_PA2() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA2MFP_Msk)) | SYS_GPA_MFP0_PA2MFP_QSPI0_CLK) /*!< Set PA2 function to QSPI0_CLK */ +#define SET_QSPI0_CLK_PB12() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB12MFP_Msk)) | SYS_GPB_MFP3_PB12MFP_QSPI0_CLK) /*!< Set PB12 function to QSPI0_CLK */ +#define SET_QSPI0_CLK_PC14() SYS->GPC_MFP3 = ((SYS->GPC_MFP3 & (~SYS_GPC_MFP3_PC14MFP_Msk)) | SYS_GPC_MFP3_PC14MFP_QSPI0_CLK) /*!< Set PC14 function to QSPI0_CLK */ +#define SET_QSPI0_CLK_PC2() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC2MFP_Msk)) | SYS_GPC_MFP0_PC2MFP_QSPI0_CLK) /*!< Set PC2 function to QSPI0_CLK */ +#define SET_QSPI0_CLK_PF2() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF2MFP_Msk)) | SYS_GPF_MFP0_PF2MFP_QSPI0_CLK) /*!< Set PF2 function to QSPI0_CLK */ +#define SET_QSPI0_CLK_PH8() SYS->GPH_MFP2 = ((SYS->GPH_MFP2 & (~SYS_GPH_MFP2_PH8MFP_Msk)) | SYS_GPH_MFP2_PH8MFP_QSPI0_CLK) /*!< Set PH8 function to QSPI0_CLK */ +#define SET_QSPI0_CLK_PI15() SYS->GPI_MFP3 = ((SYS->GPI_MFP3 & (~SYS_GPI_MFP3_PI15MFP_Msk)) | SYS_GPI_MFP3_PI15MFP_QSPI0_CLK) /*!< Set PI15 function to QSPI0_CLK */ +#define SET_QSPI0_MISO0_PA1() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA1MFP_Msk)) | SYS_GPA_MFP0_PA1MFP_QSPI0_MISO0) /*!< Set PA1 function to QSPI0_MISO0 */ +#define SET_QSPI0_MISO0_PC1() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC1MFP_Msk)) | SYS_GPC_MFP0_PC1MFP_QSPI0_MISO0) /*!< Set PC1 function to QSPI0_MISO0 */ +#define SET_QSPI0_MISO0_PE1() SYS->GPE_MFP0 = ((SYS->GPE_MFP0 & (~SYS_GPE_MFP0_PE1MFP_Msk)) | SYS_GPE_MFP0_PE1MFP_QSPI0_MISO0) /*!< Set PE1 function to QSPI0_MISO0 */ +#define SET_QSPI0_MISO0_PE7() SYS->GPE_MFP1 = ((SYS->GPE_MFP1 & (~SYS_GPE_MFP1_PE7MFP_Msk)) | SYS_GPE_MFP1_PE7MFP_QSPI0_MISO0) /*!< Set PE7 function to QSPI0_MISO0 */ +#define SET_QSPI0_MISO0_PJ0() SYS->GPJ_MFP0 = ((SYS->GPJ_MFP0 & (~SYS_GPJ_MFP0_PJ0MFP_Msk)) | SYS_GPJ_MFP0_PJ0MFP_QSPI0_MISO0) /*!< Set PJ0 function to QSPI0_MISO0 */ +#define SET_QSPI0_MISO1_PA5() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA5MFP_Msk)) | SYS_GPA_MFP1_PA5MFP_QSPI0_MISO1) /*!< Set PA5 function to QSPI0_MISO1 */ +#define SET_QSPI0_MISO1_PB1() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB1MFP_Msk)) | SYS_GPB_MFP0_PB1MFP_QSPI0_MISO1) /*!< Set PB1 function to QSPI0_MISO1 */ +#define SET_QSPI0_MISO1_PC5() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC5MFP_Msk)) | SYS_GPC_MFP1_PC5MFP_QSPI0_MISO1) /*!< Set PC5 function to QSPI0_MISO1 */ +#define SET_QSPI0_MISO1_PH10() SYS->GPH_MFP2 = ((SYS->GPH_MFP2 & (~SYS_GPH_MFP2_PH10MFP_Msk)) | SYS_GPH_MFP2_PH10MFP_QSPI0_MISO1) /*!< Set PH10 function to QSPI0_MISO1 */ +#define SET_QSPI0_MISO1_PI12() SYS->GPI_MFP3 = ((SYS->GPI_MFP3 & (~SYS_GPI_MFP3_PI12MFP_Msk)) | SYS_GPI_MFP3_PI12MFP_QSPI0_MISO1) /*!< Set PI12 function to QSPI0_MISO1 */ +#define SET_QSPI0_MOSI0_PA0() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA0MFP_Msk)) | SYS_GPA_MFP0_PA0MFP_QSPI0_MOSI0) /*!< Set PA0 function to QSPI0_MOSI0 */ +#define SET_QSPI0_MOSI0_PC0() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC0MFP_Msk)) | SYS_GPC_MFP0_PC0MFP_QSPI0_MOSI0) /*!< Set PC0 function to QSPI0_MOSI0 */ +#define SET_QSPI0_MOSI0_PE0() SYS->GPE_MFP0 = ((SYS->GPE_MFP0 & (~SYS_GPE_MFP0_PE0MFP_Msk)) | SYS_GPE_MFP0_PE0MFP_QSPI0_MOSI0) /*!< Set PE0 function to QSPI0_MOSI0 */ +#define SET_QSPI0_MOSI0_PE6() SYS->GPE_MFP1 = ((SYS->GPE_MFP1 & (~SYS_GPE_MFP1_PE6MFP_Msk)) | SYS_GPE_MFP1_PE6MFP_QSPI0_MOSI0) /*!< Set PE6 function to QSPI0_MOSI0 */ +#define SET_QSPI0_MOSI0_PJ1() SYS->GPJ_MFP0 = ((SYS->GPJ_MFP0 & (~SYS_GPJ_MFP0_PJ1MFP_Msk)) | SYS_GPJ_MFP0_PJ1MFP_QSPI0_MOSI0) /*!< Set PJ1 function to QSPI0_MOSI0 */ +#define SET_QSPI0_MOSI1_PA4() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA4MFP_Msk)) | SYS_GPA_MFP1_PA4MFP_QSPI0_MOSI1) /*!< Set PA4 function to QSPI0_MOSI1 */ +#define SET_QSPI0_MOSI1_PB0() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB0MFP_Msk)) | SYS_GPB_MFP0_PB0MFP_QSPI0_MOSI1) /*!< Set PB0 function to QSPI0_MOSI1 */ +#define SET_QSPI0_MOSI1_PC4() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC4MFP_Msk)) | SYS_GPC_MFP1_PC4MFP_QSPI0_MOSI1) /*!< Set PC4 function to QSPI0_MOSI1 */ +#define SET_QSPI0_MOSI1_PD14() SYS->GPD_MFP3 = ((SYS->GPD_MFP3 & (~SYS_GPD_MFP3_PD14MFP_Msk)) | SYS_GPD_MFP3_PD14MFP_QSPI0_MOSI1) /*!< Set PD14 function to QSPI0_MOSI1 */ +#define SET_QSPI0_MOSI1_PH11() SYS->GPH_MFP2 = ((SYS->GPH_MFP2 & (~SYS_GPH_MFP2_PH11MFP_Msk)) | SYS_GPH_MFP2_PH11MFP_QSPI0_MOSI1) /*!< Set PH11 function to QSPI0_MOSI1 */ +#define SET_QSPI0_MOSI1_PI13() SYS->GPI_MFP3 = ((SYS->GPI_MFP3 & (~SYS_GPI_MFP3_PI13MFP_Msk)) | SYS_GPI_MFP3_PI13MFP_QSPI0_MOSI1) /*!< Set PI13 function to QSPI0_MOSI1 */ +#define SET_QSPI0_SS_PA3() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA3MFP_Msk)) | SYS_GPA_MFP0_PA3MFP_QSPI0_SS) /*!< Set PA3 function to QSPI0_SS */ +#define SET_QSPI0_SS_PC3() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC3MFP_Msk)) | SYS_GPC_MFP0_PC3MFP_QSPI0_SS) /*!< Set PC3 function to QSPI0_SS */ +#define SET_QSPI0_SS_PH9() SYS->GPH_MFP2 = ((SYS->GPH_MFP2 & (~SYS_GPH_MFP2_PH9MFP_Msk)) | SYS_GPH_MFP2_PH9MFP_QSPI0_SS) /*!< Set PH9 function to QSPI0_SS */ +#define SET_QSPI0_SS_PI14() SYS->GPI_MFP3 = ((SYS->GPI_MFP3 & (~SYS_GPI_MFP3_PI14MFP_Msk)) | SYS_GPI_MFP3_PI14MFP_QSPI0_SS) /*!< Set PI14 function to QSPI0_SS */ +#define SET_QSPI1_CLK_PC4() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC4MFP_Msk)) | SYS_GPC_MFP1_PC4MFP_QSPI1_CLK) /*!< Set PC4 function to QSPI1_CLK */ +#define SET_QSPI1_CLK_PG12() SYS->GPG_MFP3 = ((SYS->GPG_MFP3 & (~SYS_GPG_MFP3_PG12MFP_Msk)) | SYS_GPG_MFP3_PG12MFP_QSPI1_CLK) /*!< Set PG12 function to QSPI1_CLK */ +#define SET_QSPI1_CLK_PH15() SYS->GPH_MFP3 = ((SYS->GPH_MFP3 & (~SYS_GPH_MFP3_PH15MFP_Msk)) | SYS_GPH_MFP3_PH15MFP_QSPI1_CLK) /*!< Set PH15 function to QSPI1_CLK */ +#define SET_QSPI1_CLK_PJ3() SYS->GPJ_MFP0 = ((SYS->GPJ_MFP0 & (~SYS_GPJ_MFP0_PJ3MFP_Msk)) | SYS_GPJ_MFP0_PJ3MFP_QSPI1_CLK) /*!< Set PJ3 function to QSPI1_CLK */ +#define SET_QSPI1_MISO0_PA12() SYS->GPA_MFP3 = ((SYS->GPA_MFP3 & (~SYS_GPA_MFP3_PA12MFP_Msk)) | SYS_GPA_MFP3_PA12MFP_QSPI1_MISO0) /*!< Set PA12 function to QSPI1_MISO0 */ +#define SET_QSPI1_MISO0_PC3() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC3MFP_Msk)) | SYS_GPC_MFP0_PC3MFP_QSPI1_MISO0) /*!< Set PC3 function to QSPI1_MISO0 */ +#define SET_QSPI1_MISO0_PD7() SYS->GPD_MFP1 = ((SYS->GPD_MFP1 & (~SYS_GPD_MFP1_PD7MFP_Msk)) | SYS_GPD_MFP1_PD7MFP_QSPI1_MISO0) /*!< Set PD7 function to QSPI1_MISO0 */ +#define SET_QSPI1_MISO0_PG13() SYS->GPG_MFP3 = ((SYS->GPG_MFP3 & (~SYS_GPG_MFP3_PG13MFP_Msk)) | SYS_GPG_MFP3_PG13MFP_QSPI1_MISO0) /*!< Set PG13 function to QSPI1_MISO0 */ +#define SET_QSPI1_MISO0_PJ4() SYS->GPJ_MFP1 = ((SYS->GPJ_MFP1 & (~SYS_GPJ_MFP1_PJ4MFP_Msk)) | SYS_GPJ_MFP1_PJ4MFP_QSPI1_MISO0) /*!< Set PJ4 function to QSPI1_MISO0 */ +#define SET_QSPI1_MISO1_PA7() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA7MFP_Msk)) | SYS_GPA_MFP1_PA7MFP_QSPI1_MISO1) /*!< Set PA7 function to QSPI1_MISO1 */ +#define SET_QSPI1_MISO1_PG9() SYS->GPG_MFP2 = ((SYS->GPG_MFP2 & (~SYS_GPG_MFP2_PG9MFP_Msk)) | SYS_GPG_MFP2_PG9MFP_QSPI1_MISO1) /*!< Set PG9 function to QSPI1_MISO1 */ +#define SET_QSPI1_MISO1_PH12() SYS->GPH_MFP3 = ((SYS->GPH_MFP3 & (~SYS_GPH_MFP3_PH12MFP_Msk)) | SYS_GPH_MFP3_PH12MFP_QSPI1_MISO1) /*!< Set PH12 function to QSPI1_MISO1 */ +#define SET_QSPI1_MOSI0_PA13() SYS->GPA_MFP3 = ((SYS->GPA_MFP3 & (~SYS_GPA_MFP3_PA13MFP_Msk)) | SYS_GPA_MFP3_PA13MFP_QSPI1_MOSI0) /*!< Set PA13 function to QSPI1_MOSI0 */ +#define SET_QSPI1_MOSI0_PC2() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC2MFP_Msk)) | SYS_GPC_MFP0_PC2MFP_QSPI1_MOSI0) /*!< Set PC2 function to QSPI1_MOSI0 */ +#define SET_QSPI1_MOSI0_PD13() SYS->GPD_MFP3 = ((SYS->GPD_MFP3 & (~SYS_GPD_MFP3_PD13MFP_Msk)) | SYS_GPD_MFP3_PD13MFP_QSPI1_MOSI0) /*!< Set PD13 function to QSPI1_MOSI0 */ +#define SET_QSPI1_MOSI0_PD6() SYS->GPD_MFP1 = ((SYS->GPD_MFP1 & (~SYS_GPD_MFP1_PD6MFP_Msk)) | SYS_GPD_MFP1_PD6MFP_QSPI1_MOSI0) /*!< Set PD6 function to QSPI1_MOSI0 */ +#define SET_QSPI1_MOSI0_PG14() SYS->GPG_MFP3 = ((SYS->GPG_MFP3 & (~SYS_GPG_MFP3_PG14MFP_Msk)) | SYS_GPG_MFP3_PG14MFP_QSPI1_MOSI0) /*!< Set PG14 function to QSPI1_MOSI0 */ +#define SET_QSPI1_MOSI0_PJ5() SYS->GPJ_MFP1 = ((SYS->GPJ_MFP1 & (~SYS_GPJ_MFP1_PJ5MFP_Msk)) | SYS_GPJ_MFP1_PJ5MFP_QSPI1_MOSI0) /*!< Set PJ5 function to QSPI1_MOSI0 */ +#define SET_QSPI1_MOSI1_PA6() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA6MFP_Msk)) | SYS_GPA_MFP1_PA6MFP_QSPI1_MOSI1) /*!< Set PA6 function to QSPI1_MOSI1 */ +#define SET_QSPI1_MOSI1_PG10() SYS->GPG_MFP2 = ((SYS->GPG_MFP2 & (~SYS_GPG_MFP2_PG10MFP_Msk)) | SYS_GPG_MFP2_PG10MFP_QSPI1_MOSI1) /*!< Set PG10 function to QSPI1_MOSI1 */ +#define SET_QSPI1_MOSI1_PH13() SYS->GPH_MFP3 = ((SYS->GPH_MFP3 & (~SYS_GPH_MFP3_PH13MFP_Msk)) | SYS_GPH_MFP3_PH13MFP_QSPI1_MOSI1) /*!< Set PH13 function to QSPI1_MOSI1 */ +#define SET_QSPI1_SS_PC5() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC5MFP_Msk)) | SYS_GPC_MFP1_PC5MFP_QSPI1_SS) /*!< Set PC5 function to QSPI1_SS */ +#define SET_QSPI1_SS_PG11() SYS->GPG_MFP2 = ((SYS->GPG_MFP2 & (~SYS_GPG_MFP2_PG11MFP_Msk)) | SYS_GPG_MFP2_PG11MFP_QSPI1_SS) /*!< Set PG11 function to QSPI1_SS */ +#define SET_QSPI1_SS_PH14() SYS->GPH_MFP3 = ((SYS->GPH_MFP3 & (~SYS_GPH_MFP3_PH14MFP_Msk)) | SYS_GPH_MFP3_PH14MFP_QSPI1_SS) /*!< Set PH14 function to QSPI1_SS */ +#define SET_QSPI1_SS_PJ2() SYS->GPJ_MFP0 = ((SYS->GPJ_MFP0 & (~SYS_GPJ_MFP0_PJ2MFP_Msk)) | SYS_GPJ_MFP0_PJ2MFP_QSPI1_SS) /*!< Set PJ2 function to QSPI1_SS */ +#define SET_SC0_CLK_PA0() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA0MFP_Msk)) | SYS_GPA_MFP0_PA0MFP_SC0_CLK) /*!< Set PA0 function to SC0_CLK */ +#define SET_SC0_CLK_PB5() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB5MFP_Msk)) | SYS_GPB_MFP1_PB5MFP_SC0_CLK) /*!< Set PB5 function to SC0_CLK */ +#define SET_SC0_CLK_PE2() SYS->GPE_MFP0 = ((SYS->GPE_MFP0 & (~SYS_GPE_MFP0_PE2MFP_Msk)) | SYS_GPE_MFP0_PE2MFP_SC0_CLK) /*!< Set PE2 function to SC0_CLK */ +#define SET_SC0_CLK_PF6() SYS->GPF_MFP1 = ((SYS->GPF_MFP1 & (~SYS_GPF_MFP1_PF6MFP_Msk)) | SYS_GPF_MFP1_PF6MFP_SC0_CLK) /*!< Set PF6 function to SC0_CLK */ +#define SET_SC0_DAT_PA1() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA1MFP_Msk)) | SYS_GPA_MFP0_PA1MFP_SC0_DAT) /*!< Set PA1 function to SC0_DAT */ +#define SET_SC0_DAT_PB4() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB4MFP_Msk)) | SYS_GPB_MFP1_PB4MFP_SC0_DAT) /*!< Set PB4 function to SC0_DAT */ +#define SET_SC0_DAT_PE3() SYS->GPE_MFP0 = ((SYS->GPE_MFP0 & (~SYS_GPE_MFP0_PE3MFP_Msk)) | SYS_GPE_MFP0_PE3MFP_SC0_DAT) /*!< Set PE3 function to SC0_DAT */ +#define SET_SC0_DAT_PF7() SYS->GPF_MFP1 = ((SYS->GPF_MFP1 & (~SYS_GPF_MFP1_PF7MFP_Msk)) | SYS_GPF_MFP1_PF7MFP_SC0_DAT) /*!< Set PF7 function to SC0_DAT */ +#define SET_SC0_PWR_PA3() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA3MFP_Msk)) | SYS_GPA_MFP0_PA3MFP_SC0_PWR) /*!< Set PA3 function to SC0_PWR */ +#define SET_SC0_PWR_PB2() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB2MFP_Msk)) | SYS_GPB_MFP0_PB2MFP_SC0_PWR) /*!< Set PB2 function to SC0_PWR */ +#define SET_SC0_PWR_PE5() SYS->GPE_MFP1 = ((SYS->GPE_MFP1 & (~SYS_GPE_MFP1_PE5MFP_Msk)) | SYS_GPE_MFP1_PE5MFP_SC0_PWR) /*!< Set PE5 function to SC0_PWR */ +#define SET_SC0_PWR_PF9() SYS->GPF_MFP2 = ((SYS->GPF_MFP2 & (~SYS_GPF_MFP2_PF9MFP_Msk)) | SYS_GPF_MFP2_PF9MFP_SC0_PWR) /*!< Set PF9 function to SC0_PWR */ +#define SET_SC0_RST_PA2() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA2MFP_Msk)) | SYS_GPA_MFP0_PA2MFP_SC0_RST) /*!< Set PA2 function to SC0_RST */ +#define SET_SC0_RST_PB3() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB3MFP_Msk)) | SYS_GPB_MFP0_PB3MFP_SC0_RST) /*!< Set PB3 function to SC0_RST */ +#define SET_SC0_RST_PE4() SYS->GPE_MFP1 = ((SYS->GPE_MFP1 & (~SYS_GPE_MFP1_PE4MFP_Msk)) | SYS_GPE_MFP1_PE4MFP_SC0_RST) /*!< Set PE4 function to SC0_RST */ +#define SET_SC0_RST_PF8() SYS->GPF_MFP2 = ((SYS->GPF_MFP2 & (~SYS_GPF_MFP2_PF8MFP_Msk)) | SYS_GPF_MFP2_PF8MFP_SC0_RST) /*!< Set PF8 function to SC0_RST */ +#define SET_SC0_nCD_PA4() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA4MFP_Msk)) | SYS_GPA_MFP1_PA4MFP_SC0_nCD) /*!< Set PA4 function to SC0_nCD */ +#define SET_SC0_nCD_PC12() SYS->GPC_MFP3 = ((SYS->GPC_MFP3 & (~SYS_GPC_MFP3_PC12MFP_Msk)) | SYS_GPC_MFP3_PC12MFP_SC0_nCD) /*!< Set PC12 function to SC0_nCD */ +#define SET_SC0_nCD_PE6() SYS->GPE_MFP1 = ((SYS->GPE_MFP1 & (~SYS_GPE_MFP1_PE6MFP_Msk)) | SYS_GPE_MFP1_PE6MFP_SC0_nCD) /*!< Set PE6 function to SC0_nCD */ +#define SET_SC0_nCD_PF10() SYS->GPF_MFP2 = ((SYS->GPF_MFP2 & (~SYS_GPF_MFP2_PF10MFP_Msk)) | SYS_GPF_MFP2_PF10MFP_SC0_nCD) /*!< Set PF10 function to SC0_nCD */ +#define SET_SC1_CLK_PB12() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB12MFP_Msk)) | SYS_GPB_MFP3_PB12MFP_SC1_CLK) /*!< Set PB12 function to SC1_CLK */ +#define SET_SC1_CLK_PC0() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC0MFP_Msk)) | SYS_GPC_MFP0_PC0MFP_SC1_CLK) /*!< Set PC0 function to SC1_CLK */ +#define SET_SC1_CLK_PD4() SYS->GPD_MFP1 = ((SYS->GPD_MFP1 & (~SYS_GPD_MFP1_PD4MFP_Msk)) | SYS_GPD_MFP1_PD4MFP_SC1_CLK) /*!< Set PD4 function to SC1_CLK */ +#define SET_SC1_CLK_PF1() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF1MFP_Msk)) | SYS_GPF_MFP0_PF1MFP_SC1_CLK) /*!< Set PF1 function to SC1_CLK */ +#define SET_SC1_CLK_PG8() SYS->GPG_MFP2 = ((SYS->GPG_MFP2 & (~SYS_GPG_MFP2_PG8MFP_Msk)) | SYS_GPG_MFP2_PG8MFP_SC1_CLK) /*!< Set PG8 function to SC1_CLK */ +#define SET_SC1_CLK_PH1() SYS->GPH_MFP0 = ((SYS->GPH_MFP0 & (~SYS_GPH_MFP0_PH1MFP_Msk)) | SYS_GPH_MFP0_PH1MFP_SC1_CLK) /*!< Set PH1 function to SC1_CLK */ +#define SET_SC1_CLK_PI10() SYS->GPI_MFP2 = ((SYS->GPI_MFP2 & (~SYS_GPI_MFP2_PI10MFP_Msk)) | SYS_GPI_MFP2_PI10MFP_SC1_CLK) /*!< Set PI10 function to SC1_CLK */ +#define SET_SC1_DAT_PB13() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB13MFP_Msk)) | SYS_GPB_MFP3_PB13MFP_SC1_DAT) /*!< Set PB13 function to SC1_DAT */ +#define SET_SC1_DAT_PC1() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC1MFP_Msk)) | SYS_GPC_MFP0_PC1MFP_SC1_DAT) /*!< Set PC1 function to SC1_DAT */ +#define SET_SC1_DAT_PF0() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF0MFP_Msk)) | SYS_GPF_MFP0_PF0MFP_SC1_DAT) /*!< Set PF0 function to SC1_DAT */ +#define SET_SC1_DAT_PG15() SYS->GPG_MFP3 = ((SYS->GPG_MFP3 & (~SYS_GPG_MFP3_PG15MFP_Msk)) | SYS_GPG_MFP3_PG15MFP_SC1_DAT) /*!< Set PG15 function to SC1_DAT */ +#define SET_SC1_DAT_PG7() SYS->GPG_MFP1 = ((SYS->GPG_MFP1 & (~SYS_GPG_MFP1_PG7MFP_Msk)) | SYS_GPG_MFP1_PG7MFP_SC1_DAT) /*!< Set PG7 function to SC1_DAT */ +#define SET_SC1_DAT_PH0() SYS->GPH_MFP0 = ((SYS->GPH_MFP0 & (~SYS_GPH_MFP0_PH0MFP_Msk)) | SYS_GPH_MFP0_PH0MFP_SC1_DAT) /*!< Set PH0 function to SC1_DAT */ +#define SET_SC1_DAT_PI9() SYS->GPI_MFP2 = ((SYS->GPI_MFP2 & (~SYS_GPI_MFP2_PI9MFP_Msk)) | SYS_GPI_MFP2_PI9MFP_SC1_DAT) /*!< Set PI9 function to SC1_DAT */ +#define SET_SC1_PWR_PB15() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB15MFP_Msk)) | SYS_GPB_MFP3_PB15MFP_SC1_PWR) /*!< Set PB15 function to SC1_PWR */ +#define SET_SC1_PWR_PC3() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC3MFP_Msk)) | SYS_GPC_MFP0_PC3MFP_SC1_PWR) /*!< Set PC3 function to SC1_PWR */ +#define SET_SC1_PWR_PF3() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF3MFP_Msk)) | SYS_GPF_MFP0_PF3MFP_SC1_PWR) /*!< Set PF3 function to SC1_PWR */ +#define SET_SC1_PWR_PG13() SYS->GPG_MFP3 = ((SYS->GPG_MFP3 & (~SYS_GPG_MFP3_PG13MFP_Msk)) | SYS_GPG_MFP3_PG13MFP_SC1_PWR) /*!< Set PG13 function to SC1_PWR */ +#define SET_SC1_PWR_PG5() SYS->GPG_MFP1 = ((SYS->GPG_MFP1 & (~SYS_GPG_MFP1_PG5MFP_Msk)) | SYS_GPG_MFP1_PG5MFP_SC1_PWR) /*!< Set PG5 function to SC1_PWR */ +#define SET_SC1_PWR_PI7() SYS->GPI_MFP1 = ((SYS->GPI_MFP1 & (~SYS_GPI_MFP1_PI7MFP_Msk)) | SYS_GPI_MFP1_PI7MFP_SC1_PWR) /*!< Set PI7 function to SC1_PWR */ +#define SET_SC1_RST_PB14() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB14MFP_Msk)) | SYS_GPB_MFP3_PB14MFP_SC1_RST) /*!< Set PB14 function to SC1_RST */ +#define SET_SC1_RST_PC2() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC2MFP_Msk)) | SYS_GPC_MFP0_PC2MFP_SC1_RST) /*!< Set PC2 function to SC1_RST */ +#define SET_SC1_RST_PF2() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF2MFP_Msk)) | SYS_GPF_MFP0_PF2MFP_SC1_RST) /*!< Set PF2 function to SC1_RST */ +#define SET_SC1_RST_PG14() SYS->GPG_MFP3 = ((SYS->GPG_MFP3 & (~SYS_GPG_MFP3_PG14MFP_Msk)) | SYS_GPG_MFP3_PG14MFP_SC1_RST) /*!< Set PG14 function to SC1_RST */ +#define SET_SC1_RST_PG6() SYS->GPG_MFP1 = ((SYS->GPG_MFP1 & (~SYS_GPG_MFP1_PG6MFP_Msk)) | SYS_GPG_MFP1_PG6MFP_SC1_RST) /*!< Set PG6 function to SC1_RST */ +#define SET_SC1_RST_PI8() SYS->GPI_MFP2 = ((SYS->GPI_MFP2 & (~SYS_GPI_MFP2_PI8MFP_Msk)) | SYS_GPI_MFP2_PI8MFP_SC1_RST) /*!< Set PI8 function to SC1_RST */ +#define SET_SC1_nCD_PB6() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB6MFP_Msk)) | SYS_GPB_MFP1_PB6MFP_SC1_nCD) /*!< Set PB6 function to SC1_nCD */ +#define SET_SC1_nCD_PC14() SYS->GPC_MFP3 = ((SYS->GPC_MFP3 & (~SYS_GPC_MFP3_PC14MFP_Msk)) | SYS_GPC_MFP3_PC14MFP_SC1_nCD) /*!< Set PC14 function to SC1_nCD */ +#define SET_SC1_nCD_PC4() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC4MFP_Msk)) | SYS_GPC_MFP1_PC4MFP_SC1_nCD) /*!< Set PC4 function to SC1_nCD */ +#define SET_SC1_nCD_PD14() SYS->GPD_MFP3 = ((SYS->GPD_MFP3 & (~SYS_GPD_MFP3_PD14MFP_Msk)) | SYS_GPD_MFP3_PD14MFP_SC1_nCD) /*!< Set PD14 function to SC1_nCD */ +#define SET_SC1_nCD_PD3() SYS->GPD_MFP0 = ((SYS->GPD_MFP0 & (~SYS_GPD_MFP0_PD3MFP_Msk)) | SYS_GPD_MFP0_PD3MFP_SC1_nCD) /*!< Set PD3 function to SC1_nCD */ +#define SET_SC1_nCD_PG2() SYS->GPG_MFP0 = ((SYS->GPG_MFP0 & (~SYS_GPG_MFP0_PG2MFP_Msk)) | SYS_GPG_MFP0_PG2MFP_SC1_nCD) /*!< Set PG2 function to SC1_nCD */ +#define SET_SC1_nCD_PI6() SYS->GPI_MFP1 = ((SYS->GPI_MFP1 & (~SYS_GPI_MFP1_PI6MFP_Msk)) | SYS_GPI_MFP1_PI6MFP_SC1_nCD) /*!< Set PI6 function to SC1_nCD */ +#define SET_SC2_CLK_PA15() SYS->GPA_MFP3 = ((SYS->GPA_MFP3 & (~SYS_GPA_MFP3_PA15MFP_Msk)) | SYS_GPA_MFP3_PA15MFP_SC2_CLK) /*!< Set PA15 function to SC2_CLK */ +#define SET_SC2_CLK_PA6() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA6MFP_Msk)) | SYS_GPA_MFP1_PA6MFP_SC2_CLK) /*!< Set PA6 function to SC2_CLK */ +#define SET_SC2_CLK_PA8() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA8MFP_Msk)) | SYS_GPA_MFP2_PA8MFP_SC2_CLK) /*!< Set PA8 function to SC2_CLK */ +#define SET_SC2_CLK_PD0() SYS->GPD_MFP0 = ((SYS->GPD_MFP0 & (~SYS_GPD_MFP0_PD0MFP_Msk)) | SYS_GPD_MFP0_PD0MFP_SC2_CLK) /*!< Set PD0 function to SC2_CLK */ +#define SET_SC2_CLK_PE0() SYS->GPE_MFP0 = ((SYS->GPE_MFP0 & (~SYS_GPE_MFP0_PE0MFP_Msk)) | SYS_GPE_MFP0_PE0MFP_SC2_CLK) /*!< Set PE0 function to SC2_CLK */ +#define SET_SC2_CLK_PE2() SYS->GPE_MFP0 = ((SYS->GPE_MFP0 & (~SYS_GPE_MFP0_PE2MFP_Msk)) | SYS_GPE_MFP0_PE2MFP_SC2_CLK) /*!< Set PE2 function to SC2_CLK */ +#define SET_SC2_DAT_PA14() SYS->GPA_MFP3 = ((SYS->GPA_MFP3 & (~SYS_GPA_MFP3_PA14MFP_Msk)) | SYS_GPA_MFP3_PA14MFP_SC2_DAT) /*!< Set PA14 function to SC2_DAT */ +#define SET_SC2_DAT_PA7() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA7MFP_Msk)) | SYS_GPA_MFP1_PA7MFP_SC2_DAT) /*!< Set PA7 function to SC2_DAT */ +#define SET_SC2_DAT_PA9() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA9MFP_Msk)) | SYS_GPA_MFP2_PA9MFP_SC2_DAT) /*!< Set PA9 function to SC2_DAT */ +#define SET_SC2_DAT_PD1() SYS->GPD_MFP0 = ((SYS->GPD_MFP0 & (~SYS_GPD_MFP0_PD1MFP_Msk)) | SYS_GPD_MFP0_PD1MFP_SC2_DAT) /*!< Set PD1 function to SC2_DAT */ +#define SET_SC2_DAT_PE1() SYS->GPE_MFP0 = ((SYS->GPE_MFP0 & (~SYS_GPE_MFP0_PE1MFP_Msk)) | SYS_GPE_MFP0_PE1MFP_SC2_DAT) /*!< Set PE1 function to SC2_DAT */ +#define SET_SC2_DAT_PE3() SYS->GPE_MFP0 = ((SYS->GPE_MFP0 & (~SYS_GPE_MFP0_PE3MFP_Msk)) | SYS_GPE_MFP0_PE3MFP_SC2_DAT) /*!< Set PE3 function to SC2_DAT */ +#define SET_SC2_PWR_PA11() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA11MFP_Msk)) | SYS_GPA_MFP2_PA11MFP_SC2_PWR) /*!< Set PA11 function to SC2_PWR */ +#define SET_SC2_PWR_PA12() SYS->GPA_MFP3 = ((SYS->GPA_MFP3 & (~SYS_GPA_MFP3_PA12MFP_Msk)) | SYS_GPA_MFP3_PA12MFP_SC2_PWR) /*!< Set PA12 function to SC2_PWR */ +#define SET_SC2_PWR_PC7() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC7MFP_Msk)) | SYS_GPC_MFP1_PC7MFP_SC2_PWR) /*!< Set PC7 function to SC2_PWR */ +#define SET_SC2_PWR_PD3() SYS->GPD_MFP0 = ((SYS->GPD_MFP0 & (~SYS_GPD_MFP0_PD3MFP_Msk)) | SYS_GPD_MFP0_PD3MFP_SC2_PWR) /*!< Set PD3 function to SC2_PWR */ +#define SET_SC2_PWR_PH8() SYS->GPH_MFP2 = ((SYS->GPH_MFP2 & (~SYS_GPH_MFP2_PH8MFP_Msk)) | SYS_GPH_MFP2_PH8MFP_SC2_PWR) /*!< Set PH8 function to SC2_PWR */ +#define SET_SC2_RST_PA10() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA10MFP_Msk)) | SYS_GPA_MFP2_PA10MFP_SC2_RST) /*!< Set PA10 function to SC2_RST */ +#define SET_SC2_RST_PA13() SYS->GPA_MFP3 = ((SYS->GPA_MFP3 & (~SYS_GPA_MFP3_PA13MFP_Msk)) | SYS_GPA_MFP3_PA13MFP_SC2_RST) /*!< Set PA13 function to SC2_RST */ +#define SET_SC2_RST_PC6() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC6MFP_Msk)) | SYS_GPC_MFP1_PC6MFP_SC2_RST) /*!< Set PC6 function to SC2_RST */ +#define SET_SC2_RST_PD2() SYS->GPD_MFP0 = ((SYS->GPD_MFP0 & (~SYS_GPD_MFP0_PD2MFP_Msk)) | SYS_GPD_MFP0_PD2MFP_SC2_RST) /*!< Set PD2 function to SC2_RST */ +#define SET_SC2_RST_PH9() SYS->GPH_MFP2 = ((SYS->GPH_MFP2 & (~SYS_GPH_MFP2_PH9MFP_Msk)) | SYS_GPH_MFP2_PH9MFP_SC2_RST) /*!< Set PH9 function to SC2_RST */ +#define SET_SC2_nCD_PA5() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA5MFP_Msk)) | SYS_GPA_MFP1_PA5MFP_SC2_nCD) /*!< Set PA5 function to SC2_nCD */ +#define SET_SC2_nCD_PC13() SYS->GPC_MFP3 = ((SYS->GPC_MFP3 & (~SYS_GPC_MFP3_PC13MFP_Msk)) | SYS_GPC_MFP3_PC13MFP_SC2_nCD) /*!< Set PC13 function to SC2_nCD */ +#define SET_SC2_nCD_PD13() SYS->GPD_MFP3 = ((SYS->GPD_MFP3 & (~SYS_GPD_MFP3_PD13MFP_Msk)) | SYS_GPD_MFP3_PD13MFP_SC2_nCD) /*!< Set PD13 function to SC2_nCD */ +#define SET_SC2_nCD_PH10() SYS->GPH_MFP2 = ((SYS->GPH_MFP2 & (~SYS_GPH_MFP2_PH10MFP_Msk)) | SYS_GPH_MFP2_PH10MFP_SC2_nCD) /*!< Set PH10 function to SC2_nCD */ +#define SET_SD0_CLK_PB1() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB1MFP_Msk)) | SYS_GPB_MFP0_PB1MFP_SD0_CLK) /*!< Set PB1 function to SD0_CLK */ +#define SET_SD0_CLK_PE6() SYS->GPE_MFP1 = ((SYS->GPE_MFP1 & (~SYS_GPE_MFP1_PE6MFP_Msk)) | SYS_GPE_MFP1_PE6MFP_SD0_CLK) /*!< Set PE6 function to SD0_CLK */ +#define SET_SD0_CMD_PB0() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB0MFP_Msk)) | SYS_GPB_MFP0_PB0MFP_SD0_CMD) /*!< Set PB0 function to SD0_CMD */ +#define SET_SD0_CMD_PE7() SYS->GPE_MFP1 = ((SYS->GPE_MFP1 & (~SYS_GPE_MFP1_PE7MFP_Msk)) | SYS_GPE_MFP1_PE7MFP_SD0_CMD) /*!< Set PE7 function to SD0_CMD */ +#define SET_SD0_DAT0_PB2() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB2MFP_Msk)) | SYS_GPB_MFP0_PB2MFP_SD0_DAT0) /*!< Set PB2 function to SD0_DAT0 */ +#define SET_SD0_DAT0_PE2() SYS->GPE_MFP0 = ((SYS->GPE_MFP0 & (~SYS_GPE_MFP0_PE2MFP_Msk)) | SYS_GPE_MFP0_PE2MFP_SD0_DAT0) /*!< Set PE2 function to SD0_DAT0 */ +#define SET_SD0_DAT1_PB3() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB3MFP_Msk)) | SYS_GPB_MFP0_PB3MFP_SD0_DAT1) /*!< Set PB3 function to SD0_DAT1 */ +#define SET_SD0_DAT1_PE3() SYS->GPE_MFP0 = ((SYS->GPE_MFP0 & (~SYS_GPE_MFP0_PE3MFP_Msk)) | SYS_GPE_MFP0_PE3MFP_SD0_DAT1) /*!< Set PE3 function to SD0_DAT1 */ +#define SET_SD0_DAT2_PB4() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB4MFP_Msk)) | SYS_GPB_MFP1_PB4MFP_SD0_DAT2) /*!< Set PB4 function to SD0_DAT2 */ +#define SET_SD0_DAT2_PE4() SYS->GPE_MFP1 = ((SYS->GPE_MFP1 & (~SYS_GPE_MFP1_PE4MFP_Msk)) | SYS_GPE_MFP1_PE4MFP_SD0_DAT2) /*!< Set PE4 function to SD0_DAT2 */ +#define SET_SD0_DAT3_PB5() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB5MFP_Msk)) | SYS_GPB_MFP1_PB5MFP_SD0_DAT3) /*!< Set PB5 function to SD0_DAT3 */ +#define SET_SD0_DAT3_PE5() SYS->GPE_MFP1 = ((SYS->GPE_MFP1 & (~SYS_GPE_MFP1_PE5MFP_Msk)) | SYS_GPE_MFP1_PE5MFP_SD0_DAT3) /*!< Set PE5 function to SD0_DAT3 */ +#define SET_SD0_nCD_PB12() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB12MFP_Msk)) | SYS_GPB_MFP3_PB12MFP_SD0_nCD) /*!< Set PB12 function to SD0_nCD */ +#define SET_SD0_nCD_PD13() SYS->GPD_MFP3 = ((SYS->GPD_MFP3 & (~SYS_GPD_MFP3_PD13MFP_Msk)) | SYS_GPD_MFP3_PD13MFP_SD0_nCD) /*!< Set PD13 function to SD0_nCD */ +#define SET_SD1_CLK_PA4() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA4MFP_Msk)) | SYS_GPA_MFP1_PA4MFP_SD1_CLK) /*!< Set PA4 function to SD1_CLK */ +#define SET_SD1_CLK_PB6() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB6MFP_Msk)) | SYS_GPB_MFP1_PB6MFP_SD1_CLK) /*!< Set PB6 function to SD1_CLK */ +#define SET_SD1_CLK_PD13() SYS->GPD_MFP3 = ((SYS->GPD_MFP3 & (~SYS_GPD_MFP3_PD13MFP_Msk)) | SYS_GPD_MFP3_PD13MFP_SD1_CLK) /*!< Set PD13 function to SD1_CLK */ +#define SET_SD1_CLK_PD6() SYS->GPD_MFP1 = ((SYS->GPD_MFP1 & (~SYS_GPD_MFP1_PD6MFP_Msk)) | SYS_GPD_MFP1_PD6MFP_SD1_CLK) /*!< Set PD6 function to SD1_CLK */ +#define SET_SD1_CLK_PJ13() SYS->GPJ_MFP3 = ((SYS->GPJ_MFP3 & (~SYS_GPJ_MFP3_PJ13MFP_Msk)) | SYS_GPJ_MFP3_PJ13MFP_SD1_CLK) /*!< Set PJ13 function to SD1_CLK */ +#define SET_SD1_CMD_PA5() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA5MFP_Msk)) | SYS_GPA_MFP1_PA5MFP_SD1_CMD) /*!< Set PA5 function to SD1_CMD */ +#define SET_SD1_CMD_PB7() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB7MFP_Msk)) | SYS_GPB_MFP1_PB7MFP_SD1_CMD) /*!< Set PB7 function to SD1_CMD */ +#define SET_SD1_CMD_PD7() SYS->GPD_MFP1 = ((SYS->GPD_MFP1 & (~SYS_GPD_MFP1_PD7MFP_Msk)) | SYS_GPD_MFP1_PD7MFP_SD1_CMD) /*!< Set PD7 function to SD1_CMD */ +#define SET_SD1_CMD_PJ12() SYS->GPJ_MFP3 = ((SYS->GPJ_MFP3 & (~SYS_GPJ_MFP3_PJ12MFP_Msk)) | SYS_GPJ_MFP3_PJ12MFP_SD1_CMD) /*!< Set PJ12 function to SD1_CMD */ +#define SET_SD1_DAT0_PA0() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA0MFP_Msk)) | SYS_GPA_MFP0_PA0MFP_SD1_DAT0) /*!< Set PA0 function to SD1_DAT0 */ +#define SET_SD1_DAT0_PA8() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA8MFP_Msk)) | SYS_GPA_MFP2_PA8MFP_SD1_DAT0) /*!< Set PA8 function to SD1_DAT0 */ +#define SET_SD1_DAT0_PG12() SYS->GPG_MFP3 = ((SYS->GPG_MFP3 & (~SYS_GPG_MFP3_PG12MFP_Msk)) | SYS_GPG_MFP3_PG12MFP_SD1_DAT0) /*!< Set PG12 function to SD1_DAT0 */ +#define SET_SD1_DAT0_PJ11() SYS->GPJ_MFP2 = ((SYS->GPJ_MFP2 & (~SYS_GPJ_MFP2_PJ11MFP_Msk)) | SYS_GPJ_MFP2_PJ11MFP_SD1_DAT0) /*!< Set PJ11 function to SD1_DAT0 */ +#define SET_SD1_DAT1_PA1() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA1MFP_Msk)) | SYS_GPA_MFP0_PA1MFP_SD1_DAT1) /*!< Set PA1 function to SD1_DAT1 */ +#define SET_SD1_DAT1_PA9() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA9MFP_Msk)) | SYS_GPA_MFP2_PA9MFP_SD1_DAT1) /*!< Set PA9 function to SD1_DAT1 */ +#define SET_SD1_DAT1_PG11() SYS->GPG_MFP2 = ((SYS->GPG_MFP2 & (~SYS_GPG_MFP2_PG11MFP_Msk)) | SYS_GPG_MFP2_PG11MFP_SD1_DAT1) /*!< Set PG11 function to SD1_DAT1 */ +#define SET_SD1_DAT1_PJ10() SYS->GPJ_MFP2 = ((SYS->GPJ_MFP2 & (~SYS_GPJ_MFP2_PJ10MFP_Msk)) | SYS_GPJ_MFP2_PJ10MFP_SD1_DAT1) /*!< Set PJ10 function to SD1_DAT1 */ +#define SET_SD1_DAT2_PA10() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA10MFP_Msk)) | SYS_GPA_MFP2_PA10MFP_SD1_DAT2) /*!< Set PA10 function to SD1_DAT2 */ +#define SET_SD1_DAT2_PA2() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA2MFP_Msk)) | SYS_GPA_MFP0_PA2MFP_SD1_DAT2) /*!< Set PA2 function to SD1_DAT2 */ +#define SET_SD1_DAT2_PG10() SYS->GPG_MFP2 = ((SYS->GPG_MFP2 & (~SYS_GPG_MFP2_PG10MFP_Msk)) | SYS_GPG_MFP2_PG10MFP_SD1_DAT2) /*!< Set PG10 function to SD1_DAT2 */ +#define SET_SD1_DAT2_PJ9() SYS->GPJ_MFP2 = ((SYS->GPJ_MFP2 & (~SYS_GPJ_MFP2_PJ9MFP_Msk)) | SYS_GPJ_MFP2_PJ9MFP_SD1_DAT2) /*!< Set PJ9 function to SD1_DAT2 */ +#define SET_SD1_DAT3_PA11() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA11MFP_Msk)) | SYS_GPA_MFP2_PA11MFP_SD1_DAT3) /*!< Set PA11 function to SD1_DAT3 */ +#define SET_SD1_DAT3_PA3() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA3MFP_Msk)) | SYS_GPA_MFP0_PA3MFP_SD1_DAT3) /*!< Set PA3 function to SD1_DAT3 */ +#define SET_SD1_DAT3_PG9() SYS->GPG_MFP2 = ((SYS->GPG_MFP2 & (~SYS_GPG_MFP2_PG9MFP_Msk)) | SYS_GPG_MFP2_PG9MFP_SD1_DAT3) /*!< Set PG9 function to SD1_DAT3 */ +#define SET_SD1_DAT3_PJ8() SYS->GPJ_MFP2 = ((SYS->GPJ_MFP2 & (~SYS_GPJ_MFP2_PJ8MFP_Msk)) | SYS_GPJ_MFP2_PJ8MFP_SD1_DAT3) /*!< Set PJ8 function to SD1_DAT3 */ +#define SET_SD1_nCD_PA12() SYS->GPA_MFP3 = ((SYS->GPA_MFP3 & (~SYS_GPA_MFP3_PA12MFP_Msk)) | SYS_GPA_MFP3_PA12MFP_SD1_nCD) /*!< Set PA12 function to SD1_nCD */ +#define SET_SD1_nCD_PA6() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA6MFP_Msk)) | SYS_GPA_MFP1_PA6MFP_SD1_nCD) /*!< Set PA6 function to SD1_nCD */ +#define SET_SD1_nCD_PD5() SYS->GPD_MFP1 = ((SYS->GPD_MFP1 & (~SYS_GPD_MFP1_PD5MFP_Msk)) | SYS_GPD_MFP1_PD5MFP_SD1_nCD) /*!< Set PD5 function to SD1_nCD */ +#define SET_SD1_nCD_PE14() SYS->GPE_MFP3 = ((SYS->GPE_MFP3 & (~SYS_GPE_MFP3_PE14MFP_Msk)) | SYS_GPE_MFP3_PE14MFP_SD1_nCD) /*!< Set PE14 function to SD1_nCD */ +#define SET_SPI0_CLK_PA2() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA2MFP_Msk)) | SYS_GPA_MFP0_PA2MFP_SPI0_CLK) /*!< Set PA2 function to SPI0_CLK */ +#define SET_SPI0_CLK_PB14() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB14MFP_Msk)) | SYS_GPB_MFP3_PB14MFP_SPI0_CLK) /*!< Set PB14 function to SPI0_CLK */ +#define SET_SPI0_CLK_PB6() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB6MFP_Msk)) | SYS_GPB_MFP1_PB6MFP_SPI0_CLK) /*!< Set PB6 function to SPI0_CLK */ +#define SET_SPI0_CLK_PD2() SYS->GPD_MFP0 = ((SYS->GPD_MFP0 & (~SYS_GPD_MFP0_PD2MFP_Msk)) | SYS_GPD_MFP0_PD2MFP_SPI0_CLK) /*!< Set PD2 function to SPI0_CLK */ +#define SET_SPI0_CLK_PF8() SYS->GPF_MFP2 = ((SYS->GPF_MFP2 & (~SYS_GPF_MFP2_PF8MFP_Msk)) | SYS_GPF_MFP2_PF8MFP_SPI0_CLK) /*!< Set PF8 function to SPI0_CLK */ +#define SET_SPI0_I2SMCLK_PA4() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA4MFP_Msk)) | SYS_GPA_MFP1_PA4MFP_SPI0_I2SMCLK) /*!< Set PA4 function to SPI0_I2SMCLK */ +#define SET_SPI0_I2SMCLK_PB0() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB0MFP_Msk)) | SYS_GPB_MFP0_PB0MFP_SPI0_I2SMCLK) /*!< Set PB0 function to SPI0_I2SMCLK */ +#define SET_SPI0_I2SMCLK_PB11() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB11MFP_Msk)) | SYS_GPB_MFP2_PB11MFP_SPI0_I2SMCLK) /*!< Set PB11 function to SPI0_I2SMCLK */ +#define SET_SPI0_I2SMCLK_PB12() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB12MFP_Msk)) | SYS_GPB_MFP3_PB12MFP_SPI0_I2SMCLK) /*!< Set PB12 function to SPI0_I2SMCLK */ +#define SET_SPI0_I2SMCLK_PC14() SYS->GPC_MFP3 = ((SYS->GPC_MFP3 & (~SYS_GPC_MFP3_PC14MFP_Msk)) | SYS_GPC_MFP3_PC14MFP_SPI0_I2SMCLK) /*!< Set PC14 function to SPI0_I2SMCLK */ +#define SET_SPI0_I2SMCLK_PD13() SYS->GPD_MFP3 = ((SYS->GPD_MFP3 & (~SYS_GPD_MFP3_PD13MFP_Msk)) | SYS_GPD_MFP3_PD13MFP_SPI0_I2SMCLK) /*!< Set PD13 function to SPI0_I2SMCLK */ +#define SET_SPI0_I2SMCLK_PD14() SYS->GPD_MFP3 = ((SYS->GPD_MFP3 & (~SYS_GPD_MFP3_PD14MFP_Msk)) | SYS_GPD_MFP3_PD14MFP_SPI0_I2SMCLK) /*!< Set PD14 function to SPI0_I2SMCLK */ +#define SET_SPI0_I2SMCLK_PF10() SYS->GPF_MFP2 = ((SYS->GPF_MFP2 & (~SYS_GPF_MFP2_PF10MFP_Msk)) | SYS_GPF_MFP2_PF10MFP_SPI0_I2SMCLK) /*!< Set PF10 function to SPI0_I2SMCLK */ +#define SET_SPI0_I2SMCLK_PG2() SYS->GPG_MFP0 = ((SYS->GPG_MFP0 & (~SYS_GPG_MFP0_PG2MFP_Msk)) | SYS_GPG_MFP0_PG2MFP_SPI0_I2SMCLK) /*!< Set PG2 function to SPI0_I2SMCLK */ +#define SET_SPI0_MISO_PA1() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA1MFP_Msk)) | SYS_GPA_MFP0_PA1MFP_SPI0_MISO) /*!< Set PA1 function to SPI0_MISO */ +#define SET_SPI0_MISO_PB13() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB13MFP_Msk)) | SYS_GPB_MFP3_PB13MFP_SPI0_MISO) /*!< Set PB13 function to SPI0_MISO */ +#define SET_SPI0_MISO_PD1() SYS->GPD_MFP0 = ((SYS->GPD_MFP0 & (~SYS_GPD_MFP0_PD1MFP_Msk)) | SYS_GPD_MFP0_PD1MFP_SPI0_MISO) /*!< Set PD1 function to SPI0_MISO */ +#define SET_SPI0_MISO_PF7() SYS->GPF_MFP1 = ((SYS->GPF_MFP1 & (~SYS_GPF_MFP1_PF7MFP_Msk)) | SYS_GPF_MFP1_PF7MFP_SPI0_MISO) /*!< Set PF7 function to SPI0_MISO */ +#define SET_SPI0_MOSI_PA0() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA0MFP_Msk)) | SYS_GPA_MFP0_PA0MFP_SPI0_MOSI) /*!< Set PA0 function to SPI0_MOSI */ +#define SET_SPI0_MOSI_PB12() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB12MFP_Msk)) | SYS_GPB_MFP3_PB12MFP_SPI0_MOSI) /*!< Set PB12 function to SPI0_MOSI */ +#define SET_SPI0_MOSI_PD0() SYS->GPD_MFP0 = ((SYS->GPD_MFP0 & (~SYS_GPD_MFP0_PD0MFP_Msk)) | SYS_GPD_MFP0_PD0MFP_SPI0_MOSI) /*!< Set PD0 function to SPI0_MOSI */ +#define SET_SPI0_MOSI_PF6() SYS->GPF_MFP1 = ((SYS->GPF_MFP1 & (~SYS_GPF_MFP1_PF6MFP_Msk)) | SYS_GPF_MFP1_PF6MFP_SPI0_MOSI) /*!< Set PF6 function to SPI0_MOSI */ +#define SET_SPI0_SS_PA3() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA3MFP_Msk)) | SYS_GPA_MFP0_PA3MFP_SPI0_SS) /*!< Set PA3 function to SPI0_SS */ +#define SET_SPI0_SS_PB15() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB15MFP_Msk)) | SYS_GPB_MFP3_PB15MFP_SPI0_SS) /*!< Set PB15 function to SPI0_SS */ +#define SET_SPI0_SS_PB7() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB7MFP_Msk)) | SYS_GPB_MFP1_PB7MFP_SPI0_SS) /*!< Set PB7 function to SPI0_SS */ +#define SET_SPI0_SS_PD3() SYS->GPD_MFP0 = ((SYS->GPD_MFP0 & (~SYS_GPD_MFP0_PD3MFP_Msk)) | SYS_GPD_MFP0_PD3MFP_SPI0_SS) /*!< Set PD3 function to SPI0_SS */ +#define SET_SPI0_SS_PF9() SYS->GPF_MFP2 = ((SYS->GPF_MFP2 & (~SYS_GPF_MFP2_PF9MFP_Msk)) | SYS_GPF_MFP2_PF9MFP_SPI0_SS) /*!< Set PF9 function to SPI0_SS */ +#define SET_SPI1_CLK_PA7() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA7MFP_Msk)) | SYS_GPA_MFP1_PA7MFP_SPI1_CLK) /*!< Set PA7 function to SPI1_CLK */ +#define SET_SPI1_CLK_PB3() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB3MFP_Msk)) | SYS_GPB_MFP0_PB3MFP_SPI1_CLK) /*!< Set PB3 function to SPI1_CLK */ +#define SET_SPI1_CLK_PC1() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC1MFP_Msk)) | SYS_GPC_MFP0_PC1MFP_SPI1_CLK) /*!< Set PC1 function to SPI1_CLK */ +#define SET_SPI1_CLK_PG15() SYS->GPG_MFP3 = ((SYS->GPG_MFP3 & (~SYS_GPG_MFP3_PG15MFP_Msk)) | SYS_GPG_MFP3_PG15MFP_SPI1_CLK) /*!< Set PG15 function to SPI1_CLK */ +#define SET_SPI1_CLK_PH6() SYS->GPH_MFP1 = ((SYS->GPH_MFP1 & (~SYS_GPH_MFP1_PH6MFP_Msk)) | SYS_GPH_MFP1_PH6MFP_SPI1_CLK) /*!< Set PH6 function to SPI1_CLK */ +#define SET_SPI1_CLK_PH8() SYS->GPH_MFP2 = ((SYS->GPH_MFP2 & (~SYS_GPH_MFP2_PH8MFP_Msk)) | SYS_GPH_MFP2_PH8MFP_SPI1_CLK) /*!< Set PH8 function to SPI1_CLK */ +#define SET_SPI1_CLK_PI9() SYS->GPI_MFP2 = ((SYS->GPI_MFP2 & (~SYS_GPI_MFP2_PI9MFP_Msk)) | SYS_GPI_MFP2_PI9MFP_SPI1_CLK) /*!< Set PI9 function to SPI1_CLK */ +#define SET_SPI1_I2SMCLK_PA5() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA5MFP_Msk)) | SYS_GPA_MFP1_PA5MFP_SPI1_I2SMCLK) /*!< Set PA5 function to SPI1_I2SMCLK */ +#define SET_SPI1_I2SMCLK_PB1() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB1MFP_Msk)) | SYS_GPB_MFP0_PB1MFP_SPI1_I2SMCLK) /*!< Set PB1 function to SPI1_I2SMCLK */ +#define SET_SPI1_I2SMCLK_PC4() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC4MFP_Msk)) | SYS_GPC_MFP1_PC4MFP_SPI1_I2SMCLK) /*!< Set PC4 function to SPI1_I2SMCLK */ +#define SET_SPI1_I2SMCLK_PD13() SYS->GPD_MFP3 = ((SYS->GPD_MFP3 & (~SYS_GPD_MFP3_PD13MFP_Msk)) | SYS_GPD_MFP3_PD13MFP_SPI1_I2SMCLK) /*!< Set PD13 function to SPI1_I2SMCLK */ +#define SET_SPI1_I2SMCLK_PH10() SYS->GPH_MFP2 = ((SYS->GPH_MFP2 & (~SYS_GPH_MFP2_PH10MFP_Msk)) | SYS_GPH_MFP2_PH10MFP_SPI1_I2SMCLK) /*!< Set PH10 function to SPI1_I2SMCLK */ +#define SET_SPI1_I2SMCLK_PH3() SYS->GPH_MFP0 = ((SYS->GPH_MFP0 & (~SYS_GPH_MFP0_PH3MFP_Msk)) | SYS_GPH_MFP0_PH3MFP_SPI1_I2SMCLK) /*!< Set PH3 function to SPI1_I2SMCLK */ +#define SET_SPI1_I2SMCLK_PI6() SYS->GPI_MFP1 = ((SYS->GPI_MFP1 & (~SYS_GPI_MFP1_PI6MFP_Msk)) | SYS_GPI_MFP1_PI6MFP_SPI1_I2SMCLK) /*!< Set PI6 function to SPI1_I2SMCLK */ +#define SET_SPI1_MISO_PB5() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB5MFP_Msk)) | SYS_GPB_MFP1_PB5MFP_SPI1_MISO) /*!< Set PB5 function to SPI1_MISO */ +#define SET_SPI1_MISO_PC3() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC3MFP_Msk)) | SYS_GPC_MFP0_PC3MFP_SPI1_MISO) /*!< Set PC3 function to SPI1_MISO */ +#define SET_SPI1_MISO_PC7() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC7MFP_Msk)) | SYS_GPC_MFP1_PC7MFP_SPI1_MISO) /*!< Set PC7 function to SPI1_MISO */ +#define SET_SPI1_MISO_PE1() SYS->GPE_MFP0 = ((SYS->GPE_MFP0 & (~SYS_GPE_MFP0_PE1MFP_Msk)) | SYS_GPE_MFP0_PE1MFP_SPI1_MISO) /*!< Set PE1 function to SPI1_MISO */ +#define SET_SPI1_MISO_PE5() SYS->GPE_MFP1 = ((SYS->GPE_MFP1 & (~SYS_GPE_MFP1_PE5MFP_Msk)) | SYS_GPE_MFP1_PE5MFP_SPI1_MISO) /*!< Set PE5 function to SPI1_MISO */ +#define SET_SPI1_MISO_PG13() SYS->GPG_MFP3 = ((SYS->GPG_MFP3 & (~SYS_GPG_MFP3_PG13MFP_Msk)) | SYS_GPG_MFP3_PG13MFP_SPI1_MISO) /*!< Set PG13 function to SPI1_MISO */ +#define SET_SPI1_MISO_PH4() SYS->GPH_MFP1 = ((SYS->GPH_MFP1 & (~SYS_GPH_MFP1_PH4MFP_Msk)) | SYS_GPH_MFP1_PH4MFP_SPI1_MISO) /*!< Set PH4 function to SPI1_MISO */ +#define SET_SPI1_MISO_PI7() SYS->GPI_MFP1 = ((SYS->GPI_MFP1 & (~SYS_GPI_MFP1_PI7MFP_Msk)) | SYS_GPI_MFP1_PI7MFP_SPI1_MISO) /*!< Set PI7 function to SPI1_MISO */ +#define SET_SPI1_MOSI_PB4() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB4MFP_Msk)) | SYS_GPB_MFP1_PB4MFP_SPI1_MOSI) /*!< Set PB4 function to SPI1_MOSI */ +#define SET_SPI1_MOSI_PC2() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC2MFP_Msk)) | SYS_GPC_MFP0_PC2MFP_SPI1_MOSI) /*!< Set PC2 function to SPI1_MOSI */ +#define SET_SPI1_MOSI_PC6() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC6MFP_Msk)) | SYS_GPC_MFP1_PC6MFP_SPI1_MOSI) /*!< Set PC6 function to SPI1_MOSI */ +#define SET_SPI1_MOSI_PE0() SYS->GPE_MFP0 = ((SYS->GPE_MFP0 & (~SYS_GPE_MFP0_PE0MFP_Msk)) | SYS_GPE_MFP0_PE0MFP_SPI1_MOSI) /*!< Set PE0 function to SPI1_MOSI */ +#define SET_SPI1_MOSI_PE4() SYS->GPE_MFP1 = ((SYS->GPE_MFP1 & (~SYS_GPE_MFP1_PE4MFP_Msk)) | SYS_GPE_MFP1_PE4MFP_SPI1_MOSI) /*!< Set PE4 function to SPI1_MOSI */ +#define SET_SPI1_MOSI_PG14() SYS->GPG_MFP3 = ((SYS->GPG_MFP3 & (~SYS_GPG_MFP3_PG14MFP_Msk)) | SYS_GPG_MFP3_PG14MFP_SPI1_MOSI) /*!< Set PG14 function to SPI1_MOSI */ +#define SET_SPI1_MOSI_PH5() SYS->GPH_MFP1 = ((SYS->GPH_MFP1 & (~SYS_GPH_MFP1_PH5MFP_Msk)) | SYS_GPH_MFP1_PH5MFP_SPI1_MOSI) /*!< Set PH5 function to SPI1_MOSI */ +#define SET_SPI1_MOSI_PI8() SYS->GPI_MFP2 = ((SYS->GPI_MFP2 & (~SYS_GPI_MFP2_PI8MFP_Msk)) | SYS_GPI_MFP2_PI8MFP_SPI1_MOSI) /*!< Set PI8 function to SPI1_MOSI */ +#define SET_SPI1_SS_PA6() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA6MFP_Msk)) | SYS_GPA_MFP1_PA6MFP_SPI1_SS) /*!< Set PA6 function to SPI1_SS */ +#define SET_SPI1_SS_PB2() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB2MFP_Msk)) | SYS_GPB_MFP0_PB2MFP_SPI1_SS) /*!< Set PB2 function to SPI1_SS */ +#define SET_SPI1_SS_PC0() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC0MFP_Msk)) | SYS_GPC_MFP0_PC0MFP_SPI1_SS) /*!< Set PC0 function to SPI1_SS */ +#define SET_SPI1_SS_PD4() SYS->GPD_MFP1 = ((SYS->GPD_MFP1 & (~SYS_GPD_MFP1_PD4MFP_Msk)) | SYS_GPD_MFP1_PD4MFP_SPI1_SS) /*!< Set PD4 function to SPI1_SS */ +#define SET_SPI1_SS_PH7() SYS->GPH_MFP1 = ((SYS->GPH_MFP1 & (~SYS_GPH_MFP1_PH7MFP_Msk)) | SYS_GPH_MFP1_PH7MFP_SPI1_SS) /*!< Set PH7 function to SPI1_SS */ +#define SET_SPI1_SS_PH9() SYS->GPH_MFP2 = ((SYS->GPH_MFP2 & (~SYS_GPH_MFP2_PH9MFP_Msk)) | SYS_GPH_MFP2_PH9MFP_SPI1_SS) /*!< Set PH9 function to SPI1_SS */ +#define SET_SPI1_SS_PI10() SYS->GPI_MFP2 = ((SYS->GPI_MFP2 & (~SYS_GPI_MFP2_PI10MFP_Msk)) | SYS_GPI_MFP2_PI10MFP_SPI1_SS) /*!< Set PI10 function to SPI1_SS */ +#define SET_SPI2_CLK_PA10() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA10MFP_Msk)) | SYS_GPA_MFP2_PA10MFP_SPI2_CLK) /*!< Set PA10 function to SPI2_CLK */ +#define SET_SPI2_CLK_PA13() SYS->GPA_MFP3 = ((SYS->GPA_MFP3 & (~SYS_GPA_MFP3_PA13MFP_Msk)) | SYS_GPA_MFP3_PA13MFP_SPI2_CLK) /*!< Set PA13 function to SPI2_CLK */ +#define SET_SPI2_CLK_PE8() SYS->GPE_MFP2 = ((SYS->GPE_MFP2 & (~SYS_GPE_MFP2_PE8MFP_Msk)) | SYS_GPE_MFP2_PE8MFP_SPI2_CLK) /*!< Set PE8 function to SPI2_CLK */ +#define SET_SPI2_CLK_PG3() SYS->GPG_MFP0 = ((SYS->GPG_MFP0 & (~SYS_GPG_MFP0_PG3MFP_Msk)) | SYS_GPG_MFP0_PG3MFP_SPI2_CLK) /*!< Set PG3 function to SPI2_CLK */ +#define SET_SPI2_I2SMCLK_PB0() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB0MFP_Msk)) | SYS_GPB_MFP0_PB0MFP_SPI2_I2SMCLK) /*!< Set PB0 function to SPI2_I2SMCLK */ +#define SET_SPI2_I2SMCLK_PC13() SYS->GPC_MFP3 = ((SYS->GPC_MFP3 & (~SYS_GPC_MFP3_PC13MFP_Msk)) | SYS_GPC_MFP3_PC13MFP_SPI2_I2SMCLK) /*!< Set PC13 function to SPI2_I2SMCLK */ +#define SET_SPI2_I2SMCLK_PE12() SYS->GPE_MFP3 = ((SYS->GPE_MFP3 & (~SYS_GPE_MFP3_PE12MFP_Msk)) | SYS_GPE_MFP3_PE12MFP_SPI2_I2SMCLK) /*!< Set PE12 function to SPI2_I2SMCLK */ +#define SET_SPI2_I2SMCLK_PG1() SYS->GPG_MFP0 = ((SYS->GPG_MFP0 & (~SYS_GPG_MFP0_PG1MFP_Msk)) | SYS_GPG_MFP0_PG1MFP_SPI2_I2SMCLK) /*!< Set PG1 function to SPI2_I2SMCLK */ +#define SET_SPI2_MISO_PA14() SYS->GPA_MFP3 = ((SYS->GPA_MFP3 & (~SYS_GPA_MFP3_PA14MFP_Msk)) | SYS_GPA_MFP3_PA14MFP_SPI2_MISO) /*!< Set PA14 function to SPI2_MISO */ +#define SET_SPI2_MISO_PA9() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA9MFP_Msk)) | SYS_GPA_MFP2_PA9MFP_SPI2_MISO) /*!< Set PA9 function to SPI2_MISO */ +#define SET_SPI2_MISO_PE9() SYS->GPE_MFP2 = ((SYS->GPE_MFP2 & (~SYS_GPE_MFP2_PE9MFP_Msk)) | SYS_GPE_MFP2_PE9MFP_SPI2_MISO) /*!< Set PE9 function to SPI2_MISO */ +#define SET_SPI2_MISO_PG4() SYS->GPG_MFP1 = ((SYS->GPG_MFP1 & (~SYS_GPG_MFP1_PG4MFP_Msk)) | SYS_GPG_MFP1_PG4MFP_SPI2_MISO) /*!< Set PG4 function to SPI2_MISO */ +#define SET_SPI2_MOSI_PA15() SYS->GPA_MFP3 = ((SYS->GPA_MFP3 & (~SYS_GPA_MFP3_PA15MFP_Msk)) | SYS_GPA_MFP3_PA15MFP_SPI2_MOSI) /*!< Set PA15 function to SPI2_MOSI */ +#define SET_SPI2_MOSI_PA8() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA8MFP_Msk)) | SYS_GPA_MFP2_PA8MFP_SPI2_MOSI) /*!< Set PA8 function to SPI2_MOSI */ +#define SET_SPI2_MOSI_PE10() SYS->GPE_MFP2 = ((SYS->GPE_MFP2 & (~SYS_GPE_MFP2_PE10MFP_Msk)) | SYS_GPE_MFP2_PE10MFP_SPI2_MOSI) /*!< Set PE10 function to SPI2_MOSI */ +#define SET_SPI2_MOSI_PF11() SYS->GPF_MFP2 = ((SYS->GPF_MFP2 & (~SYS_GPF_MFP2_PF11MFP_Msk)) | SYS_GPF_MFP2_PF11MFP_SPI2_MOSI) /*!< Set PF11 function to SPI2_MOSI */ +#define SET_SPI2_SS_PA11() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA11MFP_Msk)) | SYS_GPA_MFP2_PA11MFP_SPI2_SS) /*!< Set PA11 function to SPI2_SS */ +#define SET_SPI2_SS_PA12() SYS->GPA_MFP3 = ((SYS->GPA_MFP3 & (~SYS_GPA_MFP3_PA12MFP_Msk)) | SYS_GPA_MFP3_PA12MFP_SPI2_SS) /*!< Set PA12 function to SPI2_SS */ +#define SET_SPI2_SS_PE11() SYS->GPE_MFP2 = ((SYS->GPE_MFP2 & (~SYS_GPE_MFP2_PE11MFP_Msk)) | SYS_GPE_MFP2_PE11MFP_SPI2_SS) /*!< Set PE11 function to SPI2_SS */ +#define SET_SPI2_SS_PG2() SYS->GPG_MFP0 = ((SYS->GPG_MFP0 & (~SYS_GPG_MFP0_PG2MFP_Msk)) | SYS_GPG_MFP0_PG2MFP_SPI2_SS) /*!< Set PG2 function to SPI2_SS */ +#define SET_SPI3_CLK_PB11() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB11MFP_Msk)) | SYS_GPB_MFP2_PB11MFP_SPI3_CLK) /*!< Set PB11 function to SPI3_CLK */ +#define SET_SPI3_CLK_PC10() SYS->GPC_MFP2 = ((SYS->GPC_MFP2 & (~SYS_GPC_MFP2_PC10MFP_Msk)) | SYS_GPC_MFP2_PC10MFP_SPI3_CLK) /*!< Set PC10 function to SPI3_CLK */ +#define SET_SPI3_CLK_PE4() SYS->GPE_MFP1 = ((SYS->GPE_MFP1 & (~SYS_GPE_MFP1_PE4MFP_Msk)) | SYS_GPE_MFP1_PE4MFP_SPI3_CLK) /*!< Set PE4 function to SPI3_CLK */ +#define SET_SPI3_CLK_PG6() SYS->GPG_MFP1 = ((SYS->GPG_MFP1 & (~SYS_GPG_MFP1_PG6MFP_Msk)) | SYS_GPG_MFP1_PG6MFP_SPI3_CLK) /*!< Set PG6 function to SPI3_CLK */ +#define SET_SPI3_I2SMCLK_PB1() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB1MFP_Msk)) | SYS_GPB_MFP0_PB1MFP_SPI3_I2SMCLK) /*!< Set PB1 function to SPI3_I2SMCLK */ +#define SET_SPI3_I2SMCLK_PD14() SYS->GPD_MFP3 = ((SYS->GPD_MFP3 & (~SYS_GPD_MFP3_PD14MFP_Msk)) | SYS_GPD_MFP3_PD14MFP_SPI3_I2SMCLK) /*!< Set PD14 function to SPI3_I2SMCLK */ +#define SET_SPI3_I2SMCLK_PE6() SYS->GPE_MFP1 = ((SYS->GPE_MFP1 & (~SYS_GPE_MFP1_PE6MFP_Msk)) | SYS_GPE_MFP1_PE6MFP_SPI3_I2SMCLK) /*!< Set PE6 function to SPI3_I2SMCLK */ +#define SET_SPI3_I2SMCLK_PF6() SYS->GPF_MFP1 = ((SYS->GPF_MFP1 & (~SYS_GPF_MFP1_PF6MFP_Msk)) | SYS_GPF_MFP1_PF6MFP_SPI3_I2SMCLK) /*!< Set PF6 function to SPI3_I2SMCLK */ +#define SET_SPI3_I2SMCLK_PH4() SYS->GPH_MFP1 = ((SYS->GPH_MFP1 & (~SYS_GPH_MFP1_PH4MFP_Msk)) | SYS_GPH_MFP1_PH4MFP_SPI3_I2SMCLK) /*!< Set PH4 function to SPI3_I2SMCLK */ +#define SET_SPI3_MISO_PB9() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB9MFP_Msk)) | SYS_GPB_MFP2_PB9MFP_SPI3_MISO) /*!< Set PB9 function to SPI3_MISO */ +#define SET_SPI3_MISO_PC12() SYS->GPC_MFP3 = ((SYS->GPC_MFP3 & (~SYS_GPC_MFP3_PC12MFP_Msk)) | SYS_GPC_MFP3_PC12MFP_SPI3_MISO) /*!< Set PC12 function to SPI3_MISO */ +#define SET_SPI3_MISO_PE3() SYS->GPE_MFP0 = ((SYS->GPE_MFP0 & (~SYS_GPE_MFP0_PE3MFP_Msk)) | SYS_GPE_MFP0_PE3MFP_SPI3_MISO) /*!< Set PE3 function to SPI3_MISO */ +#define SET_SPI3_MISO_PG7() SYS->GPG_MFP1 = ((SYS->GPG_MFP1 & (~SYS_GPG_MFP1_PG7MFP_Msk)) | SYS_GPG_MFP1_PG7MFP_SPI3_MISO) /*!< Set PG7 function to SPI3_MISO */ +#define SET_SPI3_MISO_PH0() SYS->GPH_MFP0 = ((SYS->GPH_MFP0 & (~SYS_GPH_MFP0_PH0MFP_Msk)) | SYS_GPH_MFP0_PH0MFP_SPI3_MISO) /*!< Set PH0 function to SPI3_MISO */ +#define SET_SPI3_MOSI_PB8() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB8MFP_Msk)) | SYS_GPB_MFP2_PB8MFP_SPI3_MOSI) /*!< Set PB8 function to SPI3_MOSI */ +#define SET_SPI3_MOSI_PC11() SYS->GPC_MFP2 = ((SYS->GPC_MFP2 & (~SYS_GPC_MFP2_PC11MFP_Msk)) | SYS_GPC_MFP2_PC11MFP_SPI3_MOSI) /*!< Set PC11 function to SPI3_MOSI */ +#define SET_SPI3_MOSI_PE2() SYS->GPE_MFP0 = ((SYS->GPE_MFP0 & (~SYS_GPE_MFP0_PE2MFP_Msk)) | SYS_GPE_MFP0_PE2MFP_SPI3_MOSI) /*!< Set PE2 function to SPI3_MOSI */ +#define SET_SPI3_MOSI_PG8() SYS->GPG_MFP2 = ((SYS->GPG_MFP2 & (~SYS_GPG_MFP2_PG8MFP_Msk)) | SYS_GPG_MFP2_PG8MFP_SPI3_MOSI) /*!< Set PG8 function to SPI3_MOSI */ +#define SET_SPI3_MOSI_PH1() SYS->GPH_MFP0 = ((SYS->GPH_MFP0 & (~SYS_GPH_MFP0_PH1MFP_Msk)) | SYS_GPH_MFP0_PH1MFP_SPI3_MOSI) /*!< Set PH1 function to SPI3_MOSI */ +#define SET_SPI3_SS_PB10() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB10MFP_Msk)) | SYS_GPB_MFP2_PB10MFP_SPI3_SS) /*!< Set PB10 function to SPI3_SS */ +#define SET_SPI3_SS_PC9() SYS->GPC_MFP2 = ((SYS->GPC_MFP2 & (~SYS_GPC_MFP2_PC9MFP_Msk)) | SYS_GPC_MFP2_PC9MFP_SPI3_SS) /*!< Set PC9 function to SPI3_SS */ +#define SET_SPI3_SS_PE5() SYS->GPE_MFP1 = ((SYS->GPE_MFP1 & (~SYS_GPE_MFP1_PE5MFP_Msk)) | SYS_GPE_MFP1_PE5MFP_SPI3_SS) /*!< Set PE5 function to SPI3_SS */ +#define SET_SPI3_SS_PG5() SYS->GPG_MFP1 = ((SYS->GPG_MFP1 & (~SYS_GPG_MFP1_PG5MFP_Msk)) | SYS_GPG_MFP1_PG5MFP_SPI3_SS) /*!< Set PG5 function to SPI3_SS */ +#define SET_SPIM0_CLKN_PH12() SYS->GPH_MFP3 = ((SYS->GPH_MFP3 & (~SYS_GPH_MFP3_PH12MFP_Msk)) | SYS_GPH_MFP3_PH12MFP_SPIM0_CLKN) /*!< Set PH12 function to SPIM0_CLKN */ +#define SET_SPIM0_CLK_PH13() SYS->GPH_MFP3 = ((SYS->GPH_MFP3 & (~SYS_GPH_MFP3_PH13MFP_Msk)) | SYS_GPH_MFP3_PH13MFP_SPIM0_CLK) /*!< Set PH13 function to SPIM0_CLK */ +#define SET_SPIM0_D2_PJ5() SYS->GPJ_MFP1 = ((SYS->GPJ_MFP1 & (~SYS_GPJ_MFP1_PJ5MFP_Msk)) | SYS_GPJ_MFP1_PJ5MFP_SPIM0_D2) /*!< Set PJ5 function to SPIM0_D2 */ +#define SET_SPIM0_D3_PJ6() SYS->GPJ_MFP1 = ((SYS->GPJ_MFP1 & (~SYS_GPJ_MFP1_PJ6MFP_Msk)) | SYS_GPJ_MFP1_PJ6MFP_SPIM0_D3) /*!< Set PJ6 function to SPIM0_D3 */ +#define SET_SPIM0_D4_PH14() SYS->GPH_MFP3 = ((SYS->GPH_MFP3 & (~SYS_GPH_MFP3_PH14MFP_Msk)) | SYS_GPH_MFP3_PH14MFP_SPIM0_D4) /*!< Set PH14 function to SPIM0_D4 */ +#define SET_SPIM0_D5_PH15() SYS->GPH_MFP3 = ((SYS->GPH_MFP3 & (~SYS_GPH_MFP3_PH15MFP_Msk)) | SYS_GPH_MFP3_PH15MFP_SPIM0_D5) /*!< Set PH15 function to SPIM0_D5 */ +#define SET_SPIM0_D6_PG13() SYS->GPG_MFP3 = ((SYS->GPG_MFP3 & (~SYS_GPG_MFP3_PG13MFP_Msk)) | SYS_GPG_MFP3_PG13MFP_SPIM0_D6) /*!< Set PG13 function to SPIM0_D6 */ +#define SET_SPIM0_D7_PG14() SYS->GPG_MFP3 = ((SYS->GPG_MFP3 & (~SYS_GPG_MFP3_PG14MFP_Msk)) | SYS_GPG_MFP3_PG14MFP_SPIM0_D7) /*!< Set PG14 function to SPIM0_D7 */ +#define SET_SPIM0_MISO_PJ4() SYS->GPJ_MFP1 = ((SYS->GPJ_MFP1 & (~SYS_GPJ_MFP1_PJ4MFP_Msk)) | SYS_GPJ_MFP1_PJ4MFP_SPIM0_MISO) /*!< Set PJ4 function to SPIM0_MISO */ +#define SET_SPIM0_MOSI_PJ3() SYS->GPJ_MFP0 = ((SYS->GPJ_MFP0 & (~SYS_GPJ_MFP0_PJ3MFP_Msk)) | SYS_GPJ_MFP0_PJ3MFP_SPIM0_MOSI) /*!< Set PJ3 function to SPIM0_MOSI */ +#define SET_SPIM0_RESETN_PJ2() SYS->GPJ_MFP0 = ((SYS->GPJ_MFP0 & (~SYS_GPJ_MFP0_PJ2MFP_Msk)) | SYS_GPJ_MFP0_PJ2MFP_SPIM0_RESETN) /*!< Set PJ2 function to SPIM0_RESETN */ +#define SET_SPIM0_RWDS_PG15() SYS->GPG_MFP3 = ((SYS->GPG_MFP3 & (~SYS_GPG_MFP3_PG15MFP_Msk)) | SYS_GPG_MFP3_PG15MFP_SPIM0_RWDS) /*!< Set PG15 function to SPIM0_RWDS */ +#define SET_SPIM0_SS_PJ7() SYS->GPJ_MFP1 = ((SYS->GPJ_MFP1 & (~SYS_GPJ_MFP1_PJ7MFP_Msk)) | SYS_GPJ_MFP1_PJ7MFP_SPIM0_SS) /*!< Set PJ7 function to SPIM0_SS */ +#define SET_SWDH_CLK_PA10() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA10MFP_Msk)) | SYS_GPA_MFP2_PA10MFP_SWDH_CLK) /*!< Set PA10 function to SWDH_CLK */ +#define SET_SWDH_DAT_PA9() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA9MFP_Msk)) | SYS_GPA_MFP2_PA9MFP_SWDH_DAT) /*!< Set PA9 function to SWDH_DAT */ +#define SET_SWODEC_SWO_PB12() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB12MFP_Msk)) | SYS_GPB_MFP3_PB12MFP_SWODEC_SWO) /*!< Set PB12 function to SWODEC_SWO */ +#define SET_SWODEC_SWO_PC8() SYS->GPC_MFP2 = ((SYS->GPC_MFP2 & (~SYS_GPC_MFP2_PC8MFP_Msk)) | SYS_GPC_MFP2_PC8MFP_SWODEC_SWO) /*!< Set PC8 function to SWODEC_SWO */ +#define SET_SWODEC_SWO_PF4() SYS->GPF_MFP1 = ((SYS->GPF_MFP1 & (~SYS_GPF_MFP1_PF4MFP_Msk)) | SYS_GPF_MFP1_PF4MFP_SWODEC_SWO) /*!< Set PF4 function to SWODEC_SWO */ +#define SET_TAMPER0_PF6() SYS->GPF_MFP1 = ((SYS->GPF_MFP1 & (~SYS_GPF_MFP1_PF6MFP_Msk)) | SYS_GPF_MFP1_PF6MFP_TAMPER0) /*!< Set PF6 function to TAMPER0 */ +#define SET_TAMPER1_PF7() SYS->GPF_MFP1 = ((SYS->GPF_MFP1 & (~SYS_GPF_MFP1_PF7MFP_Msk)) | SYS_GPF_MFP1_PF7MFP_TAMPER1) /*!< Set PF7 function to TAMPER1 */ +#define SET_TAMPER2_PF8() SYS->GPF_MFP2 = ((SYS->GPF_MFP2 & (~SYS_GPF_MFP2_PF8MFP_Msk)) | SYS_GPF_MFP2_PF8MFP_TAMPER2) /*!< Set PF8 function to TAMPER2 */ +#define SET_TAMPER3_PF9() SYS->GPF_MFP2 = ((SYS->GPF_MFP2 & (~SYS_GPF_MFP2_PF9MFP_Msk)) | SYS_GPF_MFP2_PF9MFP_TAMPER3) /*!< Set PF9 function to TAMPER3 */ +#define SET_TAMPER4_PF10() SYS->GPF_MFP2 = ((SYS->GPF_MFP2 & (~SYS_GPF_MFP2_PF10MFP_Msk)) | SYS_GPF_MFP2_PF10MFP_TAMPER4) /*!< Set PF10 function to TAMPER4 */ +#define SET_TAMPER5_PF11() SYS->GPF_MFP2 = ((SYS->GPF_MFP2 & (~SYS_GPF_MFP2_PF11MFP_Msk)) | SYS_GPF_MFP2_PF11MFP_TAMPER5) /*!< Set PF11 function to TAMPER5 */ +#define SET_TM0_EXT_PA11() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA11MFP_Msk)) | SYS_GPA_MFP2_PA11MFP_TM0_EXT) /*!< Set PA11 function to TM0_EXT */ +#define SET_TM0_EXT_PB15() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB15MFP_Msk)) | SYS_GPB_MFP3_PB15MFP_TM0_EXT) /*!< Set PB15 function to TM0_EXT */ +#define SET_TM0_EXT_PF3() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF3MFP_Msk)) | SYS_GPF_MFP0_PF3MFP_TM0_EXT) /*!< Set PF3 function to TM0_EXT */ +#define SET_TM0_EXT_PH0() SYS->GPH_MFP0 = ((SYS->GPH_MFP0 & (~SYS_GPH_MFP0_PH0MFP_Msk)) | SYS_GPH_MFP0_PH0MFP_TM0_EXT) /*!< Set PH0 function to TM0_EXT */ +#define SET_TM0_PB5() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB5MFP_Msk)) | SYS_GPB_MFP1_PB5MFP_TM0) /*!< Set PB5 function to TM0 */ +#define SET_TM0_PC7() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC7MFP_Msk)) | SYS_GPC_MFP1_PC7MFP_TM0) /*!< Set PC7 function to TM0 */ +#define SET_TM0_PG2() SYS->GPG_MFP0 = ((SYS->GPG_MFP0 & (~SYS_GPG_MFP0_PG2MFP_Msk)) | SYS_GPG_MFP0_PG2MFP_TM0) /*!< Set PG2 function to TM0 */ +#define SET_TM1_EXT_PA10() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA10MFP_Msk)) | SYS_GPA_MFP2_PA10MFP_TM1_EXT) /*!< Set PA10 function to TM1_EXT */ +#define SET_TM1_EXT_PB14() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB14MFP_Msk)) | SYS_GPB_MFP3_PB14MFP_TM1_EXT) /*!< Set PB14 function to TM1_EXT */ +#define SET_TM1_EXT_PF2() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF2MFP_Msk)) | SYS_GPF_MFP0_PF2MFP_TM1_EXT) /*!< Set PF2 function to TM1_EXT */ +#define SET_TM1_EXT_PH1() SYS->GPH_MFP0 = ((SYS->GPH_MFP0 & (~SYS_GPH_MFP0_PH1MFP_Msk)) | SYS_GPH_MFP0_PH1MFP_TM1_EXT) /*!< Set PH1 function to TM1_EXT */ +#define SET_TM1_PB4() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB4MFP_Msk)) | SYS_GPB_MFP1_PB4MFP_TM1) /*!< Set PB4 function to TM1 */ +#define SET_TM1_PB6() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB6MFP_Msk)) | SYS_GPB_MFP1_PB6MFP_TM1) /*!< Set PB6 function to TM1 */ +#define SET_TM1_PC14() SYS->GPC_MFP3 = ((SYS->GPC_MFP3 & (~SYS_GPC_MFP3_PC14MFP_Msk)) | SYS_GPC_MFP3_PC14MFP_TM1) /*!< Set PC14 function to TM1 */ +#define SET_TM1_PC6() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC6MFP_Msk)) | SYS_GPC_MFP1_PC6MFP_TM1) /*!< Set PC6 function to TM1 */ +#define SET_TM1_PG3() SYS->GPG_MFP0 = ((SYS->GPG_MFP0 & (~SYS_GPG_MFP0_PG3MFP_Msk)) | SYS_GPG_MFP0_PG3MFP_TM1) /*!< Set PG3 function to TM1 */ +#define SET_TM2_EXT_PA9() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA9MFP_Msk)) | SYS_GPA_MFP2_PA9MFP_TM2_EXT) /*!< Set PA9 function to TM2_EXT */ +#define SET_TM2_EXT_PB13() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB13MFP_Msk)) | SYS_GPB_MFP3_PB13MFP_TM2_EXT) /*!< Set PB13 function to TM2_EXT */ +#define SET_TM2_EXT_PH2() SYS->GPH_MFP0 = ((SYS->GPH_MFP0 & (~SYS_GPH_MFP0_PH2MFP_Msk)) | SYS_GPH_MFP0_PH2MFP_TM2_EXT) /*!< Set PH2 function to TM2_EXT */ +#define SET_TM2_PA7() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA7MFP_Msk)) | SYS_GPA_MFP1_PA7MFP_TM2) /*!< Set PA7 function to TM2 */ +#define SET_TM2_PB3() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB3MFP_Msk)) | SYS_GPB_MFP0_PB3MFP_TM2) /*!< Set PB3 function to TM2 */ +#define SET_TM2_PD0() SYS->GPD_MFP0 = ((SYS->GPD_MFP0 & (~SYS_GPD_MFP0_PD0MFP_Msk)) | SYS_GPD_MFP0_PD0MFP_TM2) /*!< Set PD0 function to TM2 */ +#define SET_TM2_PG4() SYS->GPG_MFP1 = ((SYS->GPG_MFP1 & (~SYS_GPG_MFP1_PG4MFP_Msk)) | SYS_GPG_MFP1_PG4MFP_TM2) /*!< Set PG4 function to TM2 */ +#define SET_TM3_EXT_PA8() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA8MFP_Msk)) | SYS_GPA_MFP2_PA8MFP_TM3_EXT) /*!< Set PA8 function to TM3_EXT */ +#define SET_TM3_EXT_PB12() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB12MFP_Msk)) | SYS_GPB_MFP3_PB12MFP_TM3_EXT) /*!< Set PB12 function to TM3_EXT */ +#define SET_TM3_EXT_PH3() SYS->GPH_MFP0 = ((SYS->GPH_MFP0 & (~SYS_GPH_MFP0_PH3MFP_Msk)) | SYS_GPH_MFP0_PH3MFP_TM3_EXT) /*!< Set PH3 function to TM3_EXT */ +#define SET_TM3_PA6() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA6MFP_Msk)) | SYS_GPA_MFP1_PA6MFP_TM3) /*!< Set PA6 function to TM3 */ +#define SET_TM3_PB2() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB2MFP_Msk)) | SYS_GPB_MFP0_PB2MFP_TM3) /*!< Set PB2 function to TM3 */ +#define SET_TM3_PF11() SYS->GPF_MFP2 = ((SYS->GPF_MFP2 & (~SYS_GPF_MFP2_PF11MFP_Msk)) | SYS_GPF_MFP2_PF11MFP_TM3) /*!< Set PF11 function to TM3 */ +#define SET_TRACE_CLK_PE12() SYS->GPE_MFP3 = ((SYS->GPE_MFP3 & (~SYS_GPE_MFP3_PE12MFP_Msk)) | SYS_GPE_MFP3_PE12MFP_TRACE_CLK) /*!< Set PE12 function to TRACE_CLK */ +#define SET_TRACE_DATA0_PE11() SYS->GPE_MFP2 = ((SYS->GPE_MFP2 & (~SYS_GPE_MFP2_PE11MFP_Msk)) | SYS_GPE_MFP2_PE11MFP_TRACE_DATA0) /*!< Set PE11 function to TRACE_DATA0 */ +#define SET_TRACE_DATA1_PE10() SYS->GPE_MFP2 = ((SYS->GPE_MFP2 & (~SYS_GPE_MFP2_PE10MFP_Msk)) | SYS_GPE_MFP2_PE10MFP_TRACE_DATA1) /*!< Set PE10 function to TRACE_DATA1 */ +#define SET_TRACE_DATA2_PE9() SYS->GPE_MFP2 = ((SYS->GPE_MFP2 & (~SYS_GPE_MFP2_PE9MFP_Msk)) | SYS_GPE_MFP2_PE9MFP_TRACE_DATA2) /*!< Set PE9 function to TRACE_DATA2 */ +#define SET_TRACE_DATA3_PE8() SYS->GPE_MFP2 = ((SYS->GPE_MFP2 & (~SYS_GPE_MFP2_PE8MFP_Msk)) | SYS_GPE_MFP2_PE8MFP_TRACE_DATA3) /*!< Set PE8 function to TRACE_DATA3 */ +#define SET_TRACE_SWO_PB7() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB7MFP_Msk)) | SYS_GPB_MFP1_PB7MFP_TRACE_SWO) /*!< Set PB7 function to TRACE_SWO */ +#define SET_TRACE_SWO_PC14() SYS->GPC_MFP3 = ((SYS->GPC_MFP3 & (~SYS_GPC_MFP3_PC14MFP_Msk)) | SYS_GPC_MFP3_PC14MFP_TRACE_SWO) /*!< Set PC14 function to TRACE_SWO */ +#define SET_TRACE_SWO_PE13() SYS->GPE_MFP3 = ((SYS->GPE_MFP3 & (~SYS_GPE_MFP3_PE13MFP_Msk)) | SYS_GPE_MFP3_PE13MFP_TRACE_SWO) /*!< Set PE13 function to TRACE_SWO */ +#define SET_TRACE_SWO_PF6() SYS->GPF_MFP1 = ((SYS->GPF_MFP1 & (~SYS_GPF_MFP1_PF6MFP_Msk)) | SYS_GPF_MFP1_PF6MFP_TRACE_SWO) /*!< Set PF6 function to TRACE_SWO */ +#define SET_UART0_RXD_PA0() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA0MFP_Msk)) | SYS_GPA_MFP0_PA0MFP_UART0_RXD) /*!< Set PA0 function to UART0_RXD */ +#define SET_UART0_RXD_PA15() SYS->GPA_MFP3 = ((SYS->GPA_MFP3 & (~SYS_GPA_MFP3_PA15MFP_Msk)) | SYS_GPA_MFP3_PA15MFP_UART0_RXD) /*!< Set PA15 function to UART0_RXD */ +#define SET_UART0_RXD_PA4() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA4MFP_Msk)) | SYS_GPA_MFP1_PA4MFP_UART0_RXD) /*!< Set PA4 function to UART0_RXD */ +#define SET_UART0_RXD_PA6() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA6MFP_Msk)) | SYS_GPA_MFP1_PA6MFP_UART0_RXD) /*!< Set PA6 function to UART0_RXD */ +#define SET_UART0_RXD_PB12() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB12MFP_Msk)) | SYS_GPB_MFP3_PB12MFP_UART0_RXD) /*!< Set PB12 function to UART0_RXD */ +#define SET_UART0_RXD_PB8() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB8MFP_Msk)) | SYS_GPB_MFP2_PB8MFP_UART0_RXD) /*!< Set PB8 function to UART0_RXD */ +#define SET_UART0_RXD_PC11() SYS->GPC_MFP2 = ((SYS->GPC_MFP2 & (~SYS_GPC_MFP2_PC11MFP_Msk)) | SYS_GPC_MFP2_PC11MFP_UART0_RXD) /*!< Set PC11 function to UART0_RXD */ +#define SET_UART0_RXD_PD2() SYS->GPD_MFP0 = ((SYS->GPD_MFP0 & (~SYS_GPD_MFP0_PD2MFP_Msk)) | SYS_GPD_MFP0_PD2MFP_UART0_RXD) /*!< Set PD2 function to UART0_RXD */ +#define SET_UART0_RXD_PF1() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF1MFP_Msk)) | SYS_GPF_MFP0_PF1MFP_UART0_RXD) /*!< Set PF1 function to UART0_RXD */ +#define SET_UART0_RXD_PF2() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF2MFP_Msk)) | SYS_GPF_MFP0_PF2MFP_UART0_RXD) /*!< Set PF2 function to UART0_RXD */ +#define SET_UART0_RXD_PG3() SYS->GPG_MFP0 = ((SYS->GPG_MFP0 & (~SYS_GPG_MFP0_PG3MFP_Msk)) | SYS_GPG_MFP0_PG3MFP_UART0_RXD) /*!< Set PG3 function to UART0_RXD */ +#define SET_UART0_RXD_PH11() SYS->GPH_MFP2 = ((SYS->GPH_MFP2 & (~SYS_GPH_MFP2_PH11MFP_Msk)) | SYS_GPH_MFP2_PH11MFP_UART0_RXD) /*!< Set PH11 function to UART0_RXD */ +#define SET_UART0_TXD_PA1() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA1MFP_Msk)) | SYS_GPA_MFP0_PA1MFP_UART0_TXD) /*!< Set PA1 function to UART0_TXD */ +#define SET_UART0_TXD_PA14() SYS->GPA_MFP3 = ((SYS->GPA_MFP3 & (~SYS_GPA_MFP3_PA14MFP_Msk)) | SYS_GPA_MFP3_PA14MFP_UART0_TXD) /*!< Set PA14 function to UART0_TXD */ +#define SET_UART0_TXD_PA5() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA5MFP_Msk)) | SYS_GPA_MFP1_PA5MFP_UART0_TXD) /*!< Set PA5 function to UART0_TXD */ +#define SET_UART0_TXD_PA7() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA7MFP_Msk)) | SYS_GPA_MFP1_PA7MFP_UART0_TXD) /*!< Set PA7 function to UART0_TXD */ +#define SET_UART0_TXD_PB13() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB13MFP_Msk)) | SYS_GPB_MFP3_PB13MFP_UART0_TXD) /*!< Set PB13 function to UART0_TXD */ +#define SET_UART0_TXD_PB9() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB9MFP_Msk)) | SYS_GPB_MFP2_PB9MFP_UART0_TXD) /*!< Set PB9 function to UART0_TXD */ +#define SET_UART0_TXD_PC12() SYS->GPC_MFP3 = ((SYS->GPC_MFP3 & (~SYS_GPC_MFP3_PC12MFP_Msk)) | SYS_GPC_MFP3_PC12MFP_UART0_TXD) /*!< Set PC12 function to UART0_TXD */ +#define SET_UART0_TXD_PD3() SYS->GPD_MFP0 = ((SYS->GPD_MFP0 & (~SYS_GPD_MFP0_PD3MFP_Msk)) | SYS_GPD_MFP0_PD3MFP_UART0_TXD) /*!< Set PD3 function to UART0_TXD */ +#define SET_UART0_TXD_PF0() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF0MFP_Msk)) | SYS_GPF_MFP0_PF0MFP_UART0_TXD) /*!< Set PF0 function to UART0_TXD */ +#define SET_UART0_TXD_PF3() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF3MFP_Msk)) | SYS_GPF_MFP0_PF3MFP_UART0_TXD) /*!< Set PF3 function to UART0_TXD */ +#define SET_UART0_TXD_PH10() SYS->GPH_MFP2 = ((SYS->GPH_MFP2 & (~SYS_GPH_MFP2_PH10MFP_Msk)) | SYS_GPH_MFP2_PH10MFP_UART0_TXD) /*!< Set PH10 function to UART0_TXD */ +#define SET_UART0_nCTS_PA5() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA5MFP_Msk)) | SYS_GPA_MFP1_PA5MFP_UART0_nCTS) /*!< Set PA5 function to UART0_nCTS */ +#define SET_UART0_nCTS_PB11() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB11MFP_Msk)) | SYS_GPB_MFP2_PB11MFP_UART0_nCTS) /*!< Set PB11 function to UART0_nCTS */ +#define SET_UART0_nCTS_PB15() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB15MFP_Msk)) | SYS_GPB_MFP3_PB15MFP_UART0_nCTS) /*!< Set PB15 function to UART0_nCTS */ +#define SET_UART0_nCTS_PC7() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC7MFP_Msk)) | SYS_GPC_MFP1_PC7MFP_UART0_nCTS) /*!< Set PC7 function to UART0_nCTS */ +#define SET_UART0_nCTS_PF5() SYS->GPF_MFP1 = ((SYS->GPF_MFP1 & (~SYS_GPF_MFP1_PF5MFP_Msk)) | SYS_GPF_MFP1_PF5MFP_UART0_nCTS) /*!< Set PF5 function to UART0_nCTS */ +#define SET_UART0_nRTS_PA4() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA4MFP_Msk)) | SYS_GPA_MFP1_PA4MFP_UART0_nRTS) /*!< Set PA4 function to UART0_nRTS */ +#define SET_UART0_nRTS_PB10() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB10MFP_Msk)) | SYS_GPB_MFP2_PB10MFP_UART0_nRTS) /*!< Set PB10 function to UART0_nRTS */ +#define SET_UART0_nRTS_PB14() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB14MFP_Msk)) | SYS_GPB_MFP3_PB14MFP_UART0_nRTS) /*!< Set PB14 function to UART0_nRTS */ +#define SET_UART0_nRTS_PC6() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC6MFP_Msk)) | SYS_GPC_MFP1_PC6MFP_UART0_nRTS) /*!< Set PC6 function to UART0_nRTS */ +#define SET_UART0_nRTS_PF4() SYS->GPF_MFP1 = ((SYS->GPF_MFP1 & (~SYS_GPF_MFP1_PF4MFP_Msk)) | SYS_GPF_MFP1_PF4MFP_UART0_nRTS) /*!< Set PF4 function to UART0_nRTS */ +#define SET_UART1_RXD_PA2() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA2MFP_Msk)) | SYS_GPA_MFP0_PA2MFP_UART1_RXD) /*!< Set PA2 function to UART1_RXD */ +#define SET_UART1_RXD_PA8() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA8MFP_Msk)) | SYS_GPA_MFP2_PA8MFP_UART1_RXD) /*!< Set PA8 function to UART1_RXD */ +#define SET_UART1_RXD_PB2() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB2MFP_Msk)) | SYS_GPB_MFP0_PB2MFP_UART1_RXD) /*!< Set PB2 function to UART1_RXD */ +#define SET_UART1_RXD_PB6() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB6MFP_Msk)) | SYS_GPB_MFP1_PB6MFP_UART1_RXD) /*!< Set PB6 function to UART1_RXD */ +#define SET_UART1_RXD_PC8() SYS->GPC_MFP2 = ((SYS->GPC_MFP2 & (~SYS_GPC_MFP2_PC8MFP_Msk)) | SYS_GPC_MFP2_PC8MFP_UART1_RXD) /*!< Set PC8 function to UART1_RXD */ +#define SET_UART1_RXD_PD10() SYS->GPD_MFP2 = ((SYS->GPD_MFP2 & (~SYS_GPD_MFP2_PD10MFP_Msk)) | SYS_GPD_MFP2_PD10MFP_UART1_RXD) /*!< Set PD10 function to UART1_RXD */ +#define SET_UART1_RXD_PF1() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF1MFP_Msk)) | SYS_GPF_MFP0_PF1MFP_UART1_RXD) /*!< Set PF1 function to UART1_RXD */ +#define SET_UART1_RXD_PG1() SYS->GPG_MFP0 = ((SYS->GPG_MFP0 & (~SYS_GPG_MFP0_PG1MFP_Msk)) | SYS_GPG_MFP0_PG1MFP_UART1_RXD) /*!< Set PG1 function to UART1_RXD */ +#define SET_UART1_RXD_PG14() SYS->GPG_MFP3 = ((SYS->GPG_MFP3 & (~SYS_GPG_MFP3_PG14MFP_Msk)) | SYS_GPG_MFP3_PG14MFP_UART1_RXD) /*!< Set PG14 function to UART1_RXD */ +#define SET_UART1_RXD_PH9() SYS->GPH_MFP2 = ((SYS->GPH_MFP2 & (~SYS_GPH_MFP2_PH9MFP_Msk)) | SYS_GPH_MFP2_PH9MFP_UART1_RXD) /*!< Set PH9 function to UART1_RXD */ +#define SET_UART1_TXD_PA3() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA3MFP_Msk)) | SYS_GPA_MFP0_PA3MFP_UART1_TXD) /*!< Set PA3 function to UART1_TXD */ +#define SET_UART1_TXD_PA9() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA9MFP_Msk)) | SYS_GPA_MFP2_PA9MFP_UART1_TXD) /*!< Set PA9 function to UART1_TXD */ +#define SET_UART1_TXD_PB3() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB3MFP_Msk)) | SYS_GPB_MFP0_PB3MFP_UART1_TXD) /*!< Set PB3 function to UART1_TXD */ +#define SET_UART1_TXD_PB7() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB7MFP_Msk)) | SYS_GPB_MFP1_PB7MFP_UART1_TXD) /*!< Set PB7 function to UART1_TXD */ +#define SET_UART1_TXD_PD11() SYS->GPD_MFP2 = ((SYS->GPD_MFP2 & (~SYS_GPD_MFP2_PD11MFP_Msk)) | SYS_GPD_MFP2_PD11MFP_UART1_TXD) /*!< Set PD11 function to UART1_TXD */ +#define SET_UART1_TXD_PE13() SYS->GPE_MFP3 = ((SYS->GPE_MFP3 & (~SYS_GPE_MFP3_PE13MFP_Msk)) | SYS_GPE_MFP3_PE13MFP_UART1_TXD) /*!< Set PE13 function to UART1_TXD */ +#define SET_UART1_TXD_PF0() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF0MFP_Msk)) | SYS_GPF_MFP0_PF0MFP_UART1_TXD) /*!< Set PF0 function to UART1_TXD */ +#define SET_UART1_TXD_PG0() SYS->GPG_MFP0 = ((SYS->GPG_MFP0 & (~SYS_GPG_MFP0_PG0MFP_Msk)) | SYS_GPG_MFP0_PG0MFP_UART1_TXD) /*!< Set PG0 function to UART1_TXD */ +#define SET_UART1_TXD_PG13() SYS->GPG_MFP3 = ((SYS->GPG_MFP3 & (~SYS_GPG_MFP3_PG13MFP_Msk)) | SYS_GPG_MFP3_PG13MFP_UART1_TXD) /*!< Set PG13 function to UART1_TXD */ +#define SET_UART1_TXD_PH8() SYS->GPH_MFP2 = ((SYS->GPH_MFP2 & (~SYS_GPH_MFP2_PH8MFP_Msk)) | SYS_GPH_MFP2_PH8MFP_UART1_TXD) /*!< Set PH8 function to UART1_TXD */ +#define SET_UART1_nCTS_PA1() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA1MFP_Msk)) | SYS_GPA_MFP0_PA1MFP_UART1_nCTS) /*!< Set PA1 function to UART1_nCTS */ +#define SET_UART1_nCTS_PB9() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB9MFP_Msk)) | SYS_GPB_MFP2_PB9MFP_UART1_nCTS) /*!< Set PB9 function to UART1_nCTS */ +#define SET_UART1_nCTS_PE11() SYS->GPE_MFP2 = ((SYS->GPE_MFP2 & (~SYS_GPE_MFP2_PE11MFP_Msk)) | SYS_GPE_MFP2_PE11MFP_UART1_nCTS) /*!< Set PE11 function to UART1_nCTS */ +#define SET_UART1_nRTS_PA0() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA0MFP_Msk)) | SYS_GPA_MFP0_PA0MFP_UART1_nRTS) /*!< Set PA0 function to UART1_nRTS */ +#define SET_UART1_nRTS_PB8() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB8MFP_Msk)) | SYS_GPB_MFP2_PB8MFP_UART1_nRTS) /*!< Set PB8 function to UART1_nRTS */ +#define SET_UART1_nRTS_PE12() SYS->GPE_MFP3 = ((SYS->GPE_MFP3 & (~SYS_GPE_MFP3_PE12MFP_Msk)) | SYS_GPE_MFP3_PE12MFP_UART1_nRTS) /*!< Set PE12 function to UART1_nRTS */ +#define SET_UART2_RXD_PB0() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB0MFP_Msk)) | SYS_GPB_MFP0_PB0MFP_UART2_RXD) /*!< Set PB0 function to UART2_RXD */ +#define SET_UART2_RXD_PB4() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB4MFP_Msk)) | SYS_GPB_MFP1_PB4MFP_UART2_RXD) /*!< Set PB4 function to UART2_RXD */ +#define SET_UART2_RXD_PC0() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC0MFP_Msk)) | SYS_GPC_MFP0_PC0MFP_UART2_RXD) /*!< Set PC0 function to UART2_RXD */ +#define SET_UART2_RXD_PC4() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC4MFP_Msk)) | SYS_GPC_MFP1_PC4MFP_UART2_RXD) /*!< Set PC4 function to UART2_RXD */ +#define SET_UART2_RXD_PD12() SYS->GPD_MFP3 = ((SYS->GPD_MFP3 & (~SYS_GPD_MFP3_PD12MFP_Msk)) | SYS_GPD_MFP3_PD12MFP_UART2_RXD) /*!< Set PD12 function to UART2_RXD */ +#define SET_UART2_RXD_PE15() SYS->GPE_MFP3 = ((SYS->GPE_MFP3 & (~SYS_GPE_MFP3_PE15MFP_Msk)) | SYS_GPE_MFP3_PE15MFP_UART2_RXD) /*!< Set PE15 function to UART2_RXD */ +#define SET_UART2_RXD_PE9() SYS->GPE_MFP2 = ((SYS->GPE_MFP2 & (~SYS_GPE_MFP2_PE9MFP_Msk)) | SYS_GPE_MFP2_PE9MFP_UART2_RXD) /*!< Set PE9 function to UART2_RXD */ +#define SET_UART2_RXD_PF1() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF1MFP_Msk)) | SYS_GPF_MFP0_PF1MFP_UART2_RXD) /*!< Set PF1 function to UART2_RXD */ +#define SET_UART2_RXD_PF5() SYS->GPF_MFP1 = ((SYS->GPF_MFP1 & (~SYS_GPF_MFP1_PF5MFP_Msk)) | SYS_GPF_MFP1_PF5MFP_UART2_RXD) /*!< Set PF5 function to UART2_RXD */ +#define SET_UART2_RXD_PG0() SYS->GPG_MFP0 = ((SYS->GPG_MFP0 & (~SYS_GPG_MFP0_PG0MFP_Msk)) | SYS_GPG_MFP0_PG0MFP_UART2_RXD) /*!< Set PG0 function to UART2_RXD */ +#define SET_UART2_RXD_PI11() SYS->GPI_MFP2 = ((SYS->GPI_MFP2 & (~SYS_GPI_MFP2_PI11MFP_Msk)) | SYS_GPI_MFP2_PI11MFP_UART2_RXD) /*!< Set PI11 function to UART2_RXD */ +#define SET_UART2_RXD_PI7() SYS->GPI_MFP1 = ((SYS->GPI_MFP1 & (~SYS_GPI_MFP1_PI7MFP_Msk)) | SYS_GPI_MFP1_PI7MFP_UART2_RXD) /*!< Set PI7 function to UART2_RXD */ +#define SET_UART2_TXD_PB1() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB1MFP_Msk)) | SYS_GPB_MFP0_PB1MFP_UART2_TXD) /*!< Set PB1 function to UART2_TXD */ +#define SET_UART2_TXD_PB5() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB5MFP_Msk)) | SYS_GPB_MFP1_PB5MFP_UART2_TXD) /*!< Set PB5 function to UART2_TXD */ +#define SET_UART2_TXD_PC1() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC1MFP_Msk)) | SYS_GPC_MFP0_PC1MFP_UART2_TXD) /*!< Set PC1 function to UART2_TXD */ +#define SET_UART2_TXD_PC13() SYS->GPC_MFP3 = ((SYS->GPC_MFP3 & (~SYS_GPC_MFP3_PC13MFP_Msk)) | SYS_GPC_MFP3_PC13MFP_UART2_TXD) /*!< Set PC13 function to UART2_TXD */ +#define SET_UART2_TXD_PC5() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC5MFP_Msk)) | SYS_GPC_MFP1_PC5MFP_UART2_TXD) /*!< Set PC5 function to UART2_TXD */ +#define SET_UART2_TXD_PE14() SYS->GPE_MFP3 = ((SYS->GPE_MFP3 & (~SYS_GPE_MFP3_PE14MFP_Msk)) | SYS_GPE_MFP3_PE14MFP_UART2_TXD) /*!< Set PE14 function to UART2_TXD */ +#define SET_UART2_TXD_PE8() SYS->GPE_MFP2 = ((SYS->GPE_MFP2 & (~SYS_GPE_MFP2_PE8MFP_Msk)) | SYS_GPE_MFP2_PE8MFP_UART2_TXD) /*!< Set PE8 function to UART2_TXD */ +#define SET_UART2_TXD_PF0() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF0MFP_Msk)) | SYS_GPF_MFP0_PF0MFP_UART2_TXD) /*!< Set PF0 function to UART2_TXD */ +#define SET_UART2_TXD_PF4() SYS->GPF_MFP1 = ((SYS->GPF_MFP1 & (~SYS_GPF_MFP1_PF4MFP_Msk)) | SYS_GPF_MFP1_PF4MFP_UART2_TXD) /*!< Set PF4 function to UART2_TXD */ +#define SET_UART2_TXD_PG1() SYS->GPG_MFP0 = ((SYS->GPG_MFP0 & (~SYS_GPG_MFP0_PG1MFP_Msk)) | SYS_GPG_MFP0_PG1MFP_UART2_TXD) /*!< Set PG1 function to UART2_TXD */ +#define SET_UART2_TXD_PI10() SYS->GPI_MFP2 = ((SYS->GPI_MFP2 & (~SYS_GPI_MFP2_PI10MFP_Msk)) | SYS_GPI_MFP2_PI10MFP_UART2_TXD) /*!< Set PI10 function to UART2_TXD */ +#define SET_UART2_TXD_PI6() SYS->GPI_MFP1 = ((SYS->GPI_MFP1 & (~SYS_GPI_MFP1_PI6MFP_Msk)) | SYS_GPI_MFP1_PI6MFP_UART2_TXD) /*!< Set PI6 function to UART2_TXD */ +#define SET_UART2_nCTS_PC2() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC2MFP_Msk)) | SYS_GPC_MFP0_PC2MFP_UART2_nCTS) /*!< Set PC2 function to UART2_nCTS */ +#define SET_UART2_nCTS_PD9() SYS->GPD_MFP2 = ((SYS->GPD_MFP2 & (~SYS_GPD_MFP2_PD9MFP_Msk)) | SYS_GPD_MFP2_PD9MFP_UART2_nCTS) /*!< Set PD9 function to UART2_nCTS */ +#define SET_UART2_nCTS_PF5() SYS->GPF_MFP1 = ((SYS->GPF_MFP1 & (~SYS_GPF_MFP1_PF5MFP_Msk)) | SYS_GPF_MFP1_PF5MFP_UART2_nCTS) /*!< Set PF5 function to UART2_nCTS */ +#define SET_UART2_nCTS_PI9() SYS->GPI_MFP2 = ((SYS->GPI_MFP2 & (~SYS_GPI_MFP2_PI9MFP_Msk)) | SYS_GPI_MFP2_PI9MFP_UART2_nCTS) /*!< Set PI9 function to UART2_nCTS */ +#define SET_UART2_nRTS_PC3() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC3MFP_Msk)) | SYS_GPC_MFP0_PC3MFP_UART2_nRTS) /*!< Set PC3 function to UART2_nRTS */ +#define SET_UART2_nRTS_PD8() SYS->GPD_MFP2 = ((SYS->GPD_MFP2 & (~SYS_GPD_MFP2_PD8MFP_Msk)) | SYS_GPD_MFP2_PD8MFP_UART2_nRTS) /*!< Set PD8 function to UART2_nRTS */ +#define SET_UART2_nRTS_PF4() SYS->GPF_MFP1 = ((SYS->GPF_MFP1 & (~SYS_GPF_MFP1_PF4MFP_Msk)) | SYS_GPF_MFP1_PF4MFP_UART2_nRTS) /*!< Set PF4 function to UART2_nRTS */ +#define SET_UART2_nRTS_PI8() SYS->GPI_MFP2 = ((SYS->GPI_MFP2 & (~SYS_GPI_MFP2_PI8MFP_Msk)) | SYS_GPI_MFP2_PI8MFP_UART2_nRTS) /*!< Set PI8 function to UART2_nRTS */ +#define SET_UART3_RXD_PB14() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB14MFP_Msk)) | SYS_GPB_MFP3_PB14MFP_UART3_RXD) /*!< Set PB14 function to UART3_RXD */ +#define SET_UART3_RXD_PC2() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC2MFP_Msk)) | SYS_GPC_MFP0_PC2MFP_UART3_RXD) /*!< Set PC2 function to UART3_RXD */ +#define SET_UART3_RXD_PC9() SYS->GPC_MFP2 = ((SYS->GPC_MFP2 & (~SYS_GPC_MFP2_PC9MFP_Msk)) | SYS_GPC_MFP2_PC9MFP_UART3_RXD) /*!< Set PC9 function to UART3_RXD */ +#define SET_UART3_RXD_PD0() SYS->GPD_MFP0 = ((SYS->GPD_MFP0 & (~SYS_GPD_MFP0_PD0MFP_Msk)) | SYS_GPD_MFP0_PD0MFP_UART3_RXD) /*!< Set PD0 function to UART3_RXD */ +#define SET_UART3_RXD_PE0() SYS->GPE_MFP0 = ((SYS->GPE_MFP0 & (~SYS_GPE_MFP0_PE0MFP_Msk)) | SYS_GPE_MFP0_PE0MFP_UART3_RXD) /*!< Set PE0 function to UART3_RXD */ +#define SET_UART3_RXD_PE11() SYS->GPE_MFP2 = ((SYS->GPE_MFP2 & (~SYS_GPE_MFP2_PE11MFP_Msk)) | SYS_GPE_MFP2_PE11MFP_UART3_RXD) /*!< Set PE11 function to UART3_RXD */ +#define SET_UART3_RXD_PE15() SYS->GPE_MFP3 = ((SYS->GPE_MFP3 & (~SYS_GPE_MFP3_PE15MFP_Msk)) | SYS_GPE_MFP3_PE15MFP_UART3_RXD) /*!< Set PE15 function to UART3_RXD */ +#define SET_UART3_RXD_PF4() SYS->GPF_MFP1 = ((SYS->GPF_MFP1 & (~SYS_GPF_MFP1_PF4MFP_Msk)) | SYS_GPF_MFP1_PF4MFP_UART3_RXD) /*!< Set PF4 function to UART3_RXD */ +#define SET_UART3_RXD_PI15() SYS->GPI_MFP3 = ((SYS->GPI_MFP3 & (~SYS_GPI_MFP3_PI15MFP_Msk)) | SYS_GPI_MFP3_PI15MFP_UART3_RXD) /*!< Set PI15 function to UART3_RXD */ +#define SET_UART3_TXD_PB15() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB15MFP_Msk)) | SYS_GPB_MFP3_PB15MFP_UART3_TXD) /*!< Set PB15 function to UART3_TXD */ +#define SET_UART3_TXD_PC10() SYS->GPC_MFP2 = ((SYS->GPC_MFP2 & (~SYS_GPC_MFP2_PC10MFP_Msk)) | SYS_GPC_MFP2_PC10MFP_UART3_TXD) /*!< Set PC10 function to UART3_TXD */ +#define SET_UART3_TXD_PC3() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC3MFP_Msk)) | SYS_GPC_MFP0_PC3MFP_UART3_TXD) /*!< Set PC3 function to UART3_TXD */ +#define SET_UART3_TXD_PD1() SYS->GPD_MFP0 = ((SYS->GPD_MFP0 & (~SYS_GPD_MFP0_PD1MFP_Msk)) | SYS_GPD_MFP0_PD1MFP_UART3_TXD) /*!< Set PD1 function to UART3_TXD */ +#define SET_UART3_TXD_PE1() SYS->GPE_MFP0 = ((SYS->GPE_MFP0 & (~SYS_GPE_MFP0_PE1MFP_Msk)) | SYS_GPE_MFP0_PE1MFP_UART3_TXD) /*!< Set PE1 function to UART3_TXD */ +#define SET_UART3_TXD_PE10() SYS->GPE_MFP2 = ((SYS->GPE_MFP2 & (~SYS_GPE_MFP2_PE10MFP_Msk)) | SYS_GPE_MFP2_PE10MFP_UART3_TXD) /*!< Set PE10 function to UART3_TXD */ +#define SET_UART3_TXD_PE14() SYS->GPE_MFP3 = ((SYS->GPE_MFP3 & (~SYS_GPE_MFP3_PE14MFP_Msk)) | SYS_GPE_MFP3_PE14MFP_UART3_TXD) /*!< Set PE14 function to UART3_TXD */ +#define SET_UART3_TXD_PF5() SYS->GPF_MFP1 = ((SYS->GPF_MFP1 & (~SYS_GPF_MFP1_PF5MFP_Msk)) | SYS_GPF_MFP1_PF5MFP_UART3_TXD) /*!< Set PF5 function to UART3_TXD */ +#define SET_UART3_TXD_PI14() SYS->GPI_MFP3 = ((SYS->GPI_MFP3 & (~SYS_GPI_MFP3_PI14MFP_Msk)) | SYS_GPI_MFP3_PI14MFP_UART3_TXD) /*!< Set PI14 function to UART3_TXD */ +#define SET_UART3_nCTS_PB12() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB12MFP_Msk)) | SYS_GPB_MFP3_PB12MFP_UART3_nCTS) /*!< Set PB12 function to UART3_nCTS */ +#define SET_UART3_nCTS_PD2() SYS->GPD_MFP0 = ((SYS->GPD_MFP0 & (~SYS_GPD_MFP0_PD2MFP_Msk)) | SYS_GPD_MFP0_PD2MFP_UART3_nCTS) /*!< Set PD2 function to UART3_nCTS */ +#define SET_UART3_nCTS_PH9() SYS->GPH_MFP2 = ((SYS->GPH_MFP2 & (~SYS_GPH_MFP2_PH9MFP_Msk)) | SYS_GPH_MFP2_PH9MFP_UART3_nCTS) /*!< Set PH9 function to UART3_nCTS */ +#define SET_UART3_nRTS_PB13() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB13MFP_Msk)) | SYS_GPB_MFP3_PB13MFP_UART3_nRTS) /*!< Set PB13 function to UART3_nRTS */ +#define SET_UART3_nRTS_PD3() SYS->GPD_MFP0 = ((SYS->GPD_MFP0 & (~SYS_GPD_MFP0_PD3MFP_Msk)) | SYS_GPD_MFP0_PD3MFP_UART3_nRTS) /*!< Set PD3 function to UART3_nRTS */ +#define SET_UART3_nRTS_PH8() SYS->GPH_MFP2 = ((SYS->GPH_MFP2 & (~SYS_GPH_MFP2_PH8MFP_Msk)) | SYS_GPH_MFP2_PH8MFP_UART3_nRTS) /*!< Set PH8 function to UART3_nRTS */ +#define SET_UART4_RXD_PA13() SYS->GPA_MFP3 = ((SYS->GPA_MFP3 & (~SYS_GPA_MFP3_PA13MFP_Msk)) | SYS_GPA_MFP3_PA13MFP_UART4_RXD) /*!< Set PA13 function to UART4_RXD */ +#define SET_UART4_RXD_PA2() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA2MFP_Msk)) | SYS_GPA_MFP0_PA2MFP_UART4_RXD) /*!< Set PA2 function to UART4_RXD */ +#define SET_UART4_RXD_PB10() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB10MFP_Msk)) | SYS_GPB_MFP2_PB10MFP_UART4_RXD) /*!< Set PB10 function to UART4_RXD */ +#define SET_UART4_RXD_PC4() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC4MFP_Msk)) | SYS_GPC_MFP1_PC4MFP_UART4_RXD) /*!< Set PC4 function to UART4_RXD */ +#define SET_UART4_RXD_PC6() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC6MFP_Msk)) | SYS_GPC_MFP1_PC6MFP_UART4_RXD) /*!< Set PC6 function to UART4_RXD */ +#define SET_UART4_RXD_PF6() SYS->GPF_MFP1 = ((SYS->GPF_MFP1 & (~SYS_GPF_MFP1_PF6MFP_Msk)) | SYS_GPF_MFP1_PF6MFP_UART4_RXD) /*!< Set PF6 function to UART4_RXD */ +#define SET_UART4_RXD_PG3() SYS->GPG_MFP0 = ((SYS->GPG_MFP0 & (~SYS_GPG_MFP0_PG3MFP_Msk)) | SYS_GPG_MFP0_PG3MFP_UART4_RXD) /*!< Set PG3 function to UART4_RXD */ +#define SET_UART4_RXD_PH11() SYS->GPH_MFP2 = ((SYS->GPH_MFP2 & (~SYS_GPH_MFP2_PH11MFP_Msk)) | SYS_GPH_MFP2_PH11MFP_UART4_RXD) /*!< Set PH11 function to UART4_RXD */ +#define SET_UART4_RXD_PH3() SYS->GPH_MFP0 = ((SYS->GPH_MFP0 & (~SYS_GPH_MFP0_PH3MFP_Msk)) | SYS_GPH_MFP0_PH3MFP_UART4_RXD) /*!< Set PH3 function to UART4_RXD */ +#define SET_UART4_RXD_PI13() SYS->GPI_MFP3 = ((SYS->GPI_MFP3 & (~SYS_GPI_MFP3_PI13MFP_Msk)) | SYS_GPI_MFP3_PI13MFP_UART4_RXD) /*!< Set PI13 function to UART4_RXD */ +#define SET_UART4_TXD_PA12() SYS->GPA_MFP3 = ((SYS->GPA_MFP3 & (~SYS_GPA_MFP3_PA12MFP_Msk)) | SYS_GPA_MFP3_PA12MFP_UART4_TXD) /*!< Set PA12 function to UART4_TXD */ +#define SET_UART4_TXD_PA3() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA3MFP_Msk)) | SYS_GPA_MFP0_PA3MFP_UART4_TXD) /*!< Set PA3 function to UART4_TXD */ +#define SET_UART4_TXD_PB11() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB11MFP_Msk)) | SYS_GPB_MFP2_PB11MFP_UART4_TXD) /*!< Set PB11 function to UART4_TXD */ +#define SET_UART4_TXD_PC5() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC5MFP_Msk)) | SYS_GPC_MFP1_PC5MFP_UART4_TXD) /*!< Set PC5 function to UART4_TXD */ +#define SET_UART4_TXD_PC7() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC7MFP_Msk)) | SYS_GPC_MFP1_PC7MFP_UART4_TXD) /*!< Set PC7 function to UART4_TXD */ +#define SET_UART4_TXD_PF7() SYS->GPF_MFP1 = ((SYS->GPF_MFP1 & (~SYS_GPF_MFP1_PF7MFP_Msk)) | SYS_GPF_MFP1_PF7MFP_UART4_TXD) /*!< Set PF7 function to UART4_TXD */ +#define SET_UART4_TXD_PH10() SYS->GPH_MFP2 = ((SYS->GPH_MFP2 & (~SYS_GPH_MFP2_PH10MFP_Msk)) | SYS_GPH_MFP2_PH10MFP_UART4_TXD) /*!< Set PH10 function to UART4_TXD */ +#define SET_UART4_TXD_PH2() SYS->GPH_MFP0 = ((SYS->GPH_MFP0 & (~SYS_GPH_MFP0_PH2MFP_Msk)) | SYS_GPH_MFP0_PH2MFP_UART4_TXD) /*!< Set PH2 function to UART4_TXD */ +#define SET_UART4_TXD_PI12() SYS->GPI_MFP3 = ((SYS->GPI_MFP3 & (~SYS_GPI_MFP3_PI12MFP_Msk)) | SYS_GPI_MFP3_PI12MFP_UART4_TXD) /*!< Set PI12 function to UART4_TXD */ +#define SET_UART4_nCTS_PC8() SYS->GPC_MFP2 = ((SYS->GPC_MFP2 & (~SYS_GPC_MFP2_PC8MFP_Msk)) | SYS_GPC_MFP2_PC8MFP_UART4_nCTS) /*!< Set PC8 function to UART4_nCTS */ +#define SET_UART4_nCTS_PE1() SYS->GPE_MFP0 = ((SYS->GPE_MFP0 & (~SYS_GPE_MFP0_PE1MFP_Msk)) | SYS_GPE_MFP0_PE1MFP_UART4_nCTS) /*!< Set PE1 function to UART4_nCTS */ +#define SET_UART4_nCTS_PE14() SYS->GPE_MFP3 = ((SYS->GPE_MFP3 & (~SYS_GPE_MFP3_PE14MFP_Msk)) | SYS_GPE_MFP3_PE14MFP_UART4_nCTS) /*!< Set PE14 function to UART4_nCTS */ +#define SET_UART4_nRTS_PE0() SYS->GPE_MFP0 = ((SYS->GPE_MFP0 & (~SYS_GPE_MFP0_PE0MFP_Msk)) | SYS_GPE_MFP0_PE0MFP_UART4_nRTS) /*!< Set PE0 function to UART4_nRTS */ +#define SET_UART4_nRTS_PE13() SYS->GPE_MFP3 = ((SYS->GPE_MFP3 & (~SYS_GPE_MFP3_PE13MFP_Msk)) | SYS_GPE_MFP3_PE13MFP_UART4_nRTS) /*!< Set PE13 function to UART4_nRTS */ +#define SET_UART4_nRTS_PE15() SYS->GPE_MFP3 = ((SYS->GPE_MFP3 & (~SYS_GPE_MFP3_PE15MFP_Msk)) | SYS_GPE_MFP3_PE15MFP_UART4_nRTS) /*!< Set PE15 function to UART4_nRTS */ +#define SET_UART5_RXD_PA4() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA4MFP_Msk)) | SYS_GPA_MFP1_PA4MFP_UART5_RXD) /*!< Set PA4 function to UART5_RXD */ +#define SET_UART5_RXD_PB4() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB4MFP_Msk)) | SYS_GPB_MFP1_PB4MFP_UART5_RXD) /*!< Set PB4 function to UART5_RXD */ +#define SET_UART5_RXD_PE6() SYS->GPE_MFP1 = ((SYS->GPE_MFP1 & (~SYS_GPE_MFP1_PE6MFP_Msk)) | SYS_GPE_MFP1_PE6MFP_UART5_RXD) /*!< Set PE6 function to UART5_RXD */ +#define SET_UART5_RXD_PF10() SYS->GPF_MFP2 = ((SYS->GPF_MFP2 & (~SYS_GPF_MFP2_PF10MFP_Msk)) | SYS_GPF_MFP2_PF10MFP_UART5_RXD) /*!< Set PF10 function to UART5_RXD */ +#define SET_UART5_RXD_PH1() SYS->GPH_MFP0 = ((SYS->GPH_MFP0 & (~SYS_GPH_MFP0_PH1MFP_Msk)) | SYS_GPH_MFP0_PH1MFP_UART5_RXD) /*!< Set PH1 function to UART5_RXD */ +#define SET_UART5_TXD_PA5() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA5MFP_Msk)) | SYS_GPA_MFP1_PA5MFP_UART5_TXD) /*!< Set PA5 function to UART5_TXD */ +#define SET_UART5_TXD_PB5() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB5MFP_Msk)) | SYS_GPB_MFP1_PB5MFP_UART5_TXD) /*!< Set PB5 function to UART5_TXD */ +#define SET_UART5_TXD_PE7() SYS->GPE_MFP1 = ((SYS->GPE_MFP1 & (~SYS_GPE_MFP1_PE7MFP_Msk)) | SYS_GPE_MFP1_PE7MFP_UART5_TXD) /*!< Set PE7 function to UART5_TXD */ +#define SET_UART5_TXD_PF11() SYS->GPF_MFP2 = ((SYS->GPF_MFP2 & (~SYS_GPF_MFP2_PF11MFP_Msk)) | SYS_GPF_MFP2_PF11MFP_UART5_TXD) /*!< Set PF11 function to UART5_TXD */ +#define SET_UART5_TXD_PH0() SYS->GPH_MFP0 = ((SYS->GPH_MFP0 & (~SYS_GPH_MFP0_PH0MFP_Msk)) | SYS_GPH_MFP0_PH0MFP_UART5_TXD) /*!< Set PH0 function to UART5_TXD */ +#define SET_UART5_nCTS_PB2() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB2MFP_Msk)) | SYS_GPB_MFP0_PB2MFP_UART5_nCTS) /*!< Set PB2 function to UART5_nCTS */ +#define SET_UART5_nCTS_PF8() SYS->GPF_MFP2 = ((SYS->GPF_MFP2 & (~SYS_GPF_MFP2_PF8MFP_Msk)) | SYS_GPF_MFP2_PF8MFP_UART5_nCTS) /*!< Set PF8 function to UART5_nCTS */ +#define SET_UART5_nCTS_PH3() SYS->GPH_MFP0 = ((SYS->GPH_MFP0 & (~SYS_GPH_MFP0_PH3MFP_Msk)) | SYS_GPH_MFP0_PH3MFP_UART5_nCTS) /*!< Set PH3 function to UART5_nCTS */ +#define SET_UART5_nRTS_PB3() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB3MFP_Msk)) | SYS_GPB_MFP0_PB3MFP_UART5_nRTS) /*!< Set PB3 function to UART5_nRTS */ +#define SET_UART5_nRTS_PF9() SYS->GPF_MFP2 = ((SYS->GPF_MFP2 & (~SYS_GPF_MFP2_PF9MFP_Msk)) | SYS_GPF_MFP2_PF9MFP_UART5_nRTS) /*!< Set PF9 function to UART5_nRTS */ +#define SET_UART5_nRTS_PH2() SYS->GPH_MFP0 = ((SYS->GPH_MFP0 & (~SYS_GPH_MFP0_PH2MFP_Msk)) | SYS_GPH_MFP0_PH2MFP_UART5_nRTS) /*!< Set PH2 function to UART5_nRTS */ +#define SET_UART6_RXD_PA10() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA10MFP_Msk)) | SYS_GPA_MFP2_PA10MFP_UART6_RXD) /*!< Set PA10 function to UART6_RXD */ +#define SET_UART6_RXD_PC11() SYS->GPC_MFP2 = ((SYS->GPC_MFP2 & (~SYS_GPC_MFP2_PC11MFP_Msk)) | SYS_GPC_MFP2_PC11MFP_UART6_RXD) /*!< Set PC11 function to UART6_RXD */ +#define SET_UART6_RXD_PC6() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC6MFP_Msk)) | SYS_GPC_MFP1_PC6MFP_UART6_RXD) /*!< Set PC6 function to UART6_RXD */ +#define SET_UART6_RXD_PD13() SYS->GPD_MFP3 = ((SYS->GPD_MFP3 & (~SYS_GPD_MFP3_PD13MFP_Msk)) | SYS_GPD_MFP3_PD13MFP_UART6_RXD) /*!< Set PD13 function to UART6_RXD */ +#define SET_UART6_RXD_PD6() SYS->GPD_MFP1 = ((SYS->GPD_MFP1 & (~SYS_GPD_MFP1_PD6MFP_Msk)) | SYS_GPD_MFP1_PD6MFP_UART6_RXD) /*!< Set PD6 function to UART6_RXD */ +#define SET_UART6_RXD_PE15() SYS->GPE_MFP3 = ((SYS->GPE_MFP3 & (~SYS_GPE_MFP3_PE15MFP_Msk)) | SYS_GPE_MFP3_PE15MFP_UART6_RXD) /*!< Set PE15 function to UART6_RXD */ +#define SET_UART6_RXD_PE4() SYS->GPE_MFP1 = ((SYS->GPE_MFP1 & (~SYS_GPE_MFP1_PE4MFP_Msk)) | SYS_GPE_MFP1_PE4MFP_UART6_RXD) /*!< Set PE4 function to UART6_RXD */ +#define SET_UART6_RXD_PH5() SYS->GPH_MFP1 = ((SYS->GPH_MFP1 & (~SYS_GPH_MFP1_PH5MFP_Msk)) | SYS_GPH_MFP1_PH5MFP_UART6_RXD) /*!< Set PH5 function to UART6_RXD */ +#define SET_UART6_RXD_PJ11() SYS->GPJ_MFP2 = ((SYS->GPJ_MFP2 & (~SYS_GPJ_MFP2_PJ11MFP_Msk)) | SYS_GPJ_MFP2_PJ11MFP_UART6_RXD) /*!< Set PJ11 function to UART6_RXD */ +#define SET_UART6_TXD_PA11() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA11MFP_Msk)) | SYS_GPA_MFP2_PA11MFP_UART6_TXD) /*!< Set PA11 function to UART6_TXD */ +#define SET_UART6_TXD_PC12() SYS->GPC_MFP3 = ((SYS->GPC_MFP3 & (~SYS_GPC_MFP3_PC12MFP_Msk)) | SYS_GPC_MFP3_PC12MFP_UART6_TXD) /*!< Set PC12 function to UART6_TXD */ +#define SET_UART6_TXD_PC7() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC7MFP_Msk)) | SYS_GPC_MFP1_PC7MFP_UART6_TXD) /*!< Set PC7 function to UART6_TXD */ +#define SET_UART6_TXD_PD7() SYS->GPD_MFP1 = ((SYS->GPD_MFP1 & (~SYS_GPD_MFP1_PD7MFP_Msk)) | SYS_GPD_MFP1_PD7MFP_UART6_TXD) /*!< Set PD7 function to UART6_TXD */ +#define SET_UART6_TXD_PE14() SYS->GPE_MFP3 = ((SYS->GPE_MFP3 & (~SYS_GPE_MFP3_PE14MFP_Msk)) | SYS_GPE_MFP3_PE14MFP_UART6_TXD) /*!< Set PE14 function to UART6_TXD */ +#define SET_UART6_TXD_PE5() SYS->GPE_MFP1 = ((SYS->GPE_MFP1 & (~SYS_GPE_MFP1_PE5MFP_Msk)) | SYS_GPE_MFP1_PE5MFP_UART6_TXD) /*!< Set PE5 function to UART6_TXD */ +#define SET_UART6_TXD_PH4() SYS->GPH_MFP1 = ((SYS->GPH_MFP1 & (~SYS_GPH_MFP1_PH4MFP_Msk)) | SYS_GPH_MFP1_PH4MFP_UART6_TXD) /*!< Set PH4 function to UART6_TXD */ +#define SET_UART6_TXD_PJ10() SYS->GPJ_MFP2 = ((SYS->GPJ_MFP2 & (~SYS_GPJ_MFP2_PJ10MFP_Msk)) | SYS_GPJ_MFP2_PJ10MFP_UART6_TXD) /*!< Set PJ10 function to UART6_TXD */ +#define SET_UART6_nCTS_PC9() SYS->GPC_MFP2 = ((SYS->GPC_MFP2 & (~SYS_GPC_MFP2_PC9MFP_Msk)) | SYS_GPC_MFP2_PC9MFP_UART6_nCTS) /*!< Set PC9 function to UART6_nCTS */ +#define SET_UART6_nCTS_PE2() SYS->GPE_MFP0 = ((SYS->GPE_MFP0 & (~SYS_GPE_MFP0_PE2MFP_Msk)) | SYS_GPE_MFP0_PE2MFP_UART6_nCTS) /*!< Set PE2 function to UART6_nCTS */ +#define SET_UART6_nRTS_PC10() SYS->GPC_MFP2 = ((SYS->GPC_MFP2 & (~SYS_GPC_MFP2_PC10MFP_Msk)) | SYS_GPC_MFP2_PC10MFP_UART6_nRTS) /*!< Set PC10 function to UART6_nRTS */ +#define SET_UART6_nRTS_PE3() SYS->GPE_MFP0 = ((SYS->GPE_MFP0 & (~SYS_GPE_MFP0_PE3MFP_Msk)) | SYS_GPE_MFP0_PE3MFP_UART6_nRTS) /*!< Set PE3 function to UART6_nRTS */ +#define SET_UART7_RXD_PA8() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA8MFP_Msk)) | SYS_GPA_MFP2_PA8MFP_UART7_RXD) /*!< Set PA8 function to UART7_RXD */ +#define SET_UART7_RXD_PB8() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB8MFP_Msk)) | SYS_GPB_MFP2_PB8MFP_UART7_RXD) /*!< Set PB8 function to UART7_RXD */ +#define SET_UART7_RXD_PD8() SYS->GPD_MFP2 = ((SYS->GPD_MFP2 & (~SYS_GPD_MFP2_PD8MFP_Msk)) | SYS_GPD_MFP2_PD8MFP_UART7_RXD) /*!< Set PD8 function to UART7_RXD */ +#define SET_UART7_RXD_PE2() SYS->GPE_MFP0 = ((SYS->GPE_MFP0 & (~SYS_GPE_MFP0_PE2MFP_Msk)) | SYS_GPE_MFP0_PE2MFP_UART7_RXD) /*!< Set PE2 function to UART7_RXD */ +#define SET_UART7_RXD_PG12() SYS->GPG_MFP3 = ((SYS->GPG_MFP3 & (~SYS_GPG_MFP3_PG12MFP_Msk)) | SYS_GPG_MFP3_PG12MFP_UART7_RXD) /*!< Set PG12 function to UART7_RXD */ +#define SET_UART7_RXD_PH7() SYS->GPH_MFP1 = ((SYS->GPH_MFP1 & (~SYS_GPH_MFP1_PH7MFP_Msk)) | SYS_GPH_MFP1_PH7MFP_UART7_RXD) /*!< Set PH7 function to UART7_RXD */ +#define SET_UART7_RXD_PJ9() SYS->GPJ_MFP2 = ((SYS->GPJ_MFP2 & (~SYS_GPJ_MFP2_PJ9MFP_Msk)) | SYS_GPJ_MFP2_PJ9MFP_UART7_RXD) /*!< Set PJ9 function to UART7_RXD */ +#define SET_UART7_TXD_PA9() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA9MFP_Msk)) | SYS_GPA_MFP2_PA9MFP_UART7_TXD) /*!< Set PA9 function to UART7_TXD */ +#define SET_UART7_TXD_PB9() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB9MFP_Msk)) | SYS_GPB_MFP2_PB9MFP_UART7_TXD) /*!< Set PB9 function to UART7_TXD */ +#define SET_UART7_TXD_PD9() SYS->GPD_MFP2 = ((SYS->GPD_MFP2 & (~SYS_GPD_MFP2_PD9MFP_Msk)) | SYS_GPD_MFP2_PD9MFP_UART7_TXD) /*!< Set PD9 function to UART7_TXD */ +#define SET_UART7_TXD_PE3() SYS->GPE_MFP0 = ((SYS->GPE_MFP0 & (~SYS_GPE_MFP0_PE3MFP_Msk)) | SYS_GPE_MFP0_PE3MFP_UART7_TXD) /*!< Set PE3 function to UART7_TXD */ +#define SET_UART7_TXD_PG11() SYS->GPG_MFP2 = ((SYS->GPG_MFP2 & (~SYS_GPG_MFP2_PG11MFP_Msk)) | SYS_GPG_MFP2_PG11MFP_UART7_TXD) /*!< Set PG11 function to UART7_TXD */ +#define SET_UART7_TXD_PH6() SYS->GPH_MFP1 = ((SYS->GPH_MFP1 & (~SYS_GPH_MFP1_PH6MFP_Msk)) | SYS_GPH_MFP1_PH6MFP_UART7_TXD) /*!< Set PH6 function to UART7_TXD */ +#define SET_UART7_TXD_PJ8() SYS->GPJ_MFP2 = ((SYS->GPJ_MFP2 & (~SYS_GPJ_MFP2_PJ8MFP_Msk)) | SYS_GPJ_MFP2_PJ8MFP_UART7_TXD) /*!< Set PJ8 function to UART7_TXD */ +#define SET_UART7_nCTS_PE4() SYS->GPE_MFP1 = ((SYS->GPE_MFP1 & (~SYS_GPE_MFP1_PE4MFP_Msk)) | SYS_GPE_MFP1_PE4MFP_UART7_nCTS) /*!< Set PE4 function to UART7_nCTS */ +#define SET_UART7_nCTS_PH5() SYS->GPH_MFP1 = ((SYS->GPH_MFP1 & (~SYS_GPH_MFP1_PH5MFP_Msk)) | SYS_GPH_MFP1_PH5MFP_UART7_nCTS) /*!< Set PH5 function to UART7_nCTS */ +#define SET_UART7_nRTS_PE5() SYS->GPE_MFP1 = ((SYS->GPE_MFP1 & (~SYS_GPE_MFP1_PE5MFP_Msk)) | SYS_GPE_MFP1_PE5MFP_UART7_nRTS) /*!< Set PE5 function to UART7_nRTS */ +#define SET_UART7_nRTS_PH4() SYS->GPH_MFP1 = ((SYS->GPH_MFP1 & (~SYS_GPH_MFP1_PH4MFP_Msk)) | SYS_GPH_MFP1_PH4MFP_UART7_nRTS) /*!< Set PH4 function to UART7_nRTS */ +#define SET_UART8_RXD_PD10() SYS->GPD_MFP2 = ((SYS->GPD_MFP2 & (~SYS_GPD_MFP2_PD10MFP_Msk)) | SYS_GPD_MFP2_PD10MFP_UART8_RXD) /*!< Set PD10 function to UART8_RXD */ +#define SET_UART8_RXD_PE0() SYS->GPE_MFP0 = ((SYS->GPE_MFP0 & (~SYS_GPE_MFP0_PE0MFP_Msk)) | SYS_GPE_MFP0_PE0MFP_UART8_RXD) /*!< Set PE0 function to UART8_RXD */ +#define SET_UART8_RXD_PE15() SYS->GPE_MFP3 = ((SYS->GPE_MFP3 & (~SYS_GPE_MFP3_PE15MFP_Msk)) | SYS_GPE_MFP3_PE15MFP_UART8_RXD) /*!< Set PE15 function to UART8_RXD */ +#define SET_UART8_RXD_PJ1() SYS->GPJ_MFP0 = ((SYS->GPJ_MFP0 & (~SYS_GPJ_MFP0_PJ1MFP_Msk)) | SYS_GPJ_MFP0_PJ1MFP_UART8_RXD) /*!< Set PJ1 function to UART8_RXD */ +#define SET_UART8_RXD_PJ5() SYS->GPJ_MFP1 = ((SYS->GPJ_MFP1 & (~SYS_GPJ_MFP1_PJ5MFP_Msk)) | SYS_GPJ_MFP1_PJ5MFP_UART8_RXD) /*!< Set PJ5 function to UART8_RXD */ +#define SET_UART8_TXD_PD11() SYS->GPD_MFP2 = ((SYS->GPD_MFP2 & (~SYS_GPD_MFP2_PD11MFP_Msk)) | SYS_GPD_MFP2_PD11MFP_UART8_TXD) /*!< Set PD11 function to UART8_TXD */ +#define SET_UART8_TXD_PE1() SYS->GPE_MFP0 = ((SYS->GPE_MFP0 & (~SYS_GPE_MFP0_PE1MFP_Msk)) | SYS_GPE_MFP0_PE1MFP_UART8_TXD) /*!< Set PE1 function to UART8_TXD */ +#define SET_UART8_TXD_PE14() SYS->GPE_MFP3 = ((SYS->GPE_MFP3 & (~SYS_GPE_MFP3_PE14MFP_Msk)) | SYS_GPE_MFP3_PE14MFP_UART8_TXD) /*!< Set PE14 function to UART8_TXD */ +#define SET_UART8_TXD_PJ0() SYS->GPJ_MFP0 = ((SYS->GPJ_MFP0 & (~SYS_GPJ_MFP0_PJ0MFP_Msk)) | SYS_GPJ_MFP0_PJ0MFP_UART8_TXD) /*!< Set PJ0 function to UART8_TXD */ +#define SET_UART8_TXD_PJ4() SYS->GPJ_MFP1 = ((SYS->GPJ_MFP1 & (~SYS_GPJ_MFP1_PJ4MFP_Msk)) | SYS_GPJ_MFP1_PJ4MFP_UART8_TXD) /*!< Set PJ4 function to UART8_TXD */ +#define SET_UART8_nCTS_PC13() SYS->GPC_MFP3 = ((SYS->GPC_MFP3 & (~SYS_GPC_MFP3_PC13MFP_Msk)) | SYS_GPC_MFP3_PC13MFP_UART8_nCTS) /*!< Set PC13 function to UART8_nCTS */ +#define SET_UART8_nCTS_PE3() SYS->GPE_MFP0 = ((SYS->GPE_MFP0 & (~SYS_GPE_MFP0_PE3MFP_Msk)) | SYS_GPE_MFP0_PE3MFP_UART8_nCTS) /*!< Set PE3 function to UART8_nCTS */ +#define SET_UART8_nCTS_PI14() SYS->GPI_MFP3 = ((SYS->GPI_MFP3 & (~SYS_GPI_MFP3_PI14MFP_Msk)) | SYS_GPI_MFP3_PI14MFP_UART8_nCTS) /*!< Set PI14 function to UART8_nCTS */ +#define SET_UART8_nCTS_PJ2() SYS->GPJ_MFP0 = ((SYS->GPJ_MFP0 & (~SYS_GPJ_MFP0_PJ2MFP_Msk)) | SYS_GPJ_MFP0_PJ2MFP_UART8_nCTS) /*!< Set PJ2 function to UART8_nCTS */ +#define SET_UART8_nRTS_PD12() SYS->GPD_MFP3 = ((SYS->GPD_MFP3 & (~SYS_GPD_MFP3_PD12MFP_Msk)) | SYS_GPD_MFP3_PD12MFP_UART8_nRTS) /*!< Set PD12 function to UART8_nRTS */ +#define SET_UART8_nRTS_PE2() SYS->GPE_MFP0 = ((SYS->GPE_MFP0 & (~SYS_GPE_MFP0_PE2MFP_Msk)) | SYS_GPE_MFP0_PE2MFP_UART8_nRTS) /*!< Set PE2 function to UART8_nRTS */ +#define SET_UART8_nRTS_PI15() SYS->GPI_MFP3 = ((SYS->GPI_MFP3 & (~SYS_GPI_MFP3_PI15MFP_Msk)) | SYS_GPI_MFP3_PI15MFP_UART8_nRTS) /*!< Set PI15 function to UART8_nRTS */ +#define SET_UART8_nRTS_PJ3() SYS->GPJ_MFP0 = ((SYS->GPJ_MFP0 & (~SYS_GPJ_MFP0_PJ3MFP_Msk)) | SYS_GPJ_MFP0_PJ3MFP_UART8_nRTS) /*!< Set PJ3 function to UART8_nRTS */ +#define SET_UART9_RXD_PE4() SYS->GPE_MFP1 = ((SYS->GPE_MFP1 & (~SYS_GPE_MFP1_PE4MFP_Msk)) | SYS_GPE_MFP1_PE4MFP_UART9_RXD) /*!< Set PE4 function to UART9_RXD */ +#define SET_UART9_RXD_PF2() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF2MFP_Msk)) | SYS_GPF_MFP0_PF2MFP_UART9_RXD) /*!< Set PF2 function to UART9_RXD */ +#define SET_UART9_RXD_PF8() SYS->GPF_MFP2 = ((SYS->GPF_MFP2 & (~SYS_GPF_MFP2_PF8MFP_Msk)) | SYS_GPF_MFP2_PF8MFP_UART9_RXD) /*!< Set PF8 function to UART9_RXD */ +#define SET_UART9_RXD_PH11() SYS->GPH_MFP2 = ((SYS->GPH_MFP2 & (~SYS_GPH_MFP2_PH11MFP_Msk)) | SYS_GPH_MFP2_PH11MFP_UART9_RXD) /*!< Set PH11 function to UART9_RXD */ +#define SET_UART9_RXD_PH13() SYS->GPH_MFP3 = ((SYS->GPH_MFP3 & (~SYS_GPH_MFP3_PH13MFP_Msk)) | SYS_GPH_MFP3_PH13MFP_UART9_RXD) /*!< Set PH13 function to UART9_RXD */ +#define SET_UART9_RXD_PH2() SYS->GPH_MFP0 = ((SYS->GPH_MFP0 & (~SYS_GPH_MFP0_PH2MFP_Msk)) | SYS_GPH_MFP0_PH2MFP_UART9_RXD) /*!< Set PH2 function to UART9_RXD */ +#define SET_UART9_TXD_PE5() SYS->GPE_MFP1 = ((SYS->GPE_MFP1 & (~SYS_GPE_MFP1_PE5MFP_Msk)) | SYS_GPE_MFP1_PE5MFP_UART9_TXD) /*!< Set PE5 function to UART9_TXD */ +#define SET_UART9_TXD_PF3() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF3MFP_Msk)) | SYS_GPF_MFP0_PF3MFP_UART9_TXD) /*!< Set PF3 function to UART9_TXD */ +#define SET_UART9_TXD_PF9() SYS->GPF_MFP2 = ((SYS->GPF_MFP2 & (~SYS_GPF_MFP2_PF9MFP_Msk)) | SYS_GPF_MFP2_PF9MFP_UART9_TXD) /*!< Set PF9 function to UART9_TXD */ +#define SET_UART9_TXD_PH10() SYS->GPH_MFP2 = ((SYS->GPH_MFP2 & (~SYS_GPH_MFP2_PH10MFP_Msk)) | SYS_GPH_MFP2_PH10MFP_UART9_TXD) /*!< Set PH10 function to UART9_TXD */ +#define SET_UART9_TXD_PH12() SYS->GPH_MFP3 = ((SYS->GPH_MFP3 & (~SYS_GPH_MFP3_PH12MFP_Msk)) | SYS_GPH_MFP3_PH12MFP_UART9_TXD) /*!< Set PH12 function to UART9_TXD */ +#define SET_UART9_nCTS_PE7() SYS->GPE_MFP1 = ((SYS->GPE_MFP1 & (~SYS_GPE_MFP1_PE7MFP_Msk)) | SYS_GPE_MFP1_PE7MFP_UART9_nCTS) /*!< Set PE7 function to UART9_nCTS */ +#define SET_UART9_nCTS_PF11() SYS->GPF_MFP2 = ((SYS->GPF_MFP2 & (~SYS_GPF_MFP2_PF11MFP_Msk)) | SYS_GPF_MFP2_PF11MFP_UART9_nCTS) /*!< Set PF11 function to UART9_nCTS */ +#define SET_UART9_nCTS_PH6() SYS->GPH_MFP1 = ((SYS->GPH_MFP1 & (~SYS_GPH_MFP1_PH6MFP_Msk)) | SYS_GPH_MFP1_PH6MFP_UART9_nCTS) /*!< Set PH6 function to UART9_nCTS */ +#define SET_UART9_nCTS_PH8() SYS->GPH_MFP2 = ((SYS->GPH_MFP2 & (~SYS_GPH_MFP2_PH8MFP_Msk)) | SYS_GPH_MFP2_PH8MFP_UART9_nCTS) /*!< Set PH8 function to UART9_nCTS */ +#define SET_UART9_nCTS_PJ6() SYS->GPJ_MFP1 = ((SYS->GPJ_MFP1 & (~SYS_GPJ_MFP1_PJ6MFP_Msk)) | SYS_GPJ_MFP1_PJ6MFP_UART9_nCTS) /*!< Set PJ6 function to UART9_nCTS */ +#define SET_UART9_nRTS_PE6() SYS->GPE_MFP1 = ((SYS->GPE_MFP1 & (~SYS_GPE_MFP1_PE6MFP_Msk)) | SYS_GPE_MFP1_PE6MFP_UART9_nRTS) /*!< Set PE6 function to UART9_nRTS */ +#define SET_UART9_nRTS_PF10() SYS->GPF_MFP2 = ((SYS->GPF_MFP2 & (~SYS_GPF_MFP2_PF10MFP_Msk)) | SYS_GPF_MFP2_PF10MFP_UART9_nRTS) /*!< Set PF10 function to UART9_nRTS */ +#define SET_UART9_nRTS_PH7() SYS->GPH_MFP1 = ((SYS->GPH_MFP1 & (~SYS_GPH_MFP1_PH7MFP_Msk)) | SYS_GPH_MFP1_PH7MFP_UART9_nRTS) /*!< Set PH7 function to UART9_nRTS */ +#define SET_UART9_nRTS_PH9() SYS->GPH_MFP2 = ((SYS->GPH_MFP2 & (~SYS_GPH_MFP2_PH9MFP_Msk)) | SYS_GPH_MFP2_PH9MFP_UART9_nRTS) /*!< Set PH9 function to UART9_nRTS */ +#define SET_UART9_nRTS_PJ7() SYS->GPJ_MFP1 = ((SYS->GPJ_MFP1 & (~SYS_GPJ_MFP1_PJ7MFP_Msk)) | SYS_GPJ_MFP1_PJ7MFP_UART9_nRTS) /*!< Set PJ7 function to UART9_nRTS */ +#define SET_USB_D_MINUS_PA13() SYS->GPA_MFP3 = ((SYS->GPA_MFP3 & (~SYS_GPA_MFP3_PA13MFP_Msk)) | SYS_GPA_MFP3_PA13MFP_USB_D_MINUS) /*!< Set PA13 function to USB_D_MINUS */ +#define SET_USB_D_PLUS_PA14() SYS->GPA_MFP3 = ((SYS->GPA_MFP3 & (~SYS_GPA_MFP3_PA14MFP_Msk)) | SYS_GPA_MFP3_PA14MFP_USB_D_PLUS) /*!< Set PA14 function to USB_D_PLUS */ +#define SET_USB_OTG_ID_PA15() SYS->GPA_MFP3 = ((SYS->GPA_MFP3 & (~SYS_GPA_MFP3_PA15MFP_Msk)) | SYS_GPA_MFP3_PA15MFP_USB_OTG_ID) /*!< Set PA15 function to USB_OTG_ID */ +#define SET_USB_VBUS_EN_PB15() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB15MFP_Msk)) | SYS_GPB_MFP3_PB15MFP_USB_VBUS_EN) /*!< Set PB15 function to USB_VBUS_EN */ +#define SET_USB_VBUS_EN_PB6() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB6MFP_Msk)) | SYS_GPB_MFP1_PB6MFP_USB_VBUS_EN) /*!< Set PB6 function to USB_VBUS_EN */ +#define SET_USB_VBUS_EN_PB8() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB8MFP_Msk)) | SYS_GPB_MFP2_PB8MFP_USB_VBUS_EN) /*!< Set PB8 function to USB_VBUS_EN */ +#define SET_USB_VBUS_EN_PI7() SYS->GPI_MFP1 = ((SYS->GPI_MFP1 & (~SYS_GPI_MFP1_PI7MFP_Msk)) | SYS_GPI_MFP1_PI7MFP_USB_VBUS_EN) /*!< Set PI7 function to USB_VBUS_EN */ +#define SET_USB_VBUS_PA12() SYS->GPA_MFP3 = ((SYS->GPA_MFP3 & (~SYS_GPA_MFP3_PA12MFP_Msk)) | SYS_GPA_MFP3_PA12MFP_USB_VBUS) /*!< Set PA12 function to USB_VBUS */ +#define SET_USB_VBUS_ST_PB13() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB13MFP_Msk)) | SYS_GPB_MFP3_PB13MFP_USB_VBUS_ST) /*!< Set PB13 function to USB_VBUS_ST */ +#define SET_USB_VBUS_ST_PB14() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB14MFP_Msk)) | SYS_GPB_MFP3_PB14MFP_USB_VBUS_ST) /*!< Set PB14 function to USB_VBUS_ST */ +#define SET_USB_VBUS_ST_PB7() SYS->GPB_MFP1 = ((SYS->GPB_MFP1 & (~SYS_GPB_MFP1_PB7MFP_Msk)) | SYS_GPB_MFP1_PB7MFP_USB_VBUS_ST) /*!< Set PB7 function to USB_VBUS_ST */ +#define SET_USB_VBUS_ST_PB8() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB8MFP_Msk)) | SYS_GPB_MFP2_PB8MFP_USB_VBUS_ST) /*!< Set PB8 function to USB_VBUS_ST */ +#define SET_USB_VBUS_ST_PB9() SYS->GPB_MFP2 = ((SYS->GPB_MFP2 & (~SYS_GPB_MFP2_PB9MFP_Msk)) | SYS_GPB_MFP2_PB9MFP_USB_VBUS_ST) /*!< Set PB9 function to USB_VBUS_ST */ +#define SET_USB_VBUS_ST_PC14() SYS->GPC_MFP3 = ((SYS->GPC_MFP3 & (~SYS_GPC_MFP3_PC14MFP_Msk)) | SYS_GPC_MFP3_PC14MFP_USB_VBUS_ST) /*!< Set PC14 function to USB_VBUS_ST */ +#define SET_USB_VBUS_ST_PD4() SYS->GPD_MFP1 = ((SYS->GPD_MFP1 & (~SYS_GPD_MFP1_PD4MFP_Msk)) | SYS_GPD_MFP1_PD4MFP_USB_VBUS_ST) /*!< Set PD4 function to USB_VBUS_ST */ +#define SET_USB_VBUS_ST_PI6() SYS->GPI_MFP1 = ((SYS->GPI_MFP1 & (~SYS_GPI_MFP1_PI6MFP_Msk)) | SYS_GPI_MFP1_PI6MFP_USB_VBUS_ST) /*!< Set PI6 function to USB_VBUS_ST */ +#define SET_USCI0_CLK_PA11() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA11MFP_Msk)) | SYS_GPA_MFP2_PA11MFP_USCI0_CLK) /*!< Set PA11 function to USCI0_CLK */ +#define SET_USCI0_CLK_PB12() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB12MFP_Msk)) | SYS_GPB_MFP3_PB12MFP_USCI0_CLK) /*!< Set PB12 function to USCI0_CLK */ +#define SET_USCI0_CLK_PD0() SYS->GPD_MFP0 = ((SYS->GPD_MFP0 & (~SYS_GPD_MFP0_PD0MFP_Msk)) | SYS_GPD_MFP0_PD0MFP_USCI0_CLK) /*!< Set PD0 function to USCI0_CLK */ +#define SET_USCI0_CLK_PE2() SYS->GPE_MFP0 = ((SYS->GPE_MFP0 & (~SYS_GPE_MFP0_PE2MFP_Msk)) | SYS_GPE_MFP0_PE2MFP_USCI0_CLK) /*!< Set PE2 function to USCI0_CLK */ +#define SET_USCI0_CTL0_PB0() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB0MFP_Msk)) | SYS_GPB_MFP0_PB0MFP_USCI0_CTL0) /*!< Set PB0 function to USCI0_CTL0 */ +#define SET_USCI0_CTL0_PB13() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB13MFP_Msk)) | SYS_GPB_MFP3_PB13MFP_USCI0_CTL0) /*!< Set PB13 function to USCI0_CTL0 */ +#define SET_USCI0_CTL0_PC13() SYS->GPC_MFP3 = ((SYS->GPC_MFP3 & (~SYS_GPC_MFP3_PC13MFP_Msk)) | SYS_GPC_MFP3_PC13MFP_USCI0_CTL0) /*!< Set PC13 function to USCI0_CTL0 */ +#define SET_USCI0_CTL0_PC14() SYS->GPC_MFP3 = ((SYS->GPC_MFP3 & (~SYS_GPC_MFP3_PC14MFP_Msk)) | SYS_GPC_MFP3_PC14MFP_USCI0_CTL0) /*!< Set PC14 function to USCI0_CTL0 */ +#define SET_USCI0_CTL0_PD4() SYS->GPD_MFP1 = ((SYS->GPD_MFP1 & (~SYS_GPD_MFP1_PD4MFP_Msk)) | SYS_GPD_MFP1_PD4MFP_USCI0_CTL0) /*!< Set PD4 function to USCI0_CTL0 */ +#define SET_USCI0_CTL0_PE6() SYS->GPE_MFP1 = ((SYS->GPE_MFP1 & (~SYS_GPE_MFP1_PE6MFP_Msk)) | SYS_GPE_MFP1_PE6MFP_USCI0_CTL0) /*!< Set PE6 function to USCI0_CTL0 */ +#define SET_USCI0_CTL1_PA8() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA8MFP_Msk)) | SYS_GPA_MFP2_PA8MFP_USCI0_CTL1) /*!< Set PA8 function to USCI0_CTL1 */ +#define SET_USCI0_CTL1_PB15() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB15MFP_Msk)) | SYS_GPB_MFP3_PB15MFP_USCI0_CTL1) /*!< Set PB15 function to USCI0_CTL1 */ +#define SET_USCI0_CTL1_PD3() SYS->GPD_MFP0 = ((SYS->GPD_MFP0 & (~SYS_GPD_MFP0_PD3MFP_Msk)) | SYS_GPD_MFP0_PD3MFP_USCI0_CTL1) /*!< Set PD3 function to USCI0_CTL1 */ +#define SET_USCI0_CTL1_PE5() SYS->GPE_MFP1 = ((SYS->GPE_MFP1 & (~SYS_GPE_MFP1_PE5MFP_Msk)) | SYS_GPE_MFP1_PE5MFP_USCI0_CTL1) /*!< Set PE5 function to USCI0_CTL1 */ +#define SET_USCI0_CTL1_PF0() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF0MFP_Msk)) | SYS_GPF_MFP0_PF0MFP_USCI0_CTL1) /*!< Set PF0 function to USCI0_CTL1 */ +#define SET_USCI0_DAT0_PA10() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA10MFP_Msk)) | SYS_GPA_MFP2_PA10MFP_USCI0_DAT0) /*!< Set PA10 function to USCI0_DAT0 */ +#define SET_USCI0_DAT0_PB13() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB13MFP_Msk)) | SYS_GPB_MFP3_PB13MFP_USCI0_DAT0) /*!< Set PB13 function to USCI0_DAT0 */ +#define SET_USCI0_DAT0_PD1() SYS->GPD_MFP0 = ((SYS->GPD_MFP0 & (~SYS_GPD_MFP0_PD1MFP_Msk)) | SYS_GPD_MFP0_PD1MFP_USCI0_DAT0) /*!< Set PD1 function to USCI0_DAT0 */ +#define SET_USCI0_DAT0_PE3() SYS->GPE_MFP0 = ((SYS->GPE_MFP0 & (~SYS_GPE_MFP0_PE3MFP_Msk)) | SYS_GPE_MFP0_PE3MFP_USCI0_DAT0) /*!< Set PE3 function to USCI0_DAT0 */ +#define SET_USCI0_DAT1_PA9() SYS->GPA_MFP2 = ((SYS->GPA_MFP2 & (~SYS_GPA_MFP2_PA9MFP_Msk)) | SYS_GPA_MFP2_PA9MFP_USCI0_DAT1) /*!< Set PA9 function to USCI0_DAT1 */ +#define SET_USCI0_DAT1_PB14() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB14MFP_Msk)) | SYS_GPB_MFP3_PB14MFP_USCI0_DAT1) /*!< Set PB14 function to USCI0_DAT1 */ +#define SET_USCI0_DAT1_PD2() SYS->GPD_MFP0 = ((SYS->GPD_MFP0 & (~SYS_GPD_MFP0_PD2MFP_Msk)) | SYS_GPD_MFP0_PD2MFP_USCI0_DAT1) /*!< Set PD2 function to USCI0_DAT1 */ +#define SET_USCI0_DAT1_PE4() SYS->GPE_MFP1 = ((SYS->GPE_MFP1 & (~SYS_GPE_MFP1_PE4MFP_Msk)) | SYS_GPE_MFP1_PE4MFP_USCI0_DAT1) /*!< Set PE4 function to USCI0_DAT1 */ +#define SET_USCI0_DAT1_PF1() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF1MFP_Msk)) | SYS_GPF_MFP0_PF1MFP_USCI0_DAT1) /*!< Set PF1 function to USCI0_DAT1 */ +#define SET_UTCPD0_CC1_PC0() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC0MFP_Msk)) | SYS_GPC_MFP0_PC0MFP_UTCPD0_CC1) /*!< Set PC0 function to UTCPD0_CC1 */ +#define SET_UTCPD0_CC2_PC1() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC1MFP_Msk)) | SYS_GPC_MFP0_PC1MFP_UTCPD0_CC2) /*!< Set PC1 function to UTCPD0_CC2 */ +#define SET_UTCPD0_CCDB1_PC2() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC2MFP_Msk)) | SYS_GPC_MFP0_PC2MFP_UTCPD0_CCDB1) /*!< Set PC2 function to UTCPD0_CCDB1 */ +#define SET_UTCPD0_CCDB2_PC3() SYS->GPC_MFP0 = ((SYS->GPC_MFP0 & (~SYS_GPC_MFP0_PC3MFP_Msk)) | SYS_GPC_MFP0_PC3MFP_UTCPD0_CCDB2) /*!< Set PC3 function to UTCPD0_CCDB2 */ +#define SET_UTCPD0_DISCHG_PA1() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA1MFP_Msk)) | SYS_GPA_MFP0_PA1MFP_UTCPD0_DISCHG) /*!< Set PA1 function to UTCPD0_DISCHG */ +#define SET_UTCPD0_DISCHG_PA6() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA6MFP_Msk)) | SYS_GPA_MFP1_PA6MFP_UTCPD0_DISCHG) /*!< Set PA6 function to UTCPD0_DISCHG */ +#define SET_UTCPD0_DISCHG_PC4() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC4MFP_Msk)) | SYS_GPC_MFP1_PC4MFP_UTCPD0_DISCHG) /*!< Set PC4 function to UTCPD0_DISCHG */ +#define SET_UTCPD0_DISCHG_PC5() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC5MFP_Msk)) | SYS_GPC_MFP1_PC5MFP_UTCPD0_DISCHG) /*!< Set PC5 function to UTCPD0_DISCHG */ +#define SET_UTCPD0_DISCHG_PC6() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC6MFP_Msk)) | SYS_GPC_MFP1_PC6MFP_UTCPD0_DISCHG) /*!< Set PC6 function to UTCPD0_DISCHG */ +#define SET_UTCPD0_DISCHG_PF0() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF0MFP_Msk)) | SYS_GPF_MFP0_PF0MFP_UTCPD0_DISCHG) /*!< Set PF0 function to UTCPD0_DISCHG */ +#define SET_UTCPD0_DISCHG_PF1() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF1MFP_Msk)) | SYS_GPF_MFP0_PF1MFP_UTCPD0_DISCHG) /*!< Set PF1 function to UTCPD0_DISCHG */ +#define SET_UTCPD0_DISCHG_PJ0() SYS->GPJ_MFP0 = ((SYS->GPJ_MFP0 & (~SYS_GPJ_MFP0_PJ0MFP_Msk)) | SYS_GPJ_MFP0_PJ0MFP_UTCPD0_DISCHG) /*!< Set PJ0 function to UTCPD0_DISCHG */ +#define SET_UTCPD0_FRSTX1_PA1() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA1MFP_Msk)) | SYS_GPA_MFP0_PA1MFP_UTCPD0_FRSTX1) /*!< Set PA1 function to UTCPD0_FRSTX1 */ +#define SET_UTCPD0_FRSTX1_PC4() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC4MFP_Msk)) | SYS_GPC_MFP1_PC4MFP_UTCPD0_FRSTX1) /*!< Set PC4 function to UTCPD0_FRSTX1 */ +#define SET_UTCPD0_FRSTX1_PF1() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF1MFP_Msk)) | SYS_GPF_MFP0_PF1MFP_UTCPD0_FRSTX1) /*!< Set PF1 function to UTCPD0_FRSTX1 */ +#define SET_UTCPD0_FRSTX2_PC5() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC5MFP_Msk)) | SYS_GPC_MFP1_PC5MFP_UTCPD0_FRSTX2) /*!< Set PC5 function to UTCPD0_FRSTX2 */ +#define SET_UTCPD0_FRSTX2_PC6() SYS->GPC_MFP1 = ((SYS->GPC_MFP1 & (~SYS_GPC_MFP1_PC6MFP_Msk)) | SYS_GPC_MFP1_PC6MFP_UTCPD0_FRSTX2) /*!< Set PC6 function to UTCPD0_FRSTX2 */ +#define SET_UTCPD0_FRSTX2_PF0() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF0MFP_Msk)) | SYS_GPF_MFP0_PF0MFP_UTCPD0_FRSTX2) /*!< Set PF0 function to UTCPD0_FRSTX2 */ +#define SET_UTCPD0_VBDCHG_PB1() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB1MFP_Msk)) | SYS_GPB_MFP0_PB1MFP_UTCPD0_VBDCHG) /*!< Set PB1 function to UTCPD0_VBDCHG */ +#define SET_UTCPD0_VBSNKEN_PA3() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA3MFP_Msk)) | SYS_GPA_MFP0_PA3MFP_UTCPD0_VBSNKEN) /*!< Set PA3 function to UTCPD0_VBSNKEN */ +#define SET_UTCPD0_VBSNKEN_PA5() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA5MFP_Msk)) | SYS_GPA_MFP1_PA5MFP_UTCPD0_VBSNKEN) /*!< Set PA5 function to UTCPD0_VBSNKEN */ +#define SET_UTCPD0_VBSNKEN_PA7() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA7MFP_Msk)) | SYS_GPA_MFP1_PA7MFP_UTCPD0_VBSNKEN) /*!< Set PA7 function to UTCPD0_VBSNKEN */ +#define SET_UTCPD0_VBSNKEN_PB13() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB13MFP_Msk)) | SYS_GPB_MFP3_PB13MFP_UTCPD0_VBSNKEN) /*!< Set PB13 function to UTCPD0_VBSNKEN */ +#define SET_UTCPD0_VBSNKEN_PB15() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB15MFP_Msk)) | SYS_GPB_MFP3_PB15MFP_UTCPD0_VBSNKEN) /*!< Set PB15 function to UTCPD0_VBSNKEN */ +#define SET_UTCPD0_VBSNKEN_PF5() SYS->GPF_MFP1 = ((SYS->GPF_MFP1 & (~SYS_GPF_MFP1_PF5MFP_Msk)) | SYS_GPF_MFP1_PF5MFP_UTCPD0_VBSNKEN) /*!< Set PF5 function to UTCPD0_VBSNKEN */ +#define SET_UTCPD0_VBSRCEN_PA2() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA2MFP_Msk)) | SYS_GPA_MFP0_PA2MFP_UTCPD0_VBSRCEN) /*!< Set PA2 function to UTCPD0_VBSRCEN */ +#define SET_UTCPD0_VBSRCEN_PA4() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA4MFP_Msk)) | SYS_GPA_MFP1_PA4MFP_UTCPD0_VBSRCEN) /*!< Set PA4 function to UTCPD0_VBSRCEN */ +#define SET_UTCPD0_VBSRCEN_PA6() SYS->GPA_MFP1 = ((SYS->GPA_MFP1 & (~SYS_GPA_MFP1_PA6MFP_Msk)) | SYS_GPA_MFP1_PA6MFP_UTCPD0_VBSRCEN) /*!< Set PA6 function to UTCPD0_VBSRCEN */ +#define SET_UTCPD0_VBSRCEN_PB12() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB12MFP_Msk)) | SYS_GPB_MFP3_PB12MFP_UTCPD0_VBSRCEN) /*!< Set PB12 function to UTCPD0_VBSRCEN */ +#define SET_UTCPD0_VBSRCEN_PB14() SYS->GPB_MFP3 = ((SYS->GPB_MFP3 & (~SYS_GPB_MFP3_PB14MFP_Msk)) | SYS_GPB_MFP3_PB14MFP_UTCPD0_VBSRCEN) /*!< Set PB14 function to UTCPD0_VBSRCEN */ +#define SET_UTCPD0_VBSRCEN_PF4() SYS->GPF_MFP1 = ((SYS->GPF_MFP1 & (~SYS_GPF_MFP1_PF4MFP_Msk)) | SYS_GPF_MFP1_PF4MFP_UTCPD0_VBSRCEN) /*!< Set PF4 function to UTCPD0_VBSRCEN */ +#define SET_UTCPD0_VCNEN1_PA0() SYS->GPA_MFP0 = ((SYS->GPA_MFP0 & (~SYS_GPA_MFP0_PA0MFP_Msk)) | SYS_GPA_MFP0_PA0MFP_UTCPD0_VCNEN1) /*!< Set PA0 function to UTCPD0_VCNEN1 */ +#define SET_UTCPD0_VCNEN2_PB0() SYS->GPB_MFP0 = ((SYS->GPB_MFP0 & (~SYS_GPB_MFP0_PB0MFP_Msk)) | SYS_GPB_MFP0_PB0MFP_UTCPD0_VCNEN2) /*!< Set PB0 function to UTCPD0_VCNEN2 */ +#define SET_X32_IN_PF5() SYS->GPF_MFP1 = ((SYS->GPF_MFP1 & (~SYS_GPF_MFP1_PF5MFP_Msk)) | SYS_GPF_MFP1_PF5MFP_X32_IN) /*!< Set PF5 function to X32_IN */ +#define SET_X32_OUT_PF4() SYS->GPF_MFP1 = ((SYS->GPF_MFP1 & (~SYS_GPF_MFP1_PF4MFP_Msk)) | SYS_GPF_MFP1_PF4MFP_X32_OUT) /*!< Set PF4 function to X32_OUT */ +#define SET_XT1_IN_PF3() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF3MFP_Msk)) | SYS_GPF_MFP0_PF3MFP_XT1_IN) /*!< Set PF3 function to XT1_IN */ +#define SET_XT1_OUT_PF2() SYS->GPF_MFP0 = ((SYS->GPF_MFP0 & (~SYS_GPF_MFP0_PF2MFP_Msk)) | SYS_GPF_MFP0_PF2MFP_XT1_OUT) /*!< Set PF2 function to XT1_OUT */ + + + + +/*@}*/ /* end of group SYS_EXPORTED_CONSTANTS */ + +/** + * @brief Clear Brown-out detector interrupt flag + * @param None + * @return None + * @details This macro clear Brown-out detector interrupt flag. + * \hideinitializer + */ +#define SYS_CLEAR_BOD_INT_FLAG() \ + do{ \ + SYS->BODSTS |= SYS_BODSTS_BODIF_Msk; \ + }while(0) + +/** + * @brief Set Brown-out detector function to normal mode + * @param None + * @return None + * @details This macro set Brown-out detector to normal mode. + * The register write-protection function should be disabled before using this macro. + * \hideinitializer + */ +#define SYS_CLEAR_BOD_LPM() \ + do{ \ + while(SYS->BODCTL & SYS_BODCTL_WRBUSY_Msk); \ + SYS->BODCTL &= ~SYS_BODCTL_BODLPM_Msk; \ + }while(0) + +/** + * @brief Disable Brown-out detector function + * @param None + * @return None + * @details This macro disable Brown-out detector function. + * The register write-protection function should be disabled before using this macro. + * \hideinitializer + */ +#define SYS_DISABLE_BOD() \ + do{ \ + while(SYS->BODCTL & SYS_BODCTL_WRBUSY_Msk); \ + SYS->BODCTL &= ~SYS_BODCTL_BODEN_Msk; \ + }while(0) + +/** + * @brief Enable Brown-out detector function + * @param None + * @return None + * @details This macro enable Brown-out detector function. + * The register write-protection function should be disabled before using this macro. + * \hideinitializer + */ +#define SYS_ENABLE_BOD() \ + do{ \ + while(SYS->BODCTL & SYS_BODCTL_WRBUSY_Msk); \ + SYS->BODCTL |= SYS_BODCTL_BODEN_Msk; \ + }while(0) + +/** + * @brief Get Brown-out detector interrupt flag + * @param None + * @retval 0 Brown-out detect interrupt flag is not set. + * @retval >=1 Brown-out detect interrupt flag is set. + * @details This macro get Brown-out detector interrupt flag. + * \hideinitializer + */ +#define SYS_GET_BOD_INT_FLAG() (SYS->BODCTL & SYS_BODSTS_BODIF_Msk) + +/** + * @brief Get Brown-out detector status + * @param None + * @retval 0 System voltage is higher than BOD threshold voltage setting or BOD function is disabled. + * @retval >=1 System voltage is lower than BOD threshold voltage setting. + * @details This macro get Brown-out detector output status. + * If the BOD function is disabled, this function always return 0. + * \hideinitializer + */ +#define SYS_GET_BOD_OUTPUT() (SYS->BODCTL & SYS_BODSTS_BODOUT_Msk) + +/** + * @brief Enable Brown-out detector interrupt function + * @param None + * @return None + * @details This macro enable Brown-out detector interrupt function. + * The register write-protection function should be disabled before using this macro. + * \hideinitializer + */ +#define SYS_DISABLE_BOD_RST() \ + do{ \ + while(SYS->BODCTL & SYS_BODCTL_WRBUSY_Msk); \ + SYS->BODCTL &= ~SYS_BODCTL_BODRSTEN_Msk; \ + }while(0) + +/** + * @brief Enable Brown-out detector reset function + * @param None + * @return None + * @details This macro enable Brown-out detect reset function. + * The register write-protection function should be disabled before using this macro. + * \hideinitializer + */ +#define SYS_ENABLE_BOD_RST() \ + do{ \ + while(SYS->BODCTL & SYS_BODCTL_WRBUSY_Msk); \ + SYS->BODCTL |= SYS_BODCTL_BODRSTEN_Msk; \ + }while(0) + +/** + * @brief Set Brown-out detector function to low power mode + * @param None + * @return None + * @details This macro set Brown-out detector to low power mode. + * The register write-protection function should be disabled before using this macro. + * \hideinitializer + */ +#define SYS_SET_BOD_LPM() \ + do{ \ + while(SYS->BODCTL & SYS_BODCTL_WRBUSY_Msk); \ + SYS->BODCTL |= SYS_BODCTL_BODLPM_Msk; \ + }while(0) + +/** + * @brief Set Brown-out detector voltage level + * @param[in] u32Level is Brown-out voltage level. Including : + * - \ref SYS_BODCTL_BODVL_1_6V + * - \ref SYS_BODCTL_BODVL_1_8V + * - \ref SYS_BODCTL_BODVL_2_0V + * - \ref SYS_BODCTL_BODVL_2_2V + * - \ref SYS_BODCTL_BODVL_2_4V + * - \ref SYS_BODCTL_BODVL_2_6V + * - \ref SYS_BODCTL_BODVL_2_8V + * - \ref SYS_BODCTL_BODVL_3_0V + * @return None + * @details This macro set Brown-out detector voltage level. + * The write-protection function should be disabled before using this macro. + * \hideinitializer + */ +#define SYS_SET_BOD_LEVEL(u32Level) \ + do{ \ + while(SYS->BODCTL & SYS_BODCTL_WRBUSY_Msk); \ + SYS->BODCTL = (SYS->BODCTL & ~SYS_BODCTL_BODVL_Msk) | (u32Level); \ + }while(0) + +/** + * @brief Set Brown-out detector wake-up selection + * @param[in] u32Wakeup is Brown-out detector wake-up selection. Including : + * - \ref SYS_BODCTL_BODWKEN_DISABLE + * - \ref SYS_BODCTL_BODWKEN_RISE + * - \ref SYS_BODCTL_BODWKEN_DROP + * - \ref SYS_BODCTL_BODWKEN_BOTH + * @return None + * @details This macro set Brown-out detector wake-up selection. + * The write-protection function should be disabled before using this macro. + * \hideinitializer + */ +#define SYS_SET_BOD_WAKEUP(u32Wakeup) \ + do{ \ + while(SYS->BODCTL & SYS_BODCTL_WRBUSY_Msk); \ + SYS->BODCTL = (SYS->BODCTL & ~SYS_BODCTL_BODWKEN_Msk) | (u32Wakeup); \ + }while(0) + +/** + * @brief Get reset source is from Brown-out detector reset + * @param None + * @retval 0 Previous reset source is not from Brown-out detector reset + * @retval >=1 Previous reset source is from Brown-out detector reset + * @details This macro get previous reset source is from Brown-out detect reset or not. + * \hideinitializer + */ +#define SYS_IS_BOD_RST() (SYS->RSTSTS & SYS_RSTSTS_BODRF_Msk) + +/** + * @brief Get reset source is from CPU reset + * @param None + * @retval 0 Previous reset source is not from CPU reset + * @retval >=1 Previous reset source is from CPU reset + * @details This macro get previous reset source is from CPU reset. + * \hideinitializer + */ +#define SYS_IS_CPU_RST() (SYS->RSTSTS & SYS_RSTSTS_CPURF_Msk) + +/** + * @brief Get reset source is from LVR Reset + * @param None + * @retval 0 Previous reset source is not from Low-Voltage-Reset + * @retval >=1 Previous reset source is from Low-Voltage-Reset + * @details This macro get previous reset source is from Low-Voltage-Reset. + * \hideinitializer + */ +#define SYS_IS_LVR_RST() (SYS->RSTSTS & SYS_RSTSTS_LVRRF_Msk) + +/** + * @brief Get reset source is from Power-on Reset + * @param None + * @retval 0 Previous reset source is not from Power-on Reset + * @retval >=1 Previous reset source is from Power-on Reset + * @details This macro get previous reset source is from Power-on Reset. + * \hideinitializer + */ +#define SYS_IS_POR_RST() (SYS->RSTSTS & SYS_RSTSTS_PORF_Msk) + +/** + * @brief Get reset source is from reset pin reset + * @param None + * @retval 0 Previous reset source is not from reset pin reset + * @retval >=1 Previous reset source is from reset pin reset + * @details This macro get previous reset source is from reset pin reset. + * \hideinitializer + */ +#define SYS_IS_RSTPIN_RST() (SYS->RSTSTS & SYS_RSTSTS_PINRF_Msk) + +/** + * @brief Get reset source is from system reset + * @param None + * @retval 0 Previous reset source is not from system reset + * @retval >=1 Previous reset source is from system reset + * @details This macro get previous reset source is from system reset. + * \hideinitializer + */ +#define SYS_IS_SYSTEM_RST() (SYS->RSTSTS & SYS_RSTSTS_SYSRF_Msk) + +/** + * @brief Get reset source is from window watch dog reset + * @param None + * @retval 0 Previous reset source is not from window watch dog reset + * @retval >=1 Previous reset source is from window watch dog reset + * @details This macro get previous reset source is from window watch dog reset. + * \hideinitializer + */ +#define SYS_IS_WDT_RST() (SYS->RSTSTS & SYS_RSTSTS_WDTRF_Msk) + +/** + * @brief Get reset source is from CPU lockup reset + * @param None + * @retval 0 Previous reset source is not from CPU lockup reset + * @retval >=1 Previous reset source is from CPU lockup reset + * @details This macro get previous reset source is from CPU lockup reset. + * \hideinitializer + */ +#define SYS_IS_CPULK_RST() (SYS->RSTSTS & SYS_RSTSTS_CPULKRF_Msk) + + +/** + * @brief Disable Low-Voltage-Reset function + * @param None + * @return None + * @details This macro disable Low-Voltage-Reset function. + * The register write-protection function should be disabled before using this macro. + * \hideinitializer + */ +#define SYS_DISABLE_LVR() \ + do{ \ + while(SYS->BODCTL & SYS_BODCTL_WRBUSY_Msk); \ + SYS->BODCTL &= ~SYS_BODCTL_LVREN_Msk; \ + }while(0) + +/** + * @brief Enable Low-Voltage-Reset function + * @param None + * @return None + * @details This macro enable Low-Voltage-Reset function. + * The register write-protection function should be disabled before using this macro. + * \hideinitializer + */ +#define SYS_ENABLE_LVR() \ + do{ \ + while(SYS->BODCTL & SYS_BODCTL_WRBUSY_Msk); \ + SYS->BODCTL |= SYS_BODCTL_LVREN_Msk; \ + }while(0) + +/** + * @brief Disable Power-on Reset function + * @param None + * @return None + * @details This macro disable Power-on Reset function. + * The register write-protection function should be disabled before using this macro. + * \hideinitializer + */ +#define SYS_DISABLE_POR() (SYS->PORCTL = 0x5AA55AA5) + +/** + * @brief Enable Power-on Reset function + * @param None + * @return None + * @details This macro enable Power-on Reset function. + * The register write-protection function should be disabled before using this macro. + * \hideinitializer + */ +#define SYS_ENABLE_POR() (SYS->PORCTL = 0) + +/** + * @brief Wait SYS_BODCTL Write Busy Flag + * @param None + * @return None + * @details This macro waits SYS_BODCTL write busy flag is cleared and skips when time-out. + */ +#define SYS_WAIT_BODCTL_WRBUSY() \ + do{ \ + uint32_t u32TimeOutCnt = SYS_TIMEOUT; \ + while(SYS->BODCTL & SYS_BODCTL_WRBUSY_Msk) \ + { \ + if(--u32TimeOutCnt == 0) break; \ + } \ + }while(0) + +/** + * @brief Wait SYS_VREFCTL Write Busy Flag + * @param None + * @return None + * @details This macro waits SYS_VREFCTL write busy flag is cleared and skips when time-out. + */ +#define SYS_WAIT_VREFCTL_WRBUSY() \ + do{ \ + uint32_t u32TimeOutCnt = SYS_TIMEOUT; \ + while(SYS->VREFCTL & SYS_VREFCTL_WRBUSY_Msk) \ + { \ + if(--u32TimeOutCnt == 0) break; \ + } \ + }while(0) + +/*---------------------------------------------------------------------------------------------------------*/ +/* static inline functions */ +/*---------------------------------------------------------------------------------------------------------*/ +/* Declare these inline functions here to avoid MISRA C 2004 rule 8.1 error */ +__STATIC_INLINE void SYS_UnlockReg(void); +__STATIC_INLINE void SYS_LockReg(void); +__STATIC_INLINE void SYS_ClearResetSrc(uint32_t u32Src); +__STATIC_INLINE uint32_t SYS_GetBODStatus(void); +__STATIC_INLINE uint32_t SYS_GetResetSrc(void); +__STATIC_INLINE uint32_t SYS_IsRegLocked(void); +__STATIC_INLINE uint32_t SYS_ReadPDID(void); +__STATIC_INLINE void SYS_ResetChip(void); +__STATIC_INLINE void SYS_ResetCPU(void); +__STATIC_INLINE void SYS_SetVRef(uint32_t u32VRefCTL); + +/** + * @brief Disable register write-protection function + * @param None + * @return None + * @details This function disable register write-protection function. + * To unlock the protected register to allow write access. + */ +__STATIC_INLINE void SYS_UnlockReg(void) +{ + uint32_t u32TimeOutCount = SYS_TIMEOUT; + + do + { + SYS->REGLCTL = 0x59UL; + SYS->REGLCTL = 0x16UL; + SYS->REGLCTL = 0x88UL; + + if (--u32TimeOutCount == 0) break; + } while (SYS->REGLCTL == 0UL); +} + +/** + * @brief Enable register write-protection function + * @param None + * @return None + * @details This function is used to enable register write-protection function. + * To lock the protected register to forbid write access. + */ +__STATIC_INLINE void SYS_LockReg(void) +{ + SYS->REGLCTL = 0UL; +} + +/** + * @brief Clear reset source + * @param[in] u32Src is system reset source. Including : + * - \ref SYS_RSTSTS_PORF_Msk + * - \ref SYS_RSTSTS_PINRF_Msk + * - \ref SYS_RSTSTS_WDTRF_Msk + * - \ref SYS_RSTSTS_LVRRF_Msk + * - \ref SYS_RSTSTS_BODRF_Msk + * - \ref SYS_RSTSTS_SYSRF_Msk + * - \ref SYS_RSTSTS_CPURF_Msk + * - \ref SYS_RSTSTS_CPULKRF_Msk + * @return None + * @details This function clear the selected system reset source. + */ +void SYS_ClearResetSrc(uint32_t u32Src) +{ + SYS->RSTSTS = u32Src; +} + +/** + * @brief Get Brown-out detector output status + * @param None + * @retval 0 System voltage is higher than BODVL setting or BODEN is 0. + * @retval 1 System voltage is lower than BODVL setting. + * @details This function get Brown-out detector output status. + */ +__STATIC_INLINE uint32_t SYS_GetBODStatus(void) +{ + return ((SYS->BODCTL & SYS_BODSTS_BODOUT_Msk) >> SYS_BODSTS_BODOUT_Pos); +} + +/** + * @brief Get reset status register value + * @param None + * @return Reset source + * @details This function get the system reset status register value. + */ +__STATIC_INLINE uint32_t SYS_GetResetSrc(void) +{ + return (SYS->RSTSTS); +} + +/** + * @brief Check if register is locked nor not + * @param None + * @retval 0 Write-protection function is disabled. + * 1 Write-protection function is enabled. + * @details This function check register write-protection bit setting. + */ +__STATIC_INLINE uint32_t SYS_IsRegLocked(void) +{ + return SYS->REGLCTL & 1UL ? 0UL : 1UL; +} + +/** + * @brief Get product ID + * @param None + * @return Product ID + * @details This function get product ID. + */ +__STATIC_INLINE uint32_t SYS_ReadPDID(void) +{ + return SYS->PDID; +} + +/** + * @brief Reset chip with chip reset + * @param None + * @return None + * @details This function reset chip with chip reset. + * The register write-protection function should be disabled before using this function. + */ +__STATIC_INLINE void SYS_ResetChip(void) +{ + SYS->RSTCTL |= SYS_RSTCTL_CHIPRST_Msk; +} + +/** + * @brief Reset chip with CPU reset + * @param None + * @return None + * @details This function reset CPU with CPU reset. + * The register write-protection function should be disabled before using this function. + */ +__STATIC_INLINE void SYS_ResetCPU(void) +{ + SYS->RSTCTL |= SYS_RSTCTL_CPURSTEN_Msk; + + SCB->SCR &= ~SCB_SCR_SLEEPDEEP_Msk; + + __WFI(); +} + +/** + * @brief Set Reference Voltage + * @param[in] u32VRefCTL is reference voltage setting. Including : + * - \ref SYS_VREFCTL_VREF_PIN + * - \ref SYS_VREFCTL_VREF_1_6V + * - \ref SYS_VREFCTL_VREF_2_048V + * - \ref SYS_VREFCTL_VREF_2_5V + * - \ref SYS_VREFCTL_VREF_3_072V + * - \ref SYS_VREFCTL_VREF_AVDD + * @return None + * @details This function select reference voltage. + * The register write-protection function should be disabled before using this function. + */ +__STATIC_INLINE void SYS_SetVRef(uint32_t u32VRefCTL) +{ + /* Set reference voltage */ + SYS->VREFCTL = (SYS->VREFCTL & (~SYS_VREFCTL_VREFCTL_Msk)) | (u32VRefCTL); +} + +void SYS_ResetModule(uint32_t u32ModuleIndex); +int32_t SYS_EnableBOD(int32_t i32Mode, uint32_t u32BODLevel); +int32_t SYS_DisableBOD(void); + +/** @} end of group SYS_EXPORTED_FUNCTIONS */ +/** @} end of group SYS_Driver */ +/** @} end of group Standard_Driver */ + +#ifdef __cplusplus +} +#endif + +#endif /* __SYS_H__ */ diff --git a/UserManual/RH_NuTool-PinConfigure_EN.docx b/UserManual/RH_NuTool-PinConfigure_EN.docx index f901a2c..0f58a76 100644 Binary files a/UserManual/RH_NuTool-PinConfigure_EN.docx and b/UserManual/RH_NuTool-PinConfigure_EN.docx differ diff --git a/assets/UserManual/RH_NuTool-PinConfigure_EN_V1.29.0001.pdf b/assets/UserManual/RH_NuTool-PinConfigure_EN_V1.29.0001.pdf deleted file mode 100644 index c3a6d2b..0000000 Binary files a/assets/UserManual/RH_NuTool-PinConfigure_EN_V1.29.0001.pdf and /dev/null differ diff --git a/assets/UserManual/RH_NuTool-PinConfigure_EN_V1.30.0000.pdf b/assets/UserManual/RH_NuTool-PinConfigure_EN_V1.30.0000.pdf new file mode 100644 index 0000000..6362ecb Binary files /dev/null and b/assets/UserManual/RH_NuTool-PinConfigure_EN_V1.30.0000.pdf differ diff --git a/package.json b/package.json index 8f1b8f8..947516c 100644 --- a/package.json +++ b/package.json @@ -1,6 +1,6 @@ { "name": "nutool-pinconfigure", - "version": "1.29.0007", + "version": "1.30.0000", "description": "", "main": "main.js", "scripts": { diff --git a/src/NUC_KM1M0D0F_100_Content.js b/src/NUC_KM1M0D0F_100_Content.js new file mode 100644 index 0000000..7e9f3d0 --- /dev/null +++ b/src/NUC_KM1M0D0F_100_Content.js @@ -0,0 +1,492 @@ +NUTOOL_PIN.g_cfg_chips = [ + // KM1M0D0F_100 + { name: "KM1M0DF02N/K", pkg: "LQFP100_D0x(14*14)" }, + // KM1M0D0F_80 + { name: "KM1M0DF03N/K", pkg: "LQFP80_D0x(12*12)" }, + // KM1M0D1F + { name: "KM1M0DF13N/K", pkg: "LQFP80_D1x(12*12)" }, + // KM1M0D0F_64 + { name: "KM1M0DF04N/K", pkg: "TQFP64_D0x(10*10)" } +]; + +NUTOOL_PIN.g_cfg_pkgs = { + "LQFP100_D0x(14*14)": [ + 'PA.0', 'PA.1', 'PA.2', 'PA.3', 'PA.4', 'PA.5', 'PA.6', 'PA.7', 'RON', 'NDMOD', + 'NRST', 'P9.0', 'P9.1', 'VSS', 'P2.5', 'P2.6', 'VDD', 'BOOT', 'VOUT12', 'VOUT33', + 'VDD', 'VSS', 'P0.0', 'P0.1', 'P0.2', 'P0.3', 'P0.4', 'P0.5', 'P0.6', 'P0.7', + 'P2.0', 'P2.1', 'P2.2', 'P2.3', 'P2.4', 'P8.7', 'P8.6', 'P8.5', 'P8.4', 'P8.3', + 'P8.2', 'P8.1', 'P8.0', 'P7.7', 'P7.6', 'P7.5', 'P7.4', 'P7.3', 'P7.2', 'P7.1', + 'P7.0', 'P6.7', 'P6.6', 'P6.5', 'P6.4', 'P6.3', 'P6.2', 'P6.1', 'P5.0', 'P5.1', + 'P5.2', 'P5.3', 'P5.4', 'P5.5', 'P5.6', 'P5.7', 'P4.7', 'P4.6', 'P4.5', 'P4.4', + 'P4.3', 'P4.2', 'P4.1', 'P4.0', 'P3.6', 'P3.5', 'P3.4', 'P3.3', 'P3.2', 'P3.1', + 'P3.0', 'P1.6', 'P1.5', 'P1.4', 'P1.3', 'P1.2', 'P1.1', 'P1.0', 'P9.2', 'P9.3', + 'P9.4', 'P9.5', 'PB.7', 'PB.6', 'PB.5', 'PB.4', 'PB.3', 'PB.2', 'PB.1', 'PB.0' + ] +}; + +NUTOOL_PIN.g_cfg_gpios = [ + { f: ['P0.0:0', 'TM10IOB:1', 'LED_LED0:9']}, + { f: ['P0.1:0', 'TM09IOB:1', 'LED_LED1:9']}, + { f: ['P0.2:0', 'TM07IOB:1', 'SIF0_SBI0A:4', 'LIN_LRX0A:4', 'LED_LED2:9']}, + { f: ['P0.3:0', 'TM08IOB:1', 'TM15IOB:3', 'SIF0_SBO0A:4', 'LIN_LTX0A:4', 'LED_LED3:9']}, + { f: ['P0.4:0', 'TM00IOB:1', 'TM02IOB:2', 'TM11IOA:3', 'SIF0_SBT0A:4', 'LED_LED4:9']}, + { f: ['P0.5:0', 'TM12IOA:3', 'SIF3_SBO3A:4', 'LED_LED5:9']}, + { f: ['P0.6:0', 'SIF3_SBI3A:4', 'LED_LED6:9']}, + { f: ['P0.7:0', 'SIF3_SBT3A:4', 'DAC1_DA1OUT0:7', 'LED_LED7:9']}, + + { f: ['P1.0:0', 'TM00IOC:1', 'AN20:7']}, + { f: ['P1.1:0', 'TM02IOC:1', 'AN21:7']}, + { f: ['P1.2:0', 'TM01IOC:1', 'AN22:7']}, + { f: ['P1.3:0', 'TM03IOC:1', 'AN23:7']}, + { f: ['P1.4:0', 'TM04IOC:1']}, + { f: ['P1.5:0', 'TM07IOC:1', 'BZ_BUZZERB:2']}, + { f: ['P1.6:0', 'TM08IOC:1', 'BZ_NBUZZERB:2', 'SIF2_SBC2B:5']}, + { f: ['P1.7:0']}, + + { f: ['P2.0:0', 'SIF3_SBC3A:4', 'SIF8_SCL8:5', 'IRQ0A:10']}, + { f: ['P2.1:0', 'SIF8_SDA8:5', 'IRQ1A:10']}, + { f: ['P2.2:0', 'IRQ2A:10']}, + { f: ['P2.3:0', 'TM13IOA:1', 'IRQ3A:10']}, + { f: ['P2.4:0', 'TM14IOA:1', 'IRQ4A:10']}, + { f: ['P2.5:0', 'OSCI:7']}, + { f: ['P2.6:0', 'OSCO:7']}, + { f: ['P2.7:0']}, + + { f: ['P3.0:0', 'SIF2_SBO2B:5']}, + { f: ['P3.1:0', 'SIF2_SBI2B:5']}, + { f: ['P3.2:0', 'SIF4_SBC4B:4', 'SIF2_SBT2B:5']}, + { f: ['P3.3:0', 'SIF4_SBO4B:4', 'SIF6_SDA6B:5']}, + { f: ['P3.4:0', 'SIF4_SBT4B:4', 'SIF6_SCL6B:5']}, + { f: ['P3.5:0', 'SIF4_SBI4B:4']}, + { f: ['P3.6:0', 'SIF3_SBC3B:4']}, + { f: ['P3.7:0']}, + + { f: ['P4.0:0', 'SIF3_SBO3B:4']}, + { f: ['P4.1:0', 'SIF3_SBI3B:4']}, + { f: ['P4.2:0', 'SIF3_SBT3B:4']}, + { f: ['P4.3:0', 'SIF0_SBO0B:4', 'LIN_LTX0B:4']}, + { f: ['P4.4:0', 'SIF0_SBI0B:4', 'LIN_LRX0B:4']}, + { f: ['P4.5:0', 'SIF0_SBT0B:4']}, + { f: ['P4.6:0']}, + { f: ['P4.7:0']}, + + { f: ['P5.0:0', 'TM07OUT0:1', 'SIF1_SBO1A:4', 'CMP1_CMPIN1B:8']}, + { f: ['P5.1:0', 'TM07OUT1:1', 'SIF1_SBI1A:4', 'CMP1_CMPREF1B:8']}, + { f: ['P5.2:0', 'TM07OUT2:1', 'SIF1_SBT1A:4']}, + { f: ['P5.3:0', 'TM07OUT3:1', 'SIF1_SBC1A:4']}, + { f: ['P5.4:0', 'TM07OUT4:1']}, + { f: ['P5.5:0', 'TM07OUT5:1']}, + { f: ['P5.6:0', 'BZ_NBUZZERA:1']}, + { f: ['P5.7:0', 'BZ_BUZZERA:1']}, + + { f: ['P6.0:0']}, + { f: ['P6.1:0', 'DAC1_DA1OUT1:7']}, + { f: ['P6.2:0', 'TM01IOB:1', 'CMP1_CMPREF1A:8']}, + { f: ['P6.3:0', 'TM03IOB:1', 'CMP1_CMPIN1A:8']}, + { f: ['P6.4:0', 'TM04IOB:1', 'SIF2_SBC2A:4', 'CMP1_CMPOT1:8']}, + { f: ['P6.5:0', 'SIF2_SBO2A:4']}, + { f: ['P6.6:0', 'SIF2_SBI2A:4']}, + { f: ['P6.7:0', 'SIF2_SBT2A:4']}, + + { f: ['P7.0:0', 'SIF4_SBI4A:4', 'KEY0:10']}, + { f: ['P7.1:0', 'SIF4_SBO4A:4', 'SIF6_SDA6A:5', 'KEY1:10']}, + { f: ['P7.2:0', 'SIF4_SBT4A:4', 'SIF6_SCL6A:5', 'KEY2:10']}, + { f: ['P7.3:0', 'TM13IOB:1', 'SIF4_SBC4A:4', 'SIF7_SDA7A:5', 'KEY3:10']}, + { f: ['P7.4:0', 'TM14IOB:1', 'SIF1_SBC1B:4', 'SIF7_SCL7A:5', 'KEY4:10']}, + { f: ['P7.5:0', 'SIF1_SBO1B:4', 'KEY5:10']}, + { f: ['P7.6:0', 'SIF1_SBI1B:4', 'KEY6:10']}, + { f: ['P7.7:0', 'SIF1_SBT1B:4', 'KEY7:10']}, + + { f: ['P8.0:0', 'SDO0:1', 'PWM0_PWM0A:2']}, + { f: ['P8.1:0', 'SDO1:1', 'PWM0_NPWM0A:2', 'PWM0_PWM1A:2']}, + { f: ['P8.2:0', 'SDO2:1', 'PWM0_PWM1A:2', 'PWM0_PWM2A:2']}, + { f: ['P8.3:0', 'SDO3:1', 'PWM0_NPWM1A:2', 'PWM0_NPWM0A:2']}, + { f: ['P8.4:0', 'SDO4:1', 'PWM0_PWM2A:2', 'PWM0_NPWM1A:2']}, + { f: ['P8.5:0', 'SDO5:1', 'PWM0_NPWM2A:2']}, + { f: ['P8.6:0', 'SDO6:1', 'PWM0_PWMBCSTA:2']}, + { f: ['P8.7:0', 'SDO7:1', 'TM15IOC:2']}, + + { f: ['P9.0:0', 'XI:7']}, + { f: ['P9.1:0', 'XO:7']}, + { f: ['P9.2:0', 'AN19:7']}, + { f: ['P9.3:0', 'AN18:7']}, + { f: ['P9.4:0', 'AN17:1', 'DAC0_DA0OUT0:1', 'AN17:1', 'DAC0_DA0OUT0:1']}, + { f: ['P9.5:0', 'AN16:1', 'DAC0_DA0OUT1:1', 'AN16:1', 'DAC0_DA0OUT1:1']}, + { f: ['P9.6:0']}, + { f: ['P9.7:0']}, + + { f: ['PA.0:0', 'TM00IOA:1', 'TM15IOA:2', 'AN0:7']}, + { f: ['PA.1:0', 'TM01IOA:1', 'TM11IOB:2', 'AN1:7']}, + { f: ['PA.2:0', 'TM02IOA:1', 'TM12IOB:2', 'AN2:7']}, + { f: ['PA.3:0', 'TM03IOA:1', 'AN3:7']}, + { f: ['PA.4:0', 'TM04IOA:1', 'SIF5_SBI5:4', 'AN4:7', 'CMP0_CMPREF0A:8']}, + { f: ['PA.5:0', 'TM07IOA:1', 'SIF5_SBO5:4', 'AN5:7', 'CMP0_CMPIN0A:8']}, + { f: ['PA.6:0', 'TM08IOA:1', 'TM10IOA:2', 'SIF5_SBT5:4', 'AN6:7', 'CMP0_CMPOT0:8']}, + { f: ['PA.7:0', 'MONOUT:1', 'TM09IOA:2', 'SIF5_SBC5:4', 'AN7:7']}, + + { f: ['PB.0:0', 'AN8:7']}, + { f: ['PB.1:0', 'AN9:7']}, + { f: ['PB.2:0', 'AN10:7']}, + { f: ['PB.3:0', 'AN11:7', 'CMP0_CMPIN0B:8']}, + { f: ['PB.4:0', 'AN12:7', 'CMP0_CMPREF0B:8']}, + { f: ['PB.5:0', 'AN13:7']}, + { f: ['PB.6:0', 'AN14:7']}, + { f: ['PB.7:0', 'AN15:7']}, +]; + +NUTOOL_PIN.g_cfg_gpiosDefines = [ + { f: ['P0.0', 'GPIO:GPIO_P00MD_GPIO@IOP0MD', 'TM10IOB:GPIO_P00MD_TM10IOB@IOP0MD', 'LED_LED0:GPIO_P00MD_LED0@IOP0MD'] }, + { f: ['P0.1', 'GPIO:GPIO_P01MD_GPIO@IOP0MD', 'TM09IOB:GPIO_P01MD_TM09IOB@IOP0MD', 'LED_LED1:GPIO_P01MD_LED1@IOP0MD'] }, + { f: ['P0.2', 'GPIO:GPIO_P02MD_GPIO@IOP0MD', 'TM07IOB:GPIO_P02MD_TM07IOB@IOP0MD', 'SIF0_SBI0A:GPIO_P02MD_SBI0A@IOP0MD', 'LIN_LRX0A:GPIO_P02MD_LRX0A@IOP0MD', 'LED_LED2:GPIO_P02MD_LED2@IOP0MD'] }, + { f: ['P0.3', 'GPIO:GPIO_P03MD_GPIO@IOP0MD', 'TM08IOB:GPIO_P03MD_TM08IOB@IOP0MD', 'TM15IOB:GPIO_P03MD_TM15IOB@IOP0MD', 'SIF0_SBO0A:GPIO_P03MD_SBO0A@IOP0MD', 'LIN_LTX0A:GPIO_P03MD_LTX0A@IOP0MD', 'DAC1_DA1OUT0:GPIO_P03MD_DA1OUT0@IOP0MD', 'LED_LED3:GPIO_P03MD_LED3@IOP0MD'] }, + { f: ['P0.4', 'GPIO:GPIO_P04MD_GPIO@IOP0MD', 'TM00IOB:GPIO_P04MD_TM00IOB@IOP0MD', 'TM02IOB:GPIO_P04MD_TM02IOB@IOP0MD', 'TM11IOA:GPIO_P04MD_TM11IOA@IOP0MD', 'SIF0_SBT0A:GPIO_P04MD_SBT0A@IOP0MD', 'LED_LED4:GPIO_P04MD_LED4@IOP0MD'] }, + { f: ['P0.5', 'GPIO:GPIO_P05MD_GPIO@IOP0MD', 'TM12IOA:GPIO_P05MD_TM12IOA@IOP0MD', 'SIF3_SBO3A:GPIO_P05MD_SBO3A@IOP0MD', 'LED_LED5:GPIO_P05MD_LED5@IOP0MD'] }, + { f: ['P0.6', 'GPIO:GPIO_P06MD_GPIO@IOP0MD', 'SIF3_SBI3A:GPIO_P06MD_SBI3A@IOP0MD', 'LED_LED6:GPIO_P06MD_LED6@IOP0MD'] }, + { f: ['P0.7', 'GPIO:GPIO_P07MD_GPIO@IOP0MD', 'SIF3_SBT3A:GPIO_P07MD_SBT3A@IOP0MD', 'DAC1_DA1OUT0:GPIO_P07MD_DA1OUT0@IOP0MD', 'LED_LED7:GPIO_P07MD_LED7@IOP0MD'] }, + + { f: ['P1.0', 'GPIO:GPIO_P10MD_GPIO@IOP1MD', 'TM00IOC:GPIO_P10MD_TM00IOC@IOP1MD', 'AN20:GPIO_P10MD_AN20@IOP1MD'] }, + { f: ['P1.1', 'GPIO:GPIO_P11MD_GPIO@IOP1MD', 'TM02IOC:GPIO_P11MD_TM02IOC@IOP1MD', 'AN21:GPIO_P11MD_AN21@IOP1MD'] }, + { f: ['P1.2', 'GPIO:GPIO_P12MD_GPIO@IOP1MD', 'TM01IOC:GPIO_P12MD_TM01IOC@IOP1MD', 'AN22:GPIO_P12MD_AN22@IOP1MD'] }, + { f: ['P1.3', 'GPIO:GPIO_P13MD_GPIO@IOP1MD', 'TM03IOC:GPIO_P13MD_TM03IOC@IOP1MD', 'AN23:GPIO_P13MD_AN23@IOP1MD'] }, + { f: ['P1.4', 'GPIO:GPIO_P14MD_GPIO@IOP1MD', 'TM04IOC:GPIO_P14MD_TM04IOC@IOP1MD'] }, + { f: ['P1.5', 'GPIO:GPIO_P15MD_GPIO@IOP1MD', 'TM07IOC:GPIO_P15MD_TM07IOC@IOP1MD', 'BZ_BUZZERB:GPIO_P15MD_BUZZERB@IOP1MD'] }, + { f: ['P1.6', 'GPIO:GPIO_P16MD_GPIO@IOP1MD', 'TM08IOC:GPIO_P16MD_TM08IOC@IOP1MD', 'BZ_NBUZZERB:GPIO_P16MD_NBUZZERB@IOP1MD', 'SIF2_SBC2B:GPIO_P16MD_SBC2B@IOP1MD'] }, + + { f: ['P2.0', 'GPIO:GPIO_P20MD_GPIO@IOP2MD', 'SIF3_SBC3A:GPIO_P20MD_SBC3A@IOP2MD', 'SIF3_SBI3A:GPIO_P20MD_SBI3A@IOP2MD', 'SIF8_SCL8:GPIO_P20MD_SCL8@IOP2MD', 'IRQ0A:GPIO_P20MD_IRQ0A@IOP2MD'] }, + { f: ['P2.1', 'GPIO:GPIO_P21MD_GPIO@IOP2MD', 'SIF3_SBT3A:GPIO_P21MD_SBT3A@IOP2MD', 'SIF8_SDA8:GPIO_P21MD_SDA8@IOP2MD', 'IRQ1A:GPIO_P21MD_IRQ1A@IOP2MD'] }, + { f: ['P2.2', 'GPIO:GPIO_P22MD_GPIO@IOP2MD', 'SIF3_SBC3A:GPIO_P22MD_SBC3A@IOP2MD', 'IRQ2A:GPIO_P22MD_IRQ2A@IOP2MD'] }, + { f: ['P2.3', 'GPIO:GPIO_P23MD_GPIO@IOP2MD', 'TM13IOA:GPIO_P23MD_TM13IOA@IOP2MD', 'IRQ3A:GPIO_P23MD_IRQ3A@IOP2MD'] }, + { f: ['P2.4', 'GPIO:GPIO_P24MD_GPIO@IOP2MD', 'TM14IOA:GPIO_P24MD_TM14IOA@IOP2MD', 'IRQ4A:GPIO_P24MD_IRQ4A@IOP2MD'] }, + { f: ['P2.5', 'GPIO:GPIO_P25MD_GPIO@IOP2MD', 'OSCI:GPIO_P25MD_OSC1@IOP2MD'] }, + { f: ['P2.6', 'GPIO:GPIO_P26MD_GPIO@IOP2MD', 'OSCO:GPIO_P26MD_OSC2@IOP2MD'] }, + + { f: ['P3.0', 'GPIO:GPIO_P30MD_GPIO@IOP3MD', 'SIF2_SBO2B:GPIO_P30MD_SBO2B@IOP3MD'] }, + { f: ['P3.1', 'GPIO:GPIO_P31MD_GPIO@IOP3MD', 'SIF2_SBI2B:GPIO_P31MD_SBI2B@IOP3MD'] }, + { f: ['P3.2', 'GPIO:GPIO_P32MD_GPIO@IOP3MD', 'SIF4_SBC4B:GPIO_P32MD_SBC4B@IOP3MD', 'SIF2_SBT2B:GPIO_P32MD_SBT2B@IOP3MD'] }, + { f: ['P3.3', 'GPIO:GPIO_P33MD_GPIO@IOP3MD', 'SIF4_SBO4B:GPIO_P33MD_SBO4B@IOP3MD', 'SIF6_SDA6B:GPIO_P33MD_SDA6B@IOP3MD', 'AN15:GPIO_P33MD_AN15@IOP3MD'] }, + { f: ['P3.4', 'GPIO:GPIO_P34MD_GPIO@IOP3MD', 'SIF4_SBT4B:GPIO_P34MD_SBT4B@IOP3MD', 'SIF6_SCL6B:GPIO_P34MD_SCL6B@IOP3MD'] }, + { f: ['P3.5', 'GPIO:GPIO_P35MD_GPIO@IOP3MD', 'SIF4_SBI4B:GPIO_P35MD_SBI4B@IOP3MD', 'DAC0_DA0OUT0:GPIO_P35MD_DA0OUT0@IOP3MD'] }, + { f: ['P3.6', 'GPIO:GPIO_P36MD_GPIO@IOP3MD', 'SIF3_SBC3B:GPIO_P36MD_SBC3B@IOP3MD'] }, + + { f: ['P4.0', 'GPIO:GPIO_P40MD_GPIO@IOP4MD', 'SIF3_SBO3B:GPIO_P40MD_SBO3B@IOP4MD'] }, + { f: ['P4.1', 'GPIO:GPIO_P41MD_GPIO@IOP4MD', 'SIF3_SBI3B:GPIO_P41MD_SBI3B@IOP4MD'] }, + { f: ['P4.2', 'GPIO:GPIO_P42MD_GPIO@IOP4MD', 'SIF3_SBT3B:GPIO_P42MD_SBT3B@IOP4MD'] }, + { f: ['P4.3', 'GPIO:GPIO_P43MD_GPIO@IOP4MD', 'SIF0_SBO0B:GPIO_P43MD_SBO0B@IOP4MD', 'LIN_LTX0B:GPIO_P43MD_LTX0B@IOP4MD'] }, + { f: ['P4.4', 'GPIO:GPIO_P44MD_GPIO@IOP4MD', 'SIF0_SBI0B:GPIO_P44MD_SBI0B@IOP4MD', 'LIN_LRX0B:GPIO_P44MD_LRX0B@IOP4MD'] }, + { f: ['P4.5', 'GPIO:GPIO_P45MD_GPIO@IOP4MD', 'SIF0_SBT0B:GPIO_P45MD_SBT0B@IOP4MD'] }, + { f: ['P4.6', 'GPIO:GPIO_P46MD_GPIO@IOP4MD'] }, + { f: ['P4.7', 'GPIO:GPIO_P47MD_GPIO@IOP4MD'] }, + + { f: ['P5.0', 'GPIO:GPIO_P50MD_GPIO@IOP5MD', 'TM07OUT0:GPIO_P50MD_TM07OUT0@IOP5MD', 'SIF1_SBO1A:GPIO_P50MD_SBO1A@IOP5MD', 'CMP1_CMPIN1B:GPIO_P50MD_CMPIN1B@IOP5MD'] }, + { f: ['P5.1', 'GPIO:GPIO_P51MD_GPIO@IOP5MD', 'TM07OUT1:GPIO_P51MD_TM07OUT1@IOP5MD', 'SIF1_SBI1A:GPIO_P51MD_SBI1A@IOP5MD', 'CMP1_CMPREF1B:GPIO_P51MD_CMPREF1B@IOP5MD'] }, + { f: ['P5.2', 'GPIO:GPIO_P52MD_GPIO@IOP5MD', 'TM07OUT2:GPIO_P52MD_TM07OUT2@IOP5MD', 'SIF1_SBT1A:GPIO_P52MD_SBT1A@IOP5MD'] }, + { f: ['P5.3', 'GPIO:GPIO_P53MD_GPIO@IOP5MD', 'TM07OUT3:GPIO_P53MD_TM07OUT3@IOP5MD', 'SIF1_SBC1A:GPIO_P53MD_SBC1A@IOP5MD'] }, + { f: ['P5.4', 'GPIO:GPIO_P54MD_GPIO@IOP5MD', 'TM07OUT4:GPIO_P54MD_TM07OUT4@IOP5MD'] }, + { f: ['P5.5', 'GPIO:GPIO_P55MD_GPIO@IOP5MD', 'TM07OUT5:GPIO_P55MD_TM07OUT5@IOP5MD', 'AN11:GPIO_P55MD_AN11@IOP5MD'] }, + { f: ['P5.6', 'GPIO:GPIO_P56MD_GPIO@IOP5MD', 'BZ_NBUZZERA:GPIO_P56MD_NBUZZERA@IOP5MD', 'AN10:GPIO_P56MD_AN10@IOP5MD', 'DAC0_DA0OUT0:GPIO_P56MD_DA0OUT0@IOP5MD'] }, + { f: ['P5.7', 'GPIO:GPIO_P57MD_GPIO@IOP5MD', 'BZ_BUZZERA:GPIO_P57MD_BUZZERA@IOP5MD', 'AN9:GPIO_P57MD_AN9@IOP5MD'] }, + + { f: ['P6.1', 'GPIO:GPIO_P61MD_GPIO@IOP6MD', 'DAC1_DA1OUT1:GPIO_P61MD_DA1OUT1@IOP6MD'] }, + { f: ['P6.2', 'GPIO:GPIO_P62MD_GPIO@IOP6MD', 'TM01IOB:GPIO_P62MD_TM01IOB@IOP6MD', 'CMP1_CMPREF1A:GPIO_P62MD_CMPREF1A@IOP6MD'] }, + { f: ['P6.3', 'GPIO:GPIO_P63MD_GPIO@IOP6MD', 'TM03IOB:GPIO_P63MD_TM03IOB@IOP6MD', 'CMP1_CMPIN1A:GPIO_P63MD_CMPIN1A@IOP6MD'] }, + { f: ['P6.4', 'GPIO:GPIO_P64MD_GPIO@IOP6MD', 'TM04IOB:GPIO_P64MD_TM04IOB@IOP6MD', 'SIF2_SBC2A:GPIO_P64MD_SBC2A@IOP6MD', 'CMP1_CMPOT1:GPIO_P64MD_CMPOT1@IOP6MD'] }, + { f: ['P6.5', 'GPIO:GPIO_P65MD_GPIO@IOP6MD', 'SIF2_SBO2A:GPIO_P65MD_SBO2A@IOP6MD'] }, + { f: ['P6.6', 'GPIO:GPIO_P66MD_GPIO@IOP6MD', 'SIF2_SBI2A:GPIO_P66MD_SBI2A@IOP6MD'] }, + { f: ['P6.7', 'GPIO:GPIO_P67MD_GPIO@IOP6MD', 'SIF2_SBT2A:GPIO_P67MD_SBT2A@IOP6MD'] }, + + { f: ['P7.0', 'GPIO:GPIO_P70MD_GPIO@IOP7MD', 'SIF4_SBI4A:GPIO_P70MD_SBI4A@IOP7MD', 'CMP1_CMPREF1B:GPIO_P70MD_CMPREF1B@IOP7MD', 'KEY0:GPIO_P70MD_KEY0@IOP7MD'] }, + { f: ['P7.1', 'GPIO:GPIO_P71MD_GPIO@IOP7MD', 'SIF4_SBO4A:GPIO_P71MD_SBO4A@IOP7MD', 'SIF6_SDA6A:GPIO_P71MD_SDA6A@IOP7MD', 'CMP1_CMPIN1B:GPIO_P71MD_CMPIN1B@IOP7MD', 'KEY1:GPIO_P71MD_KEY1@IOP7MD'] }, + { f: ['P7.2', 'GPIO:GPIO_P72MD_GPIO@IOP7MD', 'SIF4_SBT4A:GPIO_P72MD_SBT4A@IOP7MD', 'SIF6_SCL6A:GPIO_P72MD_SCL6A@IOP7MD', 'DAC1_DA1OUT1:GPIO_P72MD_DA1OUT1@IOP7MD', 'KEY2:GPIO_P72MD_KEY2@IOP7MD'] }, + { f: ['P7.3', 'GPIO:GPIO_P73MD_GPIO@IOP7MD', 'TM13IOB:GPIO_P73MD_TM13IOB@IOP7MD', 'SIF4_SBC4A:GPIO_P73MD_SBC4A@IOP7MD', 'SIF7_SDA7A:GPIO_P73MD_SDA7A@IOP7MD', 'CMP1_CMPREF1B:GPIO_P73MD_CMPREF1B@IOP7MD', 'CMP1_CMPREF1A:GPIO_P73MD_CMPREF1A@IOP7MD', 'KEY3:GPIO_P73MD_KEY3@IOP7MD'] }, + { f: ['P7.4', 'GPIO:GPIO_P74MD_GPIO@IOP7MD', 'TM14IOB:GPIO_P74MD_TM14IOB@IOP7MD', 'SIF1_SBC1B:GPIO_P74MD_SBC1B@IOP7MD', 'SIF7_SCL7A:GPIO_P74MD_SCL7A@IOP7MD', 'CMP1_CMPIN1B:GPIO_P74MD_CMPIN1B@IOP7MD', 'CMP1_CMPIN1A:GPIO_P74MD_CMPIN1A@IOP7MD', 'KEY4:GPIO_P74MD_KEY4@IOP7MD'] }, + { f: ['P7.5', 'GPIO:GPIO_P75MD_GPIO@IOP7MD', 'SIF1_SBO1B:GPIO_P75MD_SBO1B@IOP7MD', 'DAC1_DA1OUT1:GPIO_P75MD_DA1OUT1@IOP7MD', 'CMP1_CMPOT1:GPIO_P75MD_CMPOT1@IOP7MD', 'KEY5:GPIO_P75MD_KEY5@IOP7MD'] }, + { f: ['P7.6', 'GPIO:GPIO_P76MD_GPIO@IOP7MD', 'SIF1_SBI1B:GPIO_P76MD_SBI1B@IOP7MD', 'CMP1_CMPREF1A:GPIO_P76MD_CMPREF1A@IOP7MD', 'KEY6:GPIO_P76MD_KEY6@IOP7MD'] }, + { f: ['P7.7', 'GPIO:GPIO_P77MD_GPIO@IOP7MD', 'SIF1_SBT1B:GPIO_P77MD_SBT1B@IOP7MD', 'CMP1_CMPIN1A:GPIO_P77MD_CMPIN1A@IOP7MD', 'KEY7:GPIO_P77MD_KEY7@IOP7MD'] }, + + { f: ['P8.0', 'GPIO:GPIO_P80MD_GPIO@IOP8MD', 'SDO0:GPIO_P80MD_SDO0@IOP8MD', 'PWM0_PWM0A:GPIO_P80MD_PWM0A@IOP8MD', 'CMP1_CMPOT1:GPIO_P80MD_CMPOT1@IOP8MD'] }, + { f: ['P8.1', 'GPIO:GPIO_P81MD_GPIO@IOP8MD', 'SDO1:GPIO_P81MD_SDO1@IOP8MD', 'PWM0_NPWM0A:GPIO_P81MD_NPWM0A@IOP8MD'] }, + { f: ['P8.2', 'GPIO:GPIO_P82MD_GPIO@IOP8MD', 'SDO2:GPIO_P82MD_SDO2@IOP8MD', 'PWM0_PWM1A:GPIO_P82MD_PWM1A@IOP8MD'] }, + { f: ['P8.3', 'GPIO:GPIO_P83MD_GPIO@IOP8MD', 'SDO3:GPIO_P83MD_SDO3@IOP8MD', 'PWM0_NPWM1A:GPIO_P83MD_NPWM1A@IOP8MD'] }, + { f: ['P8.4', 'GPIO:GPIO_P84MD_GPIO@IOP8MD', 'SDO4:GPIO_P84MD_SDO4@IOP8MD', 'PWM0_PWM2A:GPIO_P84MD_PWM2A@IOP8MD'] }, + { f: ['P8.5', 'GPIO:GPIO_P85MD_GPIO@IOP8MD', 'SDO5:GPIO_P85MD_SDO5@IOP8MD', 'PWM0_NPWM2A:GPIO_P85MD_NPWM2A@IOP8MD'] }, + { f: ['P8.6', 'GPIO:GPIO_P86MD_GPIO@IOP8MD', 'SDO6:GPIO_P86MD_SDO6@IOP8MD', 'PWM0_PWMBCSTA:GPIO_P86MD_PWMBCSTA@IOP8MD'] }, + { f: ['P8.7', 'GPIO:GPIO_P87MD_GPIO@IOP8MD', 'SDO7:GPIO_P87MD_SDO7@IOP8MD', 'TM15IOC:GPIO_P87MD_TM15IOC@IOP8MD'] }, + + { f: ['P9.0', 'GPIO:GPIO_P90MD_GPIO@IOP9MD', 'XI:GPIO_P90MD_XI@IOP9MD'] }, + { f: ['P9.1', 'GPIO:GPIO_P91MD_GPIO@IOP9MD', 'XO:GPIO_P91MD_XO@IOP9MD'] }, + { f: ['P9.2', 'GPIO:GPIO_P92MD_GPIO@IOP9MD', 'SIF4_SBC4B:GPIO_P92MD_SBC4B@IOP9MD', 'AN19:GPIO_P92MD_AN19@IOP9MD', 'AN14:GPIO_P92MD_AN14@IOP9MD'] }, + { f: ['P9.3', 'GPIO:GPIO_P93MD_GPIO@IOP9MD', 'AN18:GPIO_P93MD_AN18@IOP9MD', 'AN13:GPIO_P93MD_AN13@IOP9MD'] }, + { f: ['P9.4', 'GPIO:GPIO_P94MD_GPIO@IOP9MD', 'AN17:GPIO_P94MD_AN17@IOP9MD', 'DAC0_DA0OUT0:GPIO_P94MD_DA0OUT0@IOP9MD', 'AN12:GPIO_P94MD_AN12@IOP9MD', 'AN8:GPIO_P94MD_AN8@IOP9MD', 'DAC0_DA0OUT1:GPIO_P94MD_DA0OUT1@IOP9MD', 'CMP0_CMPREF0B:GPIO_P94MD_CMPREF0B@IOP9MD'] }, + { f: ['P9.5', 'GPIO:GPIO_P95MD_GPIO@IOP9MD', 'AN16:GPIO_P95MD_AN16@IOP9MD', 'DAC0_DA0OUT1:GPIO_P95MD_DA0OUT1@IOP9MD'] }, + + { f: ['PA.0', 'GPIO:GPIO_PA0MD_GPIO@IOPAMD', 'TM00IOA:GPIO_PA0MD_TM00IOA@IOPAMD', 'TM00IOA_64:GPIO_PA0MD_TM00IOA_64@IOPAMD', 'TM15IOA:GPIO_PA0MD_TM15IOA@IOPAMD', 'AN0:GPIO_PA0MD_AN0@IOPAMD'] }, + { f: ['PA.1', 'GPIO:GPIO_PA1MD_GPIO@IOPAMD', 'TM01IOA:GPIO_PA1MD_TM01IOA@IOPAMD', 'TM01IOA_64:GPIO_PA1MD_TM01IOA_64@IOPAMD', 'TM11IOB:GPIO_PA1MD_TM11IOB@IOPAMD', 'AN1:GPIO_PA1MD_AN1@IOPAMD'] }, + { f: ['PA.2', 'GPIO:GPIO_PA2MD_GPIO@IOPAMD', 'TM02IOA:GPIO_PA2MD_TM02IOA@IOPAMD', 'TM02IOA_64:GPIO_PA2MD_TM02IOA_64@IOPAMD', 'TM12IOB:GPIO_PA2MD_TM12IOB@IOPAMD', 'AN2:GPIO_PA2MD_AN2@IOPAMD', 'DAC0_DA0OUT1:GPIO_PA2MD_DA0OUT1@IOPAMD', 'CMP0_CMPREF0B:GPIO_PA2MD_CMPREF0B@IOPAMD'] }, + { f: ['PA.3', 'GPIO:GPIO_PA3MD_GPIO@IOPAMD', 'TM03IOA:GPIO_PA3MD_TM03IOA@IOPAMD', 'TM03IOA_64:GPIO_PA3MD_TM03IOA_64@IOPAMD', 'AN3:GPIO_PA3MD_AN3@IOPAMD', 'CMP0_CMPIN0B:GPIO_PA3MD_CMPIN0B@IOPAMD'] }, + { f: ['PA.4', 'GPIO:GPIO_PA4MD_GPIO@IOPAMD', 'TM04IOA:GPIO_PA4MD_TM04IOA@IOPAMD', 'SIF5_SBI5:GPIO_PA4MD_SBI5@IOPAMD', 'AN4:GPIO_PA4MD_AN4@IOPAMD', 'CMP0_CMPREF0A:GPIO_PA4MD_CMPREF0A@IOPAMD'] }, + { f: ['PA.5', 'GPIO:GPIO_PA5MD_GPIO@IOPAMD', 'TM07IOA:GPIO_PA5MD_TM07IOA@IOPAMD', 'SIF5_SBO5:GPIO_PA5MD_SBO5@IOPAMD', 'AN5:GPIO_PA5MD_AN5@IOPAMD', 'CMP0_CMPIN0A:GPIO_PA5MD_CMPIN0A@IOPAMD'] }, + { f: ['PA.6', 'GPIO:GPIO_PA6MD_GPIO@IOPAMD', 'TM08IOA:GPIO_PA6MD_TM08IOA@IOPAMD', 'TM10IOA:GPIO_PA6MD_TM10IOA@IOPAMD', 'SIF5_SBT5:GPIO_PA6MD_SBT5@IOPAMD', 'AN6:GPIO_PA6MD_AN6@IOPAMD', 'CMP0_CMPOT0:GPIO_PA6MD_CMPOT0@IOPAMD'] }, + { f: ['PA.7', 'GPIO:GPIO_PA7MD_GPIO@IOPAMD', 'MONITOR:GPIO_PA7MD_MONITOR@IOPAMD', 'TM09IOA:GPIO_PA7MD_TM09IOA@IOPAMD', 'SIF5_SBC5:GPIO_PA7MD_SBC5@IOPAMD', 'AN7:GPIO_PA7MD_AN7@IOPAMD'] }, + + { f: ['PB.0', 'GPIO:GPIO_PB0MD_GPIO@IOPBMD', 'AN8:GPIO_PB0MD_AN8@IOPBMD'] }, + { f: ['PB.1', 'GPIO:GPIO_PB1MD_GPIO@IOPBMD', 'AN9:GPIO_PB1MD_AN9@IOPBMD'] }, + { f: ['PB.2', 'GPIO:GPIO_PB2MD_GPIO@IOPBMD', 'AN10:GPIO_PB2MD_AN10@IOPBMD'] }, + { f: ['PB.3', 'GPIO:GPIO_PB3MD_GPIO@IOPBMD', 'AN11:GPIO_PB3MD_AN11@IOPBMD', 'CMP0_CMPIN0B:GPIO_PB3MD_CMPIN0B@IOPBMD'] }, + { f: ['PB.4', 'GPIO:GPIO_PB4MD_GPIO@IOPBMD', 'AN12:GPIO_PB4MD_AN12@IOPBMD', 'CMP0_CMPREF0B:GPIO_PB4MD_CMPREF0B@IOPBMD'] }, + { f: ['PB.5', 'GPIO:GPIO_PB5MD_GPIO@IOPBMD', 'AN13:GPIO_PB5MD_AN13@IOPBMD'] }, + { f: ['PB.6', 'GPIO:GPIO_PB6MD_GPIO@IOPBMD', 'AN14:GPIO_PB6MD_AN14@IOPBMD'] }, + { f: ['PB.7', 'GPIO:GPIO_PB7MD_GPIO@IOPBMD', 'AN15:GPIO_PB7MD_AN15@IOPBMD'] } +]; + +NUTOOL_PIN.g_cfg_gpiosDescriptions = [ + 'LED_LED7:LED output pin', + 'LED_LED6:LED output pin', + 'LED_LED5:LED output pin', + 'LED_LED4:LED output pin', + 'LED_LED3:LED output pin', + 'LED_LED2:LED output pin', + 'LED_LED1:LED output pin', + 'LED_LED0:LED output pin', + 'DAC1_DA1OUT1:D/A converter 1 output pin', + 'DAC1_DA1OUT0:D/A converter 1 output pin', + 'DAC0_DA0OUT1:D/A converter 0 output pin', + 'DAC0_DA0OUT0:D/A converter 0 output pin', + 'CMP1_CMPOT1:Comparator 1 output pin', + 'CMP0_CMPOT0:Comparator 0 output pin', + 'CMP1_CMPREF1B:Comparator 1B reference input pin', + 'CMP1_CMPREF1A:Comparator 1A reference input pin', + 'CMP1_CMPIN1B:Comparator 1B input pin', + 'CMP1_CMPIN1A:Comparator 1A input pin', + 'CMP0_CMPREF0B:Comparator 0B reference input pin', + 'CMP0_CMPREF0A:Comparator 0A reference input pin', + 'CMP0_CMPIN0B:Comparator 0B input pin', + 'CMP0_CMPIN0A:Comparator 0A input pin', + 'AN23:A/D converter analog input 23 pin', + 'AN22:A/D converter analog input 22 pin', + 'AN21:A/D converter analog input 21 pin', + 'AN20:A/D converter analog input 20 pin', + 'AN19:A/D converter analog input 19 pin', + 'AN18:A/D converter analog input 18 pin', + 'AN17:A/D converter analog input 17 pin', + 'AN16:A/D converter analog input 16 pin', + 'AN15:A/D converter analog input 15 pin', + 'AN14:A/D converter analog input 14 pin', + 'AN13:A/D converter analog input 13 pin', + 'AN12:A/D converter analog input 12 pin', + 'AN11:A/D converter analog input 11 pin', + 'AN10:A/D converter analog input 10 pin', + 'AN9:A/D converter analog input 09 pin', + 'AN8:A/D converter analog input 08 pin', + 'AN7:A/D converter analog input 07 pin', + 'AN6:A/D converter analog input 06 pin', + 'AN5:A/D converter analog input 05 pin', + 'AN4:A/D converter analog input 04 pin', + 'AN3:A/D converter analog input 03 pin', + 'AN2:A/D converter analog input 02 pin', + 'AN1:A/D converter analog input 01 pin', + 'AN0:A/D converter analog input 00 pin', + 'LIN_LTX0B:LTX clock input/output pin', + 'LIN_LRX0B:LRX clock input/output pin', + 'LIN_LTX0A:LTX clock input/output pin', + 'LIN_LRX0A:LRX clock input/output pin', + 'SIF8_SDA8:I2C5 clock input/output pin', + 'SIF8_SCL8:I2C5 clock input/output pin', + 'SIF7_SDA7B:I2C5 clock input/output pin', + 'SIF7_SCL7B:I2C5 clock input/output pin', + 'SIF7_SDA7A:I2C5 clock input/output pin', + 'SIF7_SCL7A:I2C5 clock input/output pin', + 'SIF6_SDA6B:I2C5 clock input/output pin', + 'SIF6_SCL6B:I2C5 clock input/output pin', + 'SIF6_SDA6A:I2C5 clock input/output pin', + 'SIF6_SCL6A:I2C5 clock input/output pin', + 'SIF5_SBT5:SIF5 clock input/output pin', + 'SIF5_SBO5:SIF5 data input/output pin', + 'SIF5_SBI5:SIF5 data input pin', + 'SIF5_SBC5:SIF5 chip select input/output pin', + 'SIF4_SBT4B:SIF4 clock input/output pin', + 'SIF4_SBO4B:SIF4 data input/output pin', + 'SIF4_SBI4B:SIF4 data input pin', + 'SIF4_SBC4B:SIF4 chip select input/output pin', + 'SIF4_SBT4A:SIF4 clock input/output pin', + 'SIF4_SBO4A:SIF4 data input/output pin', + 'SIF4_SBI4A:SIF4 data input pin', + 'SIF4_SBC4A:SIF4 chip select input/output pin', + 'SIF3_SBT3B:SIF3 clock input/output pin', + 'SIF3_SBO3B:SIF3 data input/output pin', + 'SIF3_SBI3B:SIF3 data input pin', + 'SIF3_SBC3B:SIF3 chip select input/output pin', + 'SIF3_SBT3A:SIF3 clock input/output pin', + 'SIF3_SBO3A:SIF3 data input/output pin', + 'SIF3_SBI3A:SIF3 data input pin', + 'SIF3_SBC3A:SIF3 chip select input/output pin', + 'SIF2_SBT2B:SIF2 clock input/output pin', + 'SIF2_SBO2B:SIF2 data input/output pin', + 'SIF2_SBI2B:SIF2 data input pin', + 'SIF2_SBC2B:SIF2 chip select input/output pin', + 'SIF2_SBT2A:SIF2 clock input/output pin', + 'SIF2_SBO2A:SIF2 data input/output pin', + 'SIF2_SBI2A:SIF2 data input pin', + 'SIF2_SBC2A:SIF2 chip select input/output pin', + 'SIF1_SBT1B:SIF1 clock input/output pin', + 'SIF1_SBO1B:SIF1 data input/output pin', + 'SIF1_SBI1B:SIF1 data input pin', + 'SIF1_SBC1B:SIF1 chip select input/output pin', + 'SIF1_SBT1A:SIF1 clock input/output pin', + 'SIF1_SBO1A:SIF1 data input/output pin', + 'SIF1_SBI1A:SIF1 data input pin', + 'SIF1_SBC1A:SIF1 chip select input/output pin', + 'SIF0_SBT0B:SIF0 clock input/output pin', + 'SIF0_SBO0B:SIF0 data input/output pin', + 'SIF0_SBI0B:SIF0 data input pin', + 'SIF0_SBT0A:SIF0 clock input/output pin', + 'SIF0_SBO0A:SIF0 data input/output pin', + 'SIF0_SBI0A:SIF0 data input pin', + 'BZ_BUZZERB:BUZZER output pin B', + 'BZ_NBUZZERB:NBUZZER output pin B', + 'BZ_BUZZERA:BUZZER output pin A', + 'BZ_NBUZZERA:NBUZZER output pin A', + "PWM0_PWMBCSTA:GPWM's Binary Counter Status", + 'PWM0_NPWM2A:NGPWM2A output pin', + 'PWM0_PWM2A:GPWM2A output pin', + 'PWM0_NPWM1A:NGPWM1A output pin', + 'PWM0_PWM1A:GPWM1A output pin', + 'PWM0_NPWM0A:NGPWM0A output pin', + 'PWM0_PWM0A:GPWM0A output pin', + 'TM15IOC:Timer 15 input/output pin C', + 'TM15IOB:Timer 15 input/output pin B', + 'TM15IOA:Timer 15 input/output pin A', + 'TM14IOB:Timer 14 input/output pin B', + 'TM14IOA:Timer 14 input/output pin A', + 'TM13IOB:Timer 13 input/output pin B', + 'TM13IOA:Timer 13 input/output pin A', + 'TM12IOB:Timer 12 input/output pin B', + 'TM12IOA:Timer 12 input/output pin A', + 'TM11IOB:Timer 11 input/output pin B', + 'TM11IOA:Timer 11 input/output pin A', + 'TM10IOB:Timer 10 input/output pin B', + 'TM10IOA:Timer 10 input/output pin A', + 'TM09IOB:Timer 9 input/output pin B', + 'TM09IOA:Timer 9 input/output pin A', + 'SDO7:Timer 8 synchronous output 7', + 'SDO6:Timer 8 synchronous output 6', + 'SDO5:Timer 8 synchronous output 5', + 'SDO4:Timer 8 synchronous output 4', + 'SDO3:Timer 8 synchronous output 3', + 'SDO2:Timer 8 synchronous output 2', + 'SDO1:Timer 8 synchronous output 1', + 'SDO0:Timer 8 synchronous output 0', + 'TM08IOC:Timer 8 input/output pin C', + 'TM08IOB:Timer 8 input/output pin B', + 'TM08IOA:Timer 8 input/output pin A', + 'TM07OUT5:Timer 7 output pin 5', + 'TM07OUT4:Timer 7 output pin 4', + 'TM07OUT3:Timer 7 output pin 3', + 'TM07OUT2:Timer 7 output pin 2', + 'TM07OUT1:Timer 7 output pin 1', + 'TM07OUT0:Timer 7 output pin 0', + 'TM07IOC:Timer 7 input/output pin C', + 'TM07IOB:Timer 7 input/output pin B', + 'TM07IOA:Timer 7 input/output pin A', + 'TM04IOC:Timer 4 input/output pin C', + 'TM04IOB:Timer 4 input/output pin B', + 'TM04IOA:Timer 4 input/output pin A', + 'TM03IOC:Timer 3 input/output pin C', + 'TM03IOB:Timer 3 input/output pin B', + 'TM03IOA:Timer 3 input/output pin A', + 'TM02IOC:Timer 2 input/output pin C', + 'TM02IOB:Timer 2 input/output pin B', + 'TM02IOA:Timer 2 input/output pin A', + 'TM01IOC:Timer 1 input/output pin C', + 'TM01IOB:Timer 1 input/output pin B', + 'TM01IOA:Timer 1 input/output pin A', + 'TM00IOC:Timer 0 input/output pin C', + 'TM00IOB:Timer 0 input/output pin B', + 'TM00IOA:Timer 0 input/output pin A', + 'KEY7:KEY interrupt 7', + 'KEY6:KEY interrupt 6', + 'KEY5:KEY interrupt 5', + 'KEY4:KEY interrupt 4', + 'KEY3:KEY interrupt 3', + 'KEY2:KEY interrupt 2', + 'KEY1:KEY interrupt 1', + 'KEY0:KEY interrupt 0', + 'IRQ4A:External interrupt 4', + 'IRQ3A:External interrupt 3', + 'IRQ2A:External interrupt 2', + 'IRQ1A:External interrupt 1', + 'IRQ0A:External interrupt 0', + 'XO:External clock output', + 'XI:External clock input', + 'OSCO:External clock output', + 'OSCI:External clock input', + 'MONOUT:Monitor output pin', + 'DBG_SWDD:Debug data input/output pin', + 'DBG_SWDCLK:Debug clock input pin', +]; + +NUTOOL_PIN.g_cfg_regDescriptions = {}; +NUTOOL_PIN.g_cfg_regDescriptions.IOP0MD = '0x40004200'; +NUTOOL_PIN.g_cfg_regDescriptions.IOP1MD = '0x40004210'; +NUTOOL_PIN.g_cfg_regDescriptions.IOP2MD = '0x40004220'; +NUTOOL_PIN.g_cfg_regDescriptions.IOP3MD = '0x40004230'; +NUTOOL_PIN.g_cfg_regDescriptions.IOP4MD = '0x40004240'; +NUTOOL_PIN.g_cfg_regDescriptions.IOP5MD = '0x40004250'; +NUTOOL_PIN.g_cfg_regDescriptions.IOP6MD = '0x40004260'; +NUTOOL_PIN.g_cfg_regDescriptions.IOP7MD = '0x40004270'; +NUTOOL_PIN.g_cfg_regDescriptions.IOP8MD = '0x40004280'; +NUTOOL_PIN.g_cfg_regDescriptions.IOP9MD = '0x40004290'; +NUTOOL_PIN.g_cfg_regDescriptions.IOPAMD = '0x400042A0'; +NUTOOL_PIN.g_cfg_regDescriptions.IOPBMD = '0x400042B0'; + +NUTOOL_PIN.g_cfg_unusedGPIO = { + 'KM1M0DF02N/K(LQFP100_D0x(14*14))': { + 'ALL': [] + }, + 'KM1M0DF03N/K(LQFP80_D0x(12*12))': { + 'ALL': [] + }, + 'KM1M0DF13N/K(LQFP80_D1x(12*12))': { + 'ALL': [] + }, + 'KM1M0DF04N/K(TQFP64_D0x(10*10))': { + 'ALL': [] + } +}; + +NUTOOL_PIN.g_cfg_OrCAD = { + "LQFP100_D0x(14*14)": [ + '', '', '', '', '', '', '', '', '', '', + '', '', '', '', '', '', '', '', '', '', + '', '', '', '', '', '', '', '', '', '', + '', '', '', '', '', '', '', '', '', '', + '', '', '', '', '', '', '', '', '', '', + '', '', '', '', '', '', '', '', '', '', + '', '', '', '', '', '', '', '', '', '', + '', '', '', '', '', '', '', '', '', '', + '', '', '', '', '', '', '', '', '', '', + '', '', '', '', '', '', '', '', '', '' + ] +}; +NUTOOL_PIN.g_cfg_WPPin = ['P0.0', 'P0.1']; +// [Workaround] Sometime NUTOOL_PIN.g_cfg_WPPin will be reset. +setTimeout(function() { + NUTOOL_PIN.g_cfg_WPPin = ['P0.0', 'P0.1']; +}, 100); + + +NUTOOL_PIN.decidepackageNumber = function (given_partNumber_package) { + var partNumber_package; + + if (typeof given_partNumber_package === 'undefined') { + partNumber_package = NUTOOL_PIN.getg_partNumber_package(); + } + else { + partNumber_package = given_partNumber_package; + } + + NUTOOL_PIN.g_packageNumber = partNumber_package.substring(partNumber_package.indexOf('(') + 1); + NUTOOL_PIN.g_packageNumber = NUTOOL_PIN.g_packageNumber.substring(0, NUTOOL_PIN.g_packageNumber.lastIndexOf(')')); + NUTOOL_PIN.g_packageNumberIndex = NUTOOL_PIN.g_packageNumber; + + partNumber_package = null; +}; \ No newline at end of file diff --git a/src/NUC_KM1M0D0F_64_Content.js b/src/NUC_KM1M0D0F_64_Content.js new file mode 100644 index 0000000..0e45f7d --- /dev/null +++ b/src/NUC_KM1M0D0F_64_Content.js @@ -0,0 +1,490 @@ +NUTOOL_PIN.g_cfg_chips = [ + { name: "KM1M0DF02N/K", pkg: "LQFP100_D0x(14*14)" }, + { name: "KM1M0DF03N/K", pkg: "LQFP80_D0x(12*12)" }, + { name: "KM1M0DF13N/K", pkg: "LQFP80_D1x(12*12)" }, + { name: "KM1M0DF04N/K", pkg: "TQFP64_D0x(10*10)" } +]; + +NUTOOL_PIN.g_cfg_pkgs = { + "LQFP64_D0x(14*14)": [ + 'PA.4', 'PA.5', 'PA.6', 'PA.7', 'RON', 'NDMOD', 'NRST', 'P9.0', 'P9.1', 'VSS', + 'P2.5', 'P2.6', 'VDD', 'BOOT', 'VOUT12', 'VOUT33', 'VDD', 'VSS', 'P0.0', 'P0.1', + 'P0.2', 'P0.3', 'P0.4', 'P0.5', 'P2.0', 'P2.1', 'P2.2', 'P2.3', 'P2.4', 'P8.7', + 'P8.6', 'P8.5', 'P8.4', 'P8.3', 'P8.2', 'P8.1', 'P8.0', 'P7.7', 'P7.6', 'P7.5', + 'P7.4', 'P7.3', 'P7.2', 'P7.1', 'P7.0', 'P6.7', 'P6.6', 'P6.5', 'P6.4', 'P6.3', + 'P6.2', 'P5.0', 'P5.1', 'P5.2', 'P5.3', 'P5.4', 'P5.5', 'P5.6', 'P5.7', 'P9.4', + 'PA.0', 'PA.1', 'PA.2', 'PA.3' + ], + "TQFP64_D0x(10*10)": [ + 'PA.4', 'PA.5', 'PA.6', 'PA.7', 'RON', 'NDMOD', 'NRST', 'P9.0', 'P9.1', 'VSS', + 'P2.5', 'P2.6', 'VDD', 'BOOT', 'VOUT12', 'VOUT33', 'VDD', 'VSS', 'P0.0', 'P0.1', + 'P0.2', 'P0.3', 'P0.4', 'P0.5', 'P2.0', 'P2.1', 'P2.2', 'P2.3', 'P2.4', 'P8.7', + 'P8.6', 'P8.5', 'P8.4', 'P8.3', 'P8.2', 'P8.1', 'P8.0', 'P7.7', 'P7.6', 'P7.5', + 'P7.4', 'P7.3', 'P7.2', 'P7.1', 'P7.0', 'P6.7', 'P6.6', 'P6.5', 'P6.4', 'P6.3', + 'P6.2', 'P5.0', 'P5.1', 'P5.2', 'P5.3', 'P5.4', 'P5.5', 'P5.6', 'P5.7', 'P9.4', + 'PA.0', 'PA.1', 'PA.2', 'PA.3' + ] +}; + +NUTOOL_PIN.g_cfg_gpios = [ + { f: ['P0.0:0', 'TM10IOB:1', 'LED_LED0:9']}, + { f: ['P0.1:0', 'TM09IOB:1', 'LED_LED1:9']}, + { f: ['P0.2:0', 'TM07IOB:1', 'SIF0_SBI0A:4', 'LIN_LRX0A:4', 'LED_LED2:9']}, + { f: ['P0.3:0', 'TM08IOB:1', 'TM15IOB:3', 'SIF0_SBO0A:4', 'LIN_LTX0A:4', 'DAC1_DA1OUT0:7', 'LED_LED3:9']}, + { f: ['P0.4:0', 'TM00IOB:1', 'TM02IOB:2', 'TM11IOA:3', 'SIF0_SBT0A:4', 'LED_LED4:9']}, + { f: ['P0.5:0', 'TM12IOA:3', 'SIF3_SBO3A:4', 'LED_LED5:9']}, + { f: ['P0.6:0']}, + { f: ['P0.7:0']}, + + { f: ['P1.0:0']}, + { f: ['P1.1:0']}, + { f: ['P1.2:0']}, + { f: ['P1.3:0']}, + { f: ['P1.4:0']}, + { f: ['P1.5:0']}, + { f: ['P1.6:0']}, + { f: ['P1.7:0']}, + + { f: ['P2.0:0', 'SIF3_SBI3A:4', 'SIF8_SCL8:5', 'IRQ0A:10']}, + { f: ['P2.1:0', 'SIF3_SBT3A:4', 'SIF8_SDA8:5', 'IRQ1A:10']}, + { f: ['P2.2:0', 'SIF3_SBC3A:4', 'IRQ2A:10']}, + { f: ['P2.3:0', 'TM13IOA:1', 'IRQ3A:10']}, + { f: ['P2.4:0', 'TM14IOA:1', 'IRQ4A:10']}, + { f: ['P2.5:0', 'OSCI:7']}, + { f: ['P2.6:0', 'OSCO:7']}, + { f: ['P2.7:0']}, + + { f: ['P3.0:0']}, + { f: ['P3.1:0']}, + { f: ['P3.2:0']}, + { f: ['P3.3:0']}, + { f: ['P3.4:0']}, + { f: ['P3.5:0']}, + { f: ['P3.6:0']}, + { f: ['P3.7:0']}, + + { f: ['P4.0:0']}, + { f: ['P4.1:0']}, + { f: ['P4.2:0']}, + { f: ['P4.3:0']}, + { f: ['P4.4:0']}, + { f: ['P4.5:0']}, + { f: ['P4.6:0']}, + { f: ['P4.7:0']}, + + { f: ['P5.0:0', 'TM07OUT0:1', 'SIF1_SBO1A:4']}, + { f: ['P5.1:0', 'TM07OUT1:1', 'SIF1_SBI1A:4']}, + { f: ['P5.2:0', 'TM07OUT2:1', 'SIF1_SBT1A:4']}, + { f: ['P5.3:0', 'TM07OUT3:1', 'SIF1_SBC1A:4']}, + { f: ['P5.4:0', 'TM07OUT4:1']}, + { f: ['P5.5:0', 'TM07OUT5:1', 'AN11:7']}, + { f: ['P5.6:0', 'BZ_NBUZZERA:1', 'AN10:1', 'DAC0_DA0OUT0:1', 'AN10:1', 'DAC0_DA0OUT0:1']}, + { f: ['P5.7:0', 'BZ_BUZZERA:1', 'AN9:7']}, + + { f: ['P6.0:0']}, + { f: ['P6.1:0']}, + { f: ['P6.2:0', 'TM01IOB:1']}, + { f: ['P6.3:0', 'TM03IOB:1']}, + { f: ['P6.4:0', 'TM04IOB:1', 'SIF2_SBC2A:4']}, + { f: ['P6.5:0', 'SIF2_SBO2A:4']}, + { f: ['P6.6:0', 'SIF2_SBI2A:4']}, + { f: ['P6.7:0', 'SIF2_SBT2A:4']}, + + { f: ['P7.0:0', 'SIF4_SBI4A:4', 'KEY0:10']}, + { f: ['P7.1:0', 'SIF4_SBO4A:4', 'SIF6_SDA6A:5', 'KEY1:10']}, + { f: ['P7.2:0', 'SIF4_SBT4A:4', 'SIF6_SCL6A:5', 'KEY2:10']}, + { f: ['P7.3:0', 'TM13IOB:1', 'SIF4_SBC4A:4', 'SIF7_SDA7A:5', 'CMP1_CMPREF1B:8', 'KEY3:10']}, + { f: ['P7.4:0', 'TM14IOB:1', 'SIF1_SBC1B:4', 'SIF7_SCL7A:5', 'CMP1_CMPIN1B:8', 'KEY4:10']}, + { f: ['P7.5:0', 'SIF1_SBO1B:4', 'DAC1_DA1OUT1:7', 'KEY5:10']}, + { f: ['P7.6:0', 'SIF1_SBI1B:4', 'CMP1_CMPREF1A:8', 'KEY6:10']}, + { f: ['P7.7:0', 'SIF1_SBT1B:4', 'CMP1_CMPIN1A:8', 'KEY7:10']}, + + { f: ['P8.0:0', 'SDO0:1', 'PWM0_PWM0A:2', 'CMP1_CMPOT1:8']}, + { f: ['P8.1:0', 'SDO1:1', 'PWM0_NPWM0A:2', 'PWM0_PWM1A:2']}, + { f: ['P8.2:0', 'SDO2:1', 'PWM0_PWM1A:2', 'PWM0_PWM2A:2']}, + { f: ['P8.3:0', 'SDO3:1', 'PWM0_NPWM1A:2', 'PWM0_NPWM0A:2']}, + { f: ['P8.4:0', 'SDO4:1', 'PWM0_PWM2A:2', 'PWM0_NPWM1A:2']}, + { f: ['P8.5:0', 'SDO5:1', 'PWM0_NPWM2A:2']}, + { f: ['P8.6:0', 'SDO6:1', 'PWM0_PWMBCSTA:2']}, + { f: ['P8.7:0', 'SDO7:1', 'TM15IOC:2']}, + + { f: ['P9.0:0', 'XI:7']}, + { f: ['P9.1:0', 'XO:7']}, + { f: ['P9.2:0']}, + { f: ['P9.3:0']}, + { f: ['P9.4:0', 'AN8:7']}, + { f: ['P9.5:0']}, + { f: ['P9.6:0']}, + { f: ['P9.7:0']}, + + { f: ['PA.0:0', 'TM00IOA:2', 'AN0:7']}, + { f: ['PA.1:0', 'TM01IOA:2', 'AN1:7']}, + { f: ['PA.2:0', 'TM02IOA:2', 'AN2:1', 'DAC0_DA0OUT1:1', 'CMP0_CMPREF0B:8', 'AN2:1', 'DAC0_DA0OUT1:1']}, + { f: ['PA.3:0', 'TM03IOA:2', 'AN3:7', 'CMP0_CMPIN0B:8']}, + { f: ['PA.4:0', 'TM04IOA:1', 'SIF5_SBI5:4', 'AN4:7', 'CMP0_CMPREF0A:8']}, + { f: ['PA.5:0', 'TM07IOA:1', 'SIF5_SBO5:4', 'AN5:7', 'CMP0_CMPIN0A:8']}, + { f: ['PA.6:0', 'TM08IOA:1', 'TM10IOA:2', 'SIF5_SBT5:4', 'AN6:7', 'CMP0_CMPOT0:8']}, + { f: ['PA.7:0', 'MONOUT:1', 'TM09IOA:2', 'SIF5_SBC5:4', 'AN7:7']}, +]; + +NUTOOL_PIN.g_cfg_gpiosDefines = [ + { f: ['P0.0', 'GPIO:GPIO_P00MD_GPIO@IOP0MD', 'TM10IOB:GPIO_P00MD_TM10IOB@IOP0MD', 'LED_LED0:GPIO_P00MD_LED0@IOP0MD'] }, + { f: ['P0.1', 'GPIO:GPIO_P01MD_GPIO@IOP0MD', 'TM09IOB:GPIO_P01MD_TM09IOB@IOP0MD', 'LED_LED1:GPIO_P01MD_LED1@IOP0MD'] }, + { f: ['P0.2', 'GPIO:GPIO_P02MD_GPIO@IOP0MD', 'TM07IOB:GPIO_P02MD_TM07IOB@IOP0MD', 'SIF0_SBI0A:GPIO_P02MD_SBI0A@IOP0MD', 'LIN_LRX0A:GPIO_P02MD_LRX0A@IOP0MD', 'LED_LED2:GPIO_P02MD_LED2@IOP0MD'] }, + { f: ['P0.3', 'GPIO:GPIO_P03MD_GPIO@IOP0MD', 'TM08IOB:GPIO_P03MD_TM08IOB@IOP0MD', 'TM15IOB:GPIO_P03MD_TM15IOB@IOP0MD', 'SIF0_SBO0A:GPIO_P03MD_SBO0A@IOP0MD', 'LIN_LTX0A:GPIO_P03MD_LTX0A@IOP0MD', 'DAC1_DA1OUT0:GPIO_P03MD_DA1OUT0@IOP0MD', 'LED_LED3:GPIO_P03MD_LED3@IOP0MD'] }, + { f: ['P0.4', 'GPIO:GPIO_P04MD_GPIO@IOP0MD', 'TM00IOB:GPIO_P04MD_TM00IOB@IOP0MD', 'TM02IOB:GPIO_P04MD_TM02IOB@IOP0MD', 'TM11IOA:GPIO_P04MD_TM11IOA@IOP0MD', 'SIF0_SBT0A:GPIO_P04MD_SBT0A@IOP0MD', 'LED_LED4:GPIO_P04MD_LED4@IOP0MD'] }, + { f: ['P0.5', 'GPIO:GPIO_P05MD_GPIO@IOP0MD', 'TM12IOA:GPIO_P05MD_TM12IOA@IOP0MD', 'SIF3_SBO3A:GPIO_P05MD_SBO3A@IOP0MD', 'LED_LED5:GPIO_P05MD_LED5@IOP0MD'] }, + { f: ['P0.6', 'GPIO:GPIO_P06MD_GPIO@IOP0MD', 'SIF3_SBI3A:GPIO_P06MD_SBI3A@IOP0MD', 'LED_LED6:GPIO_P06MD_LED6@IOP0MD'] }, + { f: ['P0.7', 'GPIO:GPIO_P07MD_GPIO@IOP0MD', 'SIF3_SBT3A:GPIO_P07MD_SBT3A@IOP0MD', 'DAC1_DA1OUT0:GPIO_P07MD_DA1OUT0@IOP0MD', 'LED_LED7:GPIO_P07MD_LED7@IOP0MD'] }, + + { f: ['P1.0', 'GPIO:GPIO_P10MD_GPIO@IOP1MD', 'TM00IOC:GPIO_P10MD_TM00IOC@IOP1MD', 'AN20:GPIO_P10MD_AN20@IOP1MD'] }, + { f: ['P1.1', 'GPIO:GPIO_P11MD_GPIO@IOP1MD', 'TM02IOC:GPIO_P11MD_TM02IOC@IOP1MD', 'AN21:GPIO_P11MD_AN21@IOP1MD'] }, + { f: ['P1.2', 'GPIO:GPIO_P12MD_GPIO@IOP1MD', 'TM01IOC:GPIO_P12MD_TM01IOC@IOP1MD', 'AN22:GPIO_P12MD_AN22@IOP1MD'] }, + { f: ['P1.3', 'GPIO:GPIO_P13MD_GPIO@IOP1MD', 'TM03IOC:GPIO_P13MD_TM03IOC@IOP1MD', 'AN23:GPIO_P13MD_AN23@IOP1MD'] }, + { f: ['P1.4', 'GPIO:GPIO_P14MD_GPIO@IOP1MD', 'TM04IOC:GPIO_P14MD_TM04IOC@IOP1MD'] }, + { f: ['P1.5', 'GPIO:GPIO_P15MD_GPIO@IOP1MD', 'TM07IOC:GPIO_P15MD_TM07IOC@IOP1MD', 'BUZZERB:GPIO_P15MD_BUZZERB@IOP1MD'] }, + { f: ['P1.6', 'GPIO:GPIO_P16MD_GPIO@IOP1MD', 'TM08IOC:GPIO_P16MD_TM08IOC@IOP1MD', 'NBUZZERB:GPIO_P16MD_NBUZZERB@IOP1MD', 'SBC2B:GPIO_P16MD_SBC2B@IOP1MD'] }, + + { f: ['P2.0', 'GPIO:GPIO_P20MD_GPIO@IOP2MD', 'SIF3_SBC3A:GPIO_P20MD_SBC3A@IOP2MD', 'SIF3_SBI3A:GPIO_P20MD_SBI3A@IOP2MD', 'SIF8_SCL8:GPIO_P20MD_SCL8@IOP2MD', 'IRQ0A:GPIO_P20MD_IRQ0A@IOP2MD'] }, + { f: ['P2.1', 'GPIO:GPIO_P21MD_GPIO@IOP2MD', 'SIF3_SBT3A:GPIO_P21MD_SBT3A@IOP2MD', 'SIF8_SDA8:GPIO_P21MD_SDA8@IOP2MD', 'IRQ1A:GPIO_P21MD_IRQ1A@IOP2MD'] }, + { f: ['P2.2', 'GPIO:GPIO_P22MD_GPIO@IOP2MD', 'SIF3_SBC3A:GPIO_P22MD_SBC3A@IOP2MD', 'IRQ2A:GPIO_P22MD_IRQ2A@IOP2MD'] }, + { f: ['P2.3', 'GPIO:GPIO_P23MD_GPIO@IOP2MD', 'TM13IOA:GPIO_P23MD_TM13IOA@IOP2MD', 'IRQ3A:GPIO_P23MD_IRQ3A@IOP2MD'] }, + { f: ['P2.4', 'GPIO:GPIO_P24MD_GPIO@IOP2MD', 'TM14IOA:GPIO_P24MD_TM14IOA@IOP2MD', 'IRQ4A:GPIO_P24MD_IRQ4A@IOP2MD'] }, + { f: ['P2.5', 'GPIO:GPIO_P25MD_GPIO@IOP2MD', 'OSCI:GPIO_P25MD_OSC1@IOP2MD'] }, + { f: ['P2.6', 'GPIO:GPIO_P26MD_GPIO@IOP2MD', 'OSCO:GPIO_P26MD_OSC2@IOP2MD'] }, + + { f: ['P3.0', 'GPIO:GPIO_P30MD_GPIO@IOP3MD', 'SBO2B:GPIO_P30MD_SBO2B@IOP3MD'] }, + { f: ['P3.1', 'GPIO:GPIO_P31MD_GPIO@IOP3MD', 'SBI2B:GPIO_P31MD_SBI2B@IOP3MD'] }, + { f: ['P3.2', 'GPIO:GPIO_P32MD_GPIO@IOP3MD', 'SIF4_SBC4B:GPIO_P32MD_SBC4B@IOP3MD', 'SBT2B:GPIO_P32MD_SBT2B@IOP3MD'] }, + { f: ['P3.3', 'GPIO:GPIO_P33MD_GPIO@IOP3MD', 'SIF4_SBO4B:GPIO_P33MD_SBO4B@IOP3MD', 'SIF6_SDA6B:GPIO_P33MD_SDA6B@IOP3MD', 'AN15:GPIO_P33MD_AN15@IOP3MD'] }, + { f: ['P3.4', 'GPIO:GPIO_P34MD_GPIO@IOP3MD', 'SIF4_SBT4B:GPIO_P34MD_SBT4B@IOP3MD', 'SIF6_SCL6B:GPIO_P34MD_SCL6B@IOP3MD'] }, + { f: ['P3.5', 'GPIO:GPIO_P35MD_GPIO@IOP3MD', 'SIF4_SBI4B:GPIO_P35MD_SBI4B@IOP3MD', 'DAC0_DA0OUT0:GPIO_P35MD_DA0OUT0@IOP3MD'] }, + { f: ['P3.6', 'GPIO:GPIO_P36MD_GPIO@IOP3MD', 'SBC3B:GPIO_P36MD_SBC3B@IOP3MD'] }, + + { f: ['P4.0', 'GPIO:GPIO_P40MD_GPIO@IOP4MD', 'SBO3B:GPIO_P40MD_SBO3B@IOP4MD'] }, + { f: ['P4.1', 'GPIO:GPIO_P41MD_GPIO@IOP4MD', 'SBI3B:GPIO_P41MD_SBI3B@IOP4MD'] }, + { f: ['P4.2', 'GPIO:GPIO_P42MD_GPIO@IOP4MD', 'SBT3B:GPIO_P42MD_SBT3B@IOP4MD'] }, + { f: ['P4.3', 'GPIO:GPIO_P43MD_GPIO@IOP4MD', 'SIF0_SBO0B:GPIO_P43MD_SBO0B@IOP4MD', 'LIN_LTX0B:GPIO_P43MD_LTX0B@IOP4MD'] }, + { f: ['P4.4', 'GPIO:GPIO_P44MD_GPIO@IOP4MD', 'SIF0_SBI0B:GPIO_P44MD_SBI0B@IOP4MD', 'LIN_LRX0B:GPIO_P44MD_LRX0B@IOP4MD'] }, + { f: ['P4.5', 'GPIO:GPIO_P45MD_GPIO@IOP4MD', 'SIF0_SBT0B:GPIO_P45MD_SBT0B@IOP4MD'] }, + { f: ['P4.6', 'GPIO:GPIO_P46MD_GPIO@IOP4MD'] }, + { f: ['P4.7', 'GPIO:GPIO_P47MD_GPIO@IOP4MD'] }, + + { f: ['P5.0', 'GPIO:GPIO_P50MD_GPIO@IOP5MD', 'TM07OUT0:GPIO_P50MD_TM07OUT0@IOP5MD', 'SIF1_SBO1A:GPIO_P50MD_SBO1A@IOP5MD', 'CMP1_CMPIN1B:GPIO_P50MD_CMPIN1B@IOP5MD'] }, + { f: ['P5.1', 'GPIO:GPIO_P51MD_GPIO@IOP5MD', 'TM07OUT1:GPIO_P51MD_TM07OUT1@IOP5MD', 'SIF1_SBI1A:GPIO_P51MD_SBI1A@IOP5MD', 'CMP1_CMPREF1B:GPIO_P51MD_CMPREF1B@IOP5MD'] }, + { f: ['P5.2', 'GPIO:GPIO_P52MD_GPIO@IOP5MD', 'TM07OUT2:GPIO_P52MD_TM07OUT2@IOP5MD', 'SIF1_SBT1A:GPIO_P52MD_SBT1A@IOP5MD'] }, + { f: ['P5.3', 'GPIO:GPIO_P53MD_GPIO@IOP5MD', 'TM07OUT3:GPIO_P53MD_TM07OUT3@IOP5MD', 'SIF1_SBC1A:GPIO_P53MD_SBC1A@IOP5MD'] }, + { f: ['P5.4', 'GPIO:GPIO_P54MD_GPIO@IOP5MD', 'TM07OUT4:GPIO_P54MD_TM07OUT4@IOP5MD'] }, + { f: ['P5.5', 'GPIO:GPIO_P55MD_GPIO@IOP5MD', 'TM07OUT5:GPIO_P55MD_TM07OUT5@IOP5MD', 'AN11:GPIO_P55MD_AN11@IOP5MD'] }, + { f: ['P5.6', 'GPIO:GPIO_P56MD_GPIO@IOP5MD', 'BZ_NBUZZERA:GPIO_P56MD_NBUZZERA@IOP5MD', 'AN10:GPIO_P56MD_AN10@IOP5MD', 'DAC0_DA0OUT0:GPIO_P56MD_DA0OUT0@IOP5MD'] }, + { f: ['P5.7', 'GPIO:GPIO_P57MD_GPIO@IOP5MD', 'BZ_BUZZERA:GPIO_P57MD_BUZZERA@IOP5MD', 'AN9:GPIO_P57MD_AN9@IOP5MD'] }, + + { f: ['P6.1', 'GPIO:GPIO_P61MD_GPIO@IOP6MD', 'DAC1_DA1OUT1:GPIO_P61MD_DA1OUT1@IOP6MD'] }, + { f: ['P6.2', 'GPIO:GPIO_P62MD_GPIO@IOP6MD', 'TM01IOB:GPIO_P62MD_TM01IOB@IOP6MD', 'CMP1_CMPREF1A:GPIO_P62MD_CMPREF1A@IOP6MD'] }, + { f: ['P6.3', 'GPIO:GPIO_P63MD_GPIO@IOP6MD', 'TM03IOB:GPIO_P63MD_TM03IOB@IOP6MD', 'CMP1_CMPIN1A:GPIO_P63MD_CMPIN1A@IOP6MD'] }, + { f: ['P6.4', 'GPIO:GPIO_P64MD_GPIO@IOP6MD', 'TM04IOB:GPIO_P64MD_TM04IOB@IOP6MD', 'SIF2_SBC2A:GPIO_P64MD_SBC2A@IOP6MD', 'CMP1_CMPOT1:GPIO_P64MD_CMPOT1@IOP6MD'] }, + { f: ['P6.5', 'GPIO:GPIO_P65MD_GPIO@IOP6MD', 'SIF2_SBO2A:GPIO_P65MD_SBO2A@IOP6MD'] }, + { f: ['P6.6', 'GPIO:GPIO_P66MD_GPIO@IOP6MD', 'SIF2_SBI2A:GPIO_P66MD_SBI2A@IOP6MD'] }, + { f: ['P6.7', 'GPIO:GPIO_P67MD_GPIO@IOP6MD', 'SIF2_SBT2A:GPIO_P67MD_SBT2A@IOP6MD'] }, + + { f: ['P7.0', 'GPIO:GPIO_P70MD_GPIO@IOP7MD', 'SIF4_SBI4A:GPIO_P70MD_SBI4A@IOP7MD', 'CMP1_CMPREF1B:GPIO_P70MD_CMPREF1B@IOP7MD', 'KEY0:GPIO_P70MD_KEY0@IOP7MD'] }, + { f: ['P7.1', 'GPIO:GPIO_P71MD_GPIO@IOP7MD', 'SIF4_SBO4A:GPIO_P71MD_SBO4A@IOP7MD', 'SIF6_SDA6A:GPIO_P71MD_SDA6A@IOP7MD', 'CMP1_CMPIN1B:GPIO_P71MD_CMPIN1B@IOP7MD', 'KEY1:GPIO_P71MD_KEY1@IOP7MD'] }, + { f: ['P7.2', 'GPIO:GPIO_P72MD_GPIO@IOP7MD', 'SIF4_SBT4A:GPIO_P72MD_SBT4A@IOP7MD', 'SIF6_SCL6A:GPIO_P72MD_SCL6A@IOP7MD', 'DAC1_DA1OUT1:GPIO_P72MD_DA1OUT1@IOP7MD', 'KEY2:GPIO_P72MD_KEY2@IOP7MD'] }, + { f: ['P7.3', 'GPIO:GPIO_P73MD_GPIO@IOP7MD', 'TM13IOB:GPIO_P73MD_TM13IOB@IOP7MD', 'SIF4_SBC4A:GPIO_P73MD_SBC4A@IOP7MD', 'SIF7_SDA7A:GPIO_P73MD_SDA7A@IOP7MD', 'CMP1_CMPREF1B:GPIO_P73MD_CMPREF1B@IOP7MD', 'CMP1_CMPREF1A:GPIO_P73MD_CMPREF1A@IOP7MD', 'KEY3:GPIO_P73MD_KEY3@IOP7MD'] }, + { f: ['P7.4', 'GPIO:GPIO_P74MD_GPIO@IOP7MD', 'TM14IOB:GPIO_P74MD_TM14IOB@IOP7MD', 'SIF1_SBC1B:GPIO_P74MD_SBC1B@IOP7MD', 'SIF7_SCL7A:GPIO_P74MD_SCL7A@IOP7MD', 'CMP1_CMPIN1B:GPIO_P74MD_CMPIN1B@IOP7MD', 'CMP1_CMPIN1A:GPIO_P74MD_CMPIN1A@IOP7MD', 'KEY4:GPIO_P74MD_KEY4@IOP7MD'] }, + { f: ['P7.5', 'GPIO:GPIO_P75MD_GPIO@IOP7MD', 'SIF1_SBO1B:GPIO_P75MD_SBO1B@IOP7MD', 'DAC1_DA1OUT1:GPIO_P75MD_DA1OUT1@IOP7MD', 'CMP1_CMPOT1:GPIO_P75MD_CMPOT1@IOP7MD', 'KEY5:GPIO_P75MD_KEY5@IOP7MD'] }, + { f: ['P7.6', 'GPIO:GPIO_P76MD_GPIO@IOP7MD', 'SIF1_SBI1B:GPIO_P76MD_SBI1B@IOP7MD', 'CMP1_CMPREF1A:GPIO_P76MD_CMPREF1A@IOP7MD', 'KEY6:GPIO_P76MD_KEY6@IOP7MD'] }, + { f: ['P7.7', 'GPIO:GPIO_P77MD_GPIO@IOP7MD', 'SIF1_SBT1B:GPIO_P77MD_SBT1B@IOP7MD', 'CMP1_CMPIN1A:GPIO_P77MD_CMPIN1A@IOP7MD', 'KEY7:GPIO_P77MD_KEY7@IOP7MD'] }, + + { f: ['P8.0', 'GPIO:GPIO_P80MD_GPIO@IOP8MD', 'SDO0:GPIO_P80MD_SDO0@IOP8MD', 'PWM0_PWM0A:GPIO_P80MD_PWM0A@IOP8MD', 'CMP1_CMPOT1:GPIO_P80MD_CMPOT1@IOP8MD'] }, + { f: ['P8.1', 'GPIO:GPIO_P81MD_GPIO@IOP8MD', 'SDO1:GPIO_P81MD_SDO1@IOP8MD', 'PWM0_NPWM0A:GPIO_P81MD_NPWM0A@IOP8MD'] }, + { f: ['P8.2', 'GPIO:GPIO_P82MD_GPIO@IOP8MD', 'SDO2:GPIO_P82MD_SDO2@IOP8MD', 'PWM0_PWM1A:GPIO_P82MD_PWM1A@IOP8MD'] }, + { f: ['P8.3', 'GPIO:GPIO_P83MD_GPIO@IOP8MD', 'SDO3:GPIO_P83MD_SDO3@IOP8MD', 'PWM0_NPWM1A:GPIO_P83MD_NPWM1A@IOP8MD'] }, + { f: ['P8.4', 'GPIO:GPIO_P84MD_GPIO@IOP8MD', 'SDO4:GPIO_P84MD_SDO4@IOP8MD', 'PWM0_PWM2A:GPIO_P84MD_PWM2A@IOP8MD'] }, + { f: ['P8.5', 'GPIO:GPIO_P85MD_GPIO@IOP8MD', 'SDO5:GPIO_P85MD_SDO5@IOP8MD', 'PWM0_NPWM2A:GPIO_P85MD_NPWM2A@IOP8MD'] }, + { f: ['P8.6', 'GPIO:GPIO_P86MD_GPIO@IOP8MD', 'SDO6:GPIO_P86MD_SDO6@IOP8MD', 'PWM0_PWMBCSTA:GPIO_P86MD_PWMBCSTA@IOP8MD'] }, + { f: ['P8.7', 'GPIO:GPIO_P87MD_GPIO@IOP8MD', 'SDO7:GPIO_P87MD_SDO7@IOP8MD', 'TM15IOC:GPIO_P87MD_TM15IOC@IOP8MD'] }, + + { f: ['P9.0', 'GPIO:GPIO_P90MD_GPIO@IOP9MD', 'XI:GPIO_P90MD_XI@IOP9MD'] }, + { f: ['P9.1', 'GPIO:GPIO_P91MD_GPIO@IOP9MD', 'XO:GPIO_P91MD_XO@IOP9MD'] }, + { f: ['P9.2', 'GPIO:GPIO_P92MD_GPIO@IOP9MD', 'SIF4_SBC4B:GPIO_P92MD_SBC4B@IOP9MD', 'AN19:GPIO_P92MD_AN19@IOP9MD', 'AN14:GPIO_P92MD_AN14@IOP9MD'] }, + { f: ['P9.3', 'GPIO:GPIO_P93MD_GPIO@IOP9MD', 'AN18:GPIO_P93MD_AN18@IOP9MD', 'AN13:GPIO_P93MD_AN13@IOP9MD'] }, + { f: ['P9.4', 'GPIO:GPIO_P94MD_GPIO@IOP9MD', 'AN17:GPIO_P94MD_AN17@IOP9MD', 'DAC0_DA0OUT0:GPIO_P94MD_DA0OUT0@IOP9MD', 'AN12:GPIO_P94MD_AN12@IOP9MD', 'AN8:GPIO_P94MD_AN8@IOP9MD', 'DAC0_DA0OUT1:GPIO_P94MD_DA0OUT1@IOP9MD', 'CMP0_CMPREF0B:GPIO_P94MD_CMPREF0B@IOP9MD'] }, + { f: ['P9.5', 'GPIO:GPIO_P95MD_GPIO@IOP9MD', 'AN16:GPIO_P95MD_AN16@IOP9MD', 'DAC0_DA0OUT1:GPIO_P95MD_DA0OUT1@IOP9MD'] }, + + { f: ['PA.0', 'GPIO:GPIO_PA0MD_GPIO@IOPAMD', 'TM00IOA:GPIO_PA0MD_TM00IOA@IOPAMD', 'TM00IOA_64:GPIO_PA0MD_TM00IOA_64@IOPAMD', 'TM15IOA:GPIO_PA0MD_TM15IOA@IOPAMD', 'AN0:GPIO_PA0MD_AN0@IOPAMD'] }, + { f: ['PA.1', 'GPIO:GPIO_PA1MD_GPIO@IOPAMD', 'TM01IOA:GPIO_PA1MD_TM01IOA@IOPAMD', 'TM01IOA_64:GPIO_PA1MD_TM01IOA_64@IOPAMD', 'TM11IOB:GPIO_PA1MD_TM11IOB@IOPAMD', 'AN1:GPIO_PA1MD_AN1@IOPAMD'] }, + { f: ['PA.2', 'GPIO:GPIO_PA2MD_GPIO@IOPAMD', 'TM02IOA:GPIO_PA2MD_TM02IOA@IOPAMD', 'TM02IOA_64:GPIO_PA2MD_TM02IOA_64@IOPAMD', 'TM12IOB:GPIO_PA2MD_TM12IOB@IOPAMD', 'AN2:GPIO_PA2MD_AN2@IOPAMD', 'DAC0_DA0OUT1:GPIO_PA2MD_DA0OUT1@IOPAMD', 'CMP0_CMPREF0B:GPIO_PA2MD_CMPREF0B@IOPAMD'] }, + { f: ['PA.3', 'GPIO:GPIO_PA3MD_GPIO@IOPAMD', 'TM03IOA:GPIO_PA3MD_TM03IOA@IOPAMD', 'TM03IOA_64:GPIO_PA3MD_TM03IOA_64@IOPAMD', 'AN3:GPIO_PA3MD_AN3@IOPAMD', 'CMP0_CMPIN0B:GPIO_PA3MD_CMPIN0B@IOPAMD'] }, + { f: ['PA.4', 'GPIO:GPIO_PA4MD_GPIO@IOPAMD', 'TM04IOA:GPIO_PA4MD_TM04IOA@IOPAMD', 'SIF5_SBI5:GPIO_PA4MD_SBI5@IOPAMD', 'AN4:GPIO_PA4MD_AN4@IOPAMD', 'CMP0_CMPREF0A:GPIO_PA4MD_CMPREF0A@IOPAMD'] }, + { f: ['PA.5', 'GPIO:GPIO_PA5MD_GPIO@IOPAMD', 'TM07IOA:GPIO_PA5MD_TM07IOA@IOPAMD', 'SIF5_SBO5:GPIO_PA5MD_SBO5@IOPAMD', 'AN5:GPIO_PA5MD_AN5@IOPAMD', 'CMP0_CMPIN0A:GPIO_PA5MD_CMPIN0A@IOPAMD'] }, + { f: ['PA.6', 'GPIO:GPIO_PA6MD_GPIO@IOPAMD', 'TM08IOA:GPIO_PA6MD_TM08IOA@IOPAMD', 'TM10IOA:GPIO_PA6MD_TM10IOA@IOPAMD', 'SIF5_SBT5:GPIO_PA6MD_SBT5@IOPAMD', 'AN6:GPIO_PA6MD_AN6@IOPAMD', 'CMP0_CMPOT0:GPIO_PA6MD_CMPOT0@IOPAMD'] }, + { f: ['PA.7', 'GPIO:GPIO_PA7MD_GPIO@IOPAMD', 'MONITOR:GPIO_PA7MD_MONITOR@IOPAMD', 'TM09IOA:GPIO_PA7MD_TM09IOA@IOPAMD', 'SIF5_SBC5:GPIO_PA7MD_SBC5@IOPAMD', 'AN7:GPIO_PA7MD_AN7@IOPAMD'] }, + + { f: ['PB.0', 'GPIO:GPIO_PB0MD_GPIO@IOPBMD', 'AN8:GPIO_PB0MD_AN8@IOPBMD'] }, + { f: ['PB.1', 'GPIO:GPIO_PB1MD_GPIO@IOPBMD', 'AN9:GPIO_PB1MD_AN9@IOPBMD'] }, + { f: ['PB.2', 'GPIO:GPIO_PB2MD_GPIO@IOPBMD', 'AN10:GPIO_PB2MD_AN10@IOPBMD'] }, + { f: ['PB.3', 'GPIO:GPIO_PB3MD_GPIO@IOPBMD', 'AN11:GPIO_PB3MD_AN11@IOPBMD', 'CMP0_CMPIN0B:GPIO_PB3MD_CMPIN0B@IOPBMD'] }, + { f: ['PB.4', 'GPIO:GPIO_PB4MD_GPIO@IOPBMD', 'AN12:GPIO_PB4MD_AN12@IOPBMD', 'CMP0_CMPREF0B:GPIO_PB4MD_CMPREF0B@IOPBMD'] }, + { f: ['PB.5', 'GPIO:GPIO_PB5MD_GPIO@IOPBMD', 'AN13:GPIO_PB5MD_AN13@IOPBMD'] }, + { f: ['PB.6', 'GPIO:GPIO_PB6MD_GPIO@IOPBMD', 'AN14:GPIO_PB6MD_AN14@IOPBMD'] }, + { f: ['PB.7', 'GPIO:GPIO_PB7MD_GPIO@IOPBMD', 'AN15:GPIO_PB7MD_AN15@IOPBMD'] } +]; + +NUTOOL_PIN.g_cfg_gpiosDescriptions = [ + 'LED_LED7:LED output pin', + 'LED_LED6:LED output pin', + 'LED_LED5:LED output pin', + 'LED_LED4:LED output pin', + 'LED_LED3:LED output pin', + 'LED_LED2:LED output pin', + 'LED_LED1:LED output pin', + 'LED_LED0:LED output pin', + 'DAC1_DA1OUT1:D/A converter 1 output pin', + 'DAC1_DA1OUT0:D/A converter 1 output pin', + 'DAC0_DA0OUT1:D/A converter 0 output pin', + 'DAC0_DA0OUT0:D/A converter 0 output pin', + 'CMP1_CMPOT1:Comparator 1 output pin', + 'CMP0_CMPOT0:Comparator 0 output pin', + 'CMP1_CMPREF1B:Comparator 1B reference input pin', + 'CMP1_CMPREF1A:Comparator 1A reference input pin', + 'CMP1_CMPIN1B:Comparator 1B input pin', + 'CMP1_CMPIN1A:Comparator 1A input pin', + 'CMP0_CMPREF0B:Comparator 0B reference input pin', + 'CMP0_CMPREF0A:Comparator 0A reference input pin', + 'CMP0_CMPIN0B:Comparator 0B input pin', + 'CMP0_CMPIN0A:Comparator 0A input pin', + 'AN23:A/D converter analog input 23 pin', + 'AN22:A/D converter analog input 22 pin', + 'AN21:A/D converter analog input 21 pin', + 'AN20:A/D converter analog input 20 pin', + 'AN19:A/D converter analog input 19 pin', + 'AN18:A/D converter analog input 18 pin', + 'AN17:A/D converter analog input 17 pin', + 'AN16:A/D converter analog input 16 pin', + 'AN15:A/D converter analog input 15 pin', + 'AN14:A/D converter analog input 14 pin', + 'AN13:A/D converter analog input 13 pin', + 'AN12:A/D converter analog input 12 pin', + 'AN11:A/D converter analog input 11 pin', + 'AN10:A/D converter analog input 10 pin', + 'AN9:A/D converter analog input 09 pin', + 'AN8:A/D converter analog input 08 pin', + 'AN7:A/D converter analog input 07 pin', + 'AN6:A/D converter analog input 06 pin', + 'AN5:A/D converter analog input 05 pin', + 'AN4:A/D converter analog input 04 pin', + 'AN3:A/D converter analog input 03 pin', + 'AN2:A/D converter analog input 02 pin', + 'AN1:A/D converter analog input 01 pin', + 'AN0:A/D converter analog input 00 pin', + 'LIN_LTX0B:LTX clock input/output pin', + 'LIN_LRX0B:LRX clock input/output pin', + 'LIN_LTX0A:LTX clock input/output pin', + 'LIN_LRX0A:LRX clock input/output pin', + 'SIF8_SDA8:I2C5 clock input/output pin', + 'SIF8_SCL8:I2C5 clock input/output pin', + 'SIF7_SDA7B:I2C5 clock input/output pin', + 'SIF7_SCL7B:I2C5 clock input/output pin', + 'SIF7_SDA7A:I2C5 clock input/output pin', + 'SIF7_SCL7A:I2C5 clock input/output pin', + 'SIF6_SDA6B:I2C5 clock input/output pin', + 'SIF6_SCL6B:I2C5 clock input/output pin', + 'SIF6_SDA6A:I2C5 clock input/output pin', + 'SIF6_SCL6A:I2C5 clock input/output pin', + 'SIF5_SBT5:SIF5 clock input/output pin', + 'SIF5_SBO5:SIF5 data input/output pin', + 'SIF5_SBI5:SIF5 data input pin', + 'SIF5_SBC5:SIF5 chip select input/output pin', + 'SIF4_SBT4B:SIF4 clock input/output pin', + 'SIF4_SBO4B:SIF4 data input/output pin', + 'SIF4_SBI4B:SIF4 data input pin', + 'SIF4_SBC4B:SIF4 chip select input/output pin', + 'SIF4_SBT4A:SIF4 clock input/output pin', + 'SIF4_SBO4A:SIF4 data input/output pin', + 'SIF4_SBI4A:SIF4 data input pin', + 'SIF4_SBC4A:SIF4 chip select input/output pin', + 'SIF3_SBT3B:SIF3 clock input/output pin', + 'SIF3_SBO3B:SIF3 data input/output pin', + 'SIF3_SBI3B:SIF3 data input pin', + 'SIF3_SBC3B:SIF3 chip select input/output pin', + 'SIF3_SBT3A:SIF3 clock input/output pin', + 'SIF3_SBO3A:SIF3 data input/output pin', + 'SIF3_SBI3A:SIF3 data input pin', + 'SIF3_SBC3A:SIF3 chip select input/output pin', + 'SIF2_SBT2B:SIF2 clock input/output pin', + 'SIF2_SBO2B:SIF2 data input/output pin', + 'SIF2_SBI2B:SIF2 data input pin', + 'SIF2_SBC2B:SIF2 chip select input/output pin', + 'SIF2_SBT2A:SIF2 clock input/output pin', + 'SIF2_SBO2A:SIF2 data input/output pin', + 'SIF2_SBI2A:SIF2 data input pin', + 'SIF2_SBC2A:SIF2 chip select input/output pin', + 'SIF1_SBT1B:SIF1 clock input/output pin', + 'SIF1_SBO1B:SIF1 data input/output pin', + 'SIF1_SBI1B:SIF1 data input pin', + 'SIF1_SBC1B:SIF1 chip select input/output pin', + 'SIF1_SBT1A:SIF1 clock input/output pin', + 'SIF1_SBO1A:SIF1 data input/output pin', + 'SIF1_SBI1A:SIF1 data input pin', + 'SIF1_SBC1A:SIF1 chip select input/output pin', + 'SIF0_SBT0B:SIF0 clock input/output pin', + 'SIF0_SBO0B:SIF0 data input/output pin', + 'SIF0_SBI0B:SIF0 data input pin', + 'SIF0_SBT0A:SIF0 clock input/output pin', + 'SIF0_SBO0A:SIF0 data input/output pin', + 'SIF0_SBI0A:SIF0 data input pin', + 'BZ_BUZZERB:BUZZER output pin B', + 'BZ_NBUZZERB:NBUZZER output pin B', + 'BZ_BUZZERA:BUZZER output pin A', + 'BZ_NBUZZERA:NBUZZER output pin A', + "PWM0_PWMBCSTA:GPWM's Binary Counter Status", + 'PWM0_NPWM2A:NGPWM2A output pin', + 'PWM0_PWM2A:GPWM2A output pin', + 'PWM0_NPWM1A:NGPWM1A output pin', + 'PWM0_PWM1A:GPWM1A output pin', + 'PWM0_NPWM0A:NGPWM0A output pin', + 'PWM0_PWM0A:GPWM0A output pin', + 'TM15IOC:Timer 15 input/output pin C', + 'TM15IOB:Timer 15 input/output pin B', + 'TM15IOA:Timer 15 input/output pin A', + 'TM14IOB:Timer 14 input/output pin B', + 'TM14IOA:Timer 14 input/output pin A', + 'TM13IOB:Timer 13 input/output pin B', + 'TM13IOA:Timer 13 input/output pin A', + 'TM12IOB:Timer 12 input/output pin B', + 'TM12IOA:Timer 12 input/output pin A', + 'TM11IOB:Timer 11 input/output pin B', + 'TM11IOA:Timer 11 input/output pin A', + 'TM10IOB:Timer 10 input/output pin B', + 'TM10IOA:Timer 10 input/output pin A', + 'TM09IOB:Timer 9 input/output pin B', + 'TM09IOA:Timer 9 input/output pin A', + 'SDO7:Timer 8 synchronous output 7', + 'SDO6:Timer 8 synchronous output 6', + 'SDO5:Timer 8 synchronous output 5', + 'SDO4:Timer 8 synchronous output 4', + 'SDO3:Timer 8 synchronous output 3', + 'SDO2:Timer 8 synchronous output 2', + 'SDO1:Timer 8 synchronous output 1', + 'SDO0:Timer 8 synchronous output 0', + 'TM08IOC:Timer 8 input/output pin C', + 'TM08IOB:Timer 8 input/output pin B', + 'TM08IOA:Timer 8 input/output pin A', + 'TM07OUT5:Timer 7 output pin 5', + 'TM07OUT4:Timer 7 output pin 4', + 'TM07OUT3:Timer 7 output pin 3', + 'TM07OUT2:Timer 7 output pin 2', + 'TM07OUT1:Timer 7 output pin 1', + 'TM07OUT0:Timer 7 output pin 0', + 'TM07IOC:Timer 7 input/output pin C', + 'TM07IOB:Timer 7 input/output pin B', + 'TM07IOA:Timer 7 input/output pin A', + 'TM04IOC:Timer 4 input/output pin C', + 'TM04IOB:Timer 4 input/output pin B', + 'TM04IOA:Timer 4 input/output pin A', + 'TM03IOC:Timer 3 input/output pin C', + 'TM03IOB:Timer 3 input/output pin B', + 'TM03IOA:Timer 3 input/output pin A', + 'TM02IOC:Timer 2 input/output pin C', + 'TM02IOB:Timer 2 input/output pin B', + 'TM02IOA:Timer 2 input/output pin A', + 'TM01IOC:Timer 1 input/output pin C', + 'TM01IOB:Timer 1 input/output pin B', + 'TM01IOA:Timer 1 input/output pin A', + 'TM00IOC:Timer 0 input/output pin C', + 'TM00IOB:Timer 0 input/output pin B', + 'TM00IOA:Timer 0 input/output pin A', + 'KEY7:KEY interrupt 7', + 'KEY6:KEY interrupt 6', + 'KEY5:KEY interrupt 5', + 'KEY4:KEY interrupt 4', + 'KEY3:KEY interrupt 3', + 'KEY2:KEY interrupt 2', + 'KEY1:KEY interrupt 1', + 'KEY0:KEY interrupt 0', + 'IRQ4A:External interrupt 4', + 'IRQ3A:External interrupt 3', + 'IRQ2A:External interrupt 2', + 'IRQ1A:External interrupt 1', + 'IRQ0A:External interrupt 0', + 'XO:External clock output', + 'XI:External clock input', + 'OSCO:External clock output', + 'OSCI:External clock input', + 'MONOUT:Monitor output pin', + 'DBG_SWDD:Debug data input/output pin', + 'DBG_SWDCLK:Debug clock input pin', +]; + +NUTOOL_PIN.g_cfg_regDescriptions = {}; +NUTOOL_PIN.g_cfg_regDescriptions.IOP0MD = '0x40004200'; +NUTOOL_PIN.g_cfg_regDescriptions.IOP1MD = '0x40004210'; +NUTOOL_PIN.g_cfg_regDescriptions.IOP2MD = '0x40004220'; +NUTOOL_PIN.g_cfg_regDescriptions.IOP3MD = '0x40004230'; +NUTOOL_PIN.g_cfg_regDescriptions.IOP4MD = '0x40004240'; +NUTOOL_PIN.g_cfg_regDescriptions.IOP5MD = '0x40004250'; +NUTOOL_PIN.g_cfg_regDescriptions.IOP6MD = '0x40004260'; +NUTOOL_PIN.g_cfg_regDescriptions.IOP7MD = '0x40004270'; +NUTOOL_PIN.g_cfg_regDescriptions.IOP8MD = '0x40004280'; +NUTOOL_PIN.g_cfg_regDescriptions.IOP9MD = '0x40004290'; +NUTOOL_PIN.g_cfg_regDescriptions.IOPAMD = '0x400042A0'; +NUTOOL_PIN.g_cfg_regDescriptions.IOPBMD = '0x400042B0'; + +NUTOOL_PIN.g_cfg_unusedGPIO = { + 'KM1M0DF02N/K(LQFP100_D0x(14*14))': { + 'ALL': [] + }, + 'KM1M0DF03N/K(LQFP80_D0x(12*12))': { + 'ALL': [] + }, + 'KM1M0DF13N/K(LQFP80_D1x(12*12))': { + 'ALL': [] + }, + 'KM1M0DF04N/K(TQFP64_D0x(10*10))': { + 'ALL': [] + } +}; + +NUTOOL_PIN.g_cfg_OrCAD = { + "LQFP64_D0x(14*14)": [ + '', '', '', '', '', '', '', '', '', '', + '', '', '', '', '', '', '', '', '', '', + '', '', '', '', '', '', '', '', '', '', + '', '', '', '', '', '', '', '', '', '', + '', '', '', '', '', '', '', '', '', '', + '', '', '', '', '', '', '', '', '', '', + '', '', '', '' + ], + "TQFP64_D0x(10*10)": [ + '', '', '', '', '', '', '', '', '', '', + '', '', '', '', '', '', '', '', '', '', + '', '', '', '', '', '', '', '', '', '', + '', '', '', '', '', '', '', '', '', '', + '', '', '', '', '', '', '', '', '', '', + '', '', '', '', '', '', '', '', '', '', + '', '', '', '' + ] +}; +NUTOOL_PIN.g_cfg_WPPin = ['P0.0', 'P0.1']; +// [Workaround] Sometime NUTOOL_PIN.g_cfg_WPPin will be reset. +setTimeout(function() { + NUTOOL_PIN.g_cfg_WPPin = ['P0.0', 'P0.1']; +}, 100); + +NUTOOL_PIN.decidepackageNumber = function (given_partNumber_package) { + var partNumber_package; + + if (typeof given_partNumber_package === 'undefined') { + partNumber_package = NUTOOL_PIN.getg_partNumber_package(); + } + else { + partNumber_package = given_partNumber_package; + } + + NUTOOL_PIN.g_packageNumber = partNumber_package.substring(partNumber_package.indexOf('(') + 1); + NUTOOL_PIN.g_packageNumber = NUTOOL_PIN.g_packageNumber.substring(0, NUTOOL_PIN.g_packageNumber.lastIndexOf(')')); + NUTOOL_PIN.g_packageNumberIndex = NUTOOL_PIN.g_packageNumber; + + partNumber_package = null; +}; \ No newline at end of file diff --git a/src/NUC_KM1M0D0F_80_Content.js b/src/NUC_KM1M0D0F_80_Content.js new file mode 100644 index 0000000..b5bc852 --- /dev/null +++ b/src/NUC_KM1M0D0F_80_Content.js @@ -0,0 +1,503 @@ +NUTOOL_PIN.g_cfg_chips = [ + { name: "KM1M0DF02N/K", pkg: "LQFP100_D0x(14*14)" }, + { name: "KM1M0DF03N/K", pkg: "LQFP80_D0x(12*12)" }, + { name: "KM1M0DF13N/K", pkg: "LQFP80_D1x(12*12)" }, + { name: "KM1M0DF04N/K", pkg: "TQFP64_D0x(10*10)" } +]; + +NUTOOL_PIN.g_cfg_pkgs = { + "LQFP80_D0x(14*14)": [ + 'PA.0', 'PA.1', 'PA.2', 'PA.3', 'PA.4', 'PA.5', 'PA.6', 'PA.7', 'RON', 'NDMOD', + 'NRST', 'P9.0', 'P9.1', 'VSS', 'P2.5', 'P2.6', 'VDD', 'BOOT', 'VOUT12', 'VOUT33', + 'VDD', 'VSS', 'P0.0', 'P0.1', 'P0.2', 'P0.3', 'P0.4', 'P0.5', 'P0.6', 'P0.7', + 'P2.0', 'P2.1', 'P2.2', 'P2.3', 'P2.4', 'P8.7', 'P8.6', 'P8.5', 'P8.4', 'P8.3', + 'P8.2', 'P8.1', 'P8.0', 'P7.7', 'P7.6', 'P7.5', 'P7.4', 'P7.3', 'P7.2', 'P7.1', + 'P7.0', 'P6.7', 'P6.6', 'P6.5', 'P6.4', 'P6.3', 'P6.2', 'P5.0', 'P5.1', 'P5.2', + 'P5.3', 'P5.4', 'P5.5', 'P5.6', 'P5.7', 'P4.7', 'P4.6', 'P4.5', 'P4.4', 'P4.3', + 'P3.5', 'P3.4', 'P3.3', 'P9.2', 'P9.3', 'P9.4', 'PB.3', 'PB.2', 'PB.1', 'PB.0' + ], + "LQFP80_D0x(12*12)": [ + 'PA.0', 'PA.1', 'PA.2', 'PA.3', 'PA.4', 'PA.5', 'PA.6', 'PA.7', 'RON', 'NDMOD', + 'NRST', 'P9.0', 'P9.1', 'VSS', 'P2.5', 'P2.6', 'VDD', 'BOOT', 'VOUT12', 'VOUT33', + 'VDD', 'VSS', 'P0.0', 'P0.1', 'P0.2', 'P0.3', 'P0.4', 'P0.5', 'P0.6', 'P0.7', + 'P2.0', 'P2.1', 'P2.2', 'P2.3', 'P2.4', 'P8.7', 'P8.6', 'P8.5', 'P8.4', 'P8.3', + 'P8.2', 'P8.1', 'P8.0', 'P7.7', 'P7.6', 'P7.5', 'P7.4', 'P7.3', 'P7.2', 'P7.1', + 'P7.0', 'P6.7', 'P6.6', 'P6.5', 'P6.4', 'P6.3', 'P6.2', 'P5.0', 'P5.1', 'P5.2', + 'P5.3', 'P5.4', 'P5.5', 'P5.6', 'P5.7', 'P4.7', 'P4.6', 'P4.5', 'P4.4', 'P4.3', + 'P3.5', 'P3.4', 'P3.3', 'P9.2', 'P9.3', 'P9.4', 'PB.3', 'PB.2', 'PB.1', 'PB.0' + ] +}; + +NUTOOL_PIN.g_cfg_gpios = [ + { f: ['P0.0:0', 'TM10IOB:1', 'LED_LED0:9']}, + { f: ['P0.1:0', 'TM09IOB:1', 'LED_LED1:9']}, + { f: ['P0.2:0', 'TM07IOB:1', 'SIF0_SBI0A:4', 'LIN_LRX0A:4', 'LED_LED2:9']}, + { f: ['P0.3:0', 'TM08IOB:1', 'TM15IOB:3', 'SIF0_SBO0A:4', 'LIN_LTX0A:4', 'LED_LED3:9']}, + { f: ['P0.4:0', 'TM00IOB:1', 'TM02IOB:2', 'TM11IOA:3', 'SIF0_SBT0A:4', 'LED_LED4:9']}, + { f: ['P0.5:0', 'TM12IOA:3', 'SIF3_SBO3A:4', 'LED_LED5:9']}, + { f: ['P0.6:0', 'SIF3_SBI3A:4', 'LED_LED6:9']}, + { f: ['P0.7:0', 'SIF3_SBT3A:4', 'DAC1_DA1OUT0:7', 'LED_LED7:9']}, + + { f: ['P1.0:0']}, + { f: ['P1.1:0']}, + { f: ['P1.2:0']}, + { f: ['P1.3:0']}, + { f: ['P1.4:0']}, + { f: ['P1.5:0']}, + { f: ['P1.6:0']}, + { f: ['P1.7:0']}, + + { f: ['P2.0:0', 'SIF3_SBC3A:4', 'SIF8_SCL8:5', 'IRQ0A:10']}, + { f: ['P2.1:0', 'SIF8_SDA8:5', 'IRQ1A:10']}, + { f: ['P2.2:0', 'IRQ2A:10']}, + { f: ['P2.3:0', 'TM13IOA:1', 'IRQ3A:10']}, + { f: ['P2.4:0', 'TM14IOA:1', 'IRQ4A:10']}, + { f: ['P2.5:0', 'OSCI:7']}, + { f: ['P2.6:0', 'OSCO:7']}, + { f: ['P2.7:0']}, + + { f: ['P3.0:0']}, + { f: ['P3.1:0']}, + { f: ['P3.2:0']}, + { f: ['P3.3:0', 'SIF4_SBO4B:4', 'SIF6_SDA6B:5', 'AN15:7']}, + { f: ['P3.4:0', 'SIF4_SBT4B:4', 'SIF6_SCL6B:5']}, + { f: ['P3.5:0', 'SIF4_SBI4B:4', 'DAC0_DA0OUT0:7']}, + { f: ['P3.6:0']}, + { f: ['P3.7:0']}, + + { f: ['P4.0:0']}, + { f: ['P4.1:0']}, + { f: ['P4.2:0']}, + { f: ['P4.3:0', 'SIF0_SBO0B:4', 'LIN_LTX0B:4']}, + { f: ['P4.4:0', 'SIF0_SBI0B:4', 'LIN_LRX0B:4']}, + { f: ['P4.5:0', 'SIF0_SBT0B:4']}, + { f: ['P4.6:0']}, + { f: ['P4.7:0']}, + + { f: ['P5.0:0', 'TM07OUT0:1', 'SIF1_SBO1A:4']}, + { f: ['P5.1:0', 'TM07OUT1:1', 'SIF1_SBI1A:4']}, + { f: ['P5.2:0', 'TM07OUT2:1', 'SIF1_SBT1A:4']}, + { f: ['P5.3:0', 'TM07OUT3:1', 'SIF1_SBC1A:4']}, + { f: ['P5.4:0', 'TM07OUT4:1']}, + { f: ['P5.5:0', 'TM07OUT5:1']}, + { f: ['P5.6:0', 'BZ_NBUZZERA:1']}, + { f: ['P5.7:0', 'BZ_BUZZERA:1']}, + + { f: ['P6.0:0']}, + { f: ['P6.1:0']}, + { f: ['P6.2:0', 'TM01IOB:1']}, + { f: ['P6.3:0', 'TM03IOB:1']}, + { f: ['P6.4:0', 'TM04IOB:1', 'SIF2_SBC2A:4']}, + { f: ['P6.5:0', 'SIF2_SBO2A:4']}, + { f: ['P6.6:0', 'SIF2_SBI2A:4']}, + { f: ['P6.7:0', 'SIF2_SBT2A:4']}, + + { f: ['P7.0:0', 'SIF4_SBI4A:4', 'CMP1_CMPREF1B:8', 'KEY0:10']}, + { f: ['P7.1:0', 'SIF4_SBO4A:4', 'SIF6_SDA6A:5', 'CMP1_CMPIN1B:8', 'KEY1:10']}, + { f: ['P7.2:0', 'SIF4_SBT4A:4', 'SIF6_SCL6A:5', 'DAC1_DA1OUT1:7', 'KEY2:10']}, + { f: ['P7.3:0', 'TM13IOB:1', 'SIF4_SBC4A:4', 'SIF7_SDA7A:5', 'CMP1_CMPREF1A:8', 'KEY3:10']}, + { f: ['P7.4:0', 'TM14IOB:1', 'SIF1_SBC1B:4', 'SIF7_SCL7A:5', 'CMP1_CMPIN1A:8', 'KEY4:10']}, + { f: ['P7.5:0', 'SIF1_SBO1B:4', 'CMP1_CMPOT1:8', 'KEY5:10']}, + { f: ['P7.6:0', 'SIF1_SBI1B:4', 'KEY6:10']}, + { f: ['P7.7:0', 'SIF1_SBT1B:4', 'KEY7:10']}, + + { f: ['P8.0:0', 'SDO0:1', 'PWM0_PWM0A:2']}, + { f: ['P8.1:0', 'SDO1:1', 'PWM0_NPWM0A:2', 'PWM0_PWM1A:2']}, + { f: ['P8.2:0', 'SDO2:1', 'PWM0_PWM1A:2', 'PWM0_PWM2A:2']}, + { f: ['P8.3:0', 'SDO3:1', 'PWM0_NPWM1A:2', 'PWM0_NPWM0A:2']}, + { f: ['P8.4:0', 'SDO4:1', 'PWM0_PWM2A:2', 'PWM0_NPWM1A:2']}, + { f: ['P8.5:0', 'SDO5:1', 'PWM0_NPWM2A:2']}, + { f: ['P8.6:0', 'SDO6:1', 'PWM0_PWMBCSTA:2']}, + { f: ['P8.7:0', 'SDO7:1', 'TM15IOC:2']}, + + { f: ['P9.0:0', 'XI:7']}, + { f: ['P9.1:0', 'XO:7']}, + { f: ['P9.2:0', 'SIF4_SBC4B:4', 'AN14:7']}, + { f: ['P9.3:0', 'AN13:7']}, + { f: ['P9.4:0', 'AN12:1', 'DAC0_DA0OUT1:1', 'CMP0_CMPREF0B:8', 'AN12:1', 'DAC0_DA0OUT1:1']}, + { f: ['P9.5:0']}, + { f: ['P9.6:0']}, + { f: ['P9.7:0']}, + + { f: ['PA.0:0', 'TM00IOA:1', 'TM15IOA:2', 'AN0:7']}, + { f: ['PA.1:0', 'TM01IOA:1', 'TM11IOB:2', 'AN1:7']}, + { f: ['PA.2:0', 'TM02IOA:1', 'TM12IOB:2', 'AN2:7']}, + { f: ['PA.3:0', 'TM03IOA:1', 'AN3:7']}, + { f: ['PA.4:0', 'TM04IOA:1', 'SIF5_SBI5:4', 'AN4:7', 'CMP0_CMPREF0A:8']}, + { f: ['PA.5:0', 'TM07IOA:1', 'SIF5_SBO5:4', 'AN5:7', 'CMP0_CMPIN0A:8']}, + { f: ['PA.6:0', 'TM08IOA:1', 'TM10IOA:2', 'SIF5_SBT5:4', 'AN6:7', 'CMP0_CMPOT0:8']}, + { f: ['PA.7:0', 'MONOUT:1', 'TM09IOA:2', 'SIF5_SBC5:4', 'AN7:7']}, + + { f: ['PB.0:0', 'AN8:7']}, + { f: ['PB.1:0', 'AN9:7']}, + { f: ['PB.2:0', 'AN10:7']}, + { f: ['PB.3:0', 'AN11:7', 'CMP0_CMPIN0B:8']}, + { f: ['PB.4:0']}, + { f: ['PB.5:0']}, + { f: ['PB.6:0']}, + { f: ['PB.7:0']}, +]; + +NUTOOL_PIN.g_cfg_gpiosDefines = [ + { f: ['P0.0', 'GPIO:GPIO_P00MD_GPIO@IOP0MD', 'TM10IOB:GPIO_P00MD_TM10IOB@IOP0MD', 'LED_LED0:GPIO_P00MD_LED0@IOP0MD'] }, + { f: ['P0.1', 'GPIO:GPIO_P01MD_GPIO@IOP0MD', 'TM09IOB:GPIO_P01MD_TM09IOB@IOP0MD', 'LED_LED1:GPIO_P01MD_LED1@IOP0MD'] }, + { f: ['P0.2', 'GPIO:GPIO_P02MD_GPIO@IOP0MD', 'TM07IOB:GPIO_P02MD_TM07IOB@IOP0MD', 'SIF0_SBI0A:GPIO_P02MD_SBI0A@IOP0MD', 'LIN_LRX0A:GPIO_P02MD_LRX0A@IOP0MD', 'LED_LED2:GPIO_P02MD_LED2@IOP0MD'] }, + { f: ['P0.3', 'GPIO:GPIO_P03MD_GPIO@IOP0MD', 'TM08IOB:GPIO_P03MD_TM08IOB@IOP0MD', 'TM15IOB:GPIO_P03MD_TM15IOB@IOP0MD', 'SIF0_SBO0A:GPIO_P03MD_SBO0A@IOP0MD', 'LIN_LTX0A:GPIO_P03MD_LTX0A@IOP0MD', 'DAC1_DA1OUT0:GPIO_P03MD_DA1OUT0@IOP0MD', 'LED_LED3:GPIO_P03MD_LED3@IOP0MD'] }, + { f: ['P0.4', 'GPIO:GPIO_P04MD_GPIO@IOP0MD', 'TM00IOB:GPIO_P04MD_TM00IOB@IOP0MD', 'TM02IOB:GPIO_P04MD_TM02IOB@IOP0MD', 'TM11IOA:GPIO_P04MD_TM11IOA@IOP0MD', 'SIF0_SBT0A:GPIO_P04MD_SBT0A@IOP0MD', 'LED_LED4:GPIO_P04MD_LED4@IOP0MD'] }, + { f: ['P0.5', 'GPIO:GPIO_P05MD_GPIO@IOP0MD', 'TM12IOA:GPIO_P05MD_TM12IOA@IOP0MD', 'SIF3_SBO3A:GPIO_P05MD_SBO3A@IOP0MD', 'LED_LED5:GPIO_P05MD_LED5@IOP0MD'] }, + { f: ['P0.6', 'GPIO:GPIO_P06MD_GPIO@IOP0MD', 'SIF3_SBI3A:GPIO_P06MD_SBI3A@IOP0MD', 'LED_LED6:GPIO_P06MD_LED6@IOP0MD'] }, + { f: ['P0.7', 'GPIO:GPIO_P07MD_GPIO@IOP0MD', 'SIF3_SBT3A:GPIO_P07MD_SBT3A@IOP0MD', 'DAC1_DA1OUT0:GPIO_P07MD_DA1OUT0@IOP0MD', 'LED_LED7:GPIO_P07MD_LED7@IOP0MD'] }, + + { f: ['P1.0', 'GPIO:GPIO_P10MD_GPIO@IOP1MD', 'TM00IOC:GPIO_P10MD_TM00IOC@IOP1MD', 'AN20:GPIO_P10MD_AN20@IOP1MD'] }, + { f: ['P1.1', 'GPIO:GPIO_P11MD_GPIO@IOP1MD', 'TM02IOC:GPIO_P11MD_TM02IOC@IOP1MD', 'AN21:GPIO_P11MD_AN21@IOP1MD'] }, + { f: ['P1.2', 'GPIO:GPIO_P12MD_GPIO@IOP1MD', 'TM01IOC:GPIO_P12MD_TM01IOC@IOP1MD', 'AN22:GPIO_P12MD_AN22@IOP1MD'] }, + { f: ['P1.3', 'GPIO:GPIO_P13MD_GPIO@IOP1MD', 'TM03IOC:GPIO_P13MD_TM03IOC@IOP1MD', 'AN23:GPIO_P13MD_AN23@IOP1MD'] }, + { f: ['P1.4', 'GPIO:GPIO_P14MD_GPIO@IOP1MD', 'TM04IOC:GPIO_P14MD_TM04IOC@IOP1MD'] }, + { f: ['P1.5', 'GPIO:GPIO_P15MD_GPIO@IOP1MD', 'TM07IOC:GPIO_P15MD_TM07IOC@IOP1MD', 'BUZZERB:GPIO_P15MD_BUZZERB@IOP1MD'] }, + { f: ['P1.6', 'GPIO:GPIO_P16MD_GPIO@IOP1MD', 'TM08IOC:GPIO_P16MD_TM08IOC@IOP1MD', 'NBUZZERB:GPIO_P16MD_NBUZZERB@IOP1MD', 'SBC2B:GPIO_P16MD_SBC2B@IOP1MD'] }, + + { f: ['P2.0', 'GPIO:GPIO_P20MD_GPIO@IOP2MD', 'SIF3_SBC3A:GPIO_P20MD_SBC3A@IOP2MD', 'SIF3_SBI3A:GPIO_P20MD_SBI3A@IOP2MD', 'SIF8_SCL8:GPIO_P20MD_SCL8@IOP2MD', 'IRQ0A:GPIO_P20MD_IRQ0A@IOP2MD'] }, + { f: ['P2.1', 'GPIO:GPIO_P21MD_GPIO@IOP2MD', 'SIF3_SBT3A:GPIO_P21MD_SBT3A@IOP2MD', 'SIF8_SDA8:GPIO_P21MD_SDA8@IOP2MD', 'IRQ1A:GPIO_P21MD_IRQ1A@IOP2MD'] }, + { f: ['P2.2', 'GPIO:GPIO_P22MD_GPIO@IOP2MD', 'SIF3_SBC3A:GPIO_P22MD_SBC3A@IOP2MD', 'IRQ2A:GPIO_P22MD_IRQ2A@IOP2MD'] }, + { f: ['P2.3', 'GPIO:GPIO_P23MD_GPIO@IOP2MD', 'TM13IOA:GPIO_P23MD_TM13IOA@IOP2MD', 'IRQ3A:GPIO_P23MD_IRQ3A@IOP2MD'] }, + { f: ['P2.4', 'GPIO:GPIO_P24MD_GPIO@IOP2MD', 'TM14IOA:GPIO_P24MD_TM14IOA@IOP2MD', 'IRQ4A:GPIO_P24MD_IRQ4A@IOP2MD'] }, + { f: ['P2.5', 'GPIO:GPIO_P25MD_GPIO@IOP2MD', 'OSCI:GPIO_P25MD_OSC1@IOP2MD'] }, + { f: ['P2.6', 'GPIO:GPIO_P26MD_GPIO@IOP2MD', 'OSCO:GPIO_P26MD_OSC2@IOP2MD'] }, + + { f: ['P3.0', 'GPIO:GPIO_P30MD_GPIO@IOP3MD', 'SBO2B:GPIO_P30MD_SBO2B@IOP3MD'] }, + { f: ['P3.1', 'GPIO:GPIO_P31MD_GPIO@IOP3MD', 'SBI2B:GPIO_P31MD_SBI2B@IOP3MD'] }, + { f: ['P3.2', 'GPIO:GPIO_P32MD_GPIO@IOP3MD', 'SIF4_SBC4B:GPIO_P32MD_SBC4B@IOP3MD', 'SBT2B:GPIO_P32MD_SBT2B@IOP3MD'] }, + { f: ['P3.3', 'GPIO:GPIO_P33MD_GPIO@IOP3MD', 'SIF4_SBO4B:GPIO_P33MD_SBO4B@IOP3MD', 'SIF6_SDA6B:GPIO_P33MD_SDA6B@IOP3MD', 'AN15:GPIO_P33MD_AN15@IOP3MD'] }, + { f: ['P3.4', 'GPIO:GPIO_P34MD_GPIO@IOP3MD', 'SIF4_SBT4B:GPIO_P34MD_SBT4B@IOP3MD', 'SIF6_SCL6B:GPIO_P34MD_SCL6B@IOP3MD'] }, + { f: ['P3.5', 'GPIO:GPIO_P35MD_GPIO@IOP3MD', 'SIF4_SBI4B:GPIO_P35MD_SBI4B@IOP3MD', 'DAC0_DA0OUT0:GPIO_P35MD_DA0OUT0@IOP3MD'] }, + { f: ['P3.6', 'GPIO:GPIO_P36MD_GPIO@IOP3MD', 'SBC3B:GPIO_P36MD_SBC3B@IOP3MD'] }, + + { f: ['P4.0', 'GPIO:GPIO_P40MD_GPIO@IOP4MD', 'SBO3B:GPIO_P40MD_SBO3B@IOP4MD'] }, + { f: ['P4.1', 'GPIO:GPIO_P41MD_GPIO@IOP4MD', 'SBI3B:GPIO_P41MD_SBI3B@IOP4MD'] }, + { f: ['P4.2', 'GPIO:GPIO_P42MD_GPIO@IOP4MD', 'SBT3B:GPIO_P42MD_SBT3B@IOP4MD'] }, + { f: ['P4.3', 'GPIO:GPIO_P43MD_GPIO@IOP4MD', 'SIF0_SBO0B:GPIO_P43MD_SBO0B@IOP4MD', 'LIN_LTX0B:GPIO_P43MD_LTX0B@IOP4MD'] }, + { f: ['P4.4', 'GPIO:GPIO_P44MD_GPIO@IOP4MD', 'SIF0_SBI0B:GPIO_P44MD_SBI0B@IOP4MD', 'LIN_LRX0B:GPIO_P44MD_LRX0B@IOP4MD'] }, + { f: ['P4.5', 'GPIO:GPIO_P45MD_GPIO@IOP4MD', 'SIF0_SBT0B:GPIO_P45MD_SBT0B@IOP4MD'] }, + { f: ['P4.6', 'GPIO:GPIO_P46MD_GPIO@IOP4MD'] }, + { f: ['P4.7', 'GPIO:GPIO_P47MD_GPIO@IOP4MD'] }, + + { f: ['P5.0', 'GPIO:GPIO_P50MD_GPIO@IOP5MD', 'TM07OUT0:GPIO_P50MD_TM07OUT0@IOP5MD', 'SIF1_SBO1A:GPIO_P50MD_SBO1A@IOP5MD', 'CMP1_CMPIN1B:GPIO_P50MD_CMPIN1B@IOP5MD'] }, + { f: ['P5.1', 'GPIO:GPIO_P51MD_GPIO@IOP5MD', 'TM07OUT1:GPIO_P51MD_TM07OUT1@IOP5MD', 'SIF1_SBI1A:GPIO_P51MD_SBI1A@IOP5MD', 'CMP1_CMPREF1B:GPIO_P51MD_CMPREF1B@IOP5MD'] }, + { f: ['P5.2', 'GPIO:GPIO_P52MD_GPIO@IOP5MD', 'TM07OUT2:GPIO_P52MD_TM07OUT2@IOP5MD', 'SIF1_SBT1A:GPIO_P52MD_SBT1A@IOP5MD'] }, + { f: ['P5.3', 'GPIO:GPIO_P53MD_GPIO@IOP5MD', 'TM07OUT3:GPIO_P53MD_TM07OUT3@IOP5MD', 'SIF1_SBC1A:GPIO_P53MD_SBC1A@IOP5MD'] }, + { f: ['P5.4', 'GPIO:GPIO_P54MD_GPIO@IOP5MD', 'TM07OUT4:GPIO_P54MD_TM07OUT4@IOP5MD'] }, + { f: ['P5.5', 'GPIO:GPIO_P55MD_GPIO@IOP5MD', 'TM07OUT5:GPIO_P55MD_TM07OUT5@IOP5MD', 'AN11:GPIO_P55MD_AN11@IOP5MD'] }, + { f: ['P5.6', 'GPIO:GPIO_P56MD_GPIO@IOP5MD', 'BZ_NBUZZERA:GPIO_P56MD_NBUZZERA@IOP5MD', 'AN10:GPIO_P56MD_AN10@IOP5MD', 'DAC0_DA0OUT0:GPIO_P56MD_DA0OUT0@IOP5MD'] }, + { f: ['P5.7', 'GPIO:GPIO_P57MD_GPIO@IOP5MD', 'BZ_BUZZERA:GPIO_P57MD_BUZZERA@IOP5MD', 'AN9:GPIO_P57MD_AN9@IOP5MD'] }, + + { f: ['P6.1', 'GPIO:GPIO_P61MD_GPIO@IOP6MD', 'DAC1_DA1OUT1:GPIO_P61MD_DA1OUT1@IOP6MD'] }, + { f: ['P6.2', 'GPIO:GPIO_P62MD_GPIO@IOP6MD', 'TM01IOB:GPIO_P62MD_TM01IOB@IOP6MD', 'CMP1_CMPREF1A:GPIO_P62MD_CMPREF1A@IOP6MD'] }, + { f: ['P6.3', 'GPIO:GPIO_P63MD_GPIO@IOP6MD', 'TM03IOB:GPIO_P63MD_TM03IOB@IOP6MD', 'CMP1_CMPIN1A:GPIO_P63MD_CMPIN1A@IOP6MD'] }, + { f: ['P6.4', 'GPIO:GPIO_P64MD_GPIO@IOP6MD', 'TM04IOB:GPIO_P64MD_TM04IOB@IOP6MD', 'SIF2_SBC2A:GPIO_P64MD_SBC2A@IOP6MD', 'CMP1_CMPOT1:GPIO_P64MD_CMPOT1@IOP6MD'] }, + { f: ['P6.5', 'GPIO:GPIO_P65MD_GPIO@IOP6MD', 'SIF2_SBO2A:GPIO_P65MD_SBO2A@IOP6MD'] }, + { f: ['P6.6', 'GPIO:GPIO_P66MD_GPIO@IOP6MD', 'SIF2_SBI2A:GPIO_P66MD_SBI2A@IOP6MD'] }, + { f: ['P6.7', 'GPIO:GPIO_P67MD_GPIO@IOP6MD', 'SIF2_SBT2A:GPIO_P67MD_SBT2A@IOP6MD'] }, + + { f: ['P7.0', 'GPIO:GPIO_P70MD_GPIO@IOP7MD', 'SIF4_SBI4A:GPIO_P70MD_SBI4A@IOP7MD', 'CMP1_CMPREF1B:GPIO_P70MD_CMPREF1B@IOP7MD', 'KEY0:GPIO_P70MD_KEY0@IOP7MD'] }, + { f: ['P7.1', 'GPIO:GPIO_P71MD_GPIO@IOP7MD', 'SIF4_SBO4A:GPIO_P71MD_SBO4A@IOP7MD', 'SIF6_SDA6A:GPIO_P71MD_SDA6A@IOP7MD', 'CMP1_CMPIN1B:GPIO_P71MD_CMPIN1B@IOP7MD', 'KEY1:GPIO_P71MD_KEY1@IOP7MD'] }, + { f: ['P7.2', 'GPIO:GPIO_P72MD_GPIO@IOP7MD', 'SIF4_SBT4A:GPIO_P72MD_SBT4A@IOP7MD', 'SIF6_SCL6A:GPIO_P72MD_SCL6A@IOP7MD', 'DAC1_DA1OUT1:GPIO_P72MD_DA1OUT1@IOP7MD', 'KEY2:GPIO_P72MD_KEY2@IOP7MD'] }, + { f: ['P7.3', 'GPIO:GPIO_P73MD_GPIO@IOP7MD', 'TM13IOB:GPIO_P73MD_TM13IOB@IOP7MD', 'SIF4_SBC4A:GPIO_P73MD_SBC4A@IOP7MD', 'SIF7_SDA7A:GPIO_P73MD_SDA7A@IOP7MD', 'CMP1_CMPREF1B:GPIO_P73MD_CMPREF1B@IOP7MD', 'CMP1_CMPREF1A:GPIO_P73MD_CMPREF1A@IOP7MD', 'KEY3:GPIO_P73MD_KEY3@IOP7MD'] }, + { f: ['P7.4', 'GPIO:GPIO_P74MD_GPIO@IOP7MD', 'TM14IOB:GPIO_P74MD_TM14IOB@IOP7MD', 'SIF1_SBC1B:GPIO_P74MD_SBC1B@IOP7MD', 'SIF7_SCL7A:GPIO_P74MD_SCL7A@IOP7MD', 'CMP1_CMPIN1B:GPIO_P74MD_CMPIN1B@IOP7MD', 'CMP1_CMPIN1A:GPIO_P74MD_CMPIN1A@IOP7MD', 'KEY4:GPIO_P74MD_KEY4@IOP7MD'] }, + { f: ['P7.5', 'GPIO:GPIO_P75MD_GPIO@IOP7MD', 'SIF1_SBO1B:GPIO_P75MD_SBO1B@IOP7MD', 'DAC1_DA1OUT1:GPIO_P75MD_DA1OUT1@IOP7MD', 'CMP1_CMPOT1:GPIO_P75MD_CMPOT1@IOP7MD', 'KEY5:GPIO_P75MD_KEY5@IOP7MD'] }, + { f: ['P7.6', 'GPIO:GPIO_P76MD_GPIO@IOP7MD', 'SIF1_SBI1B:GPIO_P76MD_SBI1B@IOP7MD', 'CMP1_CMPREF1A:GPIO_P76MD_CMPREF1A@IOP7MD', 'KEY6:GPIO_P76MD_KEY6@IOP7MD'] }, + { f: ['P7.7', 'GPIO:GPIO_P77MD_GPIO@IOP7MD', 'SIF1_SBT1B:GPIO_P77MD_SBT1B@IOP7MD', 'CMP1_CMPIN1A:GPIO_P77MD_CMPIN1A@IOP7MD', 'KEY7:GPIO_P77MD_KEY7@IOP7MD'] }, + + { f: ['P8.0', 'GPIO:GPIO_P80MD_GPIO@IOP8MD', 'SDO0:GPIO_P80MD_SDO0@IOP8MD', 'PWM0_PWM0A:GPIO_P80MD_PWM0A@IOP8MD', 'CMP1_CMPOT1:GPIO_P80MD_CMPOT1@IOP8MD'] }, + { f: ['P8.1', 'GPIO:GPIO_P81MD_GPIO@IOP8MD', 'SDO1:GPIO_P81MD_SDO1@IOP8MD', 'PWM0_NPWM0A:GPIO_P81MD_NPWM0A@IOP8MD'] }, + { f: ['P8.2', 'GPIO:GPIO_P82MD_GPIO@IOP8MD', 'SDO2:GPIO_P82MD_SDO2@IOP8MD', 'PWM0_PWM1A:GPIO_P82MD_PWM1A@IOP8MD'] }, + { f: ['P8.3', 'GPIO:GPIO_P83MD_GPIO@IOP8MD', 'SDO3:GPIO_P83MD_SDO3@IOP8MD', 'PWM0_NPWM1A:GPIO_P83MD_NPWM1A@IOP8MD'] }, + { f: ['P8.4', 'GPIO:GPIO_P84MD_GPIO@IOP8MD', 'SDO4:GPIO_P84MD_SDO4@IOP8MD', 'PWM0_PWM2A:GPIO_P84MD_PWM2A@IOP8MD'] }, + { f: ['P8.5', 'GPIO:GPIO_P85MD_GPIO@IOP8MD', 'SDO5:GPIO_P85MD_SDO5@IOP8MD', 'PWM0_NPWM2A:GPIO_P85MD_NPWM2A@IOP8MD'] }, + { f: ['P8.6', 'GPIO:GPIO_P86MD_GPIO@IOP8MD', 'SDO6:GPIO_P86MD_SDO6@IOP8MD', 'PWM0_PWMBCSTA:GPIO_P86MD_PWMBCSTA@IOP8MD'] }, + { f: ['P8.7', 'GPIO:GPIO_P87MD_GPIO@IOP8MD', 'SDO7:GPIO_P87MD_SDO7@IOP8MD', 'TM15IOC:GPIO_P87MD_TM15IOC@IOP8MD'] }, + + { f: ['P9.0', 'GPIO:GPIO_P90MD_GPIO@IOP9MD', 'XI:GPIO_P90MD_XI@IOP9MD'] }, + { f: ['P9.1', 'GPIO:GPIO_P91MD_GPIO@IOP9MD', 'XO:GPIO_P91MD_XO@IOP9MD'] }, + { f: ['P9.2', 'GPIO:GPIO_P92MD_GPIO@IOP9MD', 'SIF4_SBC4B:GPIO_P92MD_SBC4B@IOP9MD', 'AN19:GPIO_P92MD_AN19@IOP9MD', 'AN14:GPIO_P92MD_AN14@IOP9MD'] }, + { f: ['P9.3', 'GPIO:GPIO_P93MD_GPIO@IOP9MD', 'AN18:GPIO_P93MD_AN18@IOP9MD', 'AN13:GPIO_P93MD_AN13@IOP9MD'] }, + { f: ['P9.4', 'GPIO:GPIO_P94MD_GPIO@IOP9MD', 'AN17:GPIO_P94MD_AN17@IOP9MD', 'DAC0_DA0OUT0:GPIO_P94MD_DA0OUT0@IOP9MD', 'AN12:GPIO_P94MD_AN12@IOP9MD', 'AN8:GPIO_P94MD_AN8@IOP9MD', 'DAC0_DA0OUT1:GPIO_P94MD_DA0OUT1@IOP9MD', 'CMP0_CMPREF0B:GPIO_P94MD_CMPREF0B@IOP9MD'] }, + { f: ['P9.5', 'GPIO:GPIO_P95MD_GPIO@IOP9MD', 'AN16:GPIO_P95MD_AN16@IOP9MD', 'DAC0_DA0OUT1:GPIO_P95MD_DA0OUT1@IOP9MD'] }, + + { f: ['PA.0', 'GPIO:GPIO_PA0MD_GPIO@IOPAMD', 'TM00IOA:GPIO_PA0MD_TM00IOA@IOPAMD', 'TM00IOA_64:GPIO_PA0MD_TM00IOA_64@IOPAMD', 'TM15IOA:GPIO_PA0MD_TM15IOA@IOPAMD', 'AN0:GPIO_PA0MD_AN0@IOPAMD'] }, + { f: ['PA.1', 'GPIO:GPIO_PA1MD_GPIO@IOPAMD', 'TM01IOA:GPIO_PA1MD_TM01IOA@IOPAMD', 'TM01IOA_64:GPIO_PA1MD_TM01IOA_64@IOPAMD', 'TM11IOB:GPIO_PA1MD_TM11IOB@IOPAMD', 'AN1:GPIO_PA1MD_AN1@IOPAMD'] }, + { f: ['PA.2', 'GPIO:GPIO_PA2MD_GPIO@IOPAMD', 'TM02IOA:GPIO_PA2MD_TM02IOA@IOPAMD', 'TM02IOA_64:GPIO_PA2MD_TM02IOA_64@IOPAMD', 'TM12IOB:GPIO_PA2MD_TM12IOB@IOPAMD', 'AN2:GPIO_PA2MD_AN2@IOPAMD', 'DAC0_DA0OUT1:GPIO_PA2MD_DA0OUT1@IOPAMD', 'CMP0_CMPREF0B:GPIO_PA2MD_CMPREF0B@IOPAMD'] }, + { f: ['PA.3', 'GPIO:GPIO_PA3MD_GPIO@IOPAMD', 'TM03IOA:GPIO_PA3MD_TM03IOA@IOPAMD', 'TM03IOA_64:GPIO_PA3MD_TM03IOA_64@IOPAMD', 'AN3:GPIO_PA3MD_AN3@IOPAMD', 'CMP0_CMPIN0B:GPIO_PA3MD_CMPIN0B@IOPAMD'] }, + { f: ['PA.4', 'GPIO:GPIO_PA4MD_GPIO@IOPAMD', 'TM04IOA:GPIO_PA4MD_TM04IOA@IOPAMD', 'SIF5_SBI5:GPIO_PA4MD_SBI5@IOPAMD', 'AN4:GPIO_PA4MD_AN4@IOPAMD', 'CMP0_CMPREF0A:GPIO_PA4MD_CMPREF0A@IOPAMD'] }, + { f: ['PA.5', 'GPIO:GPIO_PA5MD_GPIO@IOPAMD', 'TM07IOA:GPIO_PA5MD_TM07IOA@IOPAMD', 'SIF5_SBO5:GPIO_PA5MD_SBO5@IOPAMD', 'AN5:GPIO_PA5MD_AN5@IOPAMD', 'CMP0_CMPIN0A:GPIO_PA5MD_CMPIN0A@IOPAMD'] }, + { f: ['PA.6', 'GPIO:GPIO_PA6MD_GPIO@IOPAMD', 'TM08IOA:GPIO_PA6MD_TM08IOA@IOPAMD', 'TM10IOA:GPIO_PA6MD_TM10IOA@IOPAMD', 'SIF5_SBT5:GPIO_PA6MD_SBT5@IOPAMD', 'AN6:GPIO_PA6MD_AN6@IOPAMD', 'CMP0_CMPOT0:GPIO_PA6MD_CMPOT0@IOPAMD'] }, + { f: ['PA.7', 'GPIO:GPIO_PA7MD_GPIO@IOPAMD', 'MONITOR:GPIO_PA7MD_MONITOR@IOPAMD', 'TM09IOA:GPIO_PA7MD_TM09IOA@IOPAMD', 'SIF5_SBC5:GPIO_PA7MD_SBC5@IOPAMD', 'AN7:GPIO_PA7MD_AN7@IOPAMD'] }, + + { f: ['PB.0', 'GPIO:GPIO_PB0MD_GPIO@IOPBMD', 'AN8:GPIO_PB0MD_AN8@IOPBMD'] }, + { f: ['PB.1', 'GPIO:GPIO_PB1MD_GPIO@IOPBMD', 'AN9:GPIO_PB1MD_AN9@IOPBMD'] }, + { f: ['PB.2', 'GPIO:GPIO_PB2MD_GPIO@IOPBMD', 'AN10:GPIO_PB2MD_AN10@IOPBMD'] }, + { f: ['PB.3', 'GPIO:GPIO_PB3MD_GPIO@IOPBMD', 'AN11:GPIO_PB3MD_AN11@IOPBMD', 'CMP0_CMPIN0B:GPIO_PB3MD_CMPIN0B@IOPBMD'] }, + { f: ['PB.4', 'GPIO:GPIO_PB4MD_GPIO@IOPBMD', 'AN12:GPIO_PB4MD_AN12@IOPBMD', 'CMP0_CMPREF0B:GPIO_PB4MD_CMPREF0B@IOPBMD'] }, + { f: ['PB.5', 'GPIO:GPIO_PB5MD_GPIO@IOPBMD', 'AN13:GPIO_PB5MD_AN13@IOPBMD'] }, + { f: ['PB.6', 'GPIO:GPIO_PB6MD_GPIO@IOPBMD', 'AN14:GPIO_PB6MD_AN14@IOPBMD'] }, + { f: ['PB.7', 'GPIO:GPIO_PB7MD_GPIO@IOPBMD', 'AN15:GPIO_PB7MD_AN15@IOPBMD'] } +]; + +NUTOOL_PIN.g_cfg_gpiosDescriptions = [ + 'LED_LED7:LED output pin', + 'LED_LED6:LED output pin', + 'LED_LED5:LED output pin', + 'LED_LED4:LED output pin', + 'LED_LED3:LED output pin', + 'LED_LED2:LED output pin', + 'LED_LED1:LED output pin', + 'LED_LED0:LED output pin', + 'DAC1_DA1OUT1:D/A converter 1 output pin', + 'DAC1_DA1OUT0:D/A converter 1 output pin', + 'DAC0_DA0OUT1:D/A converter 0 output pin', + 'DAC0_DA0OUT0:D/A converter 0 output pin', + 'CMP1_CMPOT1:Comparator 1 output pin', + 'CMP0_CMPOT0:Comparator 0 output pin', + 'CMP1_CMPREF1B:Comparator 1B reference input pin', + 'CMP1_CMPREF1A:Comparator 1A reference input pin', + 'CMP1_CMPIN1B:Comparator 1B input pin', + 'CMP1_CMPIN1A:Comparator 1A input pin', + 'CMP0_CMPREF0B:Comparator 0B reference input pin', + 'CMP0_CMPREF0A:Comparator 0A reference input pin', + 'CMP0_CMPIN0B:Comparator 0B input pin', + 'CMP0_CMPIN0A:Comparator 0A input pin', + 'AN23:A/D converter analog input 23 pin', + 'AN22:A/D converter analog input 22 pin', + 'AN21:A/D converter analog input 21 pin', + 'AN20:A/D converter analog input 20 pin', + 'AN19:A/D converter analog input 19 pin', + 'AN18:A/D converter analog input 18 pin', + 'AN17:A/D converter analog input 17 pin', + 'AN16:A/D converter analog input 16 pin', + 'AN15:A/D converter analog input 15 pin', + 'AN14:A/D converter analog input 14 pin', + 'AN13:A/D converter analog input 13 pin', + 'AN12:A/D converter analog input 12 pin', + 'AN11:A/D converter analog input 11 pin', + 'AN10:A/D converter analog input 10 pin', + 'AN9:A/D converter analog input 09 pin', + 'AN8:A/D converter analog input 08 pin', + 'AN7:A/D converter analog input 07 pin', + 'AN6:A/D converter analog input 06 pin', + 'AN5:A/D converter analog input 05 pin', + 'AN4:A/D converter analog input 04 pin', + 'AN3:A/D converter analog input 03 pin', + 'AN2:A/D converter analog input 02 pin', + 'AN1:A/D converter analog input 01 pin', + 'AN0:A/D converter analog input 00 pin', + 'LIN_LTX0B:LTX clock input/output pin', + 'LIN_LRX0B:LRX clock input/output pin', + 'LIN_LTX0A:LTX clock input/output pin', + 'LIN_LRX0A:LRX clock input/output pin', + 'SIF8_SDA8:I2C5 clock input/output pin', + 'SIF8_SCL8:I2C5 clock input/output pin', + 'SIF7_SDA7B:I2C5 clock input/output pin', + 'SIF7_SCL7B:I2C5 clock input/output pin', + 'SIF7_SDA7A:I2C5 clock input/output pin', + 'SIF7_SCL7A:I2C5 clock input/output pin', + 'SIF6_SDA6B:I2C5 clock input/output pin', + 'SIF6_SCL6B:I2C5 clock input/output pin', + 'SIF6_SDA6A:I2C5 clock input/output pin', + 'SIF6_SCL6A:I2C5 clock input/output pin', + 'SIF5_SBT5:SIF5 clock input/output pin', + 'SIF5_SBO5:SIF5 data input/output pin', + 'SIF5_SBI5:SIF5 data input pin', + 'SIF5_SBC5:SIF5 chip select input/output pin', + 'SIF4_SBT4B:SIF4 clock input/output pin', + 'SIF4_SBO4B:SIF4 data input/output pin', + 'SIF4_SBI4B:SIF4 data input pin', + 'SIF4_SBC4B:SIF4 chip select input/output pin', + 'SIF4_SBT4A:SIF4 clock input/output pin', + 'SIF4_SBO4A:SIF4 data input/output pin', + 'SIF4_SBI4A:SIF4 data input pin', + 'SIF4_SBC4A:SIF4 chip select input/output pin', + 'SIF3_SBT3B:SIF3 clock input/output pin', + 'SIF3_SBO3B:SIF3 data input/output pin', + 'SIF3_SBI3B:SIF3 data input pin', + 'SIF3_SBC3B:SIF3 chip select input/output pin', + 'SIF3_SBT3A:SIF3 clock input/output pin', + 'SIF3_SBO3A:SIF3 data input/output pin', + 'SIF3_SBI3A:SIF3 data input pin', + 'SIF3_SBC3A:SIF3 chip select input/output pin', + 'SIF2_SBT2B:SIF2 clock input/output pin', + 'SIF2_SBO2B:SIF2 data input/output pin', + 'SIF2_SBI2B:SIF2 data input pin', + 'SIF2_SBC2B:SIF2 chip select input/output pin', + 'SIF2_SBT2A:SIF2 clock input/output pin', + 'SIF2_SBO2A:SIF2 data input/output pin', + 'SIF2_SBI2A:SIF2 data input pin', + 'SIF2_SBC2A:SIF2 chip select input/output pin', + 'SIF1_SBT1B:SIF1 clock input/output pin', + 'SIF1_SBO1B:SIF1 data input/output pin', + 'SIF1_SBI1B:SIF1 data input pin', + 'SIF1_SBC1B:SIF1 chip select input/output pin', + 'SIF1_SBT1A:SIF1 clock input/output pin', + 'SIF1_SBO1A:SIF1 data input/output pin', + 'SIF1_SBI1A:SIF1 data input pin', + 'SIF1_SBC1A:SIF1 chip select input/output pin', + 'SIF0_SBT0B:SIF0 clock input/output pin', + 'SIF0_SBO0B:SIF0 data input/output pin', + 'SIF0_SBI0B:SIF0 data input pin', + 'SIF0_SBT0A:SIF0 clock input/output pin', + 'SIF0_SBO0A:SIF0 data input/output pin', + 'SIF0_SBI0A:SIF0 data input pin', + 'BZ_BUZZERB:BUZZER output pin B', + 'BZ_NBUZZERB:NBUZZER output pin B', + 'BZ_BUZZERA:BUZZER output pin A', + 'BZ_NBUZZERA:NBUZZER output pin A', + "PWM0_PWMBCSTA:GPWM's Binary Counter Status", + 'PWM0_NPWM2A:NGPWM2A output pin', + 'PWM0_PWM2A:GPWM2A output pin', + 'PWM0_NPWM1A:NGPWM1A output pin', + 'PWM0_PWM1A:GPWM1A output pin', + 'PWM0_NPWM0A:NGPWM0A output pin', + 'PWM0_PWM0A:GPWM0A output pin', + 'TM15IOC:Timer 15 input/output pin C', + 'TM15IOB:Timer 15 input/output pin B', + 'TM15IOA:Timer 15 input/output pin A', + 'TM14IOB:Timer 14 input/output pin B', + 'TM14IOA:Timer 14 input/output pin A', + 'TM13IOB:Timer 13 input/output pin B', + 'TM13IOA:Timer 13 input/output pin A', + 'TM12IOB:Timer 12 input/output pin B', + 'TM12IOA:Timer 12 input/output pin A', + 'TM11IOB:Timer 11 input/output pin B', + 'TM11IOA:Timer 11 input/output pin A', + 'TM10IOB:Timer 10 input/output pin B', + 'TM10IOA:Timer 10 input/output pin A', + 'TM09IOB:Timer 9 input/output pin B', + 'TM09IOA:Timer 9 input/output pin A', + 'SDO7:Timer 8 synchronous output 7', + 'SDO6:Timer 8 synchronous output 6', + 'SDO5:Timer 8 synchronous output 5', + 'SDO4:Timer 8 synchronous output 4', + 'SDO3:Timer 8 synchronous output 3', + 'SDO2:Timer 8 synchronous output 2', + 'SDO1:Timer 8 synchronous output 1', + 'SDO0:Timer 8 synchronous output 0', + 'TM08IOC:Timer 8 input/output pin C', + 'TM08IOB:Timer 8 input/output pin B', + 'TM08IOA:Timer 8 input/output pin A', + 'TM07OUT5:Timer 7 output pin 5', + 'TM07OUT4:Timer 7 output pin 4', + 'TM07OUT3:Timer 7 output pin 3', + 'TM07OUT2:Timer 7 output pin 2', + 'TM07OUT1:Timer 7 output pin 1', + 'TM07OUT0:Timer 7 output pin 0', + 'TM07IOC:Timer 7 input/output pin C', + 'TM07IOB:Timer 7 input/output pin B', + 'TM07IOA:Timer 7 input/output pin A', + 'TM04IOC:Timer 4 input/output pin C', + 'TM04IOB:Timer 4 input/output pin B', + 'TM04IOA:Timer 4 input/output pin A', + 'TM03IOC:Timer 3 input/output pin C', + 'TM03IOB:Timer 3 input/output pin B', + 'TM03IOA:Timer 3 input/output pin A', + 'TM02IOC:Timer 2 input/output pin C', + 'TM02IOB:Timer 2 input/output pin B', + 'TM02IOA:Timer 2 input/output pin A', + 'TM01IOC:Timer 1 input/output pin C', + 'TM01IOB:Timer 1 input/output pin B', + 'TM01IOA:Timer 1 input/output pin A', + 'TM00IOC:Timer 0 input/output pin C', + 'TM00IOB:Timer 0 input/output pin B', + 'TM00IOA:Timer 0 input/output pin A', + 'KEY7:KEY interrupt 7', + 'KEY6:KEY interrupt 6', + 'KEY5:KEY interrupt 5', + 'KEY4:KEY interrupt 4', + 'KEY3:KEY interrupt 3', + 'KEY2:KEY interrupt 2', + 'KEY1:KEY interrupt 1', + 'KEY0:KEY interrupt 0', + 'IRQ4A:External interrupt 4', + 'IRQ3A:External interrupt 3', + 'IRQ2A:External interrupt 2', + 'IRQ1A:External interrupt 1', + 'IRQ0A:External interrupt 0', + 'XO:External clock output', + 'XI:External clock input', + 'OSCO:External clock output', + 'OSCI:External clock input', + 'MONOUT:Monitor output pin', + 'DBG_SWDD:Debug data input/output pin', + 'DBG_SWDCLK:Debug clock input pin', +]; + +NUTOOL_PIN.g_cfg_regDescriptions = {}; +NUTOOL_PIN.g_cfg_regDescriptions.IOP0MD = '0x40004200'; +NUTOOL_PIN.g_cfg_regDescriptions.IOP1MD = '0x40004210'; +NUTOOL_PIN.g_cfg_regDescriptions.IOP2MD = '0x40004220'; +NUTOOL_PIN.g_cfg_regDescriptions.IOP3MD = '0x40004230'; +NUTOOL_PIN.g_cfg_regDescriptions.IOP4MD = '0x40004240'; +NUTOOL_PIN.g_cfg_regDescriptions.IOP5MD = '0x40004250'; +NUTOOL_PIN.g_cfg_regDescriptions.IOP6MD = '0x40004260'; +NUTOOL_PIN.g_cfg_regDescriptions.IOP7MD = '0x40004270'; +NUTOOL_PIN.g_cfg_regDescriptions.IOP8MD = '0x40004280'; +NUTOOL_PIN.g_cfg_regDescriptions.IOP9MD = '0x40004290'; +NUTOOL_PIN.g_cfg_regDescriptions.IOPAMD = '0x400042A0'; +NUTOOL_PIN.g_cfg_regDescriptions.IOPBMD = '0x400042B0'; + +NUTOOL_PIN.g_cfg_unusedGPIO = { + 'KM1M0DF02N/K(LQFP100_D0x(14*14))': { + 'ALL': [] + }, + 'KM1M0DF03N/K(LQFP80_D0x(12*12))': { + 'ALL': [] + }, + 'KM1M0DF13N/K(LQFP80_D1x(12*12))': { + 'ALL': [] + }, + 'KM1M0DF04N/K(TQFP64_D0x(10*10))': { + 'ALL': [] + } +}; + +NUTOOL_PIN.g_cfg_OrCAD = { + "LQFP80_D0x(14*14)": [ + '', '', '', '', '', '', '', '', '', '', + '', '', '', '', '', '', '', '', '', '', + '', '', '', '', '', '', '', '', '', '', + '', '', '', '', '', '', '', '', '', '', + '', '', '', '', '', '', '', '', '', '', + '', '', '', '', '', '', '', '', '', '', + '', '', '', '', '', '', '', '', '', '', + '', '', '', '', '', '', '', '', '', '' + ], + "LQFP80_D0x(12*12)": [ + '', '', '', '', '', '', '', '', '', '', + '', '', '', '', '', '', '', '', '', '', + '', '', '', '', '', '', '', '', '', '', + '', '', '', '', '', '', '', '', '', '', + '', '', '', '', '', '', '', '', '', '', + '', '', '', '', '', '', '', '', '', '', + '', '', '', '', '', '', '', '', '', '', + '', '', '', '', '', '', '', '', '', '' + ] +}; +NUTOOL_PIN.g_cfg_WPPin = ['P0.0', 'P0.1']; +// [Workaround] Sometime NUTOOL_PIN.g_cfg_WPPin will be reset. +setTimeout(function() { + NUTOOL_PIN.g_cfg_WPPin = ['P0.0', 'P0.1']; +}, 100); + +NUTOOL_PIN.decidepackageNumber = function (given_partNumber_package) { + var partNumber_package; + + if (typeof given_partNumber_package === 'undefined') { + partNumber_package = NUTOOL_PIN.getg_partNumber_package(); + } + else { + partNumber_package = given_partNumber_package; + } + + NUTOOL_PIN.g_packageNumber = partNumber_package.substring(partNumber_package.indexOf('(') + 1); + NUTOOL_PIN.g_packageNumber = NUTOOL_PIN.g_packageNumber.substring(0, NUTOOL_PIN.g_packageNumber.lastIndexOf(')')); + NUTOOL_PIN.g_packageNumberIndex = NUTOOL_PIN.g_packageNumber; + + partNumber_package = null; +}; \ No newline at end of file diff --git a/src/NUC_KM1M0D1F_Content.js b/src/NUC_KM1M0D1F_Content.js new file mode 100644 index 0000000..709e97c --- /dev/null +++ b/src/NUC_KM1M0D1F_Content.js @@ -0,0 +1,485 @@ +NUTOOL_PIN.g_cfg_chips = [ + { name: "KM1M0DF02N/K", pkg: "LQFP100_D0x(14*14)" }, + { name: "KM1M0DF03N/K", pkg: "LQFP80_D0x(12*12)" }, + { name: "KM1M0DF13N/K", pkg: "LQFP80_D1x(12*12)" }, + { name: "KM1M0DF04N/K", pkg: "TQFP64_D0x(10*10)" } +]; + +NUTOOL_PIN.g_cfg_pkgs = { + "LQFP80_D1x(14*14)": [ + 'PA.0', 'PA.1', 'PA.2', 'PA.3', 'PA.4', 'PA.5', 'PA.6', 'PA.7', 'RON', 'BOOT', + 'NDMOD', 'NRST', 'P9.1', 'P9.0', 'VSS', 'P2.5', 'P2.6', 'VDD', 'VOUT12', 'VOUT33', + 'P0.0', 'P0.1', 'P0.2', 'P0.3', 'P0.4', 'P0.5', 'P0.6', 'P2.0', 'P2.1', 'P2.2', + 'P2.3', 'P2.4', 'P1.0', 'P3.3', 'P3.4', 'P3.5', 'P4.3', 'P4.4', 'P4.5', 'P4.6', + 'P4.7', 'P5.7', 'P5.6', 'P5.5', 'P5.4', 'P5.3', 'P5.2', 'P5.1', 'P5.0', 'P6.1', + 'P6.2', 'P6.3', 'P6.4', 'P6.5', 'P6.6', 'P6.7', 'P7.0', 'P7.1', 'P7.2', 'P7.3', + 'P7.4', 'P7.5', 'P7.6', 'P7.7', 'P8.0', 'P8.1', 'P8.2', 'P8.3', 'P8.4', 'P8.5', + 'P8.6', 'P8.7', 'P9.2', 'P9.3', 'P9.4', 'P9.5', 'PB.3', 'PB.2', 'PB.1', 'PB.0' + ], + "LQFP80_D1x(12*12)": [ + 'PA.0', 'PA.1', 'PA.2', 'PA.3', 'PA.4', 'PA.5', 'PA.6', 'PA.7', 'RON', 'BOOT', + 'NDMOD', 'NRST', 'P9.1', 'P9.0', 'VSS', 'P2.5', 'P2.6', 'VDD', 'VOUT12', 'VOUT33', + 'P0.0', 'P0.1', 'P0.2', 'P0.3', 'P0.4', 'P0.5', 'P0.6', 'P2.0', 'P2.1', 'P2.2', + 'P2.3', 'P2.4', 'P1.0', 'P3.3', 'P3.4', 'P3.5', 'P4.3', 'P4.4', 'P4.5', 'P4.6', + 'P4.7', 'P5.7', 'P5.6', 'P5.5', 'P5.4', 'P5.3', 'P5.2', 'P5.1', 'P5.0', 'P6.1', + 'P6.2', 'P6.3', 'P6.4', 'P6.5', 'P6.6', 'P6.7', 'P7.0', 'P7.1', 'P7.2', 'P7.3', + 'P7.4', 'P7.5', 'P7.6', 'P7.7', 'P8.0', 'P8.1', 'P8.2', 'P8.3', 'P8.4', 'P8.5', + 'P8.6', 'P8.7', 'P9.2', 'P9.3', 'P9.4', 'P9.5', 'PB.3', 'PB.2', 'PB.1', 'PB.0' + ] +}; + +NUTOOL_PIN.g_cfg_gpios = [ + { f: ['P0.0:0', 'TM07IOB:1', 'TM10IOB:2', 'SIF1_SBI1A:4', 'LED_LED0:9']}, + { f: ['P0.1:0', 'TM08IOB:1', 'TM09IOB:2', 'SIF1_SBO1A:4', 'LED_LED1:9']}, + { f: ['P0.2:0', 'SIF1_SBT1A:4', 'LED_LED2:9']}, + { f: ['P0.3:0', 'TM00IOB:1', 'TM02IOB:2', 'TM15IOB:3', 'SIF1_SBC1A:4', 'LED_LED3:9']}, + { f: ['P0.4:0', 'TM11IOA:3', 'LED_LED4:9']}, + { f: ['P0.5:0', 'TM12IOA:3', 'SIF3_SBO3A:4', 'LED_LED5:9']}, + { f: ['P0.6:0', 'SIF3_SBI3A:4', 'LED_LED6:9']}, + { f: ['P0.7:0']}, + + { f: ['P1.0:0', 'TM00IOC:1', 'TM15IOC:2', 'SIF4_SBC4B:4']}, + { f: ['P1.1:0']}, + { f: ['P1.2:0']}, + { f: ['P1.3:0']}, + { f: ['P1.4:0']}, + { f: ['P1.5:0']}, + { f: ['P1.6:0']}, + { f: ['P1.7:0']}, + + { f: ['P2.0:0', 'SIF3_SBT3A:4', 'SIF8_SCL8:5', 'DAC1_DA1OUT0:7', 'IRQ0A:10']}, + { f: ['P2.1:0', 'SIF3_SBC3A:4', 'SIF8_SDA8:5', 'IRQ1A:10']}, + { f: ['P2.2:0', 'IRQ2A:10']}, + { f: ['P2.3:0', 'TM13IOA:1', 'IRQ3A:10']}, + { f: ['P2.4:0', 'TM14IOA:1', 'IRQ4A:10']}, + { f: ['P2.5:0', 'OSCI:7']}, + { f: ['P2.6:0', 'OSCO:7']}, + { f: ['P2.7:0']}, + + { f: ['P3.0:0']}, + { f: ['P3.1:0']}, + { f: ['P3.2:0']}, + { f: ['P3.3:0', 'SIF4_SBO4B:4', 'SIF6_SDA6B:5']}, + { f: ['P3.4:0', 'SIF4_SBT4B:4', 'SIF6_SCL6B:5']}, + { f: ['P3.5:0', 'SIF4_SBI4B:4']}, + { f: ['P3.6:0']}, + { f: ['P3.7:0']}, + + { f: ['P4.0:0']}, + { f: ['P4.1:0']}, + { f: ['P4.2:0']}, + { f: ['P4.3:0', 'SIF0_SBO0B:4', 'LIN_LTX0B:4']}, + { f: ['P4.4:0', 'SIF0_SBI0B:4', 'LIN_LRX0B:4']}, + { f: ['P4.5:0', 'SIF0_SBT0B:4']}, + { f: ['P4.6:0', 'SIF7_SDA7B:4']}, + { f: ['P4.7:0', 'SIF7_SCL7B:4']}, + + { f: ['P5.0:0', 'TM07OUT0:1', 'SIF0_SBO0A:4', 'LIN_LTX0A:4', 'CMP1_CMPREF1B:8', 'KEY0:10']}, + { f: ['P5.1:0', 'TM07OUT1:1', 'SIF0_SBI0A:4', 'LIN_LRX0A:4', 'CMP1_CMPIN1B:8', 'KEY1:10']}, + { f: ['P5.2:0', 'TM07OUT2:1', 'SIF0_SBT0A:4', 'DAC1_DA1OUT1:7', 'KEY2:10']}, + { f: ['P5.3:0', 'TM07OUT3:1', 'BZ_BUZZERA:2', 'CMP1_CMPREF1A:8', 'KEY3:10']}, + { f: ['P5.4:0', 'TM07OUT4:1', 'BZ_NBUZZERA:2', 'CMP1_CMPIN1A:8', 'KEY4:10']}, + { f: ['P5.5:0', 'TM07OUT5:1', 'CMP1_CMPOT1:8', 'KEY5:10']}, + { f: ['P5.6:0', 'KEY6:10']}, + { f: ['P5.7:0', 'KEY7:10']}, + + { f: ['P6.0:0']}, + { f: ['P6.1:0']}, + { f: ['P6.2:0', 'TM01IOB:1']}, + { f: ['P6.3:0', 'TM03IOB:1']}, + { f: ['P6.4:0', 'TM04IOB:1', 'SIF4_SBC4A:4']}, + { f: ['P6.5:0', 'SIF4_SBI4A:4']}, + { f: ['P6.6:0', 'SIF4_SBO4A:4', 'SIF6_SDA6A:5']}, + { f: ['P6.7:0', 'SIF4_SBT4A:4', 'SIF6_SCL6A:5']}, + + { f: ['P7.0:0', 'SIF2_SBO2A:4']}, + { f: ['P7.1:0', 'SIF2_SBI2A:4']}, + { f: ['P7.2:0', 'SIF2_SBT2A:4']}, + { f: ['P7.3:0', 'TM13IOB:1', 'SIF2_SBC2A:4', 'SIF7_SDA7A:5']}, + { f: ['P7.4:0', 'TM14IOB:1', 'SIF1_SBC1B:4', 'SIF7_SCL7A:5']}, + { f: ['P7.5:0', 'SIF1_SBO1B:4']}, + { f: ['P7.6:0', 'SIF1_SBI1B:4']}, + { f: ['P7.7:0', 'SIF1_SBT1B:4']}, + + { f: ['P8.0:0', 'SDO0:1', 'PWM0_PWM0A:2']}, + { f: ['P8.1:0', 'SDO1:1', 'PWM0_NPWM0A:2', 'PWM0_PWM1A:2']}, + { f: ['P8.2:0', 'SDO2:1', 'PWM0_PWM1A:2', 'PWM0_PWM2A:2']}, + { f: ['P8.3:0', 'SDO3:1', 'PWM0_NPWM1A:2', 'PWM0_NPWM0A:2']}, + { f: ['P8.4:0', 'SDO4:1', 'PWM0_PWM2A:2', 'PWM0_NPWM1A:2']}, + { f: ['P8.5:0', 'SDO5:1', 'PWM0_NPWM2A:2', 'DAC0_DA0OUT0:7']}, + { f: ['P8.6:0', 'SDO6:1', 'PWM0_PWMBCSTA:2']}, + { f: ['P8.7:0', 'SDO7:1']}, + + { f: ['P9.0:0', 'XO:7']}, + { f: ['P9.1:0', 'XI:7']}, + { f: ['P9.2:0']}, + { f: ['P9.3:0']}, + { f: ['P9.4:0', 'DAC0_DA0OUT1:7', 'CMP0_CMPREF0B:8']}, + { f: ['P9.5:0']}, + { f: ['P9.6:0']}, + { f: ['P9.7:0']}, + + { f: ['PA.0:0', 'TM00IOA:1', 'TM15IOA:2', 'AN0:7']}, + { f: ['PA.1:0', 'TM01IOA:1', 'TM11IOB:2', 'AN1:7']}, + { f: ['PA.2:0', 'TM02IOA:1', 'TM12IOB:2', 'AN2:7']}, + { f: ['PA.3:0', 'TM03IOA:1', 'AN3:7']}, + { f: ['PA.4:0', 'TM04IOA:1', 'SIF5_SBI5:4', 'AN4:7', 'CMP0_CMPREF0A:8']}, + { f: ['PA.5:0', 'TM07IOA:1', 'SIF5_SBO5:4', 'AN5:7', 'CMP0_CMPIN0A:8']}, + { f: ['PA.6:0', 'TM08IOA:1', 'TM10IOA:2', 'SIF5_SBT5:4', 'AN6:7', 'CMP0_CMPOT0:8']}, + { f: ['PA.7:0', 'MONOUT:1', 'TM09IOA:2', 'SIF5_SBC5:4', 'AN7:7']}, + + { f: ['PB.0:0', 'AN8:7']}, + { f: ['PB.1:0', 'AN9:7']}, + { f: ['PB.2:0', 'AN10:7']}, + { f: ['PB.3:0', 'AN11:7', 'CMP0_CMPIN0B:8']}, + { f: ['PB.4:0']}, + { f: ['PB.5:0']}, + { f: ['PB.6:0']}, + { f: ['PB.7:0']}, +]; + +NUTOOL_PIN.g_cfg_gpiosDefines = [ + { f: ['P0.0', 'GPIO:GPIO_P00MD_GPIO@IOP0MD', 'TM07IOB:GPIO_P00MD_TM07IOB@IOP0MD', 'TM10IOB:GPIO_P00MD_TM10IOB@IOP0MD', 'SIF1_SBI1A:GPIO_P00MD_SBI1A@IOP0MD', 'LED_LED0:GPIO_P00MD_LED0@IOP0MD'] }, + { f: ['P0.1', 'GPIO:GPIO_P01MD_GPIO@IOP0MD', 'TM08IOB:GPIO_P01MD_TM08IOB@IOP0MD', 'TM09IOB:GPIO_P01MD_TM09IOB@IOP0MD', 'SIF1_SBO1A:GPIO_P01MD_SBO1A@IOP0MD', 'LED_LED1:GPIO_P01MD_LED1@IOP0MD'] }, + { f: ['P0.2', 'GPIO:GPIO_P02MD_GPIO@IOP0MD', 'SIF1_SBT1A:GPIO_P02MD_SBT1A@IOP0MD', 'LED_LED2:GPIO_P02MD_LED2@IOP0MD'] }, + { f: ['P0.3', 'GPIO:GPIO_P03MD_GPIO@IOP0MD', 'TM00IOB:GPIO_P03MD_TM00IOB@IOP0MD', 'TM02IOB:GPIO_P03MD_TM02IOB@IOP0MD', 'TM15IOB:GPIO_P03MD_TM15IOB@IOP0MD', 'SIF1_SBC1A:GPIO_P03MD_SBC1A@IOP0MD', 'LED_LED3:GPIO_P03MD_LED3@IOP0MD'] }, + { f: ['P0.4', 'GPIO:GPIO_P04MD_GPIO@IOP0MD', 'TM11IOA:GPIO_P04MD_TM11IOA@IOP0MD', 'LED_LED4:GPIO_P04MD_LED4@IOP0MD'] }, + { f: ['P0.5', 'GPIO:GPIO_P05MD_GPIO@IOP0MD', 'TM12IOA:GPIO_P05MD_TM12IOA@IOP0MD', 'SIF3_SBO3A:GPIO_P05MD_SBO3A@IOP0MD', 'LED_LED5:GPIO_P05MD_LED5@IOP0MD'] }, + { f: ['P0.6', 'GPIO:GPIO_P06MD_GPIO@IOP0MD', 'SIF3_SBI3A:GPIO_P06MD_SBI3A@IOP0MD', 'LED_LED6:GPIO_P06MD_LED6@IOP0MD'] }, + + { f: ['P1.0', 'GPIO:GPIO_P10MD_GPIO@IOP1MD', 'TM00IOC:GPIO_P10MD_TM00IOC@IOP1MD', 'TM15IOC:GPIO_P10MD_TM15IOC@IOP1MD', 'SIF4_SBC4B:GPIO_P10MD_SBC4B@IOP1MD'] }, + + { f: ['P2.0', 'GPIO:GPIO_P20MD_GPIO@IOP2MD', 'SIF3_SBT3A:GPIO_P20MD_SBT3A@IOP2MD', 'SIF8_SCL8:GPIO_P20MD_SCL8@IOP2MD', 'DAC1_DA1OUT0:GPIO_P20MD_DA1OUT0@IOP2MD', 'IRQ0A:GPIO_P20MD_IRQ0A@IOP2MD'] }, + { f: ['P2.1', 'GPIO:GPIO_P21MD_GPIO@IOP2MD', 'SIF3_SBC3A:GPIO_P21MD_SBC3A@IOP2MD', 'SIF8_SDA8:GPIO_P21MD_SDA8@IOP2MD', 'IRQ1A:GPIO_P21MD_IRQ1A@IOP2MD'] }, + { f: ['P2.2', 'GPIO:GPIO_P22MD_GPIO@IOP2MD', 'IRQ2A:GPIO_P22MD_IRQ2A@IOP2MD'] }, + { f: ['P2.3', 'GPIO:GPIO_P23MD_GPIO@IOP2MD', 'TM13IOA:GPIO_P23MD_TM13IOA@IOP2MD', 'IRQ3A:GPIO_P23MD_IRQ3A@IOP2MD'] }, + { f: ['P2.4', 'GPIO:GPIO_P24MD_GPIO@IOP2MD', 'TM14IOA:GPIO_P24MD_TM14IOA@IOP2MD', 'IRQ4A:GPIO_P24MD_IRQ4A@IOP2MD'] }, + { f: ['P2.5', 'GPIO:GPIO_P25MD_GPIO@IOP2MD', 'OSCI:GPIO_P25MD_OSC1@IOP2MD'] }, + { f: ['P2.6', 'GPIO:GPIO_P26MD_GPIO@IOP2MD', 'OSCO:GPIO_P26MD_OSC2@IOP2MD'] }, + + { f: ['P3.3', 'GPIO:GPIO_P33MD_GPIO@IOP3MD', 'SIF4_SBO4B:GPIO_P33MD_SBO4B@IOP3MD', 'SIF6_SDA6B:GPIO_P33MD_SDA6B@IOP3MD'] }, + { f: ['P3.4', 'GPIO:GPIO_P34MD_GPIO@IOP3MD', 'SIF4_SBT4B:GPIO_P34MD_SBT4B@IOP3MD', 'SIF6_SCL6B:GPIO_P34MD_SCL6B@IOP3MD'] }, + { f: ['P3.5', 'GPIO:GPIO_P35MD_GPIO@IOP3MD', 'SIF4_SBI4B:GPIO_P35MD_SBI4B@IOP3MD'] }, + + { f: ['P4.3', 'GPIO:GPIO_P43MD_GPIO@IOP4MD', 'SIF0_SBO0B:GPIO_P43MD_SBO0B@IOP4MD', 'LIN_LTX0B:GPIO_P43MD_LTX0B@IOP4MD'] }, + { f: ['P4.4', 'GPIO:GPIO_P44MD_GPIO@IOP4MD', 'SIF0_SBI0B:GPIO_P44MD_SBI0B@IOP4MD', 'LIN_LRX0B:GPIO_P44MD_LRX0B@IOP4MD'] }, + { f: ['P4.5', 'GPIO:GPIO_P45MD_GPIO@IOP4MD', 'SIF0_SBT0B:GPIO_P45MD_SBT0B@IOP4MD'] }, + { f: ['P4.6', 'GPIO:GPIO_P46MD_GPIO@IOP4MD', 'SIF7_SDA7B:GPIO_P46MD_SDA7B@IOP4MD'] }, + { f: ['P4.7', 'GPIO:GPIO_P47MD_GPIO@IOP4MD', 'SIF7_SCL7B:GPIO_P47MD_SCL7B@IOP4MD'] }, + + { f: ['P5.0', 'GPIO:GPIO_P50MD_GPIO@IOP5MD', 'TM07OUT0:GPIO_P50MD_TM07OUT0@IOP5MD', 'SIF0_SBO0A:GPIO_P50MD_SBO0A@IOP5MD', 'LIN_LTX0A:GPIO_P50MD_LTX0A@IOP5MD', 'CMP1_CMPREF1B:GPIO_P50MD_CMPREF1B@IOP5MD', 'KEY0:GPIO_P50MD_KEY0@IOP5MD'] }, + { f: ['P5.1', 'GPIO:GPIO_P51MD_GPIO@IOP5MD', 'TM07OUT1:GPIO_P51MD_TM07OUT1@IOP5MD', 'SIF0_SBI0A:GPIO_P51MD_SBI0A@IOP5MD', 'LIN_LRX0A:GPIO_P51MD_LRX0A@IOP5MD', 'CMP1_CMPIN1B:GPIO_P51MD_CMPIN1B@IOP5MD', 'KEY1:GPIO_P51MD_KEY1@IOP5MD'] }, + { f: ['P5.2', 'GPIO:GPIO_P52MD_GPIO@IOP5MD', 'TM07OUT2:GPIO_P52MD_TM07OUT2@IOP5MD', 'SIF0_SBT0A:GPIO_P52MD_SBT0A@IOP5MD', 'DAC1_DA1OUT1:GPIO_P52MD_DA1OUT1@IOP5MD', 'KEY2:GPIO_P52MD_KEY2@IOP5MD'] }, + { f: ['P5.3', 'GPIO:GPIO_P53MD_GPIO@IOP5MD', 'TM07OUT3:GPIO_P53MD_TM07OUT3@IOP5MD', 'BZ_BUZZERA:GPIO_P53MD_BUZZERA@IOP5MD', 'CMP1_CMPREF1A:GPIO_P53MD_CMPREF1A@IOP5MD', 'KEY3:GPIO_P53MD_KEY3@IOP5MD'] }, + { f: ['P5.4', 'GPIO:GPIO_P54MD_GPIO@IOP5MD', 'TM07OUT4:GPIO_P54MD_TM07OUT4@IOP5MD', 'BZ_NBUZZERA:GPIO_P54MD_NBUZZERA@IOP5MD', 'CMP1_CMPIN1A:GPIO_P54MD_CMPIN1A@IOP5MD', 'KEY4:GPIO_P54MD_KEY4@IOP5MD'] }, + { f: ['P5.5', 'GPIO:GPIO_P55MD_GPIO@IOP5MD', 'TM07OUT5:GPIO_P55MD_TM07OUT5@IOP5MD', 'CMP1_CMPOT1:GPIO_P55MD_CMPOT1@IOP5MD', 'KEY5:GPIO_P55MD_KEY5@IOP5MD'] }, + { f: ['P5.6', 'GPIO:GPIO_P56MD_GPIO@IOP5MD', 'KEY6:GPIO_P56MD_KEY6@IOP5MD'] }, + { f: ['P5.7', 'GPIO:GPIO_P57MD_GPIO@IOP5MD', 'KEY7:GPIO_P57MD_KEY7@IOP5MD'] }, + + { f: ['P6.1', 'GPIO:GPIO_P61MD_GPIO@IOP6MD'] }, + { f: ['P6.2', 'GPIO:GPIO_P62MD_GPIO@IOP6MD', 'TM01IOB:GPIO_P62MD_TM01IOB@IOP6MD'] }, + { f: ['P6.3', 'GPIO:GPIO_P63MD_GPIO@IOP6MD', 'TM03IOB:GPIO_P63MD_TM03IOB@IOP6MD'] }, + { f: ['P6.4', 'GPIO:GPIO_P64MD_GPIO@IOP6MD', 'TM04IOB:GPIO_P64MD_TM04IOB@IOP6MD', 'SIF4_SBC4A:GPIO_P64MD_SBC4A@IOP6MD'] }, + { f: ['P6.5', 'GPIO:GPIO_P65MD_GPIO@IOP6MD', 'SIF4_SBI4A:GPIO_P65MD_SBI4A@IOP6MD'] }, + { f: ['P6.6', 'GPIO:GPIO_P66MD_GPIO@IOP6MD', 'SIF4_SBO4A:GPIO_P66MD_SBO4A@IOP6MD', 'SIF6_SDA6A:GPIO_P66MD_SDA6A@IOP6MD'] }, + { f: ['P6.7', 'GPIO:GPIO_P67MD_GPIO@IOP6MD', 'SIF4_SBT4A:GPIO_P67MD_SBT4A@IOP6MD', 'SIF6_SCL6A:GPIO_P67MD_SCL6A@IOP6MD'] }, + + { f: ['P7.0', 'GPIO:GPIO_P70MD_GPIO@IOP7MD', 'SIF2_SBO2A:GPIO_P70MD_SBO2A@IOP7MD'] }, + { f: ['P7.1', 'GPIO:GPIO_P71MD_GPIO@IOP7MD', 'SIF2_SBI2A:GPIO_P71MD_SBI2A@IOP7MD'] }, + { f: ['P7.2', 'GPIO:GPIO_P72MD_GPIO@IOP7MD', 'SIF2_SBT2A:GPIO_P72MD_SBT2A@IOP7MD'] }, + { f: ['P7.3', 'GPIO:GPIO_P73MD_GPIO@IOP7MD', 'TM13IOB:GPIO_P73MD_TM13IOB@IOP7MD', 'SIF2_SBC2A:GPIO_P73MD_SBC2A@IOP7MD', 'SIF7_SDA7A:GPIO_P73MD_SDA7A@IOP7MD'] }, + { f: ['P7.4', 'GPIO:GPIO_P74MD_GPIO@IOP7MD', 'TM14IOB:GPIO_P74MD_TM14IOB@IOP7MD', 'SIF1_SBC1B:GPIO_P74MD_SBC1B@IOP7MD', 'SIF7_SCL7A:GPIO_P74MD_SCL7A@IOP7MD'] }, + { f: ['P7.5', 'GPIO:GPIO_P75MD_GPIO@IOP7MD', 'SIF1_SBO1B:GPIO_P75MD_SBO1B@IOP7MD'] }, + { f: ['P7.6', 'GPIO:GPIO_P76MD_GPIO@IOP7MD', 'SIF1_SBI1B:GPIO_P76MD_SBI1B@IOP7MD'] }, + { f: ['P7.7', 'GPIO:GPIO_P77MD_GPIO@IOP7MD', 'SIF1_SBT1B:GPIO_P77MD_SBT1B@IOP7MD'] }, + + { f: ['P8.0', 'GPIO:GPIO_P80MD_GPIO@IOP8MD', 'SDO0:GPIO_P80MD_SDO0@IOP8MD', 'PWM0_PWM0A:GPIO_P80MD_PWM0A@IOP8MD'] }, + { f: ['P8.1', 'GPIO:GPIO_P81MD_GPIO@IOP8MD', 'SDO1:GPIO_P81MD_SDO1@IOP8MD', 'PWM0_NPWM0A:GPIO_P81MD_NPWM0A@IOP8MD'] }, + { f: ['P8.2', 'GPIO:GPIO_P82MD_GPIO@IOP8MD', 'SDO2:GPIO_P82MD_SDO2@IOP8MD', 'PWM0_PWM1A:GPIO_P82MD_PWM1A@IOP8MD'] }, + { f: ['P8.3', 'GPIO:GPIO_P83MD_GPIO@IOP8MD', 'SDO3:GPIO_P83MD_SDO3@IOP8MD', 'PWM0_NPWM1A:GPIO_P83MD_NPWM1A@IOP8MD'] }, + { f: ['P8.4', 'GPIO:GPIO_P84MD_GPIO@IOP8MD', 'SDO4:GPIO_P84MD_SDO4@IOP8MD', 'PWM0_PWM2A:GPIO_P84MD_PWM2A@IOP8MD'] }, + { f: ['P8.5', 'GPIO:GPIO_P85MD_GPIO@IOP8MD', 'SDO5:GPIO_P85MD_SDO5@IOP8MD', 'PWM0_NPWM2A:GPIO_P85MD_NPWM2A@IOP8MD', 'DAC0_DA0OUT0:GPIO_P85MD_DA0OUT0@IOP8MD'] }, + { f: ['P8.6', 'GPIO:GPIO_P86MD_GPIO@IOP8MD', 'SDO6:GPIO_P86MD_SDO6@IOP8MD', 'PWM0_PWMBCSTA:GPIO_P86MD_PWMBCSTA@IOP8MD'] }, + { f: ['P8.7', 'GPIO:GPIO_P87MD_GPIO@IOP8MD', 'SDO7:GPIO_P87MD_SDO7@IOP8MD'] }, + + { f: ['P9.0', 'GPIO:GPIO_P90MD_GPIO@IOP9MD', 'XO:GPIO_P90MD_XO@IOP9MD'] }, + { f: ['P9.1', 'GPIO:GPIO_P91MD_GPIO@IOP9MD', 'XI:GPIO_P91MD_XI@IOP9MD'] }, + { f: ['P9.2', 'GPIO:GPIO_P92MD_GPIO@IOP9MD'] }, + { f: ['P9.3', 'GPIO:GPIO_P93MD_GPIO@IOP9MD'] }, + { f: ['P9.4', 'GPIO:GPIO_P94MD_GPIO@IOP9MD', 'DAC0_DA0OUT1:GPIO_P94MD_DA0OUT1@IOP9MD', 'CMP0_CMPREF0B:GPIO_P94MD_CMPREF0B@IOP9MD'] }, + { f: ['P9.5', 'GPIO:GPIO_P95MD_GPIO@IOP9MD'] }, + + { f: ['PA.0', 'GPIO:GPIO_PA0MD_GPIO@IOPAMD', 'TM00IOA:GPIO_PA0MD_TM00IOA@IOPAMD', 'TM15IOA:GPIO_PA0MD_TM15IOA@IOPAMD', 'AN0:GPIO_PA0MD_AN0@IOPAMD'] }, + { f: ['PA.1', 'GPIO:GPIO_PA1MD_GPIO@IOPAMD', 'TM01IOA:GPIO_PA1MD_TM01IOA@IOPAMD', 'TM11IOB:GPIO_PA1MD_TM11IOB@IOPAMD', 'AN1:GPIO_PA1MD_AN1@IOPAMD'] }, + { f: ['PA.2', 'GPIO:GPIO_PA2MD_GPIO@IOPAMD', 'TM02IOA:GPIO_PA2MD_TM02IOA@IOPAMD', 'TM12IOB:GPIO_PA2MD_TM12IOB@IOPAMD', 'AN2:GPIO_PA2MD_AN2@IOPAMD'] }, + { f: ['PA.3', 'GPIO:GPIO_PA3MD_GPIO@IOPAMD', 'TM03IOA:GPIO_PA3MD_TM03IOA@IOPAMD', 'AN3:GPIO_PA3MD_AN3@IOPAMD'] }, + { f: ['PA.4', 'GPIO:GPIO_PA4MD_GPIO@IOPAMD', 'TM04IOA:GPIO_PA4MD_TM04IOA@IOPAMD', 'SIF5_SBI5:GPIO_PA4MD_SBI5@IOPAMD', 'AN4:GPIO_PA4MD_AN4@IOPAMD', 'CMP0_CMPREF0A:GPIO_PA4MD_CMPREF0A@IOPAMD'] }, + { f: ['PA.5', 'GPIO:GPIO_PA5MD_GPIO@IOPAMD', 'TM07IOA:GPIO_PA5MD_TM07IOA@IOPAMD', 'SIF5_SBO5:GPIO_PA5MD_SBO5@IOPAMD', 'AN5:GPIO_PA5MD_AN5@IOPAMD', 'CMP0_CMPIN0A:GPIO_PA5MD_CMPIN0A@IOPAMD'] }, + { f: ['PA.6', 'GPIO:GPIO_PA6MD_GPIO@IOPAMD', 'TM08IOA:GPIO_PA6MD_TM08IOA@IOPAMD', 'TM10IOA:GPIO_PA6MD_TM10IOA@IOPAMD', 'SIF5_SBT5:GPIO_PA6MD_SBT5@IOPAMD', 'AN6:GPIO_PA6MD_AN6@IOPAMD', 'CMP0_CMPOT0:GPIO_PA6MD_CMPOT0@IOPAMD'] }, + { f: ['PA.7', 'GPIO:GPIO_PA7MD_GPIO@IOPAMD', 'MONITOR:GPIO_PA7MD_MONITOR@IOPAMD', 'TM09IOA:GPIO_PA7MD_TM09IOA@IOPAMD', 'SIF5_SBC5:GPIO_PA7MD_SBC5@IOPAMD', 'AN7:GPIO_PA7MD_AN7@IOPAMD'] }, + + { f: ['PB.0', 'GPIO:GPIO_PB0MD_GPIO@IOPBMD', 'AN8:GPIO_PB0MD_AN8@IOPBMD'] }, + { f: ['PB.1', 'GPIO:GPIO_PB1MD_GPIO@IOPBMD', 'AN9:GPIO_PB1MD_AN9@IOPBMD'] }, + { f: ['PB.2', 'GPIO:GPIO_PB2MD_GPIO@IOPBMD', 'AN10:GPIO_PB2MD_AN10@IOPBMD'] }, + { f: ['PB.3', 'GPIO:GPIO_PB3MD_GPIO@IOPBMD', 'AN11:GPIO_PB3MD_AN11@IOPBMD', 'CMP0_CMPIN0B:GPIO_PB3MD_CMPIN0B@IOPBMD'] } +]; + +NUTOOL_PIN.g_cfg_gpiosDescriptions = [ + 'LED_LED7:LED output pin', + 'LED_LED6:LED output pin', + 'LED_LED5:LED output pin', + 'LED_LED4:LED output pin', + 'LED_LED3:LED output pin', + 'LED_LED2:LED output pin', + 'LED_LED1:LED output pin', + 'LED_LED0:LED output pin', + 'DAC1_DA1OUT1:D/A converter 1 output pin', + 'DAC1_DA1OUT0:D/A converter 1 output pin', + 'DAC0_DA0OUT1:D/A converter 0 output pin', + 'DAC0_DA0OUT0:D/A converter 0 output pin', + 'CMP1_CMPOT1:Comparator 1 output pin', + 'CMP0_CMPOT0:Comparator 0 output pin', + 'CMP1_CMPREF1B:Comparator 1B reference input pin', + 'CMP1_CMPREF1A:Comparator 1A reference input pin', + 'CMP1_CMPIN1B:Comparator 1B input pin', + 'CMP1_CMPIN1A:Comparator 1A input pin', + 'CMP0_CMPREF0B:Comparator 0B reference input pin', + 'CMP0_CMPREF0A:Comparator 0A reference input pin', + 'CMP0_CMPIN0B:Comparator 0B input pin', + 'CMP0_CMPIN0A:Comparator 0A input pin', + 'AN23:A/D converter analog input 23 pin', + 'AN22:A/D converter analog input 22 pin', + 'AN21:A/D converter analog input 21 pin', + 'AN20:A/D converter analog input 20 pin', + 'AN19:A/D converter analog input 19 pin', + 'AN18:A/D converter analog input 18 pin', + 'AN17:A/D converter analog input 17 pin', + 'AN16:A/D converter analog input 16 pin', + 'AN15:A/D converter analog input 15 pin', + 'AN14:A/D converter analog input 14 pin', + 'AN13:A/D converter analog input 13 pin', + 'AN12:A/D converter analog input 12 pin', + 'AN11:A/D converter analog input 11 pin', + 'AN10:A/D converter analog input 10 pin', + 'AN9:A/D converter analog input 09 pin', + 'AN8:A/D converter analog input 08 pin', + 'AN7:A/D converter analog input 07 pin', + 'AN6:A/D converter analog input 06 pin', + 'AN5:A/D converter analog input 05 pin', + 'AN4:A/D converter analog input 04 pin', + 'AN3:A/D converter analog input 03 pin', + 'AN2:A/D converter analog input 02 pin', + 'AN1:A/D converter analog input 01 pin', + 'AN0:A/D converter analog input 00 pin', + 'LIN_LTX0B:LTX clock input/output pin', + 'LIN_LRX0B:LRX clock input/output pin', + 'LIN_LTX0A:LTX clock input/output pin', + 'LIN_LRX0A:LRX clock input/output pin', + 'SIF8_SDA8:I2C5 clock input/output pin', + 'SIF8_SCL8:I2C5 clock input/output pin', + 'SIF7_SDA7B:I2C5 clock input/output pin', + 'SIF7_SCL7B:I2C5 clock input/output pin', + 'SIF7_SDA7A:I2C5 clock input/output pin', + 'SIF7_SCL7A:I2C5 clock input/output pin', + 'SIF6_SDA6B:I2C5 clock input/output pin', + 'SIF6_SCL6B:I2C5 clock input/output pin', + 'SIF6_SDA6A:I2C5 clock input/output pin', + 'SIF6_SCL6A:I2C5 clock input/output pin', + 'SIF5_SBT5:SIF5 clock input/output pin', + 'SIF5_SBO5:SIF5 data input/output pin', + 'SIF5_SBI5:SIF5 data input pin', + 'SIF5_SBC5:SIF5 chip select input/output pin', + 'SIF4_SBT4B:SIF4 clock input/output pin', + 'SIF4_SBO4B:SIF4 data input/output pin', + 'SIF4_SBI4B:SIF4 data input pin', + 'SIF4_SBC4B:SIF4 chip select input/output pin', + 'SIF4_SBT4A:SIF4 clock input/output pin', + 'SIF4_SBO4A:SIF4 data input/output pin', + 'SIF4_SBI4A:SIF4 data input pin', + 'SIF4_SBC4A:SIF4 chip select input/output pin', + 'SIF3_SBT3B:SIF3 clock input/output pin', + 'SIF3_SBO3B:SIF3 data input/output pin', + 'SIF3_SBI3B:SIF3 data input pin', + 'SIF3_SBC3B:SIF3 chip select input/output pin', + 'SIF3_SBT3A:SIF3 clock input/output pin', + 'SIF3_SBO3A:SIF3 data input/output pin', + 'SIF3_SBI3A:SIF3 data input pin', + 'SIF3_SBC3A:SIF3 chip select input/output pin', + 'SIF2_SBT2B:SIF2 clock input/output pin', + 'SIF2_SBO2B:SIF2 data input/output pin', + 'SIF2_SBI2B:SIF2 data input pin', + 'SIF2_SBC2B:SIF2 chip select input/output pin', + 'SIF2_SBT2A:SIF2 clock input/output pin', + 'SIF2_SBO2A:SIF2 data input/output pin', + 'SIF2_SBI2A:SIF2 data input pin', + 'SIF2_SBC2A:SIF2 chip select input/output pin', + 'SIF1_SBT1B:SIF1 clock input/output pin', + 'SIF1_SBO1B:SIF1 data input/output pin', + 'SIF1_SBI1B:SIF1 data input pin', + 'SIF1_SBC1B:SIF1 chip select input/output pin', + 'SIF1_SBT1A:SIF1 clock input/output pin', + 'SIF1_SBO1A:SIF1 data input/output pin', + 'SIF1_SBI1A:SIF1 data input pin', + 'SIF1_SBC1A:SIF1 chip select input/output pin', + 'SIF0_SBT0B:SIF0 clock input/output pin', + 'SIF0_SBO0B:SIF0 data input/output pin', + 'SIF0_SBI0B:SIF0 data input pin', + 'SIF0_SBT0A:SIF0 clock input/output pin', + 'SIF0_SBO0A:SIF0 data input/output pin', + 'SIF0_SBI0A:SIF0 data input pin', + 'BZ_BUZZERB:BUZZER output pin B', + 'BZ_NBUZZERB:NBUZZER output pin B', + 'BZ_BUZZERA:BUZZER output pin A', + 'BZ_NBUZZERA:NBUZZER output pin A', + "PWM0_PWMBCSTA:GPWM's Binary Counter Status", + 'PWM0_NPWM2A:NGPWM2A output pin', + 'PWM0_PWM2A:GPWM2A output pin', + 'PWM0_NPWM1A:NGPWM1A output pin', + 'PWM0_PWM1A:GPWM1A output pin', + 'PWM0_NPWM0A:NGPWM0A output pin', + 'PWM0_PWM0A:GPWM0A output pin', + 'TM15IOC:Timer 15 input/output pin C', + 'TM15IOB:Timer 15 input/output pin B', + 'TM15IOA:Timer 15 input/output pin A', + 'TM14IOB:Timer 14 input/output pin B', + 'TM14IOA:Timer 14 input/output pin A', + 'TM13IOB:Timer 13 input/output pin B', + 'TM13IOA:Timer 13 input/output pin A', + 'TM12IOB:Timer 12 input/output pin B', + 'TM12IOA:Timer 12 input/output pin A', + 'TM11IOB:Timer 11 input/output pin B', + 'TM11IOA:Timer 11 input/output pin A', + 'TM10IOB:Timer 10 input/output pin B', + 'TM10IOA:Timer 10 input/output pin A', + 'TM09IOB:Timer 9 input/output pin B', + 'TM09IOA:Timer 9 input/output pin A', + 'SDO7:Timer 8 synchronous output 7', + 'SDO6:Timer 8 synchronous output 6', + 'SDO5:Timer 8 synchronous output 5', + 'SDO4:Timer 8 synchronous output 4', + 'SDO3:Timer 8 synchronous output 3', + 'SDO2:Timer 8 synchronous output 2', + 'SDO1:Timer 8 synchronous output 1', + 'SDO0:Timer 8 synchronous output 0', + 'TM08IOC:Timer 8 input/output pin C', + 'TM08IOB:Timer 8 input/output pin B', + 'TM08IOA:Timer 8 input/output pin A', + 'TM07OUT5:Timer 7 output pin 5', + 'TM07OUT4:Timer 7 output pin 4', + 'TM07OUT3:Timer 7 output pin 3', + 'TM07OUT2:Timer 7 output pin 2', + 'TM07OUT1:Timer 7 output pin 1', + 'TM07OUT0:Timer 7 output pin 0', + 'TM07IOC:Timer 7 input/output pin C', + 'TM07IOB:Timer 7 input/output pin B', + 'TM07IOA:Timer 7 input/output pin A', + 'TM04IOC:Timer 4 input/output pin C', + 'TM04IOB:Timer 4 input/output pin B', + 'TM04IOA:Timer 4 input/output pin A', + 'TM03IOC:Timer 3 input/output pin C', + 'TM03IOB:Timer 3 input/output pin B', + 'TM03IOA:Timer 3 input/output pin A', + 'TM02IOC:Timer 2 input/output pin C', + 'TM02IOB:Timer 2 input/output pin B', + 'TM02IOA:Timer 2 input/output pin A', + 'TM01IOC:Timer 1 input/output pin C', + 'TM01IOB:Timer 1 input/output pin B', + 'TM01IOA:Timer 1 input/output pin A', + 'TM00IOC:Timer 0 input/output pin C', + 'TM00IOB:Timer 0 input/output pin B', + 'TM00IOA:Timer 0 input/output pin A', + 'KEY7:KEY interrupt 7', + 'KEY6:KEY interrupt 6', + 'KEY5:KEY interrupt 5', + 'KEY4:KEY interrupt 4', + 'KEY3:KEY interrupt 3', + 'KEY2:KEY interrupt 2', + 'KEY1:KEY interrupt 1', + 'KEY0:KEY interrupt 0', + 'IRQ4A:External interrupt 4', + 'IRQ3A:External interrupt 3', + 'IRQ2A:External interrupt 2', + 'IRQ1A:External interrupt 1', + 'IRQ0A:External interrupt 0', + 'XO:External clock output', + 'XI:External clock input', + 'OSCO:External clock output', + 'OSCI:External clock input', + 'MONOUT:Monitor output pin', + 'DBG_SWDD:Debug data input/output pin', + 'DBG_SWDCLK:Debug clock input pin', +]; + +NUTOOL_PIN.g_cfg_regDescriptions = {}; +NUTOOL_PIN.g_cfg_regDescriptions.IOP0MD = '0x40004200'; +NUTOOL_PIN.g_cfg_regDescriptions.IOP1MD = '0x40004210'; +NUTOOL_PIN.g_cfg_regDescriptions.IOP2MD = '0x40004220'; +NUTOOL_PIN.g_cfg_regDescriptions.IOP3MD = '0x40004230'; +NUTOOL_PIN.g_cfg_regDescriptions.IOP4MD = '0x40004240'; +NUTOOL_PIN.g_cfg_regDescriptions.IOP5MD = '0x40004250'; +NUTOOL_PIN.g_cfg_regDescriptions.IOP6MD = '0x40004260'; +NUTOOL_PIN.g_cfg_regDescriptions.IOP7MD = '0x40004270'; +NUTOOL_PIN.g_cfg_regDescriptions.IOP8MD = '0x40004280'; +NUTOOL_PIN.g_cfg_regDescriptions.IOP9MD = '0x40004290'; +NUTOOL_PIN.g_cfg_regDescriptions.IOPAMD = '0x400042A0'; +NUTOOL_PIN.g_cfg_regDescriptions.IOPBMD = '0x400042B0'; + +NUTOOL_PIN.g_cfg_unusedGPIO = { + 'KM1M0DF02N/K(LQFP100_D0x(14*14))': { + 'ALL': [] + }, + 'KM1M0DF03N/K(LQFP80_D0x(12*12))': { + 'ALL': [] + }, + 'KM1M0DF13N/K(LQFP80_D1x(12*12))': { + 'ALL': [] + }, + 'KM1M0DF04N/K(TQFP64_D0x(10*10))': { + 'ALL': [] + } +}; + +NUTOOL_PIN.g_cfg_OrCAD = { + "LQFP80_D1x(14*14)": [ + '', '', '', '', '', '', '', '', '', '', + '', '', '', '', '', '', '', '', '', '', + '', '', '', '', '', '', '', '', '', '', + '', '', '', '', '', '', '', '', '', '', + '', '', '', '', '', '', '', '', '', '', + '', '', '', '', '', '', '', '', '', '', + '', '', '', '', '', '', '', '', '', '', + '', '', '', '', '', '', '', '', '', '' + ], + "LQFP80_D1x(12*12)": [ + '', '', '', '', '', '', '', '', '', '', + '', '', '', '', '', '', '', '', '', '', + '', '', '', '', '', '', '', '', '', '', + '', '', '', '', '', '', '', '', '', '', + '', '', '', '', '', '', '', '', '', '', + '', '', '', '', '', '', '', '', '', '', + '', '', '', '', '', '', '', '', '', '', + '', '', '', '', '', '', '', '', '', '' + ] +}; +NUTOOL_PIN.g_cfg_WPPin = ['P0.1', 'P0.2']; +// [Workaround] Sometime NUTOOL_PIN.g_cfg_WPPin will be reset. +setTimeout(function() { + NUTOOL_PIN.g_cfg_WPPin = ['P0.1', 'P0.2']; +}, 100); + +NUTOOL_PIN.decidepackageNumber = function (given_partNumber_package) { + var partNumber_package; + + if (typeof given_partNumber_package === 'undefined') { + partNumber_package = NUTOOL_PIN.getg_partNumber_package(); + } + else { + partNumber_package = given_partNumber_package; + } + + NUTOOL_PIN.g_packageNumber = partNumber_package.substring(partNumber_package.indexOf('(') + 1); + NUTOOL_PIN.g_packageNumber = NUTOOL_PIN.g_packageNumber.substring(0, NUTOOL_PIN.g_packageNumber.lastIndexOf(')')); + NUTOOL_PIN.g_packageNumberIndex = NUTOOL_PIN.g_packageNumber; + + partNumber_package = null; +}; \ No newline at end of file diff --git a/src/NUC_M2003C_Content.js b/src/NUC_M2003_Content.js similarity index 100% rename from src/NUC_M2003C_Content.js rename to src/NUC_M2003_Content.js diff --git a/src/NUC_M2L31_Content.js b/src/NUC_M2L31_Content.js index 3ac2246..81ff8a7 100644 --- a/src/NUC_M2L31_Content.js +++ b/src/NUC_M2L31_Content.js @@ -739,67 +739,67 @@ NUTOOL_PIN.g_cfg_regDescriptions.GPH_MFP2 = '0x40000578'; //NUTOOL_PIN.g_cfg_regDescriptions.GPH_MFP3 = '0x4000057C'; NUTOOL_PIN.g_cfg_unusedGPIO = { - 'M2L31XD4AE(UWLCSP25(USB1.1))': { + 'M2L31XD4AE': { 'ALL': ['ACMP2', 'EBI', 'I2C2', 'I2C3', 'PWM0', 'PWM1', 'SPI2', 'SPI3', 'UART6', 'UART7', 'USCI1', 'CANFD1', 'DAC1', 'OPA2', 'TK'] }, - 'M2L31ZE4AE(UQFN33(USB1.1)(5*5))': { + 'M2L31ZE4AE': { 'ALL': ['EBI', 'I2C2', 'I2C3', 'PWM0', 'PWM1', 'SPI2', 'SPI3', 'UART6', 'UART7', 'USCI1', 'CANFD1', 'DAC1', 'OPA2', 'TK'] }, - 'M2L31ZD4AE(UQFN33(USB1.1)(5*5))': { + 'M2L31ZD4AE': { 'ALL': ['EBI', 'I2C2', 'I2C3', 'PWM0', 'PWM1', 'SPI2', 'SPI3', 'UART6', 'UART7', 'USCI1', 'CANFD1', 'DAC1', 'OPA2', 'TK'] }, - 'M2L31YG4AE(QFN48(PIN:D10R14U10L14))': { + 'M2L31YG4AE': { 'ALL': ['I2C2', 'I2C3', 'PWM0', 'PWM1', 'SPI2', 'SPI3', 'UART6', 'UART7', 'USCI1', 'CANFD1', 'DAC1', 'OPA2', 'TK'] }, - 'M2L31YE4AE(QFN48(PIN:D10R14U10L14))': { + 'M2L31YE4AE': { 'ALL': ['I2C2', 'I2C3', 'PWM0', 'PWM1', 'SPI2', 'SPI3', 'UART6', 'UART7', 'USCI1', 'CANFD1', 'DAC1', 'OPA2', 'TK'] }, - 'M2L31YD4AE(QFN48(PIN:D10R14U10L14))': { + 'M2L31YD4AE': { 'ALL': ['I2C2', 'I2C3', 'PWM0', 'PWM1', 'SPI2', 'SPI3', 'UART6', 'UART7', 'USCI1', 'CANFD1', 'DAC1', 'OPA2', 'TK'] }, - 'M2L31YIDAE(QFN48(PIN:D10R14U10L14))': { + 'M2L31YIDAE': { 'ALL': [] }, - 'M2L31YGDAE(QFN48(PIN:D10R14U10L14))': { + 'M2L31YGDAE': { 'ALL': [] }, - 'M2L31LE4AE(ULQFP48(USB1.1)(7*7))': { + 'M2L31LE4AE': { 'ALL': ['I2C2', 'I2C3', 'PWM0', 'PWM1', 'SPI2', 'SPI3', 'UART6', 'UART7', 'USCI1', 'CANFD1', 'DAC1', 'OPA2', 'TK'] }, - 'M2L31LG4AE(ULQFP48(USB1.1)(7*7))': { + 'M2L31LG4AE': { 'ALL': ['I2C2', 'I2C3', 'PWM0', 'PWM1', 'SPI2', 'SPI3', 'UART6', 'UART7', 'USCI1', 'CANFD1', 'DAC1', 'OPA2', 'TK'] }, - 'M2L31LD4AE(ULQFP48(USB1.1)(7*7))': { + 'M2L31LD4AE': { 'ALL': ['I2C2', 'I2C3', 'PWM0', 'PWM1', 'SPI2', 'SPI3', 'UART6', 'UART7', 'USCI1', 'CANFD1', 'DAC1', 'OPA2', 'TK'] }, - 'M2L31LIDAE(ULQFP48(USB1.1)(7*7))': { + 'M2L31LIDAE': { 'ALL': [] }, - 'M2L31LGDAE(ULQFP48(USB1.1)(7*7))': { + 'M2L31LGDAE': { 'ALL': [] }, - 'M2L31CIDAE(UWLCSP49(USB1.1))': { + 'M2L31CIDAE': { 'ALL': ['I2C2', 'I2C3', 'PWM0', 'PWM1', 'SPI2', 'SPI3', 'UART6', 'UART7', 'USCI1', 'CANFD1', 'DAC1', 'OPA2', 'TK'] }, - 'M2L31CGDAE(UWLCSP49(USB1.1))': { + 'M2L31CGDAE': { 'ALL': ['I2C2', 'I2C3', 'PWM0', 'PWM1', 'SPI2', 'SPI3', 'UART6', 'UART7', 'USCI1', 'CANFD1', 'DAC1', 'OPA2', 'TK'] }, - 'M2L31SG4AE(ULQFP64(USB1.1)(7*7))': { + 'M2L31SG4AE': { 'ALL': ['I2C2', 'I2C3', 'PWM0', 'PWM1', 'SPI2', 'SPI3', 'UART6', 'UART7', 'USCI1', 'CANFD1', 'DAC1', 'OPA2', 'TK'] }, - 'M2L31SE4AE(ULQFP64(USB1.1)(7*7))': { + 'M2L31SE4AE': { 'ALL': ['I2C2', 'I2C3', 'PWM0', 'PWM1', 'SPI2', 'SPI3', 'UART6', 'UART7', 'USCI1', 'CANFD1', 'DAC1', 'OPA2', 'TK'] }, - 'M2L31SIDAE(ULQFP64(USB1.1)(7*7))': { + 'M2L31SIDAE': { 'ALL': [] }, - 'M2L31SGDAE(ULQFP64(USB1.1)(7*7))': { + 'M2L31SGDAE': { 'ALL': [] }, - 'M2L31KIDAE(ULQFP128(USB1.1)(14*14))': { + 'M2L31KIDAE': { 'ALL': [] }, - 'M2L31KGDAE(ULQFP128(USB1.1)(14*14))': { + 'M2L31KGDAE': { 'ALL': [] } }; diff --git a/src/NUC_M55M1_Content.js b/src/NUC_M55M1_Content.js index f3c2220..9b09b1b 100644 --- a/src/NUC_M55M1_Content.js +++ b/src/NUC_M55M1_Content.js @@ -167,8 +167,8 @@ NUTOOL_PIN.g_cfg_gpios = [ { f: ['PA.10:0', 'EADC0_CH22:1', 'LPADC0_CH22:1', 'ACMP1_P0:1', 'EBI_nWR:2', 'SC2_RST:3', 'SPI2_CLK:4', 'SD1_DAT2:5', 'USCI0_DAT0:6', 'I2C2_SDA:7', 'UART6_RXD:8', 'BPWM0_CH1:9', 'EQEI1_INDEX:10', 'ECAP0_IC0:11', 'I2S1_MCLK:12', 'TM1_EXT:13', 'DAC0_ST:14', 'SWDH_CLK:15', 'KPI_ROW5:18', 'LPTM1_EXT:23']}, { f: ['PA.11:0', 'EADC0_CH23:1', 'LPADC0_CH23:1', 'ACMP0_P0:1', 'EBI_nRD:2', 'SC2_PWR:3', 'SPI2_SS:4', 'SD1_DAT3:5', 'USCI0_CLK:6', 'I2C2_SCL:7', 'UART6_TXD:8', 'BPWM0_CH0:9', 'EPWM0_SYNC_OUT:10', 'EPWM0_BRAKE1:11', 'I2S1_BCLK:12', 'TM0_EXT:13', 'DAC1_ST:14', 'KPI_ROW4:18', 'LPTM0_EXT:23']}, { f: ['PA.12:0', 'I2S0_BCLK:2', 'UART4_TXD:3', 'I2C1_SCL:4', 'SPI2_SS:5', 'CANFD0_TXD:6', 'SC2_PWR:7', 'SD1_nCD:8', 'QSPI1_MISO0:10', 'BPWM1_CH2:11', 'EQEI1_INDEX:12', 'ECAP3_IC0:13', 'USB_VBUS:14', 'PSIO0_CH4:17', 'LPSPI0_SS:20']}, - { f: ['PA.13:0', 'I2S0_MCLK:2', 'UART4_RXD:3', 'I2C1_SDA:4', 'SPI2_CLK:5', 'CANFD0_RXD:6', 'SC2_RST:7', 'QSPI1_MOSI0:10', 'BPWM1_CH3:11', 'EQEI1_A:12', 'ECAP3_IC1:13', 'USB_D-:14', 'PSIO0_CH5:17', 'LPSPI0_CLK:20']}, - { f: ['PA.14:0', 'I2S0_DI:2', 'UART0_TXD:3', 'EBI_AD5:4', 'SPI2_MISO:5', 'I2C2_SCL:6', 'SC2_DAT:7', 'BPWM1_CH4:11', 'EQEI1_B:12', 'ECAP3_IC2:13', 'USB_D+:14', 'PSIO0_CH6:17', 'LPSPI0_MISO:20']}, + { f: ['PA.13:0', 'I2S0_MCLK:2', 'UART4_RXD:3', 'I2C1_SDA:4', 'SPI2_CLK:5', 'CANFD0_RXD:6', 'SC2_RST:7', 'QSPI1_MOSI0:10', 'BPWM1_CH3:11', 'EQEI1_A:12', 'ECAP3_IC1:13', 'USB_D_MINUS:14', 'PSIO0_CH5:17', 'LPSPI0_CLK:20']}, + { f: ['PA.14:0', 'I2S0_DI:2', 'UART0_TXD:3', 'EBI_AD5:4', 'SPI2_MISO:5', 'I2C2_SCL:6', 'SC2_DAT:7', 'BPWM1_CH4:11', 'EQEI1_B:12', 'ECAP3_IC2:13', 'USB_D_PLUS:14', 'PSIO0_CH6:17', 'LPSPI0_MISO:20']}, { f: ['PA.15:0', 'I2S0_DO:2', 'UART0_RXD:3', 'SPI2_MOSI:5', 'I2C2_SDA:6', 'SC2_CLK:7', 'BPWM1_CH5:11', 'EPWM0_SYNC_IN:12', 'EQEI3_INDEX:13', 'USB_OTG_ID:14', 'PSIO0_CH7:17', 'LPSPI0_MOSI:20']}, { f: ['PB.0:0', 'EADC0_CH0:1', 'LPADC0_CH0:1', 'ACMP3_N:1', 'EBI_ADR9:2', 'SD0_CMD:3', 'SPI2_I2SMCLK:4', 'USCI0_CTL0:6', 'UART2_RXD:7', 'SPI0_I2SMCLK:8', 'I2C1_SDA:9', 'I2S1_LRCK:10', 'EPWM0_CH5:11', 'EPWM1_CH5:12', 'EPWM0_BRAKE1:13', 'ACMP3_O:14', 'QSPI0_MOSI1:15', 'I3C0_SDA:16', 'UTCPD0_VCNEN2:17', 'KPI_ROW3:18', 'LPIO2:23']}, @@ -326,6 +326,152 @@ NUTOOL_PIN.g_cfg_gpios = [ ]; NUTOOL_PIN.g_cfg_gpiosDefines = [ + { f: ['PA.0', 'GPIO:SYS_GPA_MFP0_PA0MFP_GPIO@GPA_MFP0', 'QSPI0_MOSI0:SYS_GPA_MFP0_PA0MFP_QSPI0_MOSI0@GPA_MFP0', 'SPI0_MOSI:SYS_GPA_MFP0_PA0MFP_SPI0_MOSI@GPA_MFP0', 'SD1_DAT0:SYS_GPA_MFP0_PA0MFP_SD1_DAT0@GPA_MFP0', 'SC0_CLK:SYS_GPA_MFP0_PA0MFP_SC0_CLK@GPA_MFP0', 'UART0_RXD:SYS_GPA_MFP0_PA0MFP_UART0_RXD@GPA_MFP0', 'UART1_nRTS:SYS_GPA_MFP0_PA0MFP_UART1_nRTS@GPA_MFP0', 'I2C2_SDA:SYS_GPA_MFP0_PA0MFP_I2C2_SDA@GPA_MFP0', 'CCAP_DATA6:SYS_GPA_MFP0_PA0MFP_CCAP_DATA6@GPA_MFP0', 'I3C0_SDA:SYS_GPA_MFP0_PA0MFP_I3C0_SDA@GPA_MFP0', 'BPWM0_CH0:SYS_GPA_MFP0_PA0MFP_BPWM0_CH0@GPA_MFP0', 'EPWM0_CH5:SYS_GPA_MFP0_PA0MFP_EPWM0_CH5@GPA_MFP0', 'EQEI3_B:SYS_GPA_MFP0_PA0MFP_EQEI3_B@GPA_MFP0', 'DAC0_ST:SYS_GPA_MFP0_PA0MFP_DAC0_ST@GPA_MFP0', 'PSIO0_CH7:SYS_GPA_MFP0_PA0MFP_PSIO0_CH7@GPA_MFP0', 'UTCPD0_VCNEN1:SYS_GPA_MFP0_PA0MFP_UTCPD0_VCNEN1@GPA_MFP0', 'LPSPI0_MOSI:SYS_GPA_MFP0_PA0MFP_LPSPI0_MOSI@GPA_MFP0', 'LPUART0_RXD:SYS_GPA_MFP0_PA0MFP_LPUART0_RXD@GPA_MFP0', 'LPIO0:SYS_GPA_MFP0_PA0MFP_LPIO0@GPA_MFP0'] }, + { f: ['PA.1', 'GPIO:SYS_GPA_MFP0_PA1MFP_GPIO@GPA_MFP0', 'QSPI0_MISO0:SYS_GPA_MFP0_PA1MFP_QSPI0_MISO0@GPA_MFP0', 'SPI0_MISO:SYS_GPA_MFP0_PA1MFP_SPI0_MISO@GPA_MFP0', 'SD1_DAT1:SYS_GPA_MFP0_PA1MFP_SD1_DAT1@GPA_MFP0', 'SC0_DAT:SYS_GPA_MFP0_PA1MFP_SC0_DAT@GPA_MFP0', 'UART0_TXD:SYS_GPA_MFP0_PA1MFP_UART0_TXD@GPA_MFP0', 'UART1_nCTS:SYS_GPA_MFP0_PA1MFP_UART1_nCTS@GPA_MFP0', 'I2C2_SCL:SYS_GPA_MFP0_PA1MFP_I2C2_SCL@GPA_MFP0', 'CCAP_DATA7:SYS_GPA_MFP0_PA1MFP_CCAP_DATA7@GPA_MFP0', 'I3C0_SCL:SYS_GPA_MFP0_PA1MFP_I3C0_SCL@GPA_MFP0', 'BPWM0_CH1:SYS_GPA_MFP0_PA1MFP_BPWM0_CH1@GPA_MFP0', 'EPWM0_CH4:SYS_GPA_MFP0_PA1MFP_EPWM0_CH4@GPA_MFP0', 'EQEI3_A:SYS_GPA_MFP0_PA1MFP_EQEI3_A@GPA_MFP0', 'DAC1_ST:SYS_GPA_MFP0_PA1MFP_DAC1_ST@GPA_MFP0', 'DMIC1_CLK:SYS_GPA_MFP0_PA1MFP_DMIC1_CLK@GPA_MFP0', 'PSIO0_CH6:SYS_GPA_MFP0_PA1MFP_PSIO0_CH6@GPA_MFP0', 'UTCPD0_DISCHG:SYS_GPA_MFP0_PA1MFP_UTCPD0_DISCHG@GPA_MFP0', 'UTCPD0_FRSTX1:SYS_GPA_MFP0_PA1MFP_UTCPD0_FRSTX1@GPA_MFP0', 'LPSPI0_MISO:SYS_GPA_MFP0_PA1MFP_LPSPI0_MISO@GPA_MFP0', 'LPUART0_TXD:SYS_GPA_MFP0_PA1MFP_LPUART0_TXD@GPA_MFP0', 'LPIO1:SYS_GPA_MFP0_PA1MFP_LPIO1@GPA_MFP0'] }, + { f: ['PA.2', 'GPIO:SYS_GPA_MFP0_PA2MFP_GPIO@GPA_MFP0', 'QSPI0_CLK:SYS_GPA_MFP0_PA2MFP_QSPI0_CLK@GPA_MFP0', 'SPI0_CLK:SYS_GPA_MFP0_PA2MFP_SPI0_CLK@GPA_MFP0', 'SD1_DAT2:SYS_GPA_MFP0_PA2MFP_SD1_DAT2@GPA_MFP0', 'SC0_RST:SYS_GPA_MFP0_PA2MFP_SC0_RST@GPA_MFP0', 'UART4_RXD:SYS_GPA_MFP0_PA2MFP_UART4_RXD@GPA_MFP0', 'UART1_RXD:SYS_GPA_MFP0_PA2MFP_UART1_RXD@GPA_MFP0', 'I2C1_SDA:SYS_GPA_MFP0_PA2MFP_I2C1_SDA@GPA_MFP0', 'I2C0_SMBSUS:SYS_GPA_MFP0_PA2MFP_I2C0_SMBSUS@GPA_MFP0', 'CCAP_DATA2:SYS_GPA_MFP0_PA2MFP_CCAP_DATA2@GPA_MFP0', 'BPWM0_CH2:SYS_GPA_MFP0_PA2MFP_BPWM0_CH2@GPA_MFP0', 'EPWM0_CH3:SYS_GPA_MFP0_PA2MFP_EPWM0_CH3@GPA_MFP0', 'EQEI3_INDEX:SYS_GPA_MFP0_PA2MFP_EQEI3_INDEX@GPA_MFP0', 'DMIC1_DAT:SYS_GPA_MFP0_PA2MFP_DMIC1_DAT@GPA_MFP0', 'PSIO0_CH5:SYS_GPA_MFP0_PA2MFP_PSIO0_CH5@GPA_MFP0', 'I3C0_PUPEN:SYS_GPA_MFP0_PA2MFP_I3C0_PUPEN@GPA_MFP0', 'UTCPD0_VBSRCEN:SYS_GPA_MFP0_PA2MFP_UTCPD0_VBSRCEN@GPA_MFP0', 'LPSPI0_CLK:SYS_GPA_MFP0_PA2MFP_LPSPI0_CLK@GPA_MFP0'] }, + { f: ['PA.3', 'GPIO:SYS_GPA_MFP0_PA3MFP_GPIO@GPA_MFP0', 'QSPI0_SS:SYS_GPA_MFP0_PA3MFP_QSPI0_SS@GPA_MFP0', 'SPI0_SS:SYS_GPA_MFP0_PA3MFP_SPI0_SS@GPA_MFP0', 'SD1_DAT3:SYS_GPA_MFP0_PA3MFP_SD1_DAT3@GPA_MFP0', 'SC0_PWR:SYS_GPA_MFP0_PA3MFP_SC0_PWR@GPA_MFP0', 'UART4_TXD:SYS_GPA_MFP0_PA3MFP_UART4_TXD@GPA_MFP0', 'UART1_TXD:SYS_GPA_MFP0_PA3MFP_UART1_TXD@GPA_MFP0', 'I2C1_SCL:SYS_GPA_MFP0_PA3MFP_I2C1_SCL@GPA_MFP0', 'I2C0_SMBAL:SYS_GPA_MFP0_PA3MFP_I2C0_SMBAL@GPA_MFP0', 'CCAP_DATA3:SYS_GPA_MFP0_PA3MFP_CCAP_DATA3@GPA_MFP0', 'BPWM0_CH3:SYS_GPA_MFP0_PA3MFP_BPWM0_CH3@GPA_MFP0', 'EPWM0_CH2:SYS_GPA_MFP0_PA3MFP_EPWM0_CH2@GPA_MFP0', 'EQEI0_B:SYS_GPA_MFP0_PA3MFP_EQEI0_B@GPA_MFP0', 'EPWM1_BRAKE1:SYS_GPA_MFP0_PA3MFP_EPWM1_BRAKE1@GPA_MFP0', 'DMIC0_CLKLP:SYS_GPA_MFP0_PA3MFP_DMIC0_CLKLP@GPA_MFP0', 'PSIO0_CH4:SYS_GPA_MFP0_PA3MFP_PSIO0_CH4@GPA_MFP0', 'UTCPD0_VBSNKEN:SYS_GPA_MFP0_PA3MFP_UTCPD0_VBSNKEN@GPA_MFP0', 'LPSPI0_SS:SYS_GPA_MFP0_PA3MFP_LPSPI0_SS@GPA_MFP0'] }, + { f: ['PA.4', 'GPIO:SYS_GPA_MFP1_PA4MFP_GPIO@GPA_MFP1', 'EBI_AD1:SYS_GPA_MFP1_PA4MFP_EBI_AD1@GPA_MFP1', 'QSPI0_MOSI1:SYS_GPA_MFP1_PA4MFP_QSPI0_MOSI1@GPA_MFP1', 'SPI0_I2SMCLK:SYS_GPA_MFP1_PA4MFP_SPI0_I2SMCLK@GPA_MFP1', 'SD1_CLK:SYS_GPA_MFP1_PA4MFP_SD1_CLK@GPA_MFP1', 'SC0_nCD:SYS_GPA_MFP1_PA4MFP_SC0_nCD@GPA_MFP1', 'UART0_nRTS:SYS_GPA_MFP1_PA4MFP_UART0_nRTS@GPA_MFP1', 'UART5_RXD:SYS_GPA_MFP1_PA4MFP_UART5_RXD@GPA_MFP1', 'I2C0_SDA:SYS_GPA_MFP1_PA4MFP_I2C0_SDA@GPA_MFP1', 'CANFD0_RXD:SYS_GPA_MFP1_PA4MFP_CANFD0_RXD@GPA_MFP1', 'UART0_RXD:SYS_GPA_MFP1_PA4MFP_UART0_RXD@GPA_MFP1', 'BPWM0_CH4:SYS_GPA_MFP1_PA4MFP_BPWM0_CH4@GPA_MFP1', 'EPWM0_CH1:SYS_GPA_MFP1_PA4MFP_EPWM0_CH1@GPA_MFP1', 'EQEI0_A:SYS_GPA_MFP1_PA4MFP_EQEI0_A@GPA_MFP1', 'CCAP_SCLK:SYS_GPA_MFP1_PA4MFP_CCAP_SCLK@GPA_MFP1', 'DMIC0_CLK:SYS_GPA_MFP1_PA4MFP_DMIC0_CLK@GPA_MFP1', 'I3C0_SDA:SYS_GPA_MFP1_PA4MFP_I3C0_SDA@GPA_MFP1', 'UTCPD0_VBSRCEN:SYS_GPA_MFP1_PA4MFP_UTCPD0_VBSRCEN@GPA_MFP1', 'LPUART0_RXD:SYS_GPA_MFP1_PA4MFP_LPUART0_RXD@GPA_MFP1', 'LPUART0_nRTS:SYS_GPA_MFP1_PA4MFP_LPUART0_nRTS@GPA_MFP1', 'LPI2C0_SDA:SYS_GPA_MFP1_PA4MFP_LPI2C0_SDA@GPA_MFP1'] }, + { f: ['PA.5', 'GPIO:SYS_GPA_MFP1_PA5MFP_GPIO@GPA_MFP1', 'EBI_AD0:SYS_GPA_MFP1_PA5MFP_EBI_AD0@GPA_MFP1', 'QSPI0_MISO1:SYS_GPA_MFP1_PA5MFP_QSPI0_MISO1@GPA_MFP1', 'SPI1_I2SMCLK:SYS_GPA_MFP1_PA5MFP_SPI1_I2SMCLK@GPA_MFP1', 'SD1_CMD:SYS_GPA_MFP1_PA5MFP_SD1_CMD@GPA_MFP1', 'SC2_nCD:SYS_GPA_MFP1_PA5MFP_SC2_nCD@GPA_MFP1', 'UART0_nCTS:SYS_GPA_MFP1_PA5MFP_UART0_nCTS@GPA_MFP1', 'UART5_TXD:SYS_GPA_MFP1_PA5MFP_UART5_TXD@GPA_MFP1', 'I2C0_SCL:SYS_GPA_MFP1_PA5MFP_I2C0_SCL@GPA_MFP1', 'CANFD0_TXD:SYS_GPA_MFP1_PA5MFP_CANFD0_TXD@GPA_MFP1', 'UART0_TXD:SYS_GPA_MFP1_PA5MFP_UART0_TXD@GPA_MFP1', 'BPWM0_CH5:SYS_GPA_MFP1_PA5MFP_BPWM0_CH5@GPA_MFP1', 'EPWM0_CH0:SYS_GPA_MFP1_PA5MFP_EPWM0_CH0@GPA_MFP1', 'EQEI0_INDEX:SYS_GPA_MFP1_PA5MFP_EQEI0_INDEX@GPA_MFP1', 'CCAP_PIXCLK:SYS_GPA_MFP1_PA5MFP_CCAP_PIXCLK@GPA_MFP1', 'DMIC0_DAT:SYS_GPA_MFP1_PA5MFP_DMIC0_DAT@GPA_MFP1', 'I3C0_SCL:SYS_GPA_MFP1_PA5MFP_I3C0_SCL@GPA_MFP1', 'UTCPD0_VBSNKEN:SYS_GPA_MFP1_PA5MFP_UTCPD0_VBSNKEN@GPA_MFP1', 'LPUART0_TXD:SYS_GPA_MFP1_PA5MFP_LPUART0_TXD@GPA_MFP1', 'LPUART0_nCTS:SYS_GPA_MFP1_PA5MFP_LPUART0_nCTS@GPA_MFP1', 'LPI2C0_SCL:SYS_GPA_MFP1_PA5MFP_LPI2C0_SCL@GPA_MFP1'] }, + { f: ['PA.6', 'GPIO:SYS_GPA_MFP1_PA6MFP_GPIO@GPA_MFP1', 'UTCPD0_DISCHG:SYS_GPA_MFP1_PA6MFP_UTCPD0_DISCHG@GPA_MFP1', 'EMAC0_RMII_RXERR:SYS_GPA_MFP1_PA6MFP_EMAC0_RMII_RXERR@GPA_MFP1', 'SPI1_SS:SYS_GPA_MFP1_PA6MFP_SPI1_SS@GPA_MFP1', 'SD1_nCD:SYS_GPA_MFP1_PA6MFP_SD1_nCD@GPA_MFP1', 'SC2_CLK:SYS_GPA_MFP1_PA6MFP_SC2_CLK@GPA_MFP1', 'UART0_RXD:SYS_GPA_MFP1_PA6MFP_UART0_RXD@GPA_MFP1', 'I2C1_SDA:SYS_GPA_MFP1_PA6MFP_I2C1_SDA@GPA_MFP1', 'QSPI1_MOSI1:SYS_GPA_MFP1_PA6MFP_QSPI1_MOSI1@GPA_MFP1', 'EPWM1_CH5:SYS_GPA_MFP1_PA6MFP_EPWM1_CH5@GPA_MFP1', 'BPWM1_CH3:SYS_GPA_MFP1_PA6MFP_BPWM1_CH3@GPA_MFP1', 'ACMP1_WLAT:SYS_GPA_MFP1_PA6MFP_ACMP1_WLAT@GPA_MFP1', 'TM3:SYS_GPA_MFP1_PA6MFP_TM3@GPA_MFP1', 'INT0:SYS_GPA_MFP1_PA6MFP_INT0@GPA_MFP1', 'UTCPD0_VBSRCEN:SYS_GPA_MFP1_PA6MFP_UTCPD0_VBSRCEN@GPA_MFP1', 'KPI_COL0:SYS_GPA_MFP1_PA6MFP_KPI_COL0@GPA_MFP1', 'LPUART0_RXD:SYS_GPA_MFP1_PA6MFP_LPUART0_RXD@GPA_MFP1', 'LPIO4:SYS_GPA_MFP1_PA6MFP_LPIO4@GPA_MFP1'] }, + { f: ['PA.7', 'GPIO:SYS_GPA_MFP1_PA7MFP_GPIO@GPA_MFP1', 'EBI_AD7:SYS_GPA_MFP1_PA7MFP_EBI_AD7@GPA_MFP1', 'EMAC0_RMII_CRSDV:SYS_GPA_MFP1_PA7MFP_EMAC0_RMII_CRSDV@GPA_MFP1', 'SPI1_CLK:SYS_GPA_MFP1_PA7MFP_SPI1_CLK@GPA_MFP1', 'SC2_DAT:SYS_GPA_MFP1_PA7MFP_SC2_DAT@GPA_MFP1', 'UART0_TXD:SYS_GPA_MFP1_PA7MFP_UART0_TXD@GPA_MFP1', 'I2C1_SCL:SYS_GPA_MFP1_PA7MFP_I2C1_SCL@GPA_MFP1', 'QSPI1_MISO1:SYS_GPA_MFP1_PA7MFP_QSPI1_MISO1@GPA_MFP1', 'EPWM1_CH4:SYS_GPA_MFP1_PA7MFP_EPWM1_CH4@GPA_MFP1', 'BPWM1_CH2:SYS_GPA_MFP1_PA7MFP_BPWM1_CH2@GPA_MFP1', 'ACMP0_WLAT:SYS_GPA_MFP1_PA7MFP_ACMP0_WLAT@GPA_MFP1', 'TM2:SYS_GPA_MFP1_PA7MFP_TM2@GPA_MFP1', 'INT1:SYS_GPA_MFP1_PA7MFP_INT1@GPA_MFP1', 'UTCPD0_VBSNKEN:SYS_GPA_MFP1_PA7MFP_UTCPD0_VBSNKEN@GPA_MFP1', 'KPI_COL1:SYS_GPA_MFP1_PA7MFP_KPI_COL1@GPA_MFP1', 'LPUART0_TXD:SYS_GPA_MFP1_PA7MFP_LPUART0_TXD@GPA_MFP1', 'LPIO5:SYS_GPA_MFP1_PA7MFP_LPIO5@GPA_MFP1'] }, + { f: ['PA.8', 'GPIO:SYS_GPA_MFP2_PA8MFP_GPIO@GPA_MFP2', 'EADC0_CH20:SYS_GPA_MFP2_PA8MFP_EADC0_CH20@GPA_MFP2', 'LPADC0_CH20:SYS_GPA_MFP2_PA8MFP_LPADC0_CH20@GPA_MFP2', 'EBI_ALE:SYS_GPA_MFP2_PA8MFP_EBI_ALE@GPA_MFP2', 'SC2_CLK:SYS_GPA_MFP2_PA8MFP_SC2_CLK@GPA_MFP2', 'SPI2_MOSI:SYS_GPA_MFP2_PA8MFP_SPI2_MOSI@GPA_MFP2', 'SD1_DAT0:SYS_GPA_MFP2_PA8MFP_SD1_DAT0@GPA_MFP2', 'USCI0_CTL1:SYS_GPA_MFP2_PA8MFP_USCI0_CTL1@GPA_MFP2', 'UART1_RXD:SYS_GPA_MFP2_PA8MFP_UART1_RXD@GPA_MFP2', 'UART7_RXD:SYS_GPA_MFP2_PA8MFP_UART7_RXD@GPA_MFP2', 'BPWM0_CH3:SYS_GPA_MFP2_PA8MFP_BPWM0_CH3@GPA_MFP2', 'EQEI1_B:SYS_GPA_MFP2_PA8MFP_EQEI1_B@GPA_MFP2', 'ECAP0_IC2:SYS_GPA_MFP2_PA8MFP_ECAP0_IC2@GPA_MFP2', 'I2S1_DO:SYS_GPA_MFP2_PA8MFP_I2S1_DO@GPA_MFP2', 'TM3_EXT:SYS_GPA_MFP2_PA8MFP_TM3_EXT@GPA_MFP2', 'INT4:SYS_GPA_MFP2_PA8MFP_INT4@GPA_MFP2'] }, + { f: ['PA.9', 'GPIO:SYS_GPA_MFP2_PA9MFP_GPIO@GPA_MFP2', 'EADC0_CH21:SYS_GPA_MFP2_PA9MFP_EADC0_CH21@GPA_MFP2', 'LPADC0_CH21:SYS_GPA_MFP2_PA9MFP_LPADC0_CH21@GPA_MFP2', 'EBI_MCLK:SYS_GPA_MFP2_PA9MFP_EBI_MCLK@GPA_MFP2', 'SC2_DAT:SYS_GPA_MFP2_PA9MFP_SC2_DAT@GPA_MFP2', 'SPI2_MISO:SYS_GPA_MFP2_PA9MFP_SPI2_MISO@GPA_MFP2', 'SD1_DAT1:SYS_GPA_MFP2_PA9MFP_SD1_DAT1@GPA_MFP2', 'USCI0_DAT1:SYS_GPA_MFP2_PA9MFP_USCI0_DAT1@GPA_MFP2', 'UART1_TXD:SYS_GPA_MFP2_PA9MFP_UART1_TXD@GPA_MFP2', 'UART7_TXD:SYS_GPA_MFP2_PA9MFP_UART7_TXD@GPA_MFP2', 'BPWM0_CH2:SYS_GPA_MFP2_PA9MFP_BPWM0_CH2@GPA_MFP2', 'EQEI1_A:SYS_GPA_MFP2_PA9MFP_EQEI1_A@GPA_MFP2', 'ECAP0_IC1:SYS_GPA_MFP2_PA9MFP_ECAP0_IC1@GPA_MFP2', 'I2S1_DI:SYS_GPA_MFP2_PA9MFP_I2S1_DI@GPA_MFP2', 'TM2_EXT:SYS_GPA_MFP2_PA9MFP_TM2_EXT@GPA_MFP2', 'SWDH_DAT:SYS_GPA_MFP2_PA9MFP_SWDH_DAT@GPA_MFP2'] }, + { f: ['PA.10', 'GPIO:SYS_GPA_MFP2_PA10MFP_GPIO@GPA_MFP2', 'ACMP1_P0:SYS_GPA_MFP2_PA10MFP_ACMP1_P0@GPA_MFP2', 'EADC0_CH22:SYS_GPA_MFP2_PA10MFP_EADC0_CH22@GPA_MFP2', 'LPADC0_CH22:SYS_GPA_MFP2_PA10MFP_LPADC0_CH22@GPA_MFP2', 'EBI_nWR:SYS_GPA_MFP2_PA10MFP_EBI_nWR@GPA_MFP2', 'SC2_RST:SYS_GPA_MFP2_PA10MFP_SC2_RST@GPA_MFP2', 'SPI2_CLK:SYS_GPA_MFP2_PA10MFP_SPI2_CLK@GPA_MFP2', 'SD1_DAT2:SYS_GPA_MFP2_PA10MFP_SD1_DAT2@GPA_MFP2', 'USCI0_DAT0:SYS_GPA_MFP2_PA10MFP_USCI0_DAT0@GPA_MFP2', 'I2C2_SDA:SYS_GPA_MFP2_PA10MFP_I2C2_SDA@GPA_MFP2', 'UART6_RXD:SYS_GPA_MFP2_PA10MFP_UART6_RXD@GPA_MFP2', 'BPWM0_CH1:SYS_GPA_MFP2_PA10MFP_BPWM0_CH1@GPA_MFP2', 'EQEI1_INDEX:SYS_GPA_MFP2_PA10MFP_EQEI1_INDEX@GPA_MFP2', 'ECAP0_IC0:SYS_GPA_MFP2_PA10MFP_ECAP0_IC0@GPA_MFP2', 'I2S1_MCLK:SYS_GPA_MFP2_PA10MFP_I2S1_MCLK@GPA_MFP2', 'TM1_EXT:SYS_GPA_MFP2_PA10MFP_TM1_EXT@GPA_MFP2', 'DAC0_ST:SYS_GPA_MFP2_PA10MFP_DAC0_ST@GPA_MFP2', 'SWDH_CLK:SYS_GPA_MFP2_PA10MFP_SWDH_CLK@GPA_MFP2', 'KPI_ROW5:SYS_GPA_MFP2_PA10MFP_KPI_ROW5@GPA_MFP2', 'LPTM1_EXT:SYS_GPA_MFP2_PA10MFP_LPTM1_EXT@GPA_MFP2'] }, + { f: ['PA.11', 'GPIO:SYS_GPA_MFP2_PA11MFP_GPIO@GPA_MFP2', 'ACMP0_P0:SYS_GPA_MFP2_PA11MFP_ACMP0_P0@GPA_MFP2', 'EADC0_CH23:SYS_GPA_MFP2_PA11MFP_EADC0_CH23@GPA_MFP2', 'LPADC0_CH23:SYS_GPA_MFP2_PA11MFP_LPADC0_CH23@GPA_MFP2', 'EBI_nRD:SYS_GPA_MFP2_PA11MFP_EBI_nRD@GPA_MFP2', 'SC2_PWR:SYS_GPA_MFP2_PA11MFP_SC2_PWR@GPA_MFP2', 'SPI2_SS:SYS_GPA_MFP2_PA11MFP_SPI2_SS@GPA_MFP2', 'SD1_DAT3:SYS_GPA_MFP2_PA11MFP_SD1_DAT3@GPA_MFP2', 'USCI0_CLK:SYS_GPA_MFP2_PA11MFP_USCI0_CLK@GPA_MFP2', 'I2C2_SCL:SYS_GPA_MFP2_PA11MFP_I2C2_SCL@GPA_MFP2', 'UART6_TXD:SYS_GPA_MFP2_PA11MFP_UART6_TXD@GPA_MFP2', 'BPWM0_CH0:SYS_GPA_MFP2_PA11MFP_BPWM0_CH0@GPA_MFP2', 'EPWM0_SYNC_OUT:SYS_GPA_MFP2_PA11MFP_EPWM0_SYNC_OUT@GPA_MFP2', 'EPWM0_BRAKE1:SYS_GPA_MFP2_PA11MFP_EPWM0_BRAKE1@GPA_MFP2', 'I2S1_BCLK:SYS_GPA_MFP2_PA11MFP_I2S1_BCLK@GPA_MFP2', 'TM0_EXT:SYS_GPA_MFP2_PA11MFP_TM0_EXT@GPA_MFP2', 'DAC1_ST:SYS_GPA_MFP2_PA11MFP_DAC1_ST@GPA_MFP2', 'KPI_ROW4:SYS_GPA_MFP2_PA11MFP_KPI_ROW4@GPA_MFP2', 'LPTM0_EXT:SYS_GPA_MFP2_PA11MFP_LPTM0_EXT@GPA_MFP2'] }, + { f: ['PA.12', 'GPIO:SYS_GPA_MFP3_PA12MFP_GPIO@GPA_MFP3', 'I2S0_BCLK:SYS_GPA_MFP3_PA12MFP_I2S0_BCLK@GPA_MFP3', 'UART4_TXD:SYS_GPA_MFP3_PA12MFP_UART4_TXD@GPA_MFP3', 'I2C1_SCL:SYS_GPA_MFP3_PA12MFP_I2C1_SCL@GPA_MFP3', 'SPI2_SS:SYS_GPA_MFP3_PA12MFP_SPI2_SS@GPA_MFP3', 'CANFD0_TXD:SYS_GPA_MFP3_PA12MFP_CANFD0_TXD@GPA_MFP3', 'SC2_PWR:SYS_GPA_MFP3_PA12MFP_SC2_PWR@GPA_MFP3', 'SD1_nCD:SYS_GPA_MFP3_PA12MFP_SD1_nCD@GPA_MFP3', 'QSPI1_MISO0:SYS_GPA_MFP3_PA12MFP_QSPI1_MISO0@GPA_MFP3', 'BPWM1_CH2:SYS_GPA_MFP3_PA12MFP_BPWM1_CH2@GPA_MFP3', 'EQEI1_INDEX:SYS_GPA_MFP3_PA12MFP_EQEI1_INDEX@GPA_MFP3', 'ECAP3_IC0:SYS_GPA_MFP3_PA12MFP_ECAP3_IC0@GPA_MFP3', 'USB_VBUS:SYS_GPA_MFP3_PA12MFP_USB_VBUS@GPA_MFP3', 'PSIO0_CH4:SYS_GPA_MFP3_PA12MFP_PSIO0_CH4@GPA_MFP3', 'LPSPI0_SS:SYS_GPA_MFP3_PA12MFP_LPSPI0_SS@GPA_MFP3'] }, + { f: ['PA.13', 'GPIO:SYS_GPA_MFP3_PA13MFP_GPIO@GPA_MFP3', 'I2S0_MCLK:SYS_GPA_MFP3_PA13MFP_I2S0_MCLK@GPA_MFP3', 'UART4_RXD:SYS_GPA_MFP3_PA13MFP_UART4_RXD@GPA_MFP3', 'I2C1_SDA:SYS_GPA_MFP3_PA13MFP_I2C1_SDA@GPA_MFP3', 'SPI2_CLK:SYS_GPA_MFP3_PA13MFP_SPI2_CLK@GPA_MFP3', 'CANFD0_RXD:SYS_GPA_MFP3_PA13MFP_CANFD0_RXD@GPA_MFP3', 'SC2_RST:SYS_GPA_MFP3_PA13MFP_SC2_RST@GPA_MFP3', 'QSPI1_MOSI0:SYS_GPA_MFP3_PA13MFP_QSPI1_MOSI0@GPA_MFP3', 'BPWM1_CH3:SYS_GPA_MFP3_PA13MFP_BPWM1_CH3@GPA_MFP3', 'EQEI1_A:SYS_GPA_MFP3_PA13MFP_EQEI1_A@GPA_MFP3', 'ECAP3_IC1:SYS_GPA_MFP3_PA13MFP_ECAP3_IC1@GPA_MFP3', 'USB_D_MINUS:SYS_GPA_MFP3_PA13MFP_USB_D_MINUS@GPA_MFP3', 'PSIO0_CH5:SYS_GPA_MFP3_PA13MFP_PSIO0_CH5@GPA_MFP3', 'LPSPI0_CLK:SYS_GPA_MFP3_PA13MFP_LPSPI0_CLK@GPA_MFP3'] }, + { f: ['PA.14', 'GPIO:SYS_GPA_MFP3_PA14MFP_GPIO@GPA_MFP3', 'I2S0_DI:SYS_GPA_MFP3_PA14MFP_I2S0_DI@GPA_MFP3', 'UART0_TXD:SYS_GPA_MFP3_PA14MFP_UART0_TXD@GPA_MFP3', 'EBI_AD5:SYS_GPA_MFP3_PA14MFP_EBI_AD5@GPA_MFP3', 'SPI2_MISO:SYS_GPA_MFP3_PA14MFP_SPI2_MISO@GPA_MFP3', 'I2C2_SCL:SYS_GPA_MFP3_PA14MFP_I2C2_SCL@GPA_MFP3', 'SC2_DAT:SYS_GPA_MFP3_PA14MFP_SC2_DAT@GPA_MFP3', 'BPWM1_CH4:SYS_GPA_MFP3_PA14MFP_BPWM1_CH4@GPA_MFP3', 'EQEI1_B:SYS_GPA_MFP3_PA14MFP_EQEI1_B@GPA_MFP3', 'ECAP3_IC2:SYS_GPA_MFP3_PA14MFP_ECAP3_IC2@GPA_MFP3', 'USB_D_PLUS:SYS_GPA_MFP3_PA14MFP_USB_D_PLUS@GPA_MFP3', 'PSIO0_CH6:SYS_GPA_MFP3_PA14MFP_PSIO0_CH6@GPA_MFP3', 'LPSPI0_MISO:SYS_GPA_MFP3_PA14MFP_LPSPI0_MISO@GPA_MFP3'] }, + { f: ['PA.15', 'GPIO:SYS_GPA_MFP3_PA15MFP_GPIO@GPA_MFP3', 'I2S0_DO:SYS_GPA_MFP3_PA15MFP_I2S0_DO@GPA_MFP3', 'UART0_RXD:SYS_GPA_MFP3_PA15MFP_UART0_RXD@GPA_MFP3', 'SPI2_MOSI:SYS_GPA_MFP3_PA15MFP_SPI2_MOSI@GPA_MFP3', 'I2C2_SDA:SYS_GPA_MFP3_PA15MFP_I2C2_SDA@GPA_MFP3', 'SC2_CLK:SYS_GPA_MFP3_PA15MFP_SC2_CLK@GPA_MFP3', 'BPWM1_CH5:SYS_GPA_MFP3_PA15MFP_BPWM1_CH5@GPA_MFP3', 'EPWM0_SYNC_IN:SYS_GPA_MFP3_PA15MFP_EPWM0_SYNC_IN@GPA_MFP3', 'EQEI3_INDEX:SYS_GPA_MFP3_PA15MFP_EQEI3_INDEX@GPA_MFP3', 'USB_OTG_ID:SYS_GPA_MFP3_PA15MFP_USB_OTG_ID@GPA_MFP3', 'PSIO0_CH7:SYS_GPA_MFP3_PA15MFP_PSIO0_CH7@GPA_MFP3', 'LPSPI0_MOSI:SYS_GPA_MFP3_PA15MFP_LPSPI0_MOSI@GPA_MFP3'] }, + { f: ['PB.0', 'GPIO:SYS_GPB_MFP0_PB0MFP_GPIO@GPB_MFP0', 'ACMP3_N:SYS_GPB_MFP0_PB0MFP_ACMP3_N@GPB_MFP0', 'EADC0_CH0:SYS_GPB_MFP0_PB0MFP_EADC0_CH0@GPB_MFP0', 'LPADC0_CH0:SYS_GPB_MFP0_PB0MFP_LPADC0_CH0@GPB_MFP0', 'EBI_ADR9:SYS_GPB_MFP0_PB0MFP_EBI_ADR9@GPB_MFP0', 'SD0_CMD:SYS_GPB_MFP0_PB0MFP_SD0_CMD@GPB_MFP0', 'SPI2_I2SMCLK:SYS_GPB_MFP0_PB0MFP_SPI2_I2SMCLK@GPB_MFP0', 'USCI0_CTL0:SYS_GPB_MFP0_PB0MFP_USCI0_CTL0@GPB_MFP0', 'UART2_RXD:SYS_GPB_MFP0_PB0MFP_UART2_RXD@GPB_MFP0', 'SPI0_I2SMCLK:SYS_GPB_MFP0_PB0MFP_SPI0_I2SMCLK@GPB_MFP0', 'I2C1_SDA:SYS_GPB_MFP0_PB0MFP_I2C1_SDA@GPB_MFP0', 'I2S1_LRCK:SYS_GPB_MFP0_PB0MFP_I2S1_LRCK@GPB_MFP0', 'EPWM0_CH5:SYS_GPB_MFP0_PB0MFP_EPWM0_CH5@GPB_MFP0', 'EPWM1_CH5:SYS_GPB_MFP0_PB0MFP_EPWM1_CH5@GPB_MFP0', 'EPWM0_BRAKE1:SYS_GPB_MFP0_PB0MFP_EPWM0_BRAKE1@GPB_MFP0', 'ACMP3_O:SYS_GPB_MFP0_PB0MFP_ACMP3_O@GPB_MFP0', 'QSPI0_MOSI1:SYS_GPB_MFP0_PB0MFP_QSPI0_MOSI1@GPB_MFP0', 'I3C0_SDA:SYS_GPB_MFP0_PB0MFP_I3C0_SDA@GPB_MFP0', 'UTCPD0_VCNEN2:SYS_GPB_MFP0_PB0MFP_UTCPD0_VCNEN2@GPB_MFP0', 'KPI_ROW3:SYS_GPB_MFP0_PB0MFP_KPI_ROW3@GPB_MFP0', 'LPIO2:SYS_GPB_MFP0_PB0MFP_LPIO2@GPB_MFP0'] }, + { f: ['PB.1', 'GPIO:SYS_GPB_MFP0_PB1MFP_GPIO@GPB_MFP0', 'ACMP3_P0:SYS_GPB_MFP0_PB1MFP_ACMP3_P0@GPB_MFP0', 'EADC0_CH1:SYS_GPB_MFP0_PB1MFP_EADC0_CH1@GPB_MFP0', 'LPADC0_CH1:SYS_GPB_MFP0_PB1MFP_LPADC0_CH1@GPB_MFP0', 'EBI_ADR8:SYS_GPB_MFP0_PB1MFP_EBI_ADR8@GPB_MFP0', 'SD0_CLK:SYS_GPB_MFP0_PB1MFP_SD0_CLK@GPB_MFP0', 'EMAC0_RMII_RXERR:SYS_GPB_MFP0_PB1MFP_EMAC0_RMII_RXERR@GPB_MFP0', 'SPI1_I2SMCLK:SYS_GPB_MFP0_PB1MFP_SPI1_I2SMCLK@GPB_MFP0', 'SPI3_I2SMCLK:SYS_GPB_MFP0_PB1MFP_SPI3_I2SMCLK@GPB_MFP0', 'UART2_TXD:SYS_GPB_MFP0_PB1MFP_UART2_TXD@GPB_MFP0', 'I2C1_SCL:SYS_GPB_MFP0_PB1MFP_I2C1_SCL@GPB_MFP0', 'I2S0_LRCK:SYS_GPB_MFP0_PB1MFP_I2S0_LRCK@GPB_MFP0', 'EPWM0_CH4:SYS_GPB_MFP0_PB1MFP_EPWM0_CH4@GPB_MFP0', 'EPWM1_CH4:SYS_GPB_MFP0_PB1MFP_EPWM1_CH4@GPB_MFP0', 'EPWM0_BRAKE0:SYS_GPB_MFP0_PB1MFP_EPWM0_BRAKE0@GPB_MFP0', 'ACMP2_O:SYS_GPB_MFP0_PB1MFP_ACMP2_O@GPB_MFP0', 'QSPI0_MISO1:SYS_GPB_MFP0_PB1MFP_QSPI0_MISO1@GPB_MFP0', 'I3C0_SCL:SYS_GPB_MFP0_PB1MFP_I3C0_SCL@GPB_MFP0', 'UTCPD0_VBDCHG:SYS_GPB_MFP0_PB1MFP_UTCPD0_VBDCHG@GPB_MFP0', 'KPI_ROW2:SYS_GPB_MFP0_PB1MFP_KPI_ROW2@GPB_MFP0', 'LPIO3:SYS_GPB_MFP0_PB1MFP_LPIO3@GPB_MFP0'] }, + { f: ['PB.2', 'GPIO:SYS_GPB_MFP0_PB2MFP_GPIO@GPB_MFP0', 'ACMP0_P1:SYS_GPB_MFP0_PB2MFP_ACMP0_P1@GPB_MFP0', 'EADC0_CH2:SYS_GPB_MFP0_PB2MFP_EADC0_CH2@GPB_MFP0', 'LPADC0_CH2:SYS_GPB_MFP0_PB2MFP_LPADC0_CH2@GPB_MFP0', 'EBI_ADR3:SYS_GPB_MFP0_PB2MFP_EBI_ADR3@GPB_MFP0', 'SD0_DAT0:SYS_GPB_MFP0_PB2MFP_SD0_DAT0@GPB_MFP0', 'EMAC0_RMII_CRSDV:SYS_GPB_MFP0_PB2MFP_EMAC0_RMII_CRSDV@GPB_MFP0', 'SPI1_SS:SYS_GPB_MFP0_PB2MFP_SPI1_SS@GPB_MFP0', 'UART1_RXD:SYS_GPB_MFP0_PB2MFP_UART1_RXD@GPB_MFP0', 'UART5_nCTS:SYS_GPB_MFP0_PB2MFP_UART5_nCTS@GPB_MFP0', 'SC0_PWR:SYS_GPB_MFP0_PB2MFP_SC0_PWR@GPB_MFP0', 'I2S0_DO:SYS_GPB_MFP0_PB2MFP_I2S0_DO@GPB_MFP0', 'EPWM0_CH3:SYS_GPB_MFP0_PB2MFP_EPWM0_CH3@GPB_MFP0', 'I2C1_SDA:SYS_GPB_MFP0_PB2MFP_I2C1_SDA@GPB_MFP0', 'TM3:SYS_GPB_MFP0_PB2MFP_TM3@GPB_MFP0', 'INT3:SYS_GPB_MFP0_PB2MFP_INT3@GPB_MFP0', 'DMIC1_CLK:SYS_GPB_MFP0_PB2MFP_DMIC1_CLK@GPB_MFP0', 'PSIO0_CH7:SYS_GPB_MFP0_PB2MFP_PSIO0_CH7@GPB_MFP0', 'KPI_ROW1:SYS_GPB_MFP0_PB2MFP_KPI_ROW1@GPB_MFP0', 'LPIO6:SYS_GPB_MFP0_PB2MFP_LPIO6@GPB_MFP0'] }, + { f: ['PB.3', 'GPIO:SYS_GPB_MFP0_PB3MFP_GPIO@GPB_MFP0', 'ACMP0_N:SYS_GPB_MFP0_PB3MFP_ACMP0_N@GPB_MFP0', 'EADC0_CH3:SYS_GPB_MFP0_PB3MFP_EADC0_CH3@GPB_MFP0', 'LPADC0_CH3:SYS_GPB_MFP0_PB3MFP_LPADC0_CH3@GPB_MFP0', 'EBI_ADR2:SYS_GPB_MFP0_PB3MFP_EBI_ADR2@GPB_MFP0', 'SD0_DAT1:SYS_GPB_MFP0_PB3MFP_SD0_DAT1@GPB_MFP0', 'EMAC0_RMII_RXD1:SYS_GPB_MFP0_PB3MFP_EMAC0_RMII_RXD1@GPB_MFP0', 'SPI1_CLK:SYS_GPB_MFP0_PB3MFP_SPI1_CLK@GPB_MFP0', 'UART1_TXD:SYS_GPB_MFP0_PB3MFP_UART1_TXD@GPB_MFP0', 'UART5_nRTS:SYS_GPB_MFP0_PB3MFP_UART5_nRTS@GPB_MFP0', 'SC0_RST:SYS_GPB_MFP0_PB3MFP_SC0_RST@GPB_MFP0', 'I2S0_DI:SYS_GPB_MFP0_PB3MFP_I2S0_DI@GPB_MFP0', 'EPWM0_CH2:SYS_GPB_MFP0_PB3MFP_EPWM0_CH2@GPB_MFP0', 'I2C1_SCL:SYS_GPB_MFP0_PB3MFP_I2C1_SCL@GPB_MFP0', 'TM2:SYS_GPB_MFP0_PB3MFP_TM2@GPB_MFP0', 'INT2:SYS_GPB_MFP0_PB3MFP_INT2@GPB_MFP0', 'DMIC1_DAT:SYS_GPB_MFP0_PB3MFP_DMIC1_DAT@GPB_MFP0', 'PSIO0_CH6:SYS_GPB_MFP0_PB3MFP_PSIO0_CH6@GPB_MFP0', 'KPI_ROW0:SYS_GPB_MFP0_PB3MFP_KPI_ROW0@GPB_MFP0', 'LPIO7:SYS_GPB_MFP0_PB3MFP_LPIO7@GPB_MFP0'] }, + { f: ['PB.4', 'GPIO:SYS_GPB_MFP1_PB4MFP_GPIO@GPB_MFP1', 'ACMP1_P1:SYS_GPB_MFP1_PB4MFP_ACMP1_P1@GPB_MFP1', 'EADC0_CH4:SYS_GPB_MFP1_PB4MFP_EADC0_CH4@GPB_MFP1', 'LPADC0_CH4:SYS_GPB_MFP1_PB4MFP_LPADC0_CH4@GPB_MFP1', 'EBI_ADR1:SYS_GPB_MFP1_PB4MFP_EBI_ADR1@GPB_MFP1', 'SD0_DAT2:SYS_GPB_MFP1_PB4MFP_SD0_DAT2@GPB_MFP1', 'EMAC0_RMII_RXD0:SYS_GPB_MFP1_PB4MFP_EMAC0_RMII_RXD0@GPB_MFP1', 'SPI1_MOSI:SYS_GPB_MFP1_PB4MFP_SPI1_MOSI@GPB_MFP1', 'I2C0_SDA:SYS_GPB_MFP1_PB4MFP_I2C0_SDA@GPB_MFP1', 'UART5_RXD:SYS_GPB_MFP1_PB4MFP_UART5_RXD@GPB_MFP1', 'SC0_DAT:SYS_GPB_MFP1_PB4MFP_SC0_DAT@GPB_MFP1', 'I2S0_MCLK:SYS_GPB_MFP1_PB4MFP_I2S0_MCLK@GPB_MFP1', 'EPWM0_CH1:SYS_GPB_MFP1_PB4MFP_EPWM0_CH1@GPB_MFP1', 'UART2_RXD:SYS_GPB_MFP1_PB4MFP_UART2_RXD@GPB_MFP1', 'TM1:SYS_GPB_MFP1_PB4MFP_TM1@GPB_MFP1', 'INT1:SYS_GPB_MFP1_PB4MFP_INT1@GPB_MFP1', 'DMIC0_CLK:SYS_GPB_MFP1_PB4MFP_DMIC0_CLK@GPB_MFP1', 'PSIO0_CH5:SYS_GPB_MFP1_PB4MFP_PSIO0_CH5@GPB_MFP1', 'KPI_COL7:SYS_GPB_MFP1_PB4MFP_KPI_COL7@GPB_MFP1', 'LPI2C0_SDA:SYS_GPB_MFP1_PB4MFP_LPI2C0_SDA@GPB_MFP1', 'LPTM1:SYS_GPB_MFP1_PB4MFP_LPTM1@GPB_MFP1'] }, + { f: ['PB.5', 'GPIO:SYS_GPB_MFP1_PB5MFP_GPIO@GPB_MFP1', 'ACMP1_N:SYS_GPB_MFP1_PB5MFP_ACMP1_N@GPB_MFP1', 'EADC0_CH5:SYS_GPB_MFP1_PB5MFP_EADC0_CH5@GPB_MFP1', 'LPADC0_CH5:SYS_GPB_MFP1_PB5MFP_LPADC0_CH5@GPB_MFP1', 'EBI_ADR0:SYS_GPB_MFP1_PB5MFP_EBI_ADR0@GPB_MFP1', 'SD0_DAT3:SYS_GPB_MFP1_PB5MFP_SD0_DAT3@GPB_MFP1', 'EMAC0_RMII_REFCLK:SYS_GPB_MFP1_PB5MFP_EMAC0_RMII_REFCLK@GPB_MFP1', 'SPI1_MISO:SYS_GPB_MFP1_PB5MFP_SPI1_MISO@GPB_MFP1', 'I2C0_SCL:SYS_GPB_MFP1_PB5MFP_I2C0_SCL@GPB_MFP1', 'UART5_TXD:SYS_GPB_MFP1_PB5MFP_UART5_TXD@GPB_MFP1', 'SC0_CLK:SYS_GPB_MFP1_PB5MFP_SC0_CLK@GPB_MFP1', 'I2S0_BCLK:SYS_GPB_MFP1_PB5MFP_I2S0_BCLK@GPB_MFP1', 'EPWM0_CH0:SYS_GPB_MFP1_PB5MFP_EPWM0_CH0@GPB_MFP1', 'UART2_TXD:SYS_GPB_MFP1_PB5MFP_UART2_TXD@GPB_MFP1', 'TM0:SYS_GPB_MFP1_PB5MFP_TM0@GPB_MFP1', 'INT0:SYS_GPB_MFP1_PB5MFP_INT0@GPB_MFP1', 'DMIC0_DAT:SYS_GPB_MFP1_PB5MFP_DMIC0_DAT@GPB_MFP1', 'PSIO0_CH4:SYS_GPB_MFP1_PB5MFP_PSIO0_CH4@GPB_MFP1', 'KPI_COL6:SYS_GPB_MFP1_PB5MFP_KPI_COL6@GPB_MFP1', 'LPI2C0_SCL:SYS_GPB_MFP1_PB5MFP_LPI2C0_SCL@GPB_MFP1', 'LPTM0:SYS_GPB_MFP1_PB5MFP_LPTM0@GPB_MFP1'] }, + { f: ['PB.6', 'GPIO:SYS_GPB_MFP1_PB6MFP_GPIO@GPB_MFP1', 'ACMP2_N:SYS_GPB_MFP1_PB6MFP_ACMP2_N@GPB_MFP1', 'EADC0_CH6:SYS_GPB_MFP1_PB6MFP_EADC0_CH6@GPB_MFP1', 'LPADC0_CH6:SYS_GPB_MFP1_PB6MFP_LPADC0_CH6@GPB_MFP1', 'EBI_nWRH:SYS_GPB_MFP1_PB6MFP_EBI_nWRH@GPB_MFP1', 'EMAC0_PPS:SYS_GPB_MFP1_PB6MFP_EMAC0_PPS@GPB_MFP1', 'CANFD1_RXD:SYS_GPB_MFP1_PB6MFP_CANFD1_RXD@GPB_MFP1', 'UART1_RXD:SYS_GPB_MFP1_PB6MFP_UART1_RXD@GPB_MFP1', 'SD1_CLK:SYS_GPB_MFP1_PB6MFP_SD1_CLK@GPB_MFP1', 'EBI_nCS1:SYS_GPB_MFP1_PB6MFP_EBI_nCS1@GPB_MFP1', 'SPI0_CLK:SYS_GPB_MFP1_PB6MFP_SPI0_CLK@GPB_MFP1', 'BPWM1_CH5:SYS_GPB_MFP1_PB6MFP_BPWM1_CH5@GPB_MFP1', 'EPWM1_BRAKE1:SYS_GPB_MFP1_PB6MFP_EPWM1_BRAKE1@GPB_MFP1', 'EPWM1_CH5:SYS_GPB_MFP1_PB6MFP_EPWM1_CH5@GPB_MFP1', 'INT4:SYS_GPB_MFP1_PB6MFP_INT4@GPB_MFP1', 'USB_VBUS_EN:SYS_GPB_MFP1_PB6MFP_USB_VBUS_EN@GPB_MFP1', 'ACMP1_O:SYS_GPB_MFP1_PB6MFP_ACMP1_O@GPB_MFP1', 'DMIC0_CLKLP:SYS_GPB_MFP1_PB6MFP_DMIC0_CLKLP@GPB_MFP1', 'EPWM0_SYNC_IN:SYS_GPB_MFP1_PB6MFP_EPWM0_SYNC_IN@GPB_MFP1', 'KPI_COL5:SYS_GPB_MFP1_PB6MFP_KPI_COL5@GPB_MFP1', 'SC1_nCD:SYS_GPB_MFP1_PB6MFP_SC1_nCD@GPB_MFP1', 'HSUSB_VBUS_EN:SYS_GPB_MFP1_PB6MFP_HSUSB_VBUS_EN@GPB_MFP1', 'TM1:SYS_GPB_MFP1_PB6MFP_TM1@GPB_MFP1'] }, + { f: ['PB.7', 'GPIO:SYS_GPB_MFP1_PB7MFP_GPIO@GPB_MFP1', 'ACMP2_P0:SYS_GPB_MFP1_PB7MFP_ACMP2_P0@GPB_MFP1', 'EADC0_CH7:SYS_GPB_MFP1_PB7MFP_EADC0_CH7@GPB_MFP1', 'LPADC0_CH7:SYS_GPB_MFP1_PB7MFP_LPADC0_CH7@GPB_MFP1', 'EBI_nWRL:SYS_GPB_MFP1_PB7MFP_EBI_nWRL@GPB_MFP1', 'EMAC0_RMII_TXEN:SYS_GPB_MFP1_PB7MFP_EMAC0_RMII_TXEN@GPB_MFP1', 'CCAP_DATA0:SYS_GPB_MFP1_PB7MFP_CCAP_DATA0@GPB_MFP1', 'CANFD1_TXD:SYS_GPB_MFP1_PB7MFP_CANFD1_TXD@GPB_MFP1', 'UART1_TXD:SYS_GPB_MFP1_PB7MFP_UART1_TXD@GPB_MFP1', 'SD1_CMD:SYS_GPB_MFP1_PB7MFP_SD1_CMD@GPB_MFP1', 'EBI_nCS0:SYS_GPB_MFP1_PB7MFP_EBI_nCS0@GPB_MFP1', 'SPI0_SS:SYS_GPB_MFP1_PB7MFP_SPI0_SS@GPB_MFP1', 'BPWM1_CH4:SYS_GPB_MFP1_PB7MFP_BPWM1_CH4@GPB_MFP1', 'EPWM1_BRAKE0:SYS_GPB_MFP1_PB7MFP_EPWM1_BRAKE0@GPB_MFP1', 'EPWM1_CH4:SYS_GPB_MFP1_PB7MFP_EPWM1_CH4@GPB_MFP1', 'INT5:SYS_GPB_MFP1_PB7MFP_INT5@GPB_MFP1', 'USB_VBUS_ST:SYS_GPB_MFP1_PB7MFP_USB_VBUS_ST@GPB_MFP1', 'ACMP0_O:SYS_GPB_MFP1_PB7MFP_ACMP0_O@GPB_MFP1', 'ETMC_TRACE_DATA3:SYS_GPB_MFP1_PB7MFP_ETMC_TRACE_DATA3@GPB_MFP1', 'KPI_COL4:SYS_GPB_MFP1_PB7MFP_KPI_COL4@GPB_MFP1', 'TRACE_SWO:SYS_GPB_MFP1_PB7MFP_TRACE_SWO@GPB_MFP1', 'HSUSB_VBUS_ST:SYS_GPB_MFP1_PB7MFP_HSUSB_VBUS_ST@GPB_MFP1'] }, + { f: ['PB.8', 'GPIO:SYS_GPB_MFP2_PB8MFP_GPIO@GPB_MFP2', 'ACMP2_P1:SYS_GPB_MFP2_PB8MFP_ACMP2_P1@GPB_MFP2', 'EADC0_CH8:SYS_GPB_MFP2_PB8MFP_EADC0_CH8@GPB_MFP2', 'LPADC0_CH8:SYS_GPB_MFP2_PB8MFP_LPADC0_CH8@GPB_MFP2', 'EBI_ADR19:SYS_GPB_MFP2_PB8MFP_EBI_ADR19@GPB_MFP2', 'EMAC0_RMII_TXD1:SYS_GPB_MFP2_PB8MFP_EMAC0_RMII_TXD1@GPB_MFP2', 'CCAP_DATA1:SYS_GPB_MFP2_PB8MFP_CCAP_DATA1@GPB_MFP2', 'UART0_RXD:SYS_GPB_MFP2_PB8MFP_UART0_RXD@GPB_MFP2', 'UART1_nRTS:SYS_GPB_MFP2_PB8MFP_UART1_nRTS@GPB_MFP2', 'I2C1_SMBSUS:SYS_GPB_MFP2_PB8MFP_I2C1_SMBSUS@GPB_MFP2', 'UART7_RXD:SYS_GPB_MFP2_PB8MFP_UART7_RXD@GPB_MFP2', 'I2C0_SDA:SYS_GPB_MFP2_PB8MFP_I2C0_SDA@GPB_MFP2', 'BPWM1_CH3:SYS_GPB_MFP2_PB8MFP_BPWM1_CH3@GPB_MFP2', 'SPI3_MOSI:SYS_GPB_MFP2_PB8MFP_SPI3_MOSI@GPB_MFP2', 'INT6:SYS_GPB_MFP2_PB8MFP_INT6@GPB_MFP2', 'USB_VBUS_ST:SYS_GPB_MFP2_PB8MFP_USB_VBUS_ST@GPB_MFP2', 'USB_VBUS_EN:SYS_GPB_MFP2_PB8MFP_USB_VBUS_EN@GPB_MFP2', 'ETMC_TRACE_DATA2:SYS_GPB_MFP2_PB8MFP_ETMC_TRACE_DATA2@GPB_MFP2', 'LPUART0_RXD:SYS_GPB_MFP2_PB8MFP_LPUART0_RXD@GPB_MFP2'] }, + { f: ['PB.9', 'GPIO:SYS_GPB_MFP2_PB9MFP_GPIO@GPB_MFP2', 'ACMP2_P2:SYS_GPB_MFP2_PB9MFP_ACMP2_P2@GPB_MFP2', 'EADC0_CH9:SYS_GPB_MFP2_PB9MFP_EADC0_CH9@GPB_MFP2', 'LPADC0_CH9:SYS_GPB_MFP2_PB9MFP_LPADC0_CH9@GPB_MFP2', 'EBI_ADR18:SYS_GPB_MFP2_PB9MFP_EBI_ADR18@GPB_MFP2', 'EMAC0_RMII_TXD0:SYS_GPB_MFP2_PB9MFP_EMAC0_RMII_TXD0@GPB_MFP2', 'UART0_TXD:SYS_GPB_MFP2_PB9MFP_UART0_TXD@GPB_MFP2', 'UART1_nCTS:SYS_GPB_MFP2_PB9MFP_UART1_nCTS@GPB_MFP2', 'I2C1_SMBAL:SYS_GPB_MFP2_PB9MFP_I2C1_SMBAL@GPB_MFP2', 'UART7_TXD:SYS_GPB_MFP2_PB9MFP_UART7_TXD@GPB_MFP2', 'I2C0_SCL:SYS_GPB_MFP2_PB9MFP_I2C0_SCL@GPB_MFP2', 'BPWM1_CH2:SYS_GPB_MFP2_PB9MFP_BPWM1_CH2@GPB_MFP2', 'SPI3_MISO:SYS_GPB_MFP2_PB9MFP_SPI3_MISO@GPB_MFP2', 'INT7:SYS_GPB_MFP2_PB9MFP_INT7@GPB_MFP2', 'CCAP_HSYNC:SYS_GPB_MFP2_PB9MFP_CCAP_HSYNC@GPB_MFP2', 'USB_VBUS_ST:SYS_GPB_MFP2_PB9MFP_USB_VBUS_ST@GPB_MFP2', 'ETMC_TRACE_DATA1:SYS_GPB_MFP2_PB9MFP_ETMC_TRACE_DATA1@GPB_MFP2', 'LPUART0_TXD:SYS_GPB_MFP2_PB9MFP_LPUART0_TXD@GPB_MFP2'] }, + { f: ['PB.10', 'GPIO:SYS_GPB_MFP2_PB10MFP_GPIO@GPB_MFP2', 'ACMP2_P3:SYS_GPB_MFP2_PB10MFP_ACMP2_P3@GPB_MFP2', 'EADC0_CH10:SYS_GPB_MFP2_PB10MFP_EADC0_CH10@GPB_MFP2', 'LPADC0_CH10:SYS_GPB_MFP2_PB10MFP_LPADC0_CH10@GPB_MFP2', 'EBI_ADR17:SYS_GPB_MFP2_PB10MFP_EBI_ADR17@GPB_MFP2', 'EMAC0_RMII_MDIO:SYS_GPB_MFP2_PB10MFP_EMAC0_RMII_MDIO@GPB_MFP2', 'UART0_nRTS:SYS_GPB_MFP2_PB10MFP_UART0_nRTS@GPB_MFP2', 'UART4_RXD:SYS_GPB_MFP2_PB10MFP_UART4_RXD@GPB_MFP2', 'I2C1_SDA:SYS_GPB_MFP2_PB10MFP_I2C1_SDA@GPB_MFP2', 'CANFD0_RXD:SYS_GPB_MFP2_PB10MFP_CANFD0_RXD@GPB_MFP2', 'BPWM1_CH1:SYS_GPB_MFP2_PB10MFP_BPWM1_CH1@GPB_MFP2', 'SPI3_SS:SYS_GPB_MFP2_PB10MFP_SPI3_SS@GPB_MFP2', 'CCAP_VSYNC:SYS_GPB_MFP2_PB10MFP_CCAP_VSYNC@GPB_MFP2', 'HSUSB_VBUS_EN:SYS_GPB_MFP2_PB10MFP_HSUSB_VBUS_EN@GPB_MFP2', 'ETMC_TRACE_DATA0:SYS_GPB_MFP2_PB10MFP_ETMC_TRACE_DATA0@GPB_MFP2', 'LPUART0_nRTS:SYS_GPB_MFP2_PB10MFP_LPUART0_nRTS@GPB_MFP2'] }, + { f: ['PB.11', 'GPIO:SYS_GPB_MFP2_PB11MFP_GPIO@GPB_MFP2', 'EADC0_CH11:SYS_GPB_MFP2_PB11MFP_EADC0_CH11@GPB_MFP2', 'LPADC0_CH11:SYS_GPB_MFP2_PB11MFP_LPADC0_CH11@GPB_MFP2', 'EBI_ADR16:SYS_GPB_MFP2_PB11MFP_EBI_ADR16@GPB_MFP2', 'EMAC0_RMII_MDC:SYS_GPB_MFP2_PB11MFP_EMAC0_RMII_MDC@GPB_MFP2', 'UART0_nCTS:SYS_GPB_MFP2_PB11MFP_UART0_nCTS@GPB_MFP2', 'UART4_TXD:SYS_GPB_MFP2_PB11MFP_UART4_TXD@GPB_MFP2', 'I2C1_SCL:SYS_GPB_MFP2_PB11MFP_I2C1_SCL@GPB_MFP2', 'CANFD0_TXD:SYS_GPB_MFP2_PB11MFP_CANFD0_TXD@GPB_MFP2', 'SPI0_I2SMCLK:SYS_GPB_MFP2_PB11MFP_SPI0_I2SMCLK@GPB_MFP2', 'BPWM1_CH0:SYS_GPB_MFP2_PB11MFP_BPWM1_CH0@GPB_MFP2', 'SPI3_CLK:SYS_GPB_MFP2_PB11MFP_SPI3_CLK@GPB_MFP2', 'CCAP_SFIELD:SYS_GPB_MFP2_PB11MFP_CCAP_SFIELD@GPB_MFP2', 'HSUSB_VBUS_ST:SYS_GPB_MFP2_PB11MFP_HSUSB_VBUS_ST@GPB_MFP2', 'ETMC_TRACE_CLK:SYS_GPB_MFP2_PB11MFP_ETMC_TRACE_CLK@GPB_MFP2', 'LPUART0_nCTS:SYS_GPB_MFP2_PB11MFP_LPUART0_nCTS@GPB_MFP2'] }, + { f: ['PB.12', 'GPIO:SYS_GPB_MFP3_PB12MFP_GPIO@GPB_MFP3', 'ACMP0_P2:SYS_GPB_MFP3_PB12MFP_ACMP0_P2@GPB_MFP3', 'ACMP1_P2:SYS_GPB_MFP3_PB12MFP_ACMP1_P2@GPB_MFP3', 'DAC0_OUT:SYS_GPB_MFP3_PB12MFP_DAC0_OUT@GPB_MFP3', 'EADC0_CH12:SYS_GPB_MFP3_PB12MFP_EADC0_CH12@GPB_MFP3', 'LPADC0_CH12:SYS_GPB_MFP3_PB12MFP_LPADC0_CH12@GPB_MFP3', 'EBI_AD15:SYS_GPB_MFP3_PB12MFP_EBI_AD15@GPB_MFP3', 'SC1_CLK:SYS_GPB_MFP3_PB12MFP_SC1_CLK@GPB_MFP3', 'SPI0_MOSI:SYS_GPB_MFP3_PB12MFP_SPI0_MOSI@GPB_MFP3', 'USCI0_CLK:SYS_GPB_MFP3_PB12MFP_USCI0_CLK@GPB_MFP3', 'UART0_RXD:SYS_GPB_MFP3_PB12MFP_UART0_RXD@GPB_MFP3', 'UART3_nCTS:SYS_GPB_MFP3_PB12MFP_UART3_nCTS@GPB_MFP3', 'I2C2_SDA:SYS_GPB_MFP3_PB12MFP_I2C2_SDA@GPB_MFP3', 'SD0_nCD:SYS_GPB_MFP3_PB12MFP_SD0_nCD@GPB_MFP3', 'CCAP_SCLK:SYS_GPB_MFP3_PB12MFP_CCAP_SCLK@GPB_MFP3', 'EPWM1_CH3:SYS_GPB_MFP3_PB12MFP_EPWM1_CH3@GPB_MFP3', 'ETMC_TRACE_DATA3:SYS_GPB_MFP3_PB12MFP_ETMC_TRACE_DATA3@GPB_MFP3', 'TM3_EXT:SYS_GPB_MFP3_PB12MFP_TM3_EXT@GPB_MFP3', 'EBI_AD11:SYS_GPB_MFP3_PB12MFP_EBI_AD11@GPB_MFP3', 'SPI0_I2SMCLK:SYS_GPB_MFP3_PB12MFP_SPI0_I2SMCLK@GPB_MFP3', 'SWODEC_SWO:SYS_GPB_MFP3_PB12MFP_SWODEC_SWO@GPB_MFP3', 'PSIO0_CH3:SYS_GPB_MFP3_PB12MFP_PSIO0_CH3@GPB_MFP3', 'KPI_COL3:SYS_GPB_MFP3_PB12MFP_KPI_COL3@GPB_MFP3', 'QSPI0_CLK:SYS_GPB_MFP3_PB12MFP_QSPI0_CLK@GPB_MFP3', 'LPSPI0_MOSI:SYS_GPB_MFP3_PB12MFP_LPSPI0_MOSI@GPB_MFP3', 'LPUART0_RXD:SYS_GPB_MFP3_PB12MFP_LPUART0_RXD@GPB_MFP3', 'UTCPD0_VBSRCEN:SYS_GPB_MFP3_PB12MFP_UTCPD0_VBSRCEN@GPB_MFP3'] }, + { f: ['PB.13', 'GPIO:SYS_GPB_MFP3_PB13MFP_GPIO@GPB_MFP3', 'ACMP0_P3:SYS_GPB_MFP3_PB13MFP_ACMP0_P3@GPB_MFP3', 'ACMP1_P3:SYS_GPB_MFP3_PB13MFP_ACMP1_P3@GPB_MFP3', 'DAC1_OUT:SYS_GPB_MFP3_PB13MFP_DAC1_OUT@GPB_MFP3', 'EADC0_CH13:SYS_GPB_MFP3_PB13MFP_EADC0_CH13@GPB_MFP3', 'LPADC0_CH13:SYS_GPB_MFP3_PB13MFP_LPADC0_CH13@GPB_MFP3', 'EBI_AD14:SYS_GPB_MFP3_PB13MFP_EBI_AD14@GPB_MFP3', 'SC1_DAT:SYS_GPB_MFP3_PB13MFP_SC1_DAT@GPB_MFP3', 'SPI0_MISO:SYS_GPB_MFP3_PB13MFP_SPI0_MISO@GPB_MFP3', 'USCI0_DAT0:SYS_GPB_MFP3_PB13MFP_USCI0_DAT0@GPB_MFP3', 'UART0_TXD:SYS_GPB_MFP3_PB13MFP_UART0_TXD@GPB_MFP3', 'UART3_nRTS:SYS_GPB_MFP3_PB13MFP_UART3_nRTS@GPB_MFP3', 'I2C2_SCL:SYS_GPB_MFP3_PB13MFP_I2C2_SCL@GPB_MFP3', 'CLKO:SYS_GPB_MFP3_PB13MFP_CLKO@GPB_MFP3', 'CCAP_PIXCLK:SYS_GPB_MFP3_PB13MFP_CCAP_PIXCLK@GPB_MFP3', 'EPWM1_CH2:SYS_GPB_MFP3_PB13MFP_EPWM1_CH2@GPB_MFP3', 'ETMC_TRACE_DATA2:SYS_GPB_MFP3_PB13MFP_ETMC_TRACE_DATA2@GPB_MFP3', 'TM2_EXT:SYS_GPB_MFP3_PB13MFP_TM2_EXT@GPB_MFP3', 'USB_VBUS_ST:SYS_GPB_MFP3_PB13MFP_USB_VBUS_ST@GPB_MFP3', 'HSUSB_VBUS_ST:SYS_GPB_MFP3_PB13MFP_HSUSB_VBUS_ST@GPB_MFP3', 'PSIO0_CH2:SYS_GPB_MFP3_PB13MFP_PSIO0_CH2@GPB_MFP3', 'KPI_COL2:SYS_GPB_MFP3_PB13MFP_KPI_COL2@GPB_MFP3', 'USCI0_CTL0:SYS_GPB_MFP3_PB13MFP_USCI0_CTL0@GPB_MFP3', 'LPSPI0_MISO:SYS_GPB_MFP3_PB13MFP_LPSPI0_MISO@GPB_MFP3', 'LPUART0_TXD:SYS_GPB_MFP3_PB13MFP_LPUART0_TXD@GPB_MFP3', 'UTCPD0_VBSNKEN:SYS_GPB_MFP3_PB13MFP_UTCPD0_VBSNKEN@GPB_MFP3', 'LPTM1:SYS_GPB_MFP3_PB13MFP_LPTM1@GPB_MFP3'] }, + { f: ['PB.14', 'GPIO:SYS_GPB_MFP3_PB14MFP_GPIO@GPB_MFP3', 'EADC0_CH14:SYS_GPB_MFP3_PB14MFP_EADC0_CH14@GPB_MFP3', 'LPADC0_CH14:SYS_GPB_MFP3_PB14MFP_LPADC0_CH14@GPB_MFP3', 'EBI_AD13:SYS_GPB_MFP3_PB14MFP_EBI_AD13@GPB_MFP3', 'SC1_RST:SYS_GPB_MFP3_PB14MFP_SC1_RST@GPB_MFP3', 'SPI0_CLK:SYS_GPB_MFP3_PB14MFP_SPI0_CLK@GPB_MFP3', 'USCI0_DAT1:SYS_GPB_MFP3_PB14MFP_USCI0_DAT1@GPB_MFP3', 'UART0_nRTS:SYS_GPB_MFP3_PB14MFP_UART0_nRTS@GPB_MFP3', 'UART3_RXD:SYS_GPB_MFP3_PB14MFP_UART3_RXD@GPB_MFP3', 'I2C2_SMBSUS:SYS_GPB_MFP3_PB14MFP_I2C2_SMBSUS@GPB_MFP3', 'CCAP_DATA0:SYS_GPB_MFP3_PB14MFP_CCAP_DATA0@GPB_MFP3', 'EPWM1_CH1:SYS_GPB_MFP3_PB14MFP_EPWM1_CH1@GPB_MFP3', 'ETMC_TRACE_DATA1:SYS_GPB_MFP3_PB14MFP_ETMC_TRACE_DATA1@GPB_MFP3', 'TM1_EXT:SYS_GPB_MFP3_PB14MFP_TM1_EXT@GPB_MFP3', 'CLKO:SYS_GPB_MFP3_PB14MFP_CLKO@GPB_MFP3', 'USB_VBUS_ST:SYS_GPB_MFP3_PB14MFP_USB_VBUS_ST@GPB_MFP3', 'PSIO0_CH1:SYS_GPB_MFP3_PB14MFP_PSIO0_CH1@GPB_MFP3', 'KPI_COL1:SYS_GPB_MFP3_PB14MFP_KPI_COL1@GPB_MFP3', 'UTCPD0_VBSRCEN:SYS_GPB_MFP3_PB14MFP_UTCPD0_VBSRCEN@GPB_MFP3', 'LPSPI0_CLK:SYS_GPB_MFP3_PB14MFP_LPSPI0_CLK@GPB_MFP3', 'LPUART0_nRTS:SYS_GPB_MFP3_PB14MFP_LPUART0_nRTS@GPB_MFP3', 'LPTM1_EXT:SYS_GPB_MFP3_PB14MFP_LPTM1_EXT@GPB_MFP3'] }, + { f: ['PB.15', 'GPIO:SYS_GPB_MFP3_PB15MFP_GPIO@GPB_MFP3', 'EADC0_CH15:SYS_GPB_MFP3_PB15MFP_EADC0_CH15@GPB_MFP3', 'LPADC0_CH15:SYS_GPB_MFP3_PB15MFP_LPADC0_CH15@GPB_MFP3', 'EBI_AD12:SYS_GPB_MFP3_PB15MFP_EBI_AD12@GPB_MFP3', 'SC1_PWR:SYS_GPB_MFP3_PB15MFP_SC1_PWR@GPB_MFP3', 'SPI0_SS:SYS_GPB_MFP3_PB15MFP_SPI0_SS@GPB_MFP3', 'USCI0_CTL1:SYS_GPB_MFP3_PB15MFP_USCI0_CTL1@GPB_MFP3', 'UART0_nCTS:SYS_GPB_MFP3_PB15MFP_UART0_nCTS@GPB_MFP3', 'UART3_TXD:SYS_GPB_MFP3_PB15MFP_UART3_TXD@GPB_MFP3', 'I2C2_SMBAL:SYS_GPB_MFP3_PB15MFP_I2C2_SMBAL@GPB_MFP3', 'CCAP_DATA1:SYS_GPB_MFP3_PB15MFP_CCAP_DATA1@GPB_MFP3', 'EPWM0_BRAKE1:SYS_GPB_MFP3_PB15MFP_EPWM0_BRAKE1@GPB_MFP3', 'EPWM1_CH0:SYS_GPB_MFP3_PB15MFP_EPWM1_CH0@GPB_MFP3', 'ETMC_TRACE_DATA0:SYS_GPB_MFP3_PB15MFP_ETMC_TRACE_DATA0@GPB_MFP3', 'TM0_EXT:SYS_GPB_MFP3_PB15MFP_TM0_EXT@GPB_MFP3', 'USB_VBUS_EN:SYS_GPB_MFP3_PB15MFP_USB_VBUS_EN@GPB_MFP3', 'HSUSB_VBUS_EN:SYS_GPB_MFP3_PB15MFP_HSUSB_VBUS_EN@GPB_MFP3', 'PSIO0_CH0:SYS_GPB_MFP3_PB15MFP_PSIO0_CH0@GPB_MFP3', 'KPI_COL0:SYS_GPB_MFP3_PB15MFP_KPI_COL0@GPB_MFP3', 'UTCPD0_VBSNKEN:SYS_GPB_MFP3_PB15MFP_UTCPD0_VBSNKEN@GPB_MFP3', 'LPSPI0_SS:SYS_GPB_MFP3_PB15MFP_LPSPI0_SS@GPB_MFP3', 'LPUART0_nCTS:SYS_GPB_MFP3_PB15MFP_LPUART0_nCTS@GPB_MFP3', 'LPTM0_EXT:SYS_GPB_MFP3_PB15MFP_LPTM0_EXT@GPB_MFP3'] }, + { f: ['PC.0', 'GPIO:SYS_GPC_MFP0_PC0MFP_GPIO@GPC_MFP0', 'EBI_AD0:SYS_GPC_MFP0_PC0MFP_EBI_AD0@GPC_MFP0', 'QSPI0_MOSI0:SYS_GPC_MFP0_PC0MFP_QSPI0_MOSI0@GPC_MFP0', 'SC1_CLK:SYS_GPC_MFP0_PC0MFP_SC1_CLK@GPC_MFP0', 'I2S0_LRCK:SYS_GPC_MFP0_PC0MFP_I2S0_LRCK@GPC_MFP0', 'SPI1_SS:SYS_GPC_MFP0_PC0MFP_SPI1_SS@GPC_MFP0', 'UART2_RXD:SYS_GPC_MFP0_PC0MFP_UART2_RXD@GPC_MFP0', 'I2C0_SDA:SYS_GPC_MFP0_PC0MFP_I2C0_SDA@GPC_MFP0', 'EPWM1_CH5:SYS_GPC_MFP0_PC0MFP_EPWM1_CH5@GPC_MFP0', 'CCAP_DATA0:SYS_GPC_MFP0_PC0MFP_CCAP_DATA0@GPC_MFP0', 'ACMP1_O:SYS_GPC_MFP0_PC0MFP_ACMP1_O@GPC_MFP0', 'KPI_ROW5:SYS_GPC_MFP0_PC0MFP_KPI_ROW5@GPC_MFP0', 'UTCPD0_CC1:SYS_GPC_MFP0_PC0MFP_UTCPD0_CC1@GPC_MFP0', 'LPI2C0_SDA:SYS_GPC_MFP0_PC0MFP_LPI2C0_SDA@GPC_MFP0', 'LPIO4:SYS_GPC_MFP0_PC0MFP_LPIO4@GPC_MFP0'] }, + { f: ['PC.1', 'GPIO:SYS_GPC_MFP0_PC1MFP_GPIO@GPC_MFP0', 'EBI_AD1:SYS_GPC_MFP0_PC1MFP_EBI_AD1@GPC_MFP0', 'QSPI0_MISO0:SYS_GPC_MFP0_PC1MFP_QSPI0_MISO0@GPC_MFP0', 'SC1_DAT:SYS_GPC_MFP0_PC1MFP_SC1_DAT@GPC_MFP0', 'I2S0_DO:SYS_GPC_MFP0_PC1MFP_I2S0_DO@GPC_MFP0', 'SPI1_CLK:SYS_GPC_MFP0_PC1MFP_SPI1_CLK@GPC_MFP0', 'UART2_TXD:SYS_GPC_MFP0_PC1MFP_UART2_TXD@GPC_MFP0', 'I2C0_SCL:SYS_GPC_MFP0_PC1MFP_I2C0_SCL@GPC_MFP0', 'EPWM1_CH4:SYS_GPC_MFP0_PC1MFP_EPWM1_CH4@GPC_MFP0', 'CCAP_DATA1:SYS_GPC_MFP0_PC1MFP_CCAP_DATA1@GPC_MFP0', 'ACMP0_O:SYS_GPC_MFP0_PC1MFP_ACMP0_O@GPC_MFP0', 'EADC0_ST:SYS_GPC_MFP0_PC1MFP_EADC0_ST@GPC_MFP0', 'KPI_ROW4:SYS_GPC_MFP0_PC1MFP_KPI_ROW4@GPC_MFP0', 'UTCPD0_CC2:SYS_GPC_MFP0_PC1MFP_UTCPD0_CC2@GPC_MFP0', 'LPADC0_ST:SYS_GPC_MFP0_PC1MFP_LPADC0_ST@GPC_MFP0', 'LPI2C0_SCL:SYS_GPC_MFP0_PC1MFP_LPI2C0_SCL@GPC_MFP0', 'LPIO5:SYS_GPC_MFP0_PC1MFP_LPIO5@GPC_MFP0'] }, + { f: ['PC.2', 'GPIO:SYS_GPC_MFP0_PC2MFP_GPIO@GPC_MFP0', 'EBI_AD2:SYS_GPC_MFP0_PC2MFP_EBI_AD2@GPC_MFP0', 'QSPI0_CLK:SYS_GPC_MFP0_PC2MFP_QSPI0_CLK@GPC_MFP0', 'SC1_RST:SYS_GPC_MFP0_PC2MFP_SC1_RST@GPC_MFP0', 'I2S0_DI:SYS_GPC_MFP0_PC2MFP_I2S0_DI@GPC_MFP0', 'SPI1_MOSI:SYS_GPC_MFP0_PC2MFP_SPI1_MOSI@GPC_MFP0', 'UART2_nCTS:SYS_GPC_MFP0_PC2MFP_UART2_nCTS@GPC_MFP0', 'I2C0_SMBSUS:SYS_GPC_MFP0_PC2MFP_I2C0_SMBSUS@GPC_MFP0', 'CANFD1_RXD:SYS_GPC_MFP0_PC2MFP_CANFD1_RXD@GPC_MFP0', 'UART3_RXD:SYS_GPC_MFP0_PC2MFP_UART3_RXD@GPC_MFP0', 'EPWM1_CH3:SYS_GPC_MFP0_PC2MFP_EPWM1_CH3@GPC_MFP0', 'CCAP_DATA2:SYS_GPC_MFP0_PC2MFP_CCAP_DATA2@GPC_MFP0', 'QSPI1_MOSI0:SYS_GPC_MFP0_PC2MFP_QSPI1_MOSI0@GPC_MFP0', 'I2C3_SDA:SYS_GPC_MFP0_PC2MFP_I2C3_SDA@GPC_MFP0', 'PSIO0_CH3:SYS_GPC_MFP0_PC2MFP_PSIO0_CH3@GPC_MFP0', 'KPI_ROW3:SYS_GPC_MFP0_PC2MFP_KPI_ROW3@GPC_MFP0', 'UTCPD0_CCDB1:SYS_GPC_MFP0_PC2MFP_UTCPD0_CCDB1@GPC_MFP0'] }, + { f: ['PC.3', 'GPIO:SYS_GPC_MFP0_PC3MFP_GPIO@GPC_MFP0', 'EBI_AD3:SYS_GPC_MFP0_PC3MFP_EBI_AD3@GPC_MFP0', 'QSPI0_SS:SYS_GPC_MFP0_PC3MFP_QSPI0_SS@GPC_MFP0', 'SC1_PWR:SYS_GPC_MFP0_PC3MFP_SC1_PWR@GPC_MFP0', 'I2S0_MCLK:SYS_GPC_MFP0_PC3MFP_I2S0_MCLK@GPC_MFP0', 'SPI1_MISO:SYS_GPC_MFP0_PC3MFP_SPI1_MISO@GPC_MFP0', 'UART2_nRTS:SYS_GPC_MFP0_PC3MFP_UART2_nRTS@GPC_MFP0', 'I2C0_SMBAL:SYS_GPC_MFP0_PC3MFP_I2C0_SMBAL@GPC_MFP0', 'CANFD1_TXD:SYS_GPC_MFP0_PC3MFP_CANFD1_TXD@GPC_MFP0', 'UART3_TXD:SYS_GPC_MFP0_PC3MFP_UART3_TXD@GPC_MFP0', 'EPWM1_CH2:SYS_GPC_MFP0_PC3MFP_EPWM1_CH2@GPC_MFP0', 'CCAP_DATA3:SYS_GPC_MFP0_PC3MFP_CCAP_DATA3@GPC_MFP0', 'QSPI1_MISO0:SYS_GPC_MFP0_PC3MFP_QSPI1_MISO0@GPC_MFP0', 'I2C3_SCL:SYS_GPC_MFP0_PC3MFP_I2C3_SCL@GPC_MFP0', 'PSIO0_CH2:SYS_GPC_MFP0_PC3MFP_PSIO0_CH2@GPC_MFP0', 'KPI_ROW2:SYS_GPC_MFP0_PC3MFP_KPI_ROW2@GPC_MFP0', 'UTCPD0_CCDB2:SYS_GPC_MFP0_PC3MFP_UTCPD0_CCDB2@GPC_MFP0'] }, + { f: ['PC.4', 'GPIO:SYS_GPC_MFP1_PC4MFP_GPIO@GPC_MFP1', 'EBI_AD4:SYS_GPC_MFP1_PC4MFP_EBI_AD4@GPC_MFP1', 'QSPI0_MOSI1:SYS_GPC_MFP1_PC4MFP_QSPI0_MOSI1@GPC_MFP1', 'SC1_nCD:SYS_GPC_MFP1_PC4MFP_SC1_nCD@GPC_MFP1', 'I2S0_BCLK:SYS_GPC_MFP1_PC4MFP_I2S0_BCLK@GPC_MFP1', 'SPI1_I2SMCLK:SYS_GPC_MFP1_PC4MFP_SPI1_I2SMCLK@GPC_MFP1', 'UART2_RXD:SYS_GPC_MFP1_PC4MFP_UART2_RXD@GPC_MFP1', 'I2C1_SDA:SYS_GPC_MFP1_PC4MFP_I2C1_SDA@GPC_MFP1', 'CANFD0_RXD:SYS_GPC_MFP1_PC4MFP_CANFD0_RXD@GPC_MFP1', 'UART4_RXD:SYS_GPC_MFP1_PC4MFP_UART4_RXD@GPC_MFP1', 'EPWM1_CH1:SYS_GPC_MFP1_PC4MFP_EPWM1_CH1@GPC_MFP1', 'CCAP_DATA4:SYS_GPC_MFP1_PC4MFP_CCAP_DATA4@GPC_MFP1', 'QSPI1_CLK:SYS_GPC_MFP1_PC4MFP_QSPI1_CLK@GPC_MFP1', 'I2C3_SMBSUS:SYS_GPC_MFP1_PC4MFP_I2C3_SMBSUS@GPC_MFP1', 'PSIO0_CH1:SYS_GPC_MFP1_PC4MFP_PSIO0_CH1@GPC_MFP1', 'KPI_ROW1:SYS_GPC_MFP1_PC4MFP_KPI_ROW1@GPC_MFP1', 'UTCPD0_FRSTX1:SYS_GPC_MFP1_PC4MFP_UTCPD0_FRSTX1@GPC_MFP1', 'UTCPD0_DISCHG:SYS_GPC_MFP1_PC4MFP_UTCPD0_DISCHG@GPC_MFP1'] }, + { f: ['PC.5', 'GPIO:SYS_GPC_MFP1_PC5MFP_GPIO@GPC_MFP1', 'EBI_AD5:SYS_GPC_MFP1_PC5MFP_EBI_AD5@GPC_MFP1', 'QSPI0_MISO1:SYS_GPC_MFP1_PC5MFP_QSPI0_MISO1@GPC_MFP1', 'UART2_TXD:SYS_GPC_MFP1_PC5MFP_UART2_TXD@GPC_MFP1', 'I2C1_SCL:SYS_GPC_MFP1_PC5MFP_I2C1_SCL@GPC_MFP1', 'CANFD0_TXD:SYS_GPC_MFP1_PC5MFP_CANFD0_TXD@GPC_MFP1', 'UART4_TXD:SYS_GPC_MFP1_PC5MFP_UART4_TXD@GPC_MFP1', 'EPWM1_CH0:SYS_GPC_MFP1_PC5MFP_EPWM1_CH0@GPC_MFP1', 'CCAP_DATA5:SYS_GPC_MFP1_PC5MFP_CCAP_DATA5@GPC_MFP1', 'QSPI1_SS:SYS_GPC_MFP1_PC5MFP_QSPI1_SS@GPC_MFP1', 'I2C3_SMBAL:SYS_GPC_MFP1_PC5MFP_I2C3_SMBAL@GPC_MFP1', 'PSIO0_CH0:SYS_GPC_MFP1_PC5MFP_PSIO0_CH0@GPC_MFP1', 'KPI_ROW0:SYS_GPC_MFP1_PC5MFP_KPI_ROW0@GPC_MFP1', 'UTCPD0_FRSTX2:SYS_GPC_MFP1_PC5MFP_UTCPD0_FRSTX2@GPC_MFP1', 'UTCPD0_DISCHG:SYS_GPC_MFP1_PC5MFP_UTCPD0_DISCHG@GPC_MFP1', 'I3C0_PUPEN:SYS_GPC_MFP1_PC5MFP_I3C0_PUPEN@GPC_MFP1'] }, + { f: ['PC.6', 'GPIO:SYS_GPC_MFP1_PC6MFP_GPIO@GPC_MFP1', 'EBI_AD8:SYS_GPC_MFP1_PC6MFP_EBI_AD8@GPC_MFP1', 'EMAC0_RMII_RXD1:SYS_GPC_MFP1_PC6MFP_EMAC0_RMII_RXD1@GPC_MFP1', 'SPI1_MOSI:SYS_GPC_MFP1_PC6MFP_SPI1_MOSI@GPC_MFP1', 'UART4_RXD:SYS_GPC_MFP1_PC6MFP_UART4_RXD@GPC_MFP1', 'SC2_RST:SYS_GPC_MFP1_PC6MFP_SC2_RST@GPC_MFP1', 'UART0_nRTS:SYS_GPC_MFP1_PC6MFP_UART0_nRTS@GPC_MFP1', 'I2C1_SMBSUS:SYS_GPC_MFP1_PC6MFP_I2C1_SMBSUS@GPC_MFP1', 'UART6_RXD:SYS_GPC_MFP1_PC6MFP_UART6_RXD@GPC_MFP1', 'ACMP3_WLAT:SYS_GPC_MFP1_PC6MFP_ACMP3_WLAT@GPC_MFP1', 'EPWM1_CH3:SYS_GPC_MFP1_PC6MFP_EPWM1_CH3@GPC_MFP1', 'BPWM1_CH1:SYS_GPC_MFP1_PC6MFP_BPWM1_CH1@GPC_MFP1', 'TM1:SYS_GPC_MFP1_PC6MFP_TM1@GPC_MFP1', 'INT2:SYS_GPC_MFP1_PC6MFP_INT2@GPC_MFP1', 'UTCPD0_FRSTX2:SYS_GPC_MFP1_PC6MFP_UTCPD0_FRSTX2@GPC_MFP1', 'KPI_COL2:SYS_GPC_MFP1_PC6MFP_KPI_COL2@GPC_MFP1', 'UTCPD0_DISCHG:SYS_GPC_MFP1_PC6MFP_UTCPD0_DISCHG@GPC_MFP1', 'LPUART0_nRTS:SYS_GPC_MFP1_PC6MFP_LPUART0_nRTS@GPC_MFP1', 'LPTM1:SYS_GPC_MFP1_PC6MFP_LPTM1@GPC_MFP1'] }, + { f: ['PC.7', 'GPIO:SYS_GPC_MFP1_PC7MFP_GPIO@GPC_MFP1', 'EBI_AD9:SYS_GPC_MFP1_PC7MFP_EBI_AD9@GPC_MFP1', 'EMAC0_RMII_RXD0:SYS_GPC_MFP1_PC7MFP_EMAC0_RMII_RXD0@GPC_MFP1', 'SPI1_MISO:SYS_GPC_MFP1_PC7MFP_SPI1_MISO@GPC_MFP1', 'UART4_TXD:SYS_GPC_MFP1_PC7MFP_UART4_TXD@GPC_MFP1', 'SC2_PWR:SYS_GPC_MFP1_PC7MFP_SC2_PWR@GPC_MFP1', 'UART0_nCTS:SYS_GPC_MFP1_PC7MFP_UART0_nCTS@GPC_MFP1', 'I2C1_SMBAL:SYS_GPC_MFP1_PC7MFP_I2C1_SMBAL@GPC_MFP1', 'UART6_TXD:SYS_GPC_MFP1_PC7MFP_UART6_TXD@GPC_MFP1', 'ACMP2_WLAT:SYS_GPC_MFP1_PC7MFP_ACMP2_WLAT@GPC_MFP1', 'EPWM1_CH2:SYS_GPC_MFP1_PC7MFP_EPWM1_CH2@GPC_MFP1', 'BPWM1_CH0:SYS_GPC_MFP1_PC7MFP_BPWM1_CH0@GPC_MFP1', 'TM0:SYS_GPC_MFP1_PC7MFP_TM0@GPC_MFP1', 'INT3:SYS_GPC_MFP1_PC7MFP_INT3@GPC_MFP1', 'KPI_COL3:SYS_GPC_MFP1_PC7MFP_KPI_COL3@GPC_MFP1', 'LPUART0_nCTS:SYS_GPC_MFP1_PC7MFP_LPUART0_nCTS@GPC_MFP1', 'LPTM0:SYS_GPC_MFP1_PC7MFP_LPTM0@GPC_MFP1'] }, + { f: ['PC.8', 'GPIO:SYS_GPC_MFP2_PC8MFP_GPIO@GPC_MFP2', 'EBI_ADR16:SYS_GPC_MFP2_PC8MFP_EBI_ADR16@GPC_MFP2', 'EMAC0_RMII_REFCLK:SYS_GPC_MFP2_PC8MFP_EMAC0_RMII_REFCLK@GPC_MFP2', 'I2C0_SDA:SYS_GPC_MFP2_PC8MFP_I2C0_SDA@GPC_MFP2', 'UART4_nCTS:SYS_GPC_MFP2_PC8MFP_UART4_nCTS@GPC_MFP2', 'UART1_RXD:SYS_GPC_MFP2_PC8MFP_UART1_RXD@GPC_MFP2', 'EPWM1_CH1:SYS_GPC_MFP2_PC8MFP_EPWM1_CH1@GPC_MFP2', 'BPWM1_CH4:SYS_GPC_MFP2_PC8MFP_BPWM1_CH4@GPC_MFP2', 'SWODEC_SWO:SYS_GPC_MFP2_PC8MFP_SWODEC_SWO@GPC_MFP2', 'KPI_COL4:SYS_GPC_MFP2_PC8MFP_KPI_COL4@GPC_MFP2', 'LPI2C0_SDA:SYS_GPC_MFP2_PC8MFP_LPI2C0_SDA@GPC_MFP2'] }, + { f: ['PC.9', 'GPIO:SYS_GPC_MFP2_PC9MFP_GPIO@GPC_MFP2', 'ACMP3_P1:SYS_GPC_MFP2_PC9MFP_ACMP3_P1@GPC_MFP2', 'EBI_ADR7:SYS_GPC_MFP2_PC9MFP_EBI_ADR7@GPC_MFP2', 'UART6_nCTS:SYS_GPC_MFP2_PC9MFP_UART6_nCTS@GPC_MFP2', 'SPI3_SS:SYS_GPC_MFP2_PC9MFP_SPI3_SS@GPC_MFP2', 'UART3_RXD:SYS_GPC_MFP2_PC9MFP_UART3_RXD@GPC_MFP2', 'CANFD1_RXD:SYS_GPC_MFP2_PC9MFP_CANFD1_RXD@GPC_MFP2', 'EPWM1_CH3:SYS_GPC_MFP2_PC9MFP_EPWM1_CH3@GPC_MFP2', 'I3C0_PUPEN:SYS_GPC_MFP2_PC9MFP_I3C0_PUPEN@GPC_MFP2'] }, + { f: ['PC.10', 'GPIO:SYS_GPC_MFP2_PC10MFP_GPIO@GPC_MFP2', 'ACMP3_P2:SYS_GPC_MFP2_PC10MFP_ACMP3_P2@GPC_MFP2', 'EBI_ADR6:SYS_GPC_MFP2_PC10MFP_EBI_ADR6@GPC_MFP2', 'UART6_nRTS:SYS_GPC_MFP2_PC10MFP_UART6_nRTS@GPC_MFP2', 'SPI3_CLK:SYS_GPC_MFP2_PC10MFP_SPI3_CLK@GPC_MFP2', 'UART3_TXD:SYS_GPC_MFP2_PC10MFP_UART3_TXD@GPC_MFP2', 'CANFD1_TXD:SYS_GPC_MFP2_PC10MFP_CANFD1_TXD@GPC_MFP2', 'ECAP1_IC0:SYS_GPC_MFP2_PC10MFP_ECAP1_IC0@GPC_MFP2', 'EPWM1_CH2:SYS_GPC_MFP2_PC10MFP_EPWM1_CH2@GPC_MFP2'] }, + { f: ['PC.11', 'GPIO:SYS_GPC_MFP2_PC11MFP_GPIO@GPC_MFP2', 'ACMP3_P3:SYS_GPC_MFP2_PC11MFP_ACMP3_P3@GPC_MFP2', 'EBI_ADR5:SYS_GPC_MFP2_PC11MFP_EBI_ADR5@GPC_MFP2', 'UART0_RXD:SYS_GPC_MFP2_PC11MFP_UART0_RXD@GPC_MFP2', 'I2C0_SDA:SYS_GPC_MFP2_PC11MFP_I2C0_SDA@GPC_MFP2', 'UART6_RXD:SYS_GPC_MFP2_PC11MFP_UART6_RXD@GPC_MFP2', 'SPI3_MOSI:SYS_GPC_MFP2_PC11MFP_SPI3_MOSI@GPC_MFP2', 'ECAP1_IC1:SYS_GPC_MFP2_PC11MFP_ECAP1_IC1@GPC_MFP2', 'EPWM1_CH1:SYS_GPC_MFP2_PC11MFP_EPWM1_CH1@GPC_MFP2', 'ACMP1_O:SYS_GPC_MFP2_PC11MFP_ACMP1_O@GPC_MFP2', 'LPUART0_RXD:SYS_GPC_MFP2_PC11MFP_LPUART0_RXD@GPC_MFP2', 'LPI2C0_SDA:SYS_GPC_MFP2_PC11MFP_LPI2C0_SDA@GPC_MFP2'] }, + { f: ['PC.12', 'GPIO:SYS_GPC_MFP3_PC12MFP_GPIO@GPC_MFP3', 'EBI_ADR4:SYS_GPC_MFP3_PC12MFP_EBI_ADR4@GPC_MFP3', 'UART0_TXD:SYS_GPC_MFP3_PC12MFP_UART0_TXD@GPC_MFP3', 'I2C0_SCL:SYS_GPC_MFP3_PC12MFP_I2C0_SCL@GPC_MFP3', 'UART6_TXD:SYS_GPC_MFP3_PC12MFP_UART6_TXD@GPC_MFP3', 'SPI3_MISO:SYS_GPC_MFP3_PC12MFP_SPI3_MISO@GPC_MFP3', 'SC0_nCD:SYS_GPC_MFP3_PC12MFP_SC0_nCD@GPC_MFP3', 'ECAP1_IC2:SYS_GPC_MFP3_PC12MFP_ECAP1_IC2@GPC_MFP3', 'EPWM1_CH0:SYS_GPC_MFP3_PC12MFP_EPWM1_CH0@GPC_MFP3', 'ACMP0_O:SYS_GPC_MFP3_PC12MFP_ACMP0_O@GPC_MFP3', 'LPUART0_TXD:SYS_GPC_MFP3_PC12MFP_LPUART0_TXD@GPC_MFP3', 'LPI2C0_SCL:SYS_GPC_MFP3_PC12MFP_LPI2C0_SCL@GPC_MFP3'] }, + { f: ['PC.13', 'GPIO:SYS_GPC_MFP3_PC13MFP_GPIO@GPC_MFP3', 'EADC0_CH19:SYS_GPC_MFP3_PC13MFP_EADC0_CH19@GPC_MFP3', 'LPADC0_CH19:SYS_GPC_MFP3_PC13MFP_LPADC0_CH19@GPC_MFP3', 'EBI_ADR10:SYS_GPC_MFP3_PC13MFP_EBI_ADR10@GPC_MFP3', 'SC2_nCD:SYS_GPC_MFP3_PC13MFP_SC2_nCD@GPC_MFP3', 'SPI2_I2SMCLK:SYS_GPC_MFP3_PC13MFP_SPI2_I2SMCLK@GPC_MFP3', 'CANFD1_TXD:SYS_GPC_MFP3_PC13MFP_CANFD1_TXD@GPC_MFP3', 'USCI0_CTL0:SYS_GPC_MFP3_PC13MFP_USCI0_CTL0@GPC_MFP3', 'UART2_TXD:SYS_GPC_MFP3_PC13MFP_UART2_TXD@GPC_MFP3', 'UART8_nCTS:SYS_GPC_MFP3_PC13MFP_UART8_nCTS@GPC_MFP3', 'BPWM0_CH4:SYS_GPC_MFP3_PC13MFP_BPWM0_CH4@GPC_MFP3', 'CLKO:SYS_GPC_MFP3_PC13MFP_CLKO@GPC_MFP3', 'EADC0_ST:SYS_GPC_MFP3_PC13MFP_EADC0_ST@GPC_MFP3', 'LPADC0_ST:SYS_GPC_MFP3_PC13MFP_LPADC0_ST@GPC_MFP3'] }, + { f: ['PC.14', 'GPIO:SYS_GPC_MFP3_PC14MFP_GPIO@GPC_MFP3', 'EBI_AD11:SYS_GPC_MFP3_PC14MFP_EBI_AD11@GPC_MFP3', 'SC1_nCD:SYS_GPC_MFP3_PC14MFP_SC1_nCD@GPC_MFP3', 'SPI0_I2SMCLK:SYS_GPC_MFP3_PC14MFP_SPI0_I2SMCLK@GPC_MFP3', 'USCI0_CTL0:SYS_GPC_MFP3_PC14MFP_USCI0_CTL0@GPC_MFP3', 'QSPI0_CLK:SYS_GPC_MFP3_PC14MFP_QSPI0_CLK@GPC_MFP3', 'TRACE_SWO:SYS_GPC_MFP3_PC14MFP_TRACE_SWO@GPC_MFP3', 'EPWM0_SYNC_IN:SYS_GPC_MFP3_PC14MFP_EPWM0_SYNC_IN@GPC_MFP3', 'ETMC_TRACE_CLK:SYS_GPC_MFP3_PC14MFP_ETMC_TRACE_CLK@GPC_MFP3', 'TM1:SYS_GPC_MFP3_PC14MFP_TM1@GPC_MFP3', 'USB_VBUS_ST:SYS_GPC_MFP3_PC14MFP_USB_VBUS_ST@GPC_MFP3', 'HSUSB_VBUS_ST:SYS_GPC_MFP3_PC14MFP_HSUSB_VBUS_ST@GPC_MFP3', 'LPTM1:SYS_GPC_MFP3_PC14MFP_LPTM1@GPC_MFP3'] }, + { f: ['PD.0', 'GPIO:SYS_GPD_MFP0_PD0MFP_GPIO@GPD_MFP0', 'EBI_AD13:SYS_GPD_MFP0_PD0MFP_EBI_AD13@GPD_MFP0', 'USCI0_CLK:SYS_GPD_MFP0_PD0MFP_USCI0_CLK@GPD_MFP0', 'SPI0_MOSI:SYS_GPD_MFP0_PD0MFP_SPI0_MOSI@GPD_MFP0', 'UART3_RXD:SYS_GPD_MFP0_PD0MFP_UART3_RXD@GPD_MFP0', 'I2C2_SDA:SYS_GPD_MFP0_PD0MFP_I2C2_SDA@GPD_MFP0', 'SC2_CLK:SYS_GPD_MFP0_PD0MFP_SC2_CLK@GPD_MFP0', 'I2S1_DO:SYS_GPD_MFP0_PD0MFP_I2S1_DO@GPD_MFP0', 'EQEI2_A:SYS_GPD_MFP0_PD0MFP_EQEI2_A@GPD_MFP0', 'ECAP2_IC1:SYS_GPD_MFP0_PD0MFP_ECAP2_IC1@GPD_MFP0', 'TM2:SYS_GPD_MFP0_PD0MFP_TM2@GPD_MFP0', 'LPSPI0_MOSI:SYS_GPD_MFP0_PD0MFP_LPSPI0_MOSI@GPD_MFP0', 'LPIO6:SYS_GPD_MFP0_PD0MFP_LPIO6@GPD_MFP0'] }, + { f: ['PD.1', 'GPIO:SYS_GPD_MFP0_PD1MFP_GPIO@GPD_MFP0', 'EBI_AD12:SYS_GPD_MFP0_PD1MFP_EBI_AD12@GPD_MFP0', 'USCI0_DAT0:SYS_GPD_MFP0_PD1MFP_USCI0_DAT0@GPD_MFP0', 'SPI0_MISO:SYS_GPD_MFP0_PD1MFP_SPI0_MISO@GPD_MFP0', 'UART3_TXD:SYS_GPD_MFP0_PD1MFP_UART3_TXD@GPD_MFP0', 'I2C2_SCL:SYS_GPD_MFP0_PD1MFP_I2C2_SCL@GPD_MFP0', 'SC2_DAT:SYS_GPD_MFP0_PD1MFP_SC2_DAT@GPD_MFP0', 'I2S1_DI:SYS_GPD_MFP0_PD1MFP_I2S1_DI@GPD_MFP0', 'EQEI2_INDEX:SYS_GPD_MFP0_PD1MFP_EQEI2_INDEX@GPD_MFP0', 'ECAP2_IC0:SYS_GPD_MFP0_PD1MFP_ECAP2_IC0@GPD_MFP0', 'LPSPI0_MISO:SYS_GPD_MFP0_PD1MFP_LPSPI0_MISO@GPD_MFP0', 'LPIO7:SYS_GPD_MFP0_PD1MFP_LPIO7@GPD_MFP0'] }, + { f: ['PD.2', 'GPIO:SYS_GPD_MFP0_PD2MFP_GPIO@GPD_MFP0', 'EBI_AD11:SYS_GPD_MFP0_PD2MFP_EBI_AD11@GPD_MFP0', 'USCI0_DAT1:SYS_GPD_MFP0_PD2MFP_USCI0_DAT1@GPD_MFP0', 'SPI0_CLK:SYS_GPD_MFP0_PD2MFP_SPI0_CLK@GPD_MFP0', 'UART3_nCTS:SYS_GPD_MFP0_PD2MFP_UART3_nCTS@GPD_MFP0', 'SC2_RST:SYS_GPD_MFP0_PD2MFP_SC2_RST@GPD_MFP0', 'UART0_RXD:SYS_GPD_MFP0_PD2MFP_UART0_RXD@GPD_MFP0', 'I2S1_MCLK:SYS_GPD_MFP0_PD2MFP_I2S1_MCLK@GPD_MFP0', 'EQEI3_B:SYS_GPD_MFP0_PD2MFP_EQEI3_B@GPD_MFP0', 'LPSPI0_CLK:SYS_GPD_MFP0_PD2MFP_LPSPI0_CLK@GPD_MFP0', 'LPUART0_RXD:SYS_GPD_MFP0_PD2MFP_LPUART0_RXD@GPD_MFP0'] }, + { f: ['PD.3', 'GPIO:SYS_GPD_MFP0_PD3MFP_GPIO@GPD_MFP0', 'EBI_AD10:SYS_GPD_MFP0_PD3MFP_EBI_AD10@GPD_MFP0', 'USCI0_CTL1:SYS_GPD_MFP0_PD3MFP_USCI0_CTL1@GPD_MFP0', 'SPI0_SS:SYS_GPD_MFP0_PD3MFP_SPI0_SS@GPD_MFP0', 'UART3_nRTS:SYS_GPD_MFP0_PD3MFP_UART3_nRTS@GPD_MFP0', 'SC2_PWR:SYS_GPD_MFP0_PD3MFP_SC2_PWR@GPD_MFP0', 'SC1_nCD:SYS_GPD_MFP0_PD3MFP_SC1_nCD@GPD_MFP0', 'UART0_TXD:SYS_GPD_MFP0_PD3MFP_UART0_TXD@GPD_MFP0', 'I2S1_BCLK:SYS_GPD_MFP0_PD3MFP_I2S1_BCLK@GPD_MFP0', 'EQEI3_A:SYS_GPD_MFP0_PD3MFP_EQEI3_A@GPD_MFP0', 'LPSPI0_SS:SYS_GPD_MFP0_PD3MFP_LPSPI0_SS@GPD_MFP0', 'LPUART0_TXD:SYS_GPD_MFP0_PD3MFP_LPUART0_TXD@GPD_MFP0'] }, + { f: ['PD.4', 'GPIO:SYS_GPD_MFP1_PD4MFP_GPIO@GPD_MFP1', 'USCI0_CTL0:SYS_GPD_MFP1_PD4MFP_USCI0_CTL0@GPD_MFP1', 'I2C1_SDA:SYS_GPD_MFP1_PD4MFP_I2C1_SDA@GPD_MFP1', 'SPI1_SS:SYS_GPD_MFP1_PD4MFP_SPI1_SS@GPD_MFP1', 'SC1_CLK:SYS_GPD_MFP1_PD4MFP_SC1_CLK@GPD_MFP1', 'USB_VBUS_ST:SYS_GPD_MFP1_PD4MFP_USB_VBUS_ST@GPD_MFP1', 'PSIO0_CH7:SYS_GPD_MFP1_PD4MFP_PSIO0_CH7@GPD_MFP1'] }, + { f: ['PD.5', 'GPIO:SYS_GPD_MFP1_PD5MFP_GPIO@GPD_MFP1', 'EBI_AD15:SYS_GPD_MFP1_PD5MFP_EBI_AD15@GPD_MFP1', 'SD1_nCD:SYS_GPD_MFP1_PD5MFP_SD1_nCD@GPD_MFP1', 'EBI_nCS0:SYS_GPD_MFP1_PD5MFP_EBI_nCS0@GPD_MFP1', 'CLKO:SYS_GPD_MFP1_PD5MFP_CLKO@GPD_MFP1', 'EADC0_ST:SYS_GPD_MFP1_PD5MFP_EADC0_ST@GPD_MFP1', 'LPADC0_ST:SYS_GPD_MFP1_PD5MFP_LPADC0_ST@GPD_MFP1'] }, + { f: ['PD.6', 'GPIO:SYS_GPD_MFP1_PD6MFP_GPIO@GPD_MFP1', 'EBI_AD5:SYS_GPD_MFP1_PD6MFP_EBI_AD5@GPD_MFP1', 'SD1_CLK:SYS_GPD_MFP1_PD6MFP_SD1_CLK@GPD_MFP1', 'QSPI1_MOSI0:SYS_GPD_MFP1_PD6MFP_QSPI1_MOSI0@GPD_MFP1', 'UART6_RXD:SYS_GPD_MFP1_PD6MFP_UART6_RXD@GPD_MFP1', 'BPWM0_CH0:SYS_GPD_MFP1_PD6MFP_BPWM0_CH0@GPD_MFP1'] }, + { f: ['PD.7', 'GPIO:SYS_GPD_MFP1_PD7MFP_GPIO@GPD_MFP1', 'EBI_AD4:SYS_GPD_MFP1_PD7MFP_EBI_AD4@GPD_MFP1', 'SD1_CMD:SYS_GPD_MFP1_PD7MFP_SD1_CMD@GPD_MFP1', 'QSPI1_MISO0:SYS_GPD_MFP1_PD7MFP_QSPI1_MISO0@GPD_MFP1', 'UART6_TXD:SYS_GPD_MFP1_PD7MFP_UART6_TXD@GPD_MFP1', 'CCAP_HSYNC:SYS_GPD_MFP1_PD7MFP_CCAP_HSYNC@GPD_MFP1', 'BPWM0_CH1:SYS_GPD_MFP1_PD7MFP_BPWM0_CH1@GPD_MFP1'] }, + { f: ['PD.8', 'GPIO:SYS_GPD_MFP2_PD8MFP_GPIO@GPD_MFP2', 'EBI_AD6:SYS_GPD_MFP2_PD8MFP_EBI_AD6@GPD_MFP2', 'I2C2_SDA:SYS_GPD_MFP2_PD8MFP_I2C2_SDA@GPD_MFP2', 'UART2_nRTS:SYS_GPD_MFP2_PD8MFP_UART2_nRTS@GPD_MFP2', 'UART7_RXD:SYS_GPD_MFP2_PD8MFP_UART7_RXD@GPD_MFP2', 'PSIO0_CH3:SYS_GPD_MFP2_PD8MFP_PSIO0_CH3@GPD_MFP2'] }, + { f: ['PD.9', 'GPIO:SYS_GPD_MFP2_PD9MFP_GPIO@GPD_MFP2', 'EBI_AD7:SYS_GPD_MFP2_PD9MFP_EBI_AD7@GPD_MFP2', 'I2C2_SCL:SYS_GPD_MFP2_PD9MFP_I2C2_SCL@GPD_MFP2', 'UART2_nCTS:SYS_GPD_MFP2_PD9MFP_UART2_nCTS@GPD_MFP2', 'UART7_TXD:SYS_GPD_MFP2_PD9MFP_UART7_TXD@GPD_MFP2', 'PSIO0_CH2:SYS_GPD_MFP2_PD9MFP_PSIO0_CH2@GPD_MFP2'] }, + { f: ['PD.10', 'GPIO:SYS_GPD_MFP2_PD10MFP_GPIO@GPD_MFP2', 'EADC0_CH16:SYS_GPD_MFP2_PD10MFP_EADC0_CH16@GPD_MFP2', 'LPADC0_CH16:SYS_GPD_MFP2_PD10MFP_LPADC0_CH16@GPD_MFP2', 'EBI_nCS2:SYS_GPD_MFP2_PD10MFP_EBI_nCS2@GPD_MFP2', 'UART1_RXD:SYS_GPD_MFP2_PD10MFP_UART1_RXD@GPD_MFP2', 'CANFD0_RXD:SYS_GPD_MFP2_PD10MFP_CANFD0_RXD@GPD_MFP2', 'UART8_RXD:SYS_GPD_MFP2_PD10MFP_UART8_RXD@GPD_MFP2', 'EQEI0_B:SYS_GPD_MFP2_PD10MFP_EQEI0_B@GPD_MFP2', 'ECAP3_IC2:SYS_GPD_MFP2_PD10MFP_ECAP3_IC2@GPD_MFP2', 'INT7:SYS_GPD_MFP2_PD10MFP_INT7@GPD_MFP2'] }, + { f: ['PD.11', 'GPIO:SYS_GPD_MFP2_PD11MFP_GPIO@GPD_MFP2', 'EADC0_CH17:SYS_GPD_MFP2_PD11MFP_EADC0_CH17@GPD_MFP2', 'LPADC0_CH17:SYS_GPD_MFP2_PD11MFP_LPADC0_CH17@GPD_MFP2', 'EBI_nCS1:SYS_GPD_MFP2_PD11MFP_EBI_nCS1@GPD_MFP2', 'UART1_TXD:SYS_GPD_MFP2_PD11MFP_UART1_TXD@GPD_MFP2', 'CANFD0_TXD:SYS_GPD_MFP2_PD11MFP_CANFD0_TXD@GPD_MFP2', 'UART8_TXD:SYS_GPD_MFP2_PD11MFP_UART8_TXD@GPD_MFP2', 'EQEI0_A:SYS_GPD_MFP2_PD11MFP_EQEI0_A@GPD_MFP2', 'ECAP3_IC1:SYS_GPD_MFP2_PD11MFP_ECAP3_IC1@GPD_MFP2', 'INT6:SYS_GPD_MFP2_PD11MFP_INT6@GPD_MFP2'] }, + { f: ['PD.12', 'GPIO:SYS_GPD_MFP3_PD12MFP_GPIO@GPD_MFP3', 'EADC0_CH18:SYS_GPD_MFP3_PD12MFP_EADC0_CH18@GPD_MFP3', 'LPADC0_CH18:SYS_GPD_MFP3_PD12MFP_LPADC0_CH18@GPD_MFP3', 'EBI_nCS0:SYS_GPD_MFP3_PD12MFP_EBI_nCS0@GPD_MFP3', 'CANFD1_RXD:SYS_GPD_MFP3_PD12MFP_CANFD1_RXD@GPD_MFP3', 'UART2_RXD:SYS_GPD_MFP3_PD12MFP_UART2_RXD@GPD_MFP3', 'UART8_nRTS:SYS_GPD_MFP3_PD12MFP_UART8_nRTS@GPD_MFP3', 'BPWM0_CH5:SYS_GPD_MFP3_PD12MFP_BPWM0_CH5@GPD_MFP3', 'EQEI0_INDEX:SYS_GPD_MFP3_PD12MFP_EQEI0_INDEX@GPD_MFP3', 'ECAP3_IC0:SYS_GPD_MFP3_PD12MFP_ECAP3_IC0@GPD_MFP3', 'CLKO:SYS_GPD_MFP3_PD12MFP_CLKO@GPD_MFP3', 'EADC0_ST:SYS_GPD_MFP3_PD12MFP_EADC0_ST@GPD_MFP3', 'INT5:SYS_GPD_MFP3_PD12MFP_INT5@GPD_MFP3', 'LPADC0_ST:SYS_GPD_MFP3_PD12MFP_LPADC0_ST@GPD_MFP3'] }, + { f: ['PD.13', 'GPIO:SYS_GPD_MFP3_PD13MFP_GPIO@GPD_MFP3', 'EBI_AD10:SYS_GPD_MFP3_PD13MFP_EBI_AD10@GPD_MFP3', 'SD0_nCD:SYS_GPD_MFP3_PD13MFP_SD0_nCD@GPD_MFP3', 'SPI0_I2SMCLK:SYS_GPD_MFP3_PD13MFP_SPI0_I2SMCLK@GPD_MFP3', 'SPI1_I2SMCLK:SYS_GPD_MFP3_PD13MFP_SPI1_I2SMCLK@GPD_MFP3', 'QSPI1_MOSI0:SYS_GPD_MFP3_PD13MFP_QSPI1_MOSI0@GPD_MFP3', 'SC2_nCD:SYS_GPD_MFP3_PD13MFP_SC2_nCD@GPD_MFP3', 'SD1_CLK:SYS_GPD_MFP3_PD13MFP_SD1_CLK@GPD_MFP3', 'UART6_RXD:SYS_GPD_MFP3_PD13MFP_UART6_RXD@GPD_MFP3', 'I2S1_LRCK:SYS_GPD_MFP3_PD13MFP_I2S1_LRCK@GPD_MFP3', 'BPWM0_CH0:SYS_GPD_MFP3_PD13MFP_BPWM0_CH0@GPD_MFP3', 'EQEI2_B:SYS_GPD_MFP3_PD13MFP_EQEI2_B@GPD_MFP3', 'ECAP2_IC2:SYS_GPD_MFP3_PD13MFP_ECAP2_IC2@GPD_MFP3', 'CLKO:SYS_GPD_MFP3_PD13MFP_CLKO@GPD_MFP3', 'EADC0_ST:SYS_GPD_MFP3_PD13MFP_EADC0_ST@GPD_MFP3', 'LPADC0_ST:SYS_GPD_MFP3_PD13MFP_LPADC0_ST@GPD_MFP3'] }, + { f: ['PD.14', 'GPIO:SYS_GPD_MFP3_PD14MFP_GPIO@GPD_MFP3', 'EBI_nCS0:SYS_GPD_MFP3_PD14MFP_EBI_nCS0@GPD_MFP3', 'SPI3_I2SMCLK:SYS_GPD_MFP3_PD14MFP_SPI3_I2SMCLK@GPD_MFP3', 'SC1_nCD:SYS_GPD_MFP3_PD14MFP_SC1_nCD@GPD_MFP3', 'SPI0_I2SMCLK:SYS_GPD_MFP3_PD14MFP_SPI0_I2SMCLK@GPD_MFP3', 'QSPI0_MOSI1:SYS_GPD_MFP3_PD14MFP_QSPI0_MOSI1@GPD_MFP3', 'I2S1_BCLK:SYS_GPD_MFP3_PD14MFP_I2S1_BCLK@GPD_MFP3', 'EPWM0_CH4:SYS_GPD_MFP3_PD14MFP_EPWM0_CH4@GPD_MFP3'] }, + { f: ['PE.0', 'GPIO:SYS_GPE_MFP0_PE0MFP_GPIO@GPE_MFP0', 'EBI_AD11:SYS_GPE_MFP0_PE0MFP_EBI_AD11@GPE_MFP0', 'QSPI0_MOSI0:SYS_GPE_MFP0_PE0MFP_QSPI0_MOSI0@GPE_MFP0', 'SC2_CLK:SYS_GPE_MFP0_PE0MFP_SC2_CLK@GPE_MFP0', 'I2S0_MCLK:SYS_GPE_MFP0_PE0MFP_I2S0_MCLK@GPE_MFP0', 'SPI1_MOSI:SYS_GPE_MFP0_PE0MFP_SPI1_MOSI@GPE_MFP0', 'UART3_RXD:SYS_GPE_MFP0_PE0MFP_UART3_RXD@GPE_MFP0', 'I2C1_SDA:SYS_GPE_MFP0_PE0MFP_I2C1_SDA@GPE_MFP0', 'UART4_nRTS:SYS_GPE_MFP0_PE0MFP_UART4_nRTS@GPE_MFP0', 'UART8_RXD:SYS_GPE_MFP0_PE0MFP_UART8_RXD@GPE_MFP0', 'LPIO0:SYS_GPE_MFP0_PE0MFP_LPIO0@GPE_MFP0'] }, + { f: ['PE.1', 'GPIO:SYS_GPE_MFP0_PE1MFP_GPIO@GPE_MFP0', 'EBI_AD10:SYS_GPE_MFP0_PE1MFP_EBI_AD10@GPE_MFP0', 'QSPI0_MISO0:SYS_GPE_MFP0_PE1MFP_QSPI0_MISO0@GPE_MFP0', 'SC2_DAT:SYS_GPE_MFP0_PE1MFP_SC2_DAT@GPE_MFP0', 'I2S0_BCLK:SYS_GPE_MFP0_PE1MFP_I2S0_BCLK@GPE_MFP0', 'SPI1_MISO:SYS_GPE_MFP0_PE1MFP_SPI1_MISO@GPE_MFP0', 'UART3_TXD:SYS_GPE_MFP0_PE1MFP_UART3_TXD@GPE_MFP0', 'I2C1_SCL:SYS_GPE_MFP0_PE1MFP_I2C1_SCL@GPE_MFP0', 'UART4_nCTS:SYS_GPE_MFP0_PE1MFP_UART4_nCTS@GPE_MFP0', 'UART8_TXD:SYS_GPE_MFP0_PE1MFP_UART8_TXD@GPE_MFP0', 'LPIO1:SYS_GPE_MFP0_PE1MFP_LPIO1@GPE_MFP0'] }, + { f: ['PE.2', 'GPIO:SYS_GPE_MFP0_PE2MFP_GPIO@GPE_MFP0', 'EBI_ALE:SYS_GPE_MFP0_PE2MFP_EBI_ALE@GPE_MFP0', 'SD0_DAT0:SYS_GPE_MFP0_PE2MFP_SD0_DAT0@GPE_MFP0', 'SPI3_MOSI:SYS_GPE_MFP0_PE2MFP_SPI3_MOSI@GPE_MFP0', 'SC0_CLK:SYS_GPE_MFP0_PE2MFP_SC0_CLK@GPE_MFP0', 'USCI0_CLK:SYS_GPE_MFP0_PE2MFP_USCI0_CLK@GPE_MFP0', 'UART6_nCTS:SYS_GPE_MFP0_PE2MFP_UART6_nCTS@GPE_MFP0', 'UART7_RXD:SYS_GPE_MFP0_PE2MFP_UART7_RXD@GPE_MFP0', 'UART8_nRTS:SYS_GPE_MFP0_PE2MFP_UART8_nRTS@GPE_MFP0', 'EQEI0_B:SYS_GPE_MFP0_PE2MFP_EQEI0_B@GPE_MFP0', 'EPWM0_CH5:SYS_GPE_MFP0_PE2MFP_EPWM0_CH5@GPE_MFP0', 'BPWM0_CH0:SYS_GPE_MFP0_PE2MFP_BPWM0_CH0@GPE_MFP0', 'I2S0_MCLK:SYS_GPE_MFP0_PE2MFP_I2S0_MCLK@GPE_MFP0', 'SC2_CLK:SYS_GPE_MFP0_PE2MFP_SC2_CLK@GPE_MFP0'] }, + { f: ['PE.3', 'GPIO:SYS_GPE_MFP0_PE3MFP_GPIO@GPE_MFP0', 'EBI_MCLK:SYS_GPE_MFP0_PE3MFP_EBI_MCLK@GPE_MFP0', 'SD0_DAT1:SYS_GPE_MFP0_PE3MFP_SD0_DAT1@GPE_MFP0', 'SPI3_MISO:SYS_GPE_MFP0_PE3MFP_SPI3_MISO@GPE_MFP0', 'SC0_DAT:SYS_GPE_MFP0_PE3MFP_SC0_DAT@GPE_MFP0', 'USCI0_DAT0:SYS_GPE_MFP0_PE3MFP_USCI0_DAT0@GPE_MFP0', 'UART6_nRTS:SYS_GPE_MFP0_PE3MFP_UART6_nRTS@GPE_MFP0', 'UART7_TXD:SYS_GPE_MFP0_PE3MFP_UART7_TXD@GPE_MFP0', 'UART8_nCTS:SYS_GPE_MFP0_PE3MFP_UART8_nCTS@GPE_MFP0', 'EQEI0_A:SYS_GPE_MFP0_PE3MFP_EQEI0_A@GPE_MFP0', 'EPWM0_CH4:SYS_GPE_MFP0_PE3MFP_EPWM0_CH4@GPE_MFP0', 'BPWM0_CH1:SYS_GPE_MFP0_PE3MFP_BPWM0_CH1@GPE_MFP0', 'I2S0_BCLK:SYS_GPE_MFP0_PE3MFP_I2S0_BCLK@GPE_MFP0', 'SC2_DAT:SYS_GPE_MFP0_PE3MFP_SC2_DAT@GPE_MFP0'] }, + { f: ['PE.4', 'GPIO:SYS_GPE_MFP1_PE4MFP_GPIO@GPE_MFP1', 'EBI_nWR:SYS_GPE_MFP1_PE4MFP_EBI_nWR@GPE_MFP1', 'SD0_DAT2:SYS_GPE_MFP1_PE4MFP_SD0_DAT2@GPE_MFP1', 'SPI3_CLK:SYS_GPE_MFP1_PE4MFP_SPI3_CLK@GPE_MFP1', 'SC0_RST:SYS_GPE_MFP1_PE4MFP_SC0_RST@GPE_MFP1', 'USCI0_DAT1:SYS_GPE_MFP1_PE4MFP_USCI0_DAT1@GPE_MFP1', 'UART6_RXD:SYS_GPE_MFP1_PE4MFP_UART6_RXD@GPE_MFP1', 'UART7_nCTS:SYS_GPE_MFP1_PE4MFP_UART7_nCTS@GPE_MFP1', 'UART9_RXD:SYS_GPE_MFP1_PE4MFP_UART9_RXD@GPE_MFP1', 'EQEI0_INDEX:SYS_GPE_MFP1_PE4MFP_EQEI0_INDEX@GPE_MFP1', 'EPWM0_CH3:SYS_GPE_MFP1_PE4MFP_EPWM0_CH3@GPE_MFP1', 'BPWM0_CH2:SYS_GPE_MFP1_PE4MFP_BPWM0_CH2@GPE_MFP1', 'SPI1_MOSI:SYS_GPE_MFP1_PE4MFP_SPI1_MOSI@GPE_MFP1', 'PSIO0_CH3:SYS_GPE_MFP1_PE4MFP_PSIO0_CH3@GPE_MFP1'] }, + { f: ['PE.5', 'GPIO:SYS_GPE_MFP1_PE5MFP_GPIO@GPE_MFP1', 'EBI_nRD:SYS_GPE_MFP1_PE5MFP_EBI_nRD@GPE_MFP1', 'SD0_DAT3:SYS_GPE_MFP1_PE5MFP_SD0_DAT3@GPE_MFP1', 'SPI3_SS:SYS_GPE_MFP1_PE5MFP_SPI3_SS@GPE_MFP1', 'SC0_PWR:SYS_GPE_MFP1_PE5MFP_SC0_PWR@GPE_MFP1', 'USCI0_CTL1:SYS_GPE_MFP1_PE5MFP_USCI0_CTL1@GPE_MFP1', 'UART6_TXD:SYS_GPE_MFP1_PE5MFP_UART6_TXD@GPE_MFP1', 'UART7_nRTS:SYS_GPE_MFP1_PE5MFP_UART7_nRTS@GPE_MFP1', 'UART9_TXD:SYS_GPE_MFP1_PE5MFP_UART9_TXD@GPE_MFP1', 'EQEI1_B:SYS_GPE_MFP1_PE5MFP_EQEI1_B@GPE_MFP1', 'EPWM0_CH2:SYS_GPE_MFP1_PE5MFP_EPWM0_CH2@GPE_MFP1', 'BPWM0_CH3:SYS_GPE_MFP1_PE5MFP_BPWM0_CH3@GPE_MFP1', 'SPI1_MISO:SYS_GPE_MFP1_PE5MFP_SPI1_MISO@GPE_MFP1', 'PSIO0_CH2:SYS_GPE_MFP1_PE5MFP_PSIO0_CH2@GPE_MFP1'] }, + { f: ['PE.6', 'GPIO:SYS_GPE_MFP1_PE6MFP_GPIO@GPE_MFP1', 'EBI_AD11:SYS_GPE_MFP1_PE6MFP_EBI_AD11@GPE_MFP1', 'SD0_CLK:SYS_GPE_MFP1_PE6MFP_SD0_CLK@GPE_MFP1', 'SPI3_I2SMCLK:SYS_GPE_MFP1_PE6MFP_SPI3_I2SMCLK@GPE_MFP1', 'SC0_nCD:SYS_GPE_MFP1_PE6MFP_SC0_nCD@GPE_MFP1', 'USCI0_CTL0:SYS_GPE_MFP1_PE6MFP_USCI0_CTL0@GPE_MFP1', 'UART5_RXD:SYS_GPE_MFP1_PE6MFP_UART5_RXD@GPE_MFP1', 'CANFD1_RXD:SYS_GPE_MFP1_PE6MFP_CANFD1_RXD@GPE_MFP1', 'UART9_nRTS:SYS_GPE_MFP1_PE6MFP_UART9_nRTS@GPE_MFP1', 'EQEI1_A:SYS_GPE_MFP1_PE6MFP_EQEI1_A@GPE_MFP1', 'EPWM0_CH1:SYS_GPE_MFP1_PE6MFP_EPWM0_CH1@GPE_MFP1', 'BPWM0_CH4:SYS_GPE_MFP1_PE6MFP_BPWM0_CH4@GPE_MFP1', 'ACMP3_O:SYS_GPE_MFP1_PE6MFP_ACMP3_O@GPE_MFP1', 'QSPI0_MOSI0:SYS_GPE_MFP1_PE6MFP_QSPI0_MOSI0@GPE_MFP1', 'PSIO0_CH1:SYS_GPE_MFP1_PE6MFP_PSIO0_CH1@GPE_MFP1'] }, + { f: ['PE.7', 'GPIO:SYS_GPE_MFP1_PE7MFP_GPIO@GPE_MFP1', 'EBI_AD10:SYS_GPE_MFP1_PE7MFP_EBI_AD10@GPE_MFP1', 'SD0_CMD:SYS_GPE_MFP1_PE7MFP_SD0_CMD@GPE_MFP1', 'UART5_TXD:SYS_GPE_MFP1_PE7MFP_UART5_TXD@GPE_MFP1', 'CANFD1_TXD:SYS_GPE_MFP1_PE7MFP_CANFD1_TXD@GPE_MFP1', 'UART9_nCTS:SYS_GPE_MFP1_PE7MFP_UART9_nCTS@GPE_MFP1', 'EQEI1_INDEX:SYS_GPE_MFP1_PE7MFP_EQEI1_INDEX@GPE_MFP1', 'EPWM0_CH0:SYS_GPE_MFP1_PE7MFP_EPWM0_CH0@GPE_MFP1', 'BPWM0_CH5:SYS_GPE_MFP1_PE7MFP_BPWM0_CH5@GPE_MFP1', 'ACMP2_O:SYS_GPE_MFP1_PE7MFP_ACMP2_O@GPE_MFP1', 'QSPI0_MISO0:SYS_GPE_MFP1_PE7MFP_QSPI0_MISO0@GPE_MFP1', 'PSIO0_CH0:SYS_GPE_MFP1_PE7MFP_PSIO0_CH0@GPE_MFP1'] }, + { f: ['PE.8', 'GPIO:SYS_GPE_MFP2_PE8MFP_GPIO@GPE_MFP2', 'EBI_ADR10:SYS_GPE_MFP2_PE8MFP_EBI_ADR10@GPE_MFP2', 'EMAC0_RMII_MDC:SYS_GPE_MFP2_PE8MFP_EMAC0_RMII_MDC@GPE_MFP2', 'I2S0_BCLK:SYS_GPE_MFP2_PE8MFP_I2S0_BCLK@GPE_MFP2', 'SPI2_CLK:SYS_GPE_MFP2_PE8MFP_SPI2_CLK@GPE_MFP2', 'UART2_TXD:SYS_GPE_MFP2_PE8MFP_UART2_TXD@GPE_MFP2', 'EPWM0_CH0:SYS_GPE_MFP2_PE8MFP_EPWM0_CH0@GPE_MFP2', 'EPWM0_BRAKE0:SYS_GPE_MFP2_PE8MFP_EPWM0_BRAKE0@GPE_MFP2', 'ECAP0_IC0:SYS_GPE_MFP2_PE8MFP_ECAP0_IC0@GPE_MFP2', 'EQEI2_INDEX:SYS_GPE_MFP2_PE8MFP_EQEI2_INDEX@GPE_MFP2', 'TRACE_DATA3:SYS_GPE_MFP2_PE8MFP_TRACE_DATA3@GPE_MFP2', 'ECAP3_IC0:SYS_GPE_MFP2_PE8MFP_ECAP3_IC0@GPE_MFP2', 'DMIC0_DAT:SYS_GPE_MFP2_PE8MFP_DMIC0_DAT@GPE_MFP2'] }, + { f: ['PE.9', 'GPIO:SYS_GPE_MFP2_PE9MFP_GPIO@GPE_MFP2', 'EBI_ADR11:SYS_GPE_MFP2_PE9MFP_EBI_ADR11@GPE_MFP2', 'EMAC0_RMII_MDIO:SYS_GPE_MFP2_PE9MFP_EMAC0_RMII_MDIO@GPE_MFP2', 'I2S0_MCLK:SYS_GPE_MFP2_PE9MFP_I2S0_MCLK@GPE_MFP2', 'SPI2_MISO:SYS_GPE_MFP2_PE9MFP_SPI2_MISO@GPE_MFP2', 'UART2_RXD:SYS_GPE_MFP2_PE9MFP_UART2_RXD@GPE_MFP2', 'EPWM0_CH1:SYS_GPE_MFP2_PE9MFP_EPWM0_CH1@GPE_MFP2', 'EPWM0_BRAKE1:SYS_GPE_MFP2_PE9MFP_EPWM0_BRAKE1@GPE_MFP2', 'ECAP0_IC1:SYS_GPE_MFP2_PE9MFP_ECAP0_IC1@GPE_MFP2', 'EQEI2_A:SYS_GPE_MFP2_PE9MFP_EQEI2_A@GPE_MFP2', 'TRACE_DATA2:SYS_GPE_MFP2_PE9MFP_TRACE_DATA2@GPE_MFP2', 'ECAP3_IC1:SYS_GPE_MFP2_PE9MFP_ECAP3_IC1@GPE_MFP2', 'DMIC0_CLK:SYS_GPE_MFP2_PE9MFP_DMIC0_CLK@GPE_MFP2'] }, + { f: ['PE.10', 'GPIO:SYS_GPE_MFP2_PE10MFP_GPIO@GPE_MFP2', 'EBI_ADR12:SYS_GPE_MFP2_PE10MFP_EBI_ADR12@GPE_MFP2', 'EMAC0_RMII_TXD0:SYS_GPE_MFP2_PE10MFP_EMAC0_RMII_TXD0@GPE_MFP2', 'I2S0_DI:SYS_GPE_MFP2_PE10MFP_I2S0_DI@GPE_MFP2', 'SPI2_MOSI:SYS_GPE_MFP2_PE10MFP_SPI2_MOSI@GPE_MFP2', 'UART3_TXD:SYS_GPE_MFP2_PE10MFP_UART3_TXD@GPE_MFP2', 'EPWM0_CH2:SYS_GPE_MFP2_PE10MFP_EPWM0_CH2@GPE_MFP2', 'EPWM1_BRAKE0:SYS_GPE_MFP2_PE10MFP_EPWM1_BRAKE0@GPE_MFP2', 'ECAP0_IC2:SYS_GPE_MFP2_PE10MFP_ECAP0_IC2@GPE_MFP2', 'EQEI2_B:SYS_GPE_MFP2_PE10MFP_EQEI2_B@GPE_MFP2', 'TRACE_DATA1:SYS_GPE_MFP2_PE10MFP_TRACE_DATA1@GPE_MFP2', 'ECAP3_IC2:SYS_GPE_MFP2_PE10MFP_ECAP3_IC2@GPE_MFP2', 'DMIC0_CLKLP:SYS_GPE_MFP2_PE10MFP_DMIC0_CLKLP@GPE_MFP2'] }, + { f: ['PE.11', 'GPIO:SYS_GPE_MFP2_PE11MFP_GPIO@GPE_MFP2', 'EBI_ADR13:SYS_GPE_MFP2_PE11MFP_EBI_ADR13@GPE_MFP2', 'EMAC0_RMII_TXD1:SYS_GPE_MFP2_PE11MFP_EMAC0_RMII_TXD1@GPE_MFP2', 'I2S0_DO:SYS_GPE_MFP2_PE11MFP_I2S0_DO@GPE_MFP2', 'SPI2_SS:SYS_GPE_MFP2_PE11MFP_SPI2_SS@GPE_MFP2', 'UART3_RXD:SYS_GPE_MFP2_PE11MFP_UART3_RXD@GPE_MFP2', 'UART1_nCTS:SYS_GPE_MFP2_PE11MFP_UART1_nCTS@GPE_MFP2', 'EPWM0_CH3:SYS_GPE_MFP2_PE11MFP_EPWM0_CH3@GPE_MFP2', 'EPWM1_BRAKE1:SYS_GPE_MFP2_PE11MFP_EPWM1_BRAKE1@GPE_MFP2', 'ECAP1_IC2:SYS_GPE_MFP2_PE11MFP_ECAP1_IC2@GPE_MFP2', 'TRACE_DATA0:SYS_GPE_MFP2_PE11MFP_TRACE_DATA0@GPE_MFP2', 'DMIC1_DAT:SYS_GPE_MFP2_PE11MFP_DMIC1_DAT@GPE_MFP2', 'KPI_COL7:SYS_GPE_MFP2_PE11MFP_KPI_COL7@GPE_MFP2'] }, + { f: ['PE.12', 'GPIO:SYS_GPE_MFP3_PE12MFP_GPIO@GPE_MFP3', 'EBI_ADR14:SYS_GPE_MFP3_PE12MFP_EBI_ADR14@GPE_MFP3', 'EMAC0_RMII_TXEN:SYS_GPE_MFP3_PE12MFP_EMAC0_RMII_TXEN@GPE_MFP3', 'I2S0_LRCK:SYS_GPE_MFP3_PE12MFP_I2S0_LRCK@GPE_MFP3', 'SPI2_I2SMCLK:SYS_GPE_MFP3_PE12MFP_SPI2_I2SMCLK@GPE_MFP3', 'UART1_nRTS:SYS_GPE_MFP3_PE12MFP_UART1_nRTS@GPE_MFP3', 'EPWM0_CH4:SYS_GPE_MFP3_PE12MFP_EPWM0_CH4@GPE_MFP3', 'ECAP1_IC1:SYS_GPE_MFP3_PE12MFP_ECAP1_IC1@GPE_MFP3', 'TRACE_CLK:SYS_GPE_MFP3_PE12MFP_TRACE_CLK@GPE_MFP3', 'DMIC1_CLK:SYS_GPE_MFP3_PE12MFP_DMIC1_CLK@GPE_MFP3', 'KPI_COL6:SYS_GPE_MFP3_PE12MFP_KPI_COL6@GPE_MFP3'] }, + { f: ['PE.13', 'GPIO:SYS_GPE_MFP3_PE13MFP_GPIO@GPE_MFP3', 'EBI_ADR15:SYS_GPE_MFP3_PE13MFP_EBI_ADR15@GPE_MFP3', 'EMAC0_PPS:SYS_GPE_MFP3_PE13MFP_EMAC0_PPS@GPE_MFP3', 'I2C0_SCL:SYS_GPE_MFP3_PE13MFP_I2C0_SCL@GPE_MFP3', 'UART4_nRTS:SYS_GPE_MFP3_PE13MFP_UART4_nRTS@GPE_MFP3', 'UART1_TXD:SYS_GPE_MFP3_PE13MFP_UART1_TXD@GPE_MFP3', 'EPWM0_CH5:SYS_GPE_MFP3_PE13MFP_EPWM0_CH5@GPE_MFP3', 'EPWM1_CH0:SYS_GPE_MFP3_PE13MFP_EPWM1_CH0@GPE_MFP3', 'BPWM1_CH5:SYS_GPE_MFP3_PE13MFP_BPWM1_CH5@GPE_MFP3', 'ECAP1_IC0:SYS_GPE_MFP3_PE13MFP_ECAP1_IC0@GPE_MFP3', 'TRACE_SWO:SYS_GPE_MFP3_PE13MFP_TRACE_SWO@GPE_MFP3', 'KPI_COL5:SYS_GPE_MFP3_PE13MFP_KPI_COL5@GPE_MFP3', 'LPI2C0_SCL:SYS_GPE_MFP3_PE13MFP_LPI2C0_SCL@GPE_MFP3'] }, + { f: ['PE.14', 'GPIO:SYS_GPE_MFP3_PE14MFP_GPIO@GPE_MFP3', 'EBI_AD8:SYS_GPE_MFP3_PE14MFP_EBI_AD8@GPE_MFP3', 'UART2_TXD:SYS_GPE_MFP3_PE14MFP_UART2_TXD@GPE_MFP3', 'CANFD0_TXD:SYS_GPE_MFP3_PE14MFP_CANFD0_TXD@GPE_MFP3', 'SD1_nCD:SYS_GPE_MFP3_PE14MFP_SD1_nCD@GPE_MFP3', 'UART6_TXD:SYS_GPE_MFP3_PE14MFP_UART6_TXD@GPE_MFP3', 'UART3_TXD:SYS_GPE_MFP3_PE14MFP_UART3_TXD@GPE_MFP3', 'I2C1_SCL:SYS_GPE_MFP3_PE14MFP_I2C1_SCL@GPE_MFP3', 'UART4_nCTS:SYS_GPE_MFP3_PE14MFP_UART4_nCTS@GPE_MFP3', 'UART8_TXD:SYS_GPE_MFP3_PE14MFP_UART8_TXD@GPE_MFP3', 'PSIO0_CH0:SYS_GPE_MFP3_PE14MFP_PSIO0_CH0@GPE_MFP3'] }, + { f: ['PE.15', 'GPIO:SYS_GPE_MFP3_PE15MFP_GPIO@GPE_MFP3', 'EBI_AD9:SYS_GPE_MFP3_PE15MFP_EBI_AD9@GPE_MFP3', 'UART2_RXD:SYS_GPE_MFP3_PE15MFP_UART2_RXD@GPE_MFP3', 'CANFD0_RXD:SYS_GPE_MFP3_PE15MFP_CANFD0_RXD@GPE_MFP3', 'UART6_RXD:SYS_GPE_MFP3_PE15MFP_UART6_RXD@GPE_MFP3', 'UART3_RXD:SYS_GPE_MFP3_PE15MFP_UART3_RXD@GPE_MFP3', 'I2C1_SDA:SYS_GPE_MFP3_PE15MFP_I2C1_SDA@GPE_MFP3', 'UART4_nRTS:SYS_GPE_MFP3_PE15MFP_UART4_nRTS@GPE_MFP3', 'UART8_RXD:SYS_GPE_MFP3_PE15MFP_UART8_RXD@GPE_MFP3', 'PSIO0_CH1:SYS_GPE_MFP3_PE15MFP_PSIO0_CH1@GPE_MFP3'] }, + { f: ['PF.0', 'GPIO:SYS_GPF_MFP0_PF0MFP_GPIO@GPF_MFP0', 'UART1_TXD:SYS_GPF_MFP0_PF0MFP_UART1_TXD@GPF_MFP0', 'I2C1_SCL:SYS_GPF_MFP0_PF0MFP_I2C1_SCL@GPF_MFP0', 'UART0_TXD:SYS_GPF_MFP0_PF0MFP_UART0_TXD@GPF_MFP0', 'SC1_DAT:SYS_GPF_MFP0_PF0MFP_SC1_DAT@GPF_MFP0', 'I2S0_DO:SYS_GPF_MFP0_PF0MFP_I2S0_DO@GPF_MFP0', 'USCI0_CTL1:SYS_GPF_MFP0_PF0MFP_USCI0_CTL1@GPF_MFP0', 'UART2_TXD:SYS_GPF_MFP0_PF0MFP_UART2_TXD@GPF_MFP0', 'I2C0_SCL:SYS_GPF_MFP0_PF0MFP_I2C0_SCL@GPF_MFP0', 'EPWM1_CH4:SYS_GPF_MFP0_PF0MFP_EPWM1_CH4@GPF_MFP0', 'BPWM1_CH0:SYS_GPF_MFP0_PF0MFP_BPWM1_CH0@GPF_MFP0', 'ACMP0_O:SYS_GPF_MFP0_PF0MFP_ACMP0_O@GPF_MFP0', 'ICE_DAT:SYS_GPF_MFP0_PF0MFP_ICE_DAT@GPF_MFP0', 'EADC0_ST:SYS_GPF_MFP0_PF0MFP_EADC0_ST@GPF_MFP0', 'I3C0_SCL:SYS_GPF_MFP0_PF0MFP_I3C0_SCL@GPF_MFP0', 'UTCPD0_FRSTX2:SYS_GPF_MFP0_PF0MFP_UTCPD0_FRSTX2@GPF_MFP0', 'UTCPD0_DISCHG:SYS_GPF_MFP0_PF0MFP_UTCPD0_DISCHG@GPF_MFP0', 'LPUART0_TXD:SYS_GPF_MFP0_PF0MFP_LPUART0_TXD@GPF_MFP0', 'LPADC0_ST:SYS_GPF_MFP0_PF0MFP_LPADC0_ST@GPF_MFP0', 'LPIO2:SYS_GPF_MFP0_PF0MFP_LPIO2@GPF_MFP0'] }, + { f: ['PF.1', 'GPIO:SYS_GPF_MFP0_PF1MFP_GPIO@GPF_MFP0', 'UART1_RXD:SYS_GPF_MFP0_PF1MFP_UART1_RXD@GPF_MFP0', 'I2C1_SDA:SYS_GPF_MFP0_PF1MFP_I2C1_SDA@GPF_MFP0', 'UART0_RXD:SYS_GPF_MFP0_PF1MFP_UART0_RXD@GPF_MFP0', 'SC1_CLK:SYS_GPF_MFP0_PF1MFP_SC1_CLK@GPF_MFP0', 'I2S0_LRCK:SYS_GPF_MFP0_PF1MFP_I2S0_LRCK@GPF_MFP0', 'USCI0_DAT1:SYS_GPF_MFP0_PF1MFP_USCI0_DAT1@GPF_MFP0', 'UART2_RXD:SYS_GPF_MFP0_PF1MFP_UART2_RXD@GPF_MFP0', 'I2C0_SDA:SYS_GPF_MFP0_PF1MFP_I2C0_SDA@GPF_MFP0', 'EPWM1_CH5:SYS_GPF_MFP0_PF1MFP_EPWM1_CH5@GPF_MFP0', 'BPWM1_CH1:SYS_GPF_MFP0_PF1MFP_BPWM1_CH1@GPF_MFP0', 'ACMP1_O:SYS_GPF_MFP0_PF1MFP_ACMP1_O@GPF_MFP0', 'ICE_CLK:SYS_GPF_MFP0_PF1MFP_ICE_CLK@GPF_MFP0', 'I3C0_SDA:SYS_GPF_MFP0_PF1MFP_I3C0_SDA@GPF_MFP0', 'UTCPD0_FRSTX1:SYS_GPF_MFP0_PF1MFP_UTCPD0_FRSTX1@GPF_MFP0', 'UTCPD0_DISCHG:SYS_GPF_MFP0_PF1MFP_UTCPD0_DISCHG@GPF_MFP0', 'LPUART0_RXD:SYS_GPF_MFP0_PF1MFP_LPUART0_RXD@GPF_MFP0', 'LPIO3:SYS_GPF_MFP0_PF1MFP_LPIO3@GPF_MFP0'] }, + { f: ['PF.2', 'GPIO:SYS_GPF_MFP0_PF2MFP_GPIO@GPF_MFP0', 'EBI_nCS1:SYS_GPF_MFP0_PF2MFP_EBI_nCS1@GPF_MFP0', 'UART0_RXD:SYS_GPF_MFP0_PF2MFP_UART0_RXD@GPF_MFP0', 'I2C0_SDA:SYS_GPF_MFP0_PF2MFP_I2C0_SDA@GPF_MFP0', 'QSPI0_CLK:SYS_GPF_MFP0_PF2MFP_QSPI0_CLK@GPF_MFP0', 'UART9_RXD:SYS_GPF_MFP0_PF2MFP_UART9_RXD@GPF_MFP0', 'I2C2_SMBSUS:SYS_GPF_MFP0_PF2MFP_I2C2_SMBSUS@GPF_MFP0', 'EPWM1_CH1:SYS_GPF_MFP0_PF2MFP_EPWM1_CH1@GPF_MFP0', 'XT1_OUT:SYS_GPF_MFP0_PF2MFP_XT1_OUT@GPF_MFP0', 'BPWM1_CH1:SYS_GPF_MFP0_PF2MFP_BPWM1_CH1@GPF_MFP0', 'ACMP3_O:SYS_GPF_MFP0_PF2MFP_ACMP3_O@GPF_MFP0', 'SC1_RST:SYS_GPF_MFP0_PF2MFP_SC1_RST@GPF_MFP0', 'TM1_EXT:SYS_GPF_MFP0_PF2MFP_TM1_EXT@GPF_MFP0', 'LPUART0_RXD:SYS_GPF_MFP0_PF2MFP_LPUART0_RXD@GPF_MFP0', 'LPI2C0_SDA:SYS_GPF_MFP0_PF2MFP_LPI2C0_SDA@GPF_MFP0'] }, + { f: ['PF.3', 'GPIO:SYS_GPF_MFP0_PF3MFP_GPIO@GPF_MFP0', 'EBI_nCS0:SYS_GPF_MFP0_PF3MFP_EBI_nCS0@GPF_MFP0', 'UART0_TXD:SYS_GPF_MFP0_PF3MFP_UART0_TXD@GPF_MFP0', 'I2C0_SCL:SYS_GPF_MFP0_PF3MFP_I2C0_SCL@GPF_MFP0', 'UART9_TXD:SYS_GPF_MFP0_PF3MFP_UART9_TXD@GPF_MFP0', 'I2C2_SMBAL:SYS_GPF_MFP0_PF3MFP_I2C2_SMBAL@GPF_MFP0', 'EPWM1_CH0:SYS_GPF_MFP0_PF3MFP_EPWM1_CH0@GPF_MFP0', 'XT1_IN:SYS_GPF_MFP0_PF3MFP_XT1_IN@GPF_MFP0', 'BPWM1_CH0:SYS_GPF_MFP0_PF3MFP_BPWM1_CH0@GPF_MFP0', 'ACMP2_O:SYS_GPF_MFP0_PF3MFP_ACMP2_O@GPF_MFP0', 'SC1_PWR:SYS_GPF_MFP0_PF3MFP_SC1_PWR@GPF_MFP0', 'TM0_EXT:SYS_GPF_MFP0_PF3MFP_TM0_EXT@GPF_MFP0', 'LPUART0_TXD:SYS_GPF_MFP0_PF3MFP_LPUART0_TXD@GPF_MFP0', 'LPI2C0_SCL:SYS_GPF_MFP0_PF3MFP_LPI2C0_SCL@GPF_MFP0'] }, + { f: ['PF.4', 'GPIO:SYS_GPF_MFP1_PF4MFP_GPIO@GPF_MFP1', 'UART2_TXD:SYS_GPF_MFP1_PF4MFP_UART2_TXD@GPF_MFP1', 'EBI_AD0:SYS_GPF_MFP1_PF4MFP_EBI_AD0@GPF_MFP1', 'UART2_nRTS:SYS_GPF_MFP1_PF4MFP_UART2_nRTS@GPF_MFP1', 'UART0_nRTS:SYS_GPF_MFP1_PF4MFP_UART0_nRTS@GPF_MFP1', 'UART3_RXD:SYS_GPF_MFP1_PF4MFP_UART3_RXD@GPF_MFP1', 'EPWM0_CH1:SYS_GPF_MFP1_PF4MFP_EPWM0_CH1@GPF_MFP1', 'BPWM0_CH5:SYS_GPF_MFP1_PF4MFP_BPWM0_CH5@GPF_MFP1', 'X32_OUT:SYS_GPF_MFP1_PF4MFP_X32_OUT@GPF_MFP1', 'EQEI2_B:SYS_GPF_MFP1_PF4MFP_EQEI2_B@GPF_MFP1', 'PSIO0_CH1:SYS_GPF_MFP1_PF4MFP_PSIO0_CH1@GPF_MFP1', 'KPI_COL1:SYS_GPF_MFP1_PF4MFP_KPI_COL1@GPF_MFP1', 'SWODEC_SWO:SYS_GPF_MFP1_PF4MFP_SWODEC_SWO@GPF_MFP1', 'UTCPD0_VBSRCEN:SYS_GPF_MFP1_PF4MFP_UTCPD0_VBSRCEN@GPF_MFP1'] }, + { f: ['PF.5', 'GPIO:SYS_GPF_MFP1_PF5MFP_GPIO@GPF_MFP1', 'UART2_RXD:SYS_GPF_MFP1_PF5MFP_UART2_RXD@GPF_MFP1', 'EBI_AD1:SYS_GPF_MFP1_PF5MFP_EBI_AD1@GPF_MFP1', 'UART2_nCTS:SYS_GPF_MFP1_PF5MFP_UART2_nCTS@GPF_MFP1', 'UART0_nCTS:SYS_GPF_MFP1_PF5MFP_UART0_nCTS@GPF_MFP1', 'UART3_TXD:SYS_GPF_MFP1_PF5MFP_UART3_TXD@GPF_MFP1', 'EPWM0_CH0:SYS_GPF_MFP1_PF5MFP_EPWM0_CH0@GPF_MFP1', 'BPWM0_CH4:SYS_GPF_MFP1_PF5MFP_BPWM0_CH4@GPF_MFP1', 'EPWM0_SYNC_OUT:SYS_GPF_MFP1_PF5MFP_EPWM0_SYNC_OUT@GPF_MFP1', 'X32_IN:SYS_GPF_MFP1_PF5MFP_X32_IN@GPF_MFP1', 'EADC0_ST:SYS_GPF_MFP1_PF5MFP_EADC0_ST@GPF_MFP1', 'EQEI2_A:SYS_GPF_MFP1_PF5MFP_EQEI2_A@GPF_MFP1', 'PSIO0_CH0:SYS_GPF_MFP1_PF5MFP_PSIO0_CH0@GPF_MFP1', 'KPI_COL0:SYS_GPF_MFP1_PF5MFP_KPI_COL0@GPF_MFP1', 'UTCPD0_VBSNKEN:SYS_GPF_MFP1_PF5MFP_UTCPD0_VBSNKEN@GPF_MFP1', 'LPADC0_ST:SYS_GPF_MFP1_PF5MFP_LPADC0_ST@GPF_MFP1'] }, + { f: ['PF.6', 'GPIO:SYS_GPF_MFP1_PF6MFP_GPIO@GPF_MFP1', 'EBI_ADR19:SYS_GPF_MFP1_PF6MFP_EBI_ADR19@GPF_MFP1', 'SC0_CLK:SYS_GPF_MFP1_PF6MFP_SC0_CLK@GPF_MFP1', 'I2S0_LRCK:SYS_GPF_MFP1_PF6MFP_I2S0_LRCK@GPF_MFP1', 'SPI0_MOSI:SYS_GPF_MFP1_PF6MFP_SPI0_MOSI@GPF_MFP1', 'UART4_RXD:SYS_GPF_MFP1_PF6MFP_UART4_RXD@GPF_MFP1', 'EBI_nCS0:SYS_GPF_MFP1_PF6MFP_EBI_nCS0@GPF_MFP1', 'SPI3_I2SMCLK:SYS_GPF_MFP1_PF6MFP_SPI3_I2SMCLK@GPF_MFP1', 'TAMPER0:SYS_GPF_MFP1_PF6MFP_TAMPER0@GPF_MFP1', 'EQEI2_INDEX:SYS_GPF_MFP1_PF6MFP_EQEI2_INDEX@GPF_MFP1', 'TRACE_SWO:SYS_GPF_MFP1_PF6MFP_TRACE_SWO@GPF_MFP1'] }, + { f: ['PF.7', 'GPIO:SYS_GPF_MFP1_PF7MFP_GPIO@GPF_MFP1', 'EBI_ADR18:SYS_GPF_MFP1_PF7MFP_EBI_ADR18@GPF_MFP1', 'SC0_DAT:SYS_GPF_MFP1_PF7MFP_SC0_DAT@GPF_MFP1', 'I2S0_DO:SYS_GPF_MFP1_PF7MFP_I2S0_DO@GPF_MFP1', 'SPI0_MISO:SYS_GPF_MFP1_PF7MFP_SPI0_MISO@GPF_MFP1', 'UART4_TXD:SYS_GPF_MFP1_PF7MFP_UART4_TXD@GPF_MFP1', 'CCAP_DATA0:SYS_GPF_MFP1_PF7MFP_CCAP_DATA0@GPF_MFP1', 'TAMPER1:SYS_GPF_MFP1_PF7MFP_TAMPER1@GPF_MFP1'] }, + { f: ['PF.8', 'GPIO:SYS_GPF_MFP2_PF8MFP_GPIO@GPF_MFP2', 'EBI_ADR17:SYS_GPF_MFP2_PF8MFP_EBI_ADR17@GPF_MFP2', 'SC0_RST:SYS_GPF_MFP2_PF8MFP_SC0_RST@GPF_MFP2', 'I2S0_DI:SYS_GPF_MFP2_PF8MFP_I2S0_DI@GPF_MFP2', 'SPI0_CLK:SYS_GPF_MFP2_PF8MFP_SPI0_CLK@GPF_MFP2', 'UART5_nCTS:SYS_GPF_MFP2_PF8MFP_UART5_nCTS@GPF_MFP2', 'CCAP_DATA1:SYS_GPF_MFP2_PF8MFP_CCAP_DATA1@GPF_MFP2', 'CANFD1_RXD:SYS_GPF_MFP2_PF8MFP_CANFD1_RXD@GPF_MFP2', 'TAMPER2:SYS_GPF_MFP2_PF8MFP_TAMPER2@GPF_MFP2', 'UART9_RXD:SYS_GPF_MFP2_PF8MFP_UART9_RXD@GPF_MFP2'] }, + { f: ['PF.9', 'GPIO:SYS_GPF_MFP2_PF9MFP_GPIO@GPF_MFP2', 'EBI_ADR16:SYS_GPF_MFP2_PF9MFP_EBI_ADR16@GPF_MFP2', 'SC0_PWR:SYS_GPF_MFP2_PF9MFP_SC0_PWR@GPF_MFP2', 'I2S0_MCLK:SYS_GPF_MFP2_PF9MFP_I2S0_MCLK@GPF_MFP2', 'SPI0_SS:SYS_GPF_MFP2_PF9MFP_SPI0_SS@GPF_MFP2', 'UART5_nRTS:SYS_GPF_MFP2_PF9MFP_UART5_nRTS@GPF_MFP2', 'CCAP_DATA2:SYS_GPF_MFP2_PF9MFP_CCAP_DATA2@GPF_MFP2', 'CANFD1_TXD:SYS_GPF_MFP2_PF9MFP_CANFD1_TXD@GPF_MFP2', 'TAMPER3:SYS_GPF_MFP2_PF9MFP_TAMPER3@GPF_MFP2', 'UART9_TXD:SYS_GPF_MFP2_PF9MFP_UART9_TXD@GPF_MFP2'] }, + { f: ['PF.10', 'GPIO:SYS_GPF_MFP2_PF10MFP_GPIO@GPF_MFP2', 'EBI_ADR15:SYS_GPF_MFP2_PF10MFP_EBI_ADR15@GPF_MFP2', 'SC0_nCD:SYS_GPF_MFP2_PF10MFP_SC0_nCD@GPF_MFP2', 'I2S0_BCLK:SYS_GPF_MFP2_PF10MFP_I2S0_BCLK@GPF_MFP2', 'SPI0_I2SMCLK:SYS_GPF_MFP2_PF10MFP_SPI0_I2SMCLK@GPF_MFP2', 'UART5_RXD:SYS_GPF_MFP2_PF10MFP_UART5_RXD@GPF_MFP2', 'CCAP_DATA3:SYS_GPF_MFP2_PF10MFP_CCAP_DATA3@GPF_MFP2', 'TAMPER4:SYS_GPF_MFP2_PF10MFP_TAMPER4@GPF_MFP2', 'UART9_nRTS:SYS_GPF_MFP2_PF10MFP_UART9_nRTS@GPF_MFP2'] }, + { f: ['PF.11', 'GPIO:SYS_GPF_MFP2_PF11MFP_GPIO@GPF_MFP2', 'EBI_ADR14:SYS_GPF_MFP2_PF11MFP_EBI_ADR14@GPF_MFP2', 'SPI2_MOSI:SYS_GPF_MFP2_PF11MFP_SPI2_MOSI@GPF_MFP2', 'UART5_TXD:SYS_GPF_MFP2_PF11MFP_UART5_TXD@GPF_MFP2', 'CCAP_DATA4:SYS_GPF_MFP2_PF11MFP_CCAP_DATA4@GPF_MFP2', 'TAMPER5:SYS_GPF_MFP2_PF11MFP_TAMPER5@GPF_MFP2', 'UART9_nCTS:SYS_GPF_MFP2_PF11MFP_UART9_nCTS@GPF_MFP2', 'TM3:SYS_GPF_MFP2_PF11MFP_TM3@GPF_MFP2'] }, + { f: ['PG.0', 'GPIO:SYS_GPG_MFP0_PG0MFP_GPIO@GPG_MFP0', 'EBI_ADR8:SYS_GPG_MFP0_PG0MFP_EBI_ADR8@GPG_MFP0', 'I2C0_SCL:SYS_GPG_MFP0_PG0MFP_I2C0_SCL@GPG_MFP0', 'I2C1_SMBAL:SYS_GPG_MFP0_PG0MFP_I2C1_SMBAL@GPG_MFP0', 'UART2_RXD:SYS_GPG_MFP0_PG0MFP_UART2_RXD@GPG_MFP0', 'CANFD1_TXD:SYS_GPG_MFP0_PG0MFP_CANFD1_TXD@GPG_MFP0', 'UART1_TXD:SYS_GPG_MFP0_PG0MFP_UART1_TXD@GPG_MFP0', 'I2C3_SCL:SYS_GPG_MFP0_PG0MFP_I2C3_SCL@GPG_MFP0', 'I2S1_DO:SYS_GPG_MFP0_PG0MFP_I2S1_DO@GPG_MFP0', 'EPWM0_CH1:SYS_GPG_MFP0_PG0MFP_EPWM0_CH1@GPG_MFP0', 'CCAP_PIXCLK:SYS_GPG_MFP0_PG0MFP_CCAP_PIXCLK@GPG_MFP0'] }, + { f: ['PG.1', 'GPIO:SYS_GPG_MFP0_PG1MFP_GPIO@GPG_MFP0', 'EBI_ADR9:SYS_GPG_MFP0_PG1MFP_EBI_ADR9@GPG_MFP0', 'SPI2_I2SMCLK:SYS_GPG_MFP0_PG1MFP_SPI2_I2SMCLK@GPG_MFP0', 'I2C0_SDA:SYS_GPG_MFP0_PG1MFP_I2C0_SDA@GPG_MFP0', 'I2C1_SMBSUS:SYS_GPG_MFP0_PG1MFP_I2C1_SMBSUS@GPG_MFP0', 'UART2_TXD:SYS_GPG_MFP0_PG1MFP_UART2_TXD@GPG_MFP0', 'CANFD1_RXD:SYS_GPG_MFP0_PG1MFP_CANFD1_RXD@GPG_MFP0', 'UART1_RXD:SYS_GPG_MFP0_PG1MFP_UART1_RXD@GPG_MFP0', 'I2C3_SDA:SYS_GPG_MFP0_PG1MFP_I2C3_SDA@GPG_MFP0', 'I2S1_LRCK:SYS_GPG_MFP0_PG1MFP_I2S1_LRCK@GPG_MFP0', 'EPWM0_CH0:SYS_GPG_MFP0_PG1MFP_EPWM0_CH0@GPG_MFP0', 'CCAP_SCLK:SYS_GPG_MFP0_PG1MFP_CCAP_SCLK@GPG_MFP0'] }, + { f: ['PG.2', 'GPIO:SYS_GPG_MFP0_PG2MFP_GPIO@GPG_MFP0', 'EBI_ADR11:SYS_GPG_MFP0_PG2MFP_EBI_ADR11@GPG_MFP0', 'SPI2_SS:SYS_GPG_MFP0_PG2MFP_SPI2_SS@GPG_MFP0', 'I2C0_SMBAL:SYS_GPG_MFP0_PG2MFP_I2C0_SMBAL@GPG_MFP0', 'I2C1_SCL:SYS_GPG_MFP0_PG2MFP_I2C1_SCL@GPG_MFP0', 'CCAP_DATA7:SYS_GPG_MFP0_PG2MFP_CCAP_DATA7@GPG_MFP0', 'I2C3_SMBAL:SYS_GPG_MFP0_PG2MFP_I2C3_SMBAL@GPG_MFP0', 'SC1_nCD:SYS_GPG_MFP0_PG2MFP_SC1_nCD@GPG_MFP0', 'SPI0_I2SMCLK:SYS_GPG_MFP0_PG2MFP_SPI0_I2SMCLK@GPG_MFP0', 'TM0:SYS_GPG_MFP0_PG2MFP_TM0@GPG_MFP0', 'LPTM0:SYS_GPG_MFP0_PG2MFP_LPTM0@GPG_MFP0'] }, + { f: ['PG.3', 'GPIO:SYS_GPG_MFP0_PG3MFP_GPIO@GPG_MFP0', 'EBI_ADR12:SYS_GPG_MFP0_PG3MFP_EBI_ADR12@GPG_MFP0', 'SPI2_CLK:SYS_GPG_MFP0_PG3MFP_SPI2_CLK@GPG_MFP0', 'I2C0_SMBSUS:SYS_GPG_MFP0_PG3MFP_I2C0_SMBSUS@GPG_MFP0', 'I2C1_SDA:SYS_GPG_MFP0_PG3MFP_I2C1_SDA@GPG_MFP0', 'CCAP_DATA6:SYS_GPG_MFP0_PG3MFP_CCAP_DATA6@GPG_MFP0', 'I2C3_SMBSUS:SYS_GPG_MFP0_PG3MFP_I2C3_SMBSUS@GPG_MFP0', 'UART4_RXD:SYS_GPG_MFP0_PG3MFP_UART4_RXD@GPG_MFP0', 'UART0_RXD:SYS_GPG_MFP0_PG3MFP_UART0_RXD@GPG_MFP0', 'TM1:SYS_GPG_MFP0_PG3MFP_TM1@GPG_MFP0', 'LPTM1:SYS_GPG_MFP0_PG3MFP_LPTM1@GPG_MFP0'] }, + { f: ['PG.4', 'GPIO:SYS_GPG_MFP1_PG4MFP_GPIO@GPG_MFP1', 'EBI_ADR13:SYS_GPG_MFP1_PG4MFP_EBI_ADR13@GPG_MFP1', 'SPI2_MISO:SYS_GPG_MFP1_PG4MFP_SPI2_MISO@GPG_MFP1', 'CCAP_DATA5:SYS_GPG_MFP1_PG4MFP_CCAP_DATA5@GPG_MFP1', 'TM2:SYS_GPG_MFP1_PG4MFP_TM2@GPG_MFP1'] }, + { f: ['PG.5', 'GPIO:SYS_GPG_MFP1_PG5MFP_GPIO@GPG_MFP1', 'EBI_nCS1:SYS_GPG_MFP1_PG5MFP_EBI_nCS1@GPG_MFP1', 'SPI3_SS:SYS_GPG_MFP1_PG5MFP_SPI3_SS@GPG_MFP1', 'SC1_PWR:SYS_GPG_MFP1_PG5MFP_SC1_PWR@GPG_MFP1', 'EBI_nWRL:SYS_GPG_MFP1_PG5MFP_EBI_nWRL@GPG_MFP1', 'I2C3_SMBAL:SYS_GPG_MFP1_PG5MFP_I2C3_SMBAL@GPG_MFP1', 'I2S1_MCLK:SYS_GPG_MFP1_PG5MFP_I2S1_MCLK@GPG_MFP1', 'EPWM0_CH3:SYS_GPG_MFP1_PG5MFP_EPWM0_CH3@GPG_MFP1'] }, + { f: ['PG.6', 'GPIO:SYS_GPG_MFP1_PG6MFP_GPIO@GPG_MFP1', 'EBI_nCS2:SYS_GPG_MFP1_PG6MFP_EBI_nCS2@GPG_MFP1', 'SPI3_CLK:SYS_GPG_MFP1_PG6MFP_SPI3_CLK@GPG_MFP1', 'SC1_RST:SYS_GPG_MFP1_PG6MFP_SC1_RST@GPG_MFP1', 'EBI_nWRH:SYS_GPG_MFP1_PG6MFP_EBI_nWRH@GPG_MFP1', 'I2C3_SMBSUS:SYS_GPG_MFP1_PG6MFP_I2C3_SMBSUS@GPG_MFP1', 'I2S1_DI:SYS_GPG_MFP1_PG6MFP_I2S1_DI@GPG_MFP1', 'EPWM0_CH2:SYS_GPG_MFP1_PG6MFP_EPWM0_CH2@GPG_MFP1'] }, + { f: ['PG.7', 'GPIO:SYS_GPG_MFP1_PG7MFP_GPIO@GPG_MFP1', 'EBI_nWRL:SYS_GPG_MFP1_PG7MFP_EBI_nWRL@GPG_MFP1', 'SPI3_MISO:SYS_GPG_MFP1_PG7MFP_SPI3_MISO@GPG_MFP1', 'SC1_DAT:SYS_GPG_MFP1_PG7MFP_SC1_DAT@GPG_MFP1', 'I2C3_SCL:SYS_GPG_MFP1_PG7MFP_I2C3_SCL@GPG_MFP1', 'I2S1_DO:SYS_GPG_MFP1_PG7MFP_I2S1_DO@GPG_MFP1', 'EPWM0_CH1:SYS_GPG_MFP1_PG7MFP_EPWM0_CH1@GPG_MFP1'] }, + { f: ['PG.8', 'GPIO:SYS_GPG_MFP2_PG8MFP_GPIO@GPG_MFP2', 'EBI_nWRH:SYS_GPG_MFP2_PG8MFP_EBI_nWRH@GPG_MFP2', 'SPI3_MOSI:SYS_GPG_MFP2_PG8MFP_SPI3_MOSI@GPG_MFP2', 'SC1_CLK:SYS_GPG_MFP2_PG8MFP_SC1_CLK@GPG_MFP2', 'I2C3_SDA:SYS_GPG_MFP2_PG8MFP_I2C3_SDA@GPG_MFP2', 'I2S1_LRCK:SYS_GPG_MFP2_PG8MFP_I2S1_LRCK@GPG_MFP2', 'EPWM0_CH0:SYS_GPG_MFP2_PG8MFP_EPWM0_CH0@GPG_MFP2'] }, + { f: ['PG.9', 'GPIO:SYS_GPG_MFP2_PG9MFP_GPIO@GPG_MFP2', 'EBI_AD0:SYS_GPG_MFP2_PG9MFP_EBI_AD0@GPG_MFP2', 'SD1_DAT3:SYS_GPG_MFP2_PG9MFP_SD1_DAT3@GPG_MFP2', 'QSPI1_MISO1:SYS_GPG_MFP2_PG9MFP_QSPI1_MISO1@GPG_MFP2', 'CCAP_PIXCLK:SYS_GPG_MFP2_PG9MFP_CCAP_PIXCLK@GPG_MFP2', 'ECAP2_IC0:SYS_GPG_MFP2_PG9MFP_ECAP2_IC0@GPG_MFP2', 'BPWM0_CH5:SYS_GPG_MFP2_PG9MFP_BPWM0_CH5@GPG_MFP2'] }, + { f: ['PG.10', 'GPIO:SYS_GPG_MFP2_PG10MFP_GPIO@GPG_MFP2', 'EBI_AD1:SYS_GPG_MFP2_PG10MFP_EBI_AD1@GPG_MFP2', 'SD1_DAT2:SYS_GPG_MFP2_PG10MFP_SD1_DAT2@GPG_MFP2', 'QSPI1_MOSI1:SYS_GPG_MFP2_PG10MFP_QSPI1_MOSI1@GPG_MFP2', 'CCAP_SCLK:SYS_GPG_MFP2_PG10MFP_CCAP_SCLK@GPG_MFP2', 'ECAP2_IC1:SYS_GPG_MFP2_PG10MFP_ECAP2_IC1@GPG_MFP2', 'BPWM0_CH4:SYS_GPG_MFP2_PG10MFP_BPWM0_CH4@GPG_MFP2'] }, + { f: ['PG.11', 'GPIO:SYS_GPG_MFP2_PG11MFP_GPIO@GPG_MFP2', 'EBI_AD2:SYS_GPG_MFP2_PG11MFP_EBI_AD2@GPG_MFP2', 'SD1_DAT1:SYS_GPG_MFP2_PG11MFP_SD1_DAT1@GPG_MFP2', 'QSPI1_SS:SYS_GPG_MFP2_PG11MFP_QSPI1_SS@GPG_MFP2', 'UART7_TXD:SYS_GPG_MFP2_PG11MFP_UART7_TXD@GPG_MFP2', 'CCAP_SFIELD:SYS_GPG_MFP2_PG11MFP_CCAP_SFIELD@GPG_MFP2', 'ECAP2_IC2:SYS_GPG_MFP2_PG11MFP_ECAP2_IC2@GPG_MFP2', 'BPWM0_CH3:SYS_GPG_MFP2_PG11MFP_BPWM0_CH3@GPG_MFP2'] }, + { f: ['PG.12', 'GPIO:SYS_GPG_MFP3_PG12MFP_GPIO@GPG_MFP3', 'EBI_AD3:SYS_GPG_MFP3_PG12MFP_EBI_AD3@GPG_MFP3', 'SD1_DAT0:SYS_GPG_MFP3_PG12MFP_SD1_DAT0@GPG_MFP3', 'QSPI1_CLK:SYS_GPG_MFP3_PG12MFP_QSPI1_CLK@GPG_MFP3', 'UART7_RXD:SYS_GPG_MFP3_PG12MFP_UART7_RXD@GPG_MFP3', 'CCAP_VSYNC:SYS_GPG_MFP3_PG12MFP_CCAP_VSYNC@GPG_MFP3', 'BPWM0_CH2:SYS_GPG_MFP3_PG12MFP_BPWM0_CH2@GPG_MFP3'] }, + { f: ['PG.13', 'GPIO:SYS_GPG_MFP3_PG13MFP_GPIO@GPG_MFP3', 'EBI_AD4:SYS_GPG_MFP3_PG13MFP_EBI_AD4@GPG_MFP3', 'UART1_TXD:SYS_GPG_MFP3_PG13MFP_UART1_TXD@GPG_MFP3', 'I2C0_SCL:SYS_GPG_MFP3_PG13MFP_I2C0_SCL@GPG_MFP3', 'SPI1_MISO:SYS_GPG_MFP3_PG13MFP_SPI1_MISO@GPG_MFP3', 'QSPI1_MISO0:SYS_GPG_MFP3_PG13MFP_QSPI1_MISO0@GPG_MFP3', 'CCAP_HSYNC:SYS_GPG_MFP3_PG13MFP_CCAP_HSYNC@GPG_MFP3', 'SC1_PWR:SYS_GPG_MFP3_PG13MFP_SC1_PWR@GPG_MFP3', 'SPIM0_D6:SYS_GPG_MFP3_PG13MFP_SPIM0_D6@GPG_MFP3', 'PSIO0_CH4:SYS_GPG_MFP3_PG13MFP_PSIO0_CH4@GPG_MFP3', 'LPI2C0_SCL:SYS_GPG_MFP3_PG13MFP_LPI2C0_SCL@GPG_MFP3'] }, + { f: ['PG.14', 'GPIO:SYS_GPG_MFP3_PG14MFP_GPIO@GPG_MFP3', 'EBI_AD5:SYS_GPG_MFP3_PG14MFP_EBI_AD5@GPG_MFP3', 'UART1_RXD:SYS_GPG_MFP3_PG14MFP_UART1_RXD@GPG_MFP3', 'I2C0_SDA:SYS_GPG_MFP3_PG14MFP_I2C0_SDA@GPG_MFP3', 'SPI1_MOSI:SYS_GPG_MFP3_PG14MFP_SPI1_MOSI@GPG_MFP3', 'QSPI1_MOSI0:SYS_GPG_MFP3_PG14MFP_QSPI1_MOSI0@GPG_MFP3', 'SC1_RST:SYS_GPG_MFP3_PG14MFP_SC1_RST@GPG_MFP3', 'SPIM0_D7:SYS_GPG_MFP3_PG14MFP_SPIM0_D7@GPG_MFP3', 'ACMP0_O:SYS_GPG_MFP3_PG14MFP_ACMP0_O@GPG_MFP3', 'EADC0_ST:SYS_GPG_MFP3_PG14MFP_EADC0_ST@GPG_MFP3', 'PSIO0_CH5:SYS_GPG_MFP3_PG14MFP_PSIO0_CH5@GPG_MFP3', 'LPI2C0_SDA:SYS_GPG_MFP3_PG14MFP_LPI2C0_SDA@GPG_MFP3'] }, + { f: ['PG.15', 'GPIO:SYS_GPG_MFP3_PG15MFP_GPIO@GPG_MFP3', 'I2C1_SCL:SYS_GPG_MFP3_PG15MFP_I2C1_SCL@GPG_MFP3', 'SPI1_CLK:SYS_GPG_MFP3_PG15MFP_SPI1_CLK@GPG_MFP3', 'SC1_DAT:SYS_GPG_MFP3_PG15MFP_SC1_DAT@GPG_MFP3', 'SPIM0_RWDS:SYS_GPG_MFP3_PG15MFP_SPIM0_RWDS@GPG_MFP3', 'ACMP1_O:SYS_GPG_MFP3_PG15MFP_ACMP1_O@GPG_MFP3', 'PSIO0_CH6:SYS_GPG_MFP3_PG15MFP_PSIO0_CH6@GPG_MFP3'] }, + { f: ['PH.0', 'GPIO:SYS_GPH_MFP0_PH0MFP_GPIO@GPH_MFP0', 'EBI_ADR7:SYS_GPH_MFP0_PH0MFP_EBI_ADR7@GPH_MFP0', 'SPI3_MISO:SYS_GPH_MFP0_PH0MFP_SPI3_MISO@GPH_MFP0', 'UART5_TXD:SYS_GPH_MFP0_PH0MFP_UART5_TXD@GPH_MFP0', 'SC1_DAT:SYS_GPH_MFP0_PH0MFP_SC1_DAT@GPH_MFP0', 'I2C3_SCL:SYS_GPH_MFP0_PH0MFP_I2C3_SCL@GPH_MFP0', 'TM0_EXT:SYS_GPH_MFP0_PH0MFP_TM0_EXT@GPH_MFP0'] }, + { f: ['PH.1', 'GPIO:SYS_GPH_MFP0_PH1MFP_GPIO@GPH_MFP0', 'EBI_ADR6:SYS_GPH_MFP0_PH1MFP_EBI_ADR6@GPH_MFP0', 'SPI3_MOSI:SYS_GPH_MFP0_PH1MFP_SPI3_MOSI@GPH_MFP0', 'UART5_RXD:SYS_GPH_MFP0_PH1MFP_UART5_RXD@GPH_MFP0', 'SC1_CLK:SYS_GPH_MFP0_PH1MFP_SC1_CLK@GPH_MFP0', 'I2C3_SDA:SYS_GPH_MFP0_PH1MFP_I2C3_SDA@GPH_MFP0', 'TM1_EXT:SYS_GPH_MFP0_PH1MFP_TM1_EXT@GPH_MFP0'] }, + { f: ['PH.2', 'GPIO:SYS_GPH_MFP0_PH2MFP_GPIO@GPH_MFP0', 'EBI_ADR5:SYS_GPH_MFP0_PH2MFP_EBI_ADR5@GPH_MFP0', 'UART5_nRTS:SYS_GPH_MFP0_PH2MFP_UART5_nRTS@GPH_MFP0', 'UART4_TXD:SYS_GPH_MFP0_PH2MFP_UART4_TXD@GPH_MFP0', 'I2C0_SCL:SYS_GPH_MFP0_PH2MFP_I2C0_SCL@GPH_MFP0', 'UART9_RXD:SYS_GPH_MFP0_PH2MFP_UART9_RXD@GPH_MFP0', 'TM2_EXT:SYS_GPH_MFP0_PH2MFP_TM2_EXT@GPH_MFP0'] }, + { f: ['PH.3', 'GPIO:SYS_GPH_MFP0_PH3MFP_GPIO@GPH_MFP0', 'EBI_ADR4:SYS_GPH_MFP0_PH3MFP_EBI_ADR4@GPH_MFP0', 'SPI1_I2SMCLK:SYS_GPH_MFP0_PH3MFP_SPI1_I2SMCLK@GPH_MFP0', 'UART5_nCTS:SYS_GPH_MFP0_PH3MFP_UART5_nCTS@GPH_MFP0', 'UART4_RXD:SYS_GPH_MFP0_PH3MFP_UART4_RXD@GPH_MFP0', 'I2C0_SDA:SYS_GPH_MFP0_PH3MFP_I2C0_SDA@GPH_MFP0', 'TM3_EXT:SYS_GPH_MFP0_PH3MFP_TM3_EXT@GPH_MFP0'] }, + { f: ['PH.4', 'GPIO:SYS_GPH_MFP1_PH4MFP_GPIO@GPH_MFP1', 'EBI_ADR3:SYS_GPH_MFP1_PH4MFP_EBI_ADR3@GPH_MFP1', 'SPI1_MISO:SYS_GPH_MFP1_PH4MFP_SPI1_MISO@GPH_MFP1', 'UART7_nRTS:SYS_GPH_MFP1_PH4MFP_UART7_nRTS@GPH_MFP1', 'UART6_TXD:SYS_GPH_MFP1_PH4MFP_UART6_TXD@GPH_MFP1', 'SPI3_I2SMCLK:SYS_GPH_MFP1_PH4MFP_SPI3_I2SMCLK@GPH_MFP1', 'EPWM0_CH5:SYS_GPH_MFP1_PH4MFP_EPWM0_CH5@GPH_MFP1'] }, + { f: ['PH.5', 'GPIO:SYS_GPH_MFP1_PH5MFP_GPIO@GPH_MFP1', 'EBI_ADR2:SYS_GPH_MFP1_PH5MFP_EBI_ADR2@GPH_MFP1', 'SPI1_MOSI:SYS_GPH_MFP1_PH5MFP_SPI1_MOSI@GPH_MFP1', 'UART7_nCTS:SYS_GPH_MFP1_PH5MFP_UART7_nCTS@GPH_MFP1', 'UART6_RXD:SYS_GPH_MFP1_PH5MFP_UART6_RXD@GPH_MFP1', 'EPWM0_CH4:SYS_GPH_MFP1_PH5MFP_EPWM0_CH4@GPH_MFP1'] }, + { f: ['PH.6', 'GPIO:SYS_GPH_MFP1_PH6MFP_GPIO@GPH_MFP1', 'EBI_ADR1:SYS_GPH_MFP1_PH6MFP_EBI_ADR1@GPH_MFP1', 'SPI1_CLK:SYS_GPH_MFP1_PH6MFP_SPI1_CLK@GPH_MFP1', 'UART7_TXD:SYS_GPH_MFP1_PH6MFP_UART7_TXD@GPH_MFP1', 'UART9_nCTS:SYS_GPH_MFP1_PH6MFP_UART9_nCTS@GPH_MFP1'] }, + { f: ['PH.7', 'GPIO:SYS_GPH_MFP1_PH7MFP_GPIO@GPH_MFP1', 'EBI_ADR0:SYS_GPH_MFP1_PH7MFP_EBI_ADR0@GPH_MFP1', 'SPI1_SS:SYS_GPH_MFP1_PH7MFP_SPI1_SS@GPH_MFP1', 'UART7_RXD:SYS_GPH_MFP1_PH7MFP_UART7_RXD@GPH_MFP1', 'UART9_nRTS:SYS_GPH_MFP1_PH7MFP_UART9_nRTS@GPH_MFP1', 'I2S1_BCLK:SYS_GPH_MFP1_PH7MFP_I2S1_BCLK@GPH_MFP1'] }, + { f: ['PH.8', 'GPIO:SYS_GPH_MFP2_PH8MFP_GPIO@GPH_MFP2', 'EBI_AD12:SYS_GPH_MFP2_PH8MFP_EBI_AD12@GPH_MFP2', 'QSPI0_CLK:SYS_GPH_MFP2_PH8MFP_QSPI0_CLK@GPH_MFP2', 'SC2_PWR:SYS_GPH_MFP2_PH8MFP_SC2_PWR@GPH_MFP2', 'I2S0_DI:SYS_GPH_MFP2_PH8MFP_I2S0_DI@GPH_MFP2', 'SPI1_CLK:SYS_GPH_MFP2_PH8MFP_SPI1_CLK@GPH_MFP2', 'UART3_nRTS:SYS_GPH_MFP2_PH8MFP_UART3_nRTS@GPH_MFP2', 'I2C1_SMBAL:SYS_GPH_MFP2_PH8MFP_I2C1_SMBAL@GPH_MFP2', 'I2C2_SCL:SYS_GPH_MFP2_PH8MFP_I2C2_SCL@GPH_MFP2', 'UART1_TXD:SYS_GPH_MFP2_PH8MFP_UART1_TXD@GPH_MFP2', 'UART9_nCTS:SYS_GPH_MFP2_PH8MFP_UART9_nCTS@GPH_MFP2', 'I3C0_SCL:SYS_GPH_MFP2_PH8MFP_I3C0_SCL@GPH_MFP2'] }, + { f: ['PH.9', 'GPIO:SYS_GPH_MFP2_PH9MFP_GPIO@GPH_MFP2', 'EBI_AD13:SYS_GPH_MFP2_PH9MFP_EBI_AD13@GPH_MFP2', 'QSPI0_SS:SYS_GPH_MFP2_PH9MFP_QSPI0_SS@GPH_MFP2', 'SC2_RST:SYS_GPH_MFP2_PH9MFP_SC2_RST@GPH_MFP2', 'I2S0_DO:SYS_GPH_MFP2_PH9MFP_I2S0_DO@GPH_MFP2', 'SPI1_SS:SYS_GPH_MFP2_PH9MFP_SPI1_SS@GPH_MFP2', 'UART3_nCTS:SYS_GPH_MFP2_PH9MFP_UART3_nCTS@GPH_MFP2', 'I2C1_SMBSUS:SYS_GPH_MFP2_PH9MFP_I2C1_SMBSUS@GPH_MFP2', 'I2C2_SDA:SYS_GPH_MFP2_PH9MFP_I2C2_SDA@GPH_MFP2', 'UART1_RXD:SYS_GPH_MFP2_PH9MFP_UART1_RXD@GPH_MFP2', 'UART9_nRTS:SYS_GPH_MFP2_PH9MFP_UART9_nRTS@GPH_MFP2', 'I3C0_SDA:SYS_GPH_MFP2_PH9MFP_I3C0_SDA@GPH_MFP2'] }, + { f: ['PH.10', 'GPIO:SYS_GPH_MFP2_PH10MFP_GPIO@GPH_MFP2', 'EBI_AD14:SYS_GPH_MFP2_PH10MFP_EBI_AD14@GPH_MFP2', 'QSPI0_MISO1:SYS_GPH_MFP2_PH10MFP_QSPI0_MISO1@GPH_MFP2', 'SC2_nCD:SYS_GPH_MFP2_PH10MFP_SC2_nCD@GPH_MFP2', 'I2S0_LRCK:SYS_GPH_MFP2_PH10MFP_I2S0_LRCK@GPH_MFP2', 'SPI1_I2SMCLK:SYS_GPH_MFP2_PH10MFP_SPI1_I2SMCLK@GPH_MFP2', 'UART4_TXD:SYS_GPH_MFP2_PH10MFP_UART4_TXD@GPH_MFP2', 'UART0_TXD:SYS_GPH_MFP2_PH10MFP_UART0_TXD@GPH_MFP2', 'UART9_TXD:SYS_GPH_MFP2_PH10MFP_UART9_TXD@GPH_MFP2', 'I3C0_PUPEN:SYS_GPH_MFP2_PH10MFP_I3C0_PUPEN@GPH_MFP2', 'LPUART0_TXD:SYS_GPH_MFP2_PH10MFP_LPUART0_TXD@GPH_MFP2'] }, + { f: ['PH.11', 'GPIO:SYS_GPH_MFP2_PH11MFP_GPIO@GPH_MFP2', 'EBI_AD15:SYS_GPH_MFP2_PH11MFP_EBI_AD15@GPH_MFP2', 'QSPI0_MOSI1:SYS_GPH_MFP2_PH11MFP_QSPI0_MOSI1@GPH_MFP2', 'UART4_RXD:SYS_GPH_MFP2_PH11MFP_UART4_RXD@GPH_MFP2', 'UART0_RXD:SYS_GPH_MFP2_PH11MFP_UART0_RXD@GPH_MFP2', 'EPWM0_CH5:SYS_GPH_MFP2_PH11MFP_EPWM0_CH5@GPH_MFP2', 'UART9_RXD:SYS_GPH_MFP2_PH11MFP_UART9_RXD@GPH_MFP2', 'LPUART0_RXD:SYS_GPH_MFP2_PH11MFP_LPUART0_RXD@GPH_MFP2'] }, + { f: ['PH.12', 'GPIO:SYS_GPH_MFP3_PH12MFP_GPIO@GPH_MFP3', 'EBI_AD0:SYS_GPH_MFP3_PH12MFP_EBI_AD0@GPH_MFP3', 'UART9_TXD:SYS_GPH_MFP3_PH12MFP_UART9_TXD@GPH_MFP3', 'QSPI1_MISO1:SYS_GPH_MFP3_PH12MFP_QSPI1_MISO1@GPH_MFP3', 'CCAP_PIXCLK:SYS_GPH_MFP3_PH12MFP_CCAP_PIXCLK@GPH_MFP3', 'SPIM0_CLKN:SYS_GPH_MFP3_PH12MFP_SPIM0_CLKN@GPH_MFP3'] }, + { f: ['PH.13', 'GPIO:SYS_GPH_MFP3_PH13MFP_GPIO@GPH_MFP3', 'EBI_AD1:SYS_GPH_MFP3_PH13MFP_EBI_AD1@GPH_MFP3', 'UART9_RXD:SYS_GPH_MFP3_PH13MFP_UART9_RXD@GPH_MFP3', 'QSPI1_MOSI1:SYS_GPH_MFP3_PH13MFP_QSPI1_MOSI1@GPH_MFP3', 'CCAP_SCLK:SYS_GPH_MFP3_PH13MFP_CCAP_SCLK@GPH_MFP3', 'SPIM0_CLK:SYS_GPH_MFP3_PH13MFP_SPIM0_CLK@GPH_MFP3'] }, + { f: ['PH.14', 'GPIO:SYS_GPH_MFP3_PH14MFP_GPIO@GPH_MFP3', 'EBI_AD2:SYS_GPH_MFP3_PH14MFP_EBI_AD2@GPH_MFP3', 'QSPI1_SS:SYS_GPH_MFP3_PH14MFP_QSPI1_SS@GPH_MFP3', 'CCAP_SFIELD:SYS_GPH_MFP3_PH14MFP_CCAP_SFIELD@GPH_MFP3', 'SPIM0_D4:SYS_GPH_MFP3_PH14MFP_SPIM0_D4@GPH_MFP3'] }, + { f: ['PH.15', 'GPIO:SYS_GPH_MFP3_PH15MFP_GPIO@GPH_MFP3', 'EBI_AD3:SYS_GPH_MFP3_PH15MFP_EBI_AD3@GPH_MFP3', 'QSPI1_CLK:SYS_GPH_MFP3_PH15MFP_QSPI1_CLK@GPH_MFP3', 'CCAP_VSYNC:SYS_GPH_MFP3_PH15MFP_CCAP_VSYNC@GPH_MFP3', 'SPIM0_D5:SYS_GPH_MFP3_PH15MFP_SPIM0_D5@GPH_MFP3'] }, + { f: ['PI.6', 'GPIO:SYS_GPI_MFP1_PI6MFP_GPIO@GPI_MFP1', 'SC1_nCD:SYS_GPI_MFP1_PI6MFP_SC1_nCD@GPI_MFP1', 'I2S0_BCLK:SYS_GPI_MFP1_PI6MFP_I2S0_BCLK@GPI_MFP1', 'SPI1_I2SMCLK:SYS_GPI_MFP1_PI6MFP_SPI1_I2SMCLK@GPI_MFP1', 'UART2_TXD:SYS_GPI_MFP1_PI6MFP_UART2_TXD@GPI_MFP1', 'I2C1_SCL:SYS_GPI_MFP1_PI6MFP_I2C1_SCL@GPI_MFP1', 'USB_VBUS_ST:SYS_GPI_MFP1_PI6MFP_USB_VBUS_ST@GPI_MFP1'] }, + { f: ['PI.7', 'GPIO:SYS_GPI_MFP1_PI7MFP_GPIO@GPI_MFP1', 'SC1_PWR:SYS_GPI_MFP1_PI7MFP_SC1_PWR@GPI_MFP1', 'I2S0_MCLK:SYS_GPI_MFP1_PI7MFP_I2S0_MCLK@GPI_MFP1', 'SPI1_MISO:SYS_GPI_MFP1_PI7MFP_SPI1_MISO@GPI_MFP1', 'UART2_RXD:SYS_GPI_MFP1_PI7MFP_UART2_RXD@GPI_MFP1', 'I2C1_SDA:SYS_GPI_MFP1_PI7MFP_I2C1_SDA@GPI_MFP1', 'USB_VBUS_EN:SYS_GPI_MFP1_PI7MFP_USB_VBUS_EN@GPI_MFP1'] }, + { f: ['PI.8', 'GPIO:SYS_GPI_MFP2_PI8MFP_GPIO@GPI_MFP2', 'SC1_RST:SYS_GPI_MFP2_PI8MFP_SC1_RST@GPI_MFP2', 'I2S0_DI:SYS_GPI_MFP2_PI8MFP_I2S0_DI@GPI_MFP2', 'SPI1_MOSI:SYS_GPI_MFP2_PI8MFP_SPI1_MOSI@GPI_MFP2', 'UART2_nRTS:SYS_GPI_MFP2_PI8MFP_UART2_nRTS@GPI_MFP2', 'I2C0_SMBAL:SYS_GPI_MFP2_PI8MFP_I2C0_SMBAL@GPI_MFP2'] }, + { f: ['PI.9', 'GPIO:SYS_GPI_MFP2_PI9MFP_GPIO@GPI_MFP2', 'SC1_DAT:SYS_GPI_MFP2_PI9MFP_SC1_DAT@GPI_MFP2', 'I2S0_DO:SYS_GPI_MFP2_PI9MFP_I2S0_DO@GPI_MFP2', 'SPI1_CLK:SYS_GPI_MFP2_PI9MFP_SPI1_CLK@GPI_MFP2', 'UART2_nCTS:SYS_GPI_MFP2_PI9MFP_UART2_nCTS@GPI_MFP2', 'I2C0_SMBSUS:SYS_GPI_MFP2_PI9MFP_I2C0_SMBSUS@GPI_MFP2'] }, + { f: ['PI.10', 'GPIO:SYS_GPI_MFP2_PI10MFP_GPIO@GPI_MFP2', 'SC1_CLK:SYS_GPI_MFP2_PI10MFP_SC1_CLK@GPI_MFP2', 'I2S0_LRCK:SYS_GPI_MFP2_PI10MFP_I2S0_LRCK@GPI_MFP2', 'SPI1_SS:SYS_GPI_MFP2_PI10MFP_SPI1_SS@GPI_MFP2', 'UART2_TXD:SYS_GPI_MFP2_PI10MFP_UART2_TXD@GPI_MFP2', 'I2C0_SCL:SYS_GPI_MFP2_PI10MFP_I2C0_SCL@GPI_MFP2'] }, + { f: ['PI.11', 'GPIO:SYS_GPI_MFP2_PI11MFP_GPIO@GPI_MFP2', 'UART2_RXD:SYS_GPI_MFP2_PI11MFP_UART2_RXD@GPI_MFP2', 'I2C0_SDA:SYS_GPI_MFP2_PI11MFP_I2C0_SDA@GPI_MFP2'] }, + { f: ['PI.12', 'GPIO:SYS_GPI_MFP3_PI12MFP_GPIO@GPI_MFP3', 'QSPI0_MISO1:SYS_GPI_MFP3_PI12MFP_QSPI0_MISO1@GPI_MFP3', 'CANFD0_TXD:SYS_GPI_MFP3_PI12MFP_CANFD0_TXD@GPI_MFP3', 'UART4_TXD:SYS_GPI_MFP3_PI12MFP_UART4_TXD@GPI_MFP3', 'EPWM1_CH0:SYS_GPI_MFP3_PI12MFP_EPWM1_CH0@GPI_MFP3', 'I2C3_SMBAL:SYS_GPI_MFP3_PI12MFP_I2C3_SMBAL@GPI_MFP3'] }, + { f: ['PI.13', 'GPIO:SYS_GPI_MFP3_PI13MFP_GPIO@GPI_MFP3', 'QSPI0_MOSI1:SYS_GPI_MFP3_PI13MFP_QSPI0_MOSI1@GPI_MFP3', 'CANFD0_RXD:SYS_GPI_MFP3_PI13MFP_CANFD0_RXD@GPI_MFP3', 'UART4_RXD:SYS_GPI_MFP3_PI13MFP_UART4_RXD@GPI_MFP3', 'EPWM1_CH1:SYS_GPI_MFP3_PI13MFP_EPWM1_CH1@GPI_MFP3', 'I2C3_SMBSUS:SYS_GPI_MFP3_PI13MFP_I2C3_SMBSUS@GPI_MFP3'] }, + { f: ['PI.14', 'GPIO:SYS_GPI_MFP3_PI14MFP_GPIO@GPI_MFP3', 'QSPI0_SS:SYS_GPI_MFP3_PI14MFP_QSPI0_SS@GPI_MFP3', 'UART8_nCTS:SYS_GPI_MFP3_PI14MFP_UART8_nCTS@GPI_MFP3', 'CANFD1_TXD:SYS_GPI_MFP3_PI14MFP_CANFD1_TXD@GPI_MFP3', 'UART3_TXD:SYS_GPI_MFP3_PI14MFP_UART3_TXD@GPI_MFP3', 'EPWM1_CH2:SYS_GPI_MFP3_PI14MFP_EPWM1_CH2@GPI_MFP3', 'I2C3_SCL:SYS_GPI_MFP3_PI14MFP_I2C3_SCL@GPI_MFP3'] }, + { f: ['PI.15', 'GPIO:SYS_GPI_MFP3_PI15MFP_GPIO@GPI_MFP3', 'QSPI0_CLK:SYS_GPI_MFP3_PI15MFP_QSPI0_CLK@GPI_MFP3', 'UART8_nRTS:SYS_GPI_MFP3_PI15MFP_UART8_nRTS@GPI_MFP3', 'CANFD1_RXD:SYS_GPI_MFP3_PI15MFP_CANFD1_RXD@GPI_MFP3', 'UART3_RXD:SYS_GPI_MFP3_PI15MFP_UART3_RXD@GPI_MFP3', 'EPWM1_CH3:SYS_GPI_MFP3_PI15MFP_EPWM1_CH3@GPI_MFP3', 'I2C3_SDA:SYS_GPI_MFP3_PI15MFP_I2C3_SDA@GPI_MFP3'] }, + { f: ['PJ.0', 'GPIO:SYS_GPJ_MFP0_PJ0MFP_GPIO@GPJ_MFP0', 'UTCPD0_DISCHG:SYS_GPJ_MFP0_PJ0MFP_UTCPD0_DISCHG@GPJ_MFP0', 'QSPI0_MISO0:SYS_GPJ_MFP0_PJ0MFP_QSPI0_MISO0@GPJ_MFP0', 'UART8_TXD:SYS_GPJ_MFP0_PJ0MFP_UART8_TXD@GPJ_MFP0', 'EPWM1_CH4:SYS_GPJ_MFP0_PJ0MFP_EPWM1_CH4@GPJ_MFP0'] }, + { f: ['PJ.1', 'GPIO:SYS_GPJ_MFP0_PJ1MFP_GPIO@GPJ_MFP0', 'QSPI0_MOSI0:SYS_GPJ_MFP0_PJ1MFP_QSPI0_MOSI0@GPJ_MFP0', 'UART8_RXD:SYS_GPJ_MFP0_PJ1MFP_UART8_RXD@GPJ_MFP0', 'EPWM1_CH5:SYS_GPJ_MFP0_PJ1MFP_EPWM1_CH5@GPJ_MFP0'] }, + { f: ['PJ.2', 'GPIO:SYS_GPJ_MFP0_PJ2MFP_GPIO@GPJ_MFP0', 'EBI_AD5:SYS_GPJ_MFP0_PJ2MFP_EBI_AD5@GPJ_MFP0', 'UART8_nCTS:SYS_GPJ_MFP0_PJ2MFP_UART8_nCTS@GPJ_MFP0', 'I2C3_SMBAL:SYS_GPJ_MFP0_PJ2MFP_I2C3_SMBAL@GPJ_MFP0', 'QSPI1_SS:SYS_GPJ_MFP0_PJ2MFP_QSPI1_SS@GPJ_MFP0', 'CCAP_DATA5:SYS_GPJ_MFP0_PJ2MFP_CCAP_DATA5@GPJ_MFP0', 'CANFD0_TXD:SYS_GPJ_MFP0_PJ2MFP_CANFD0_TXD@GPJ_MFP0', 'SPIM0_RESETN:SYS_GPJ_MFP0_PJ2MFP_SPIM0_RESETN@GPJ_MFP0'] }, + { f: ['PJ.3', 'GPIO:SYS_GPJ_MFP0_PJ3MFP_GPIO@GPJ_MFP0', 'EBI_AD4:SYS_GPJ_MFP0_PJ3MFP_EBI_AD4@GPJ_MFP0', 'UART8_nRTS:SYS_GPJ_MFP0_PJ3MFP_UART8_nRTS@GPJ_MFP0', 'I2C3_SMBSUS:SYS_GPJ_MFP0_PJ3MFP_I2C3_SMBSUS@GPJ_MFP0', 'QSPI1_CLK:SYS_GPJ_MFP0_PJ3MFP_QSPI1_CLK@GPJ_MFP0', 'CCAP_DATA4:SYS_GPJ_MFP0_PJ3MFP_CCAP_DATA4@GPJ_MFP0', 'CANFD0_RXD:SYS_GPJ_MFP0_PJ3MFP_CANFD0_RXD@GPJ_MFP0', 'SPIM0_MOSI:SYS_GPJ_MFP0_PJ3MFP_SPIM0_MOSI@GPJ_MFP0'] }, + { f: ['PJ.4', 'GPIO:SYS_GPJ_MFP1_PJ4MFP_GPIO@GPJ_MFP1', 'EBI_AD3:SYS_GPJ_MFP1_PJ4MFP_EBI_AD3@GPJ_MFP1', 'UART8_TXD:SYS_GPJ_MFP1_PJ4MFP_UART8_TXD@GPJ_MFP1', 'I2C3_SCL:SYS_GPJ_MFP1_PJ4MFP_I2C3_SCL@GPJ_MFP1', 'QSPI1_MISO0:SYS_GPJ_MFP1_PJ4MFP_QSPI1_MISO0@GPJ_MFP1', 'CCAP_DATA3:SYS_GPJ_MFP1_PJ4MFP_CCAP_DATA3@GPJ_MFP1', 'CANFD1_TXD:SYS_GPJ_MFP1_PJ4MFP_CANFD1_TXD@GPJ_MFP1', 'SPIM0_MISO:SYS_GPJ_MFP1_PJ4MFP_SPIM0_MISO@GPJ_MFP1'] }, + { f: ['PJ.5', 'GPIO:SYS_GPJ_MFP1_PJ5MFP_GPIO@GPJ_MFP1', 'EBI_AD2:SYS_GPJ_MFP1_PJ5MFP_EBI_AD2@GPJ_MFP1', 'UART8_RXD:SYS_GPJ_MFP1_PJ5MFP_UART8_RXD@GPJ_MFP1', 'I2C3_SDA:SYS_GPJ_MFP1_PJ5MFP_I2C3_SDA@GPJ_MFP1', 'QSPI1_MOSI0:SYS_GPJ_MFP1_PJ5MFP_QSPI1_MOSI0@GPJ_MFP1', 'CCAP_DATA2:SYS_GPJ_MFP1_PJ5MFP_CCAP_DATA2@GPJ_MFP1', 'CANFD1_RXD:SYS_GPJ_MFP1_PJ5MFP_CANFD1_RXD@GPJ_MFP1', 'SPIM0_D2:SYS_GPJ_MFP1_PJ5MFP_SPIM0_D2@GPJ_MFP1'] }, + { f: ['PJ.6', 'GPIO:SYS_GPJ_MFP1_PJ6MFP_GPIO@GPJ_MFP1', 'EBI_AD1:SYS_GPJ_MFP1_PJ6MFP_EBI_AD1@GPJ_MFP1', 'UART9_nCTS:SYS_GPJ_MFP1_PJ6MFP_UART9_nCTS@GPJ_MFP1', 'CCAP_DATA1:SYS_GPJ_MFP1_PJ6MFP_CCAP_DATA1@GPJ_MFP1', 'SPIM0_D3:SYS_GPJ_MFP1_PJ6MFP_SPIM0_D3@GPJ_MFP1'] }, + { f: ['PJ.7', 'GPIO:SYS_GPJ_MFP1_PJ7MFP_GPIO@GPJ_MFP1', 'EBI_AD0:SYS_GPJ_MFP1_PJ7MFP_EBI_AD0@GPJ_MFP1', 'UART9_nRTS:SYS_GPJ_MFP1_PJ7MFP_UART9_nRTS@GPJ_MFP1', 'CCAP_DATA0:SYS_GPJ_MFP1_PJ7MFP_CCAP_DATA0@GPJ_MFP1', 'SPIM0_SS:SYS_GPJ_MFP1_PJ7MFP_SPIM0_SS@GPJ_MFP1'] }, + { f: ['PJ.8', 'GPIO:SYS_GPJ_MFP2_PJ8MFP_GPIO@GPJ_MFP2', 'EBI_nRD:SYS_GPJ_MFP2_PJ8MFP_EBI_nRD@GPJ_MFP2', 'SD1_DAT3:SYS_GPJ_MFP2_PJ8MFP_SD1_DAT3@GPJ_MFP2', 'UART7_TXD:SYS_GPJ_MFP2_PJ8MFP_UART7_TXD@GPJ_MFP2', 'BPWM0_CH5:SYS_GPJ_MFP2_PJ8MFP_BPWM0_CH5@GPJ_MFP2'] }, + { f: ['PJ.9', 'GPIO:SYS_GPJ_MFP2_PJ9MFP_GPIO@GPJ_MFP2', 'EBI_nWR:SYS_GPJ_MFP2_PJ9MFP_EBI_nWR@GPJ_MFP2', 'SD1_DAT2:SYS_GPJ_MFP2_PJ9MFP_SD1_DAT2@GPJ_MFP2', 'UART7_RXD:SYS_GPJ_MFP2_PJ9MFP_UART7_RXD@GPJ_MFP2', 'BPWM0_CH4:SYS_GPJ_MFP2_PJ9MFP_BPWM0_CH4@GPJ_MFP2'] }, + { f: ['PJ.10', 'GPIO:SYS_GPJ_MFP2_PJ10MFP_GPIO@GPJ_MFP2', 'EBI_MCLK:SYS_GPJ_MFP2_PJ10MFP_EBI_MCLK@GPJ_MFP2', 'SD1_DAT1:SYS_GPJ_MFP2_PJ10MFP_SD1_DAT1@GPJ_MFP2', 'UART6_TXD:SYS_GPJ_MFP2_PJ10MFP_UART6_TXD@GPJ_MFP2', 'ECAP2_IC0:SYS_GPJ_MFP2_PJ10MFP_ECAP2_IC0@GPJ_MFP2', 'CANFD0_TXD:SYS_GPJ_MFP2_PJ10MFP_CANFD0_TXD@GPJ_MFP2', 'BPWM0_CH3:SYS_GPJ_MFP2_PJ10MFP_BPWM0_CH3@GPJ_MFP2'] }, + { f: ['PJ.11', 'GPIO:SYS_GPJ_MFP2_PJ11MFP_GPIO@GPJ_MFP2', 'EBI_ALE:SYS_GPJ_MFP2_PJ11MFP_EBI_ALE@GPJ_MFP2', 'SD1_DAT0:SYS_GPJ_MFP2_PJ11MFP_SD1_DAT0@GPJ_MFP2', 'UART6_RXD:SYS_GPJ_MFP2_PJ11MFP_UART6_RXD@GPJ_MFP2', 'ECAP2_IC1:SYS_GPJ_MFP2_PJ11MFP_ECAP2_IC1@GPJ_MFP2', 'CANFD0_RXD:SYS_GPJ_MFP2_PJ11MFP_CANFD0_RXD@GPJ_MFP2', 'BPWM0_CH2:SYS_GPJ_MFP2_PJ11MFP_BPWM0_CH2@GPJ_MFP2'] }, + { f: ['PJ.12', 'GPIO:SYS_GPJ_MFP3_PJ12MFP_GPIO@GPJ_MFP3', 'EBI_nCS0:SYS_GPJ_MFP3_PJ12MFP_EBI_nCS0@GPJ_MFP3', 'SD1_CMD:SYS_GPJ_MFP3_PJ12MFP_SD1_CMD@GPJ_MFP3', 'ECAP2_IC2:SYS_GPJ_MFP3_PJ12MFP_ECAP2_IC2@GPJ_MFP3', 'CANFD1_TXD:SYS_GPJ_MFP3_PJ12MFP_CANFD1_TXD@GPJ_MFP3', 'BPWM0_CH1:SYS_GPJ_MFP3_PJ12MFP_BPWM0_CH1@GPJ_MFP3', 'HSUSB_VBUS_ST:SYS_GPJ_MFP3_PJ12MFP_HSUSB_VBUS_ST@GPJ_MFP3'] }, + { f: ['PJ.13', 'GPIO:SYS_GPJ_MFP3_PJ13MFP_GPIO@GPJ_MFP3', 'SD1_CLK:SYS_GPJ_MFP3_PJ13MFP_SD1_CLK@GPJ_MFP3', 'CANFD1_RXD:SYS_GPJ_MFP3_PJ13MFP_CANFD1_RXD@GPJ_MFP3', 'BPWM0_CH0:SYS_GPJ_MFP3_PJ13MFP_BPWM0_CH0@GPJ_MFP3', 'HSUSB_VBUS_EN:SYS_GPJ_MFP3_PJ13MFP_HSUSB_VBUS_EN@GPJ_MFP3'] } ]; // TODO: some items are missing @@ -811,8 +957,8 @@ NUTOOL_PIN.g_cfg_gpiosDescriptions = [ 'UART9_nRTS:UART9 request to Send output pin.', 'UART9_RXD:UART9 data receiver input pin.', 'UART9_TXD:UART9 data transmitter output pin.', - 'USB_D-:USB differential signal D-.', - 'USB_D+:USB differential signal D+.', + 'USB_D_MINUS:USB differential signal D-.', + 'USB_D_PLUS:USB differential signal D+.', 'USB_OTG_ID:USB_ identification.', 'USB_VBUS:Power supply from USB host or HUB.', 'USB_VBUS_EN:USB external VBUS regulator enable pin.', diff --git a/src/NUC_MG51_32K_Content.js b/src/NUC_MG51_32K_Content.js new file mode 100644 index 0000000..b2b3786 --- /dev/null +++ b/src/NUC_MG51_32K_Content.js @@ -0,0 +1,160 @@ +// chip content +NUTOOL_PIN.g_cfg_chips = [ + // 32K + { name: "MG51XC9AE", pkg: "QFN20" }, + { name: "MG51XB9AE", pkg: "QFN20" }, + { name: "MG51FC9AE", pkg: "TSSOP20" }, + { name: "MG51FB9AE", pkg: "TSSOP20" }, + // 64K + { name: "MG51EC1AE", pkg: "TSSOP28" }, + { name: "MG51PC1AE", pkg: "LQFP32" }, + { name: "MG51TC1AE", pkg: "QFN33" }, + { name: "MG51LC1AE", pkg: "LQFP48" }, + { name: "MG51PD1AE", pkg: "LQFP32" }, + { name: "MG51TD1AE", pkg: "QFN33" }, + { name: "MG51LD1AE", pkg: "LQFP48" } +]; + +NUTOOL_PIN.g_cfg_pkgs = { + "QFN20": [ + 'P0.7', 'P1.7', 'VSS', 'P1.6', 'VDD', + 'P1.5', 'P1.0', 'P1.1', 'P1.2', 'P1.4', + 'P1.3', 'P0.0', 'P0.1', 'P0.2', 'P0.3', + 'P0.4', 'P3.0', 'P2.0', 'P0.6', 'P0.5' + ], + "TSSOP20": [ + 'P0.5', 'P0.6', 'P0.7', 'P2.0', 'P3.0', + 'P1.7', 'VSS', 'P1.6', 'VDD', 'P1.5', + 'P1.4', 'P1.3', 'P1.2', 'P1.1', 'P1.0', + 'P0.0', 'P0.1', 'P0.2', 'P0.3', 'P0.4' + ] +}; + +NUTOOL_PIN.g_cfg_OrCAD = {}; + +NUTOOL_PIN.g_cfg_gpios = [ + { f: ['P0.0:0', 'PWM0_CH3:1', 'SPI0_MOSI:2', 'IC3:3', 'T1:5']}, + { f: ['P0.1:0', 'PWM0_CH4:1', 'SPI0_MISO:2', 'IC4:3']}, + { f: ['P0.2:0', 'ICE_CLK:1', 'I2C0_SCL:3', 'UART1_RXD:4']}, + { f: ['P0.3:0', 'ADC_CH6:1', 'IC5:3', 'PWM0_CH5:4']}, + { f: ['P0.4:0', 'ADC_CH5:1', 'IC3:3', 'PWM0_CH3:4', 'STADC:5']}, + { f: ['P0.5:0', 'ADC_CH4:1', 'IC6:3', 'PWM0_CH2:4', 'T0:5']}, + { f: ['P0.6:0', 'ADC_CH3:1', 'UART0_TXD:2']}, + { f: ['P0.7:0', 'ADC_CH2:1', 'UART0_RXD:2']}, + + { f: ['P1.0:0', 'PWM0_CH2:1', 'SPI0_CLK:2', 'IC2:3']}, + { f: ['P1.1:0', 'ADC_CH7:1', 'CLKO:2', 'IC1:3', 'PWM0_CH1:4']}, + { f: ['P1.2:0', 'PWM0_CH0:1', 'IC0:3']}, + { f: ['P1.3:0', 'STADC:1', 'I2C0_SCL:2']}, + { f: ['P1.4:0', 'PWM0_CH1:1', 'I2C0_SDA:2', 'PWM0_BRAKE:3']}, + { f: ['P1.5:0', 'PWM0_CH5:1', 'SPI0_SS:2', 'IC7:3']}, + { f: ['P1.6:0', 'ICE_DAT:1', 'I2C0_SDA:3', 'UART1_TXD:4']}, + { f: ['P1.7:0', 'ADC_CH0:1', 'INT1:3']}, + + { f: ['P2.0:0', 'nRESET:1']}, + { f: ['P2.1:0']}, + { f: ['P2.2:0']}, + { f: ['P2.3:0']}, + { f: ['P2.4:0']}, + { f: ['P2.5:0']}, + { f: ['P2.6:0']}, + { f: ['P2.7:0']}, + + { f: ['P3.0:0', 'ADC_CH1:1', 'OSCIN:2', 'INT0:3']}, + { f: ['P3.1:0']}, + { f: ['P3.2:0']}, + { f: ['P3.3:0']}, + { f: ['P3.4:0']}, + { f: ['P3.5:0']}, + { f: ['P3.6:0']}, + { f: ['P3.7:0']} +]; + +// MB20 LCWang0: MS51 no need to generate code +NUTOOL_PIN.g_cfg_gpiosDefines = [ +]; + +NUTOOL_PIN.g_cfg_gpiosDescriptions = [ + 'ADC_CH0:ADC input channel 0', + 'ADC_CH1:ADC input channel 1', + 'ADC_CH2:ADC input channel 2', + 'ADC_CH3:ADC input channel 3', + 'ADC_CH4:ADC input channel 4', + 'ADC_CH5:ADC input channel 5', + 'ADC_CH6:ADC input channel 6', + 'ADC_CH7:ADC input channel 7', + 'CLKO:System clock output', + 'I2C0_SCL:I2C clock', + 'I2C0_SDA:I2C data', + 'IC0:Input capture channel 0', + 'IC1:Input capture channel 1', + 'IC2:Input capture channel 2', + 'IC3:Input capture channel 3', + 'IC4:Input capture channel 4', + 'IC5:Input capture channel 5', + 'IC6:Input capture channel 6', + 'IC7:Input capture channel 7', + 'ICE_CLK:ICP / OCD clock input', + 'ICE_DAT:ICP / OCD data input or output', + 'INT0:External interrupt 0 input', + 'INT1:External interrupt 1 input', + 'nRESET:nRESET pin', + 'OSCIN:Xin is the external clock input pin', + 'PWM0_BRAKE:Fault Brake input', + 'PWM0_CH0:PWM0 output channel 0', + 'PWM0_CH1:PWM0 output channel 1', + 'PWM0_CH2:PWM0 output channel 2', + 'PWM0_CH3:PWM0 output channel 3', + 'PWM0_CH4:PWM0 output channel 4', + 'PWM0_CH5:PWM0 output channel 5', + 'SPI0_CLK:SPI clock', + 'SPI0_MISO:SPI master input/slave output', + 'SPI0_MOSI:SPI master output/slave input', + 'SPI0_SS:SPI slave select input', + 'STADC:External start ADC trigger', + 'T0:External count input to Timer/Counter 0 or its toggle output', + 'T1:External count input to Timer/Counter 1 or its toggle output', + 'UART0_RXD:Serial port 0 receive input', + 'UART0_TXD:Serial port 0 transmit data output', + 'UART1_RXD:Serial port 1 receive input', + 'UART1_TXD:Serial port 1 transmit data output' +]; + +NUTOOL_PIN.g_cfg_regDescriptions = {}; +NUTOOL_PIN.g_cfg_regDescriptions.P0MF76543210 = 'This register is nonexistent'; +NUTOOL_PIN.g_cfg_regDescriptions.P1MF76543210 = 'This register is nonexistent'; +NUTOOL_PIN.g_cfg_regDescriptions.P2MF76543210 = 'This register is nonexistent'; +NUTOOL_PIN.g_cfg_regDescriptions.P3MF76543210 = 'This register is nonexistent'; + +NUTOOL_PIN.g_cfg_gpioMatrix = []; +NUTOOL_PIN.g_cfg_shareBits = []; +NUTOOL_PIN.g_cfg_addGPIO = {}; +NUTOOL_PIN.g_cfg_unusedGPIO = {}; +NUTOOL_PIN.g_cfg_WPPin = []; + +NUTOOL_PIN.decidepackageNumber = function (given_partNumber_package) { + var partNumber_package, + partNumber; + + if (typeof given_partNumber_package === 'undefined') { + partNumber_package = NUTOOL_PIN.getg_partNumber_package(); + } + else { + partNumber_package = given_partNumber_package; + } + + NUTOOL_PIN.g_packageNumber = partNumber_package.substring(partNumber_package.indexOf('(') + 1); + NUTOOL_PIN.g_packageNumber = NUTOOL_PIN.g_packageNumber.substring(0, NUTOOL_PIN.g_packageNumber.indexOf(')')); + + partNumber = partNumber_package.substring(0, partNumber_package.indexOf('(')); + switch (NUTOOL_PIN.g_packageNumber) { + case 'QFN20': + NUTOOL_PIN.g_packageNumberIndex = "QFN20"; + break; + case 'TSSOP20': + NUTOOL_PIN.g_packageNumberIndex = "TSSOP20"; + break; + } + partNumber_package = null; + partNumber = null; +}; \ No newline at end of file diff --git a/src/NUC_MG51_64K_Content.js b/src/NUC_MG51_64K_Content.js new file mode 100644 index 0000000..1a4bcc2 --- /dev/null +++ b/src/NUC_MG51_64K_Content.js @@ -0,0 +1,220 @@ +// chip content +NUTOOL_PIN.g_cfg_chips = [ + // 32K + { name: "MG51XC9AE", pkg: "QFN20" }, + { name: "MG51XB9AE", pkg: "QFN20" }, + { name: "MG51FC9AE", pkg: "TSSOP20" }, + { name: "MG51FB9AE", pkg: "TSSOP20" }, + // 64K + { name: "MG51EC1AE", pkg: "TSSOP28" }, + { name: "MG51PC1AE", pkg: "LQFP32" }, + { name: "MG51TC1AE", pkg: "QFN33" }, + { name: "MG51LC1AE", pkg: "LQFP48" }, + { name: "MG51PD1AE", pkg: "LQFP32" }, + { name: "MG51TD1AE", pkg: "QFN33" }, + { name: "MG51LD1AE", pkg: "LQFP48" } +]; + +NUTOOL_PIN.g_cfg_pkgs = { + "TSSOP28": [ + 'VSS', 'P1.6', 'VDD', 'P1.5', 'P2.5', 'P1.4', 'P1.3', + 'P2.4', 'P2.3', 'P2.2', 'P2.1', 'P3.5', 'P1.2', 'P1.1', + 'P1.0', 'P0.0', 'P0.1', 'P3.3', 'P0.2', 'P0.3', 'P0.4', + 'P0.5', 'P0.6', 'P0.7', 'P3.4', 'P2.0', 'P3.0', 'P1.7' + ], + "LQFP32": [ + 'P2.0', 'P3.0', 'P1.7', 'VSS', 'P1.6', 'VDD', 'P1.5', 'P2.5', + 'P3.6', 'P3.7', 'P1.4', 'P1.3', 'P2.4', 'P2.3', 'P2.2', 'P2.1', + 'P3.5', 'P3.1', 'P3.2', 'P1.2', 'P1.1', 'P1.0', 'P0.0', 'P0.1', + 'P3.3', 'P0.2', 'P0.3', 'P0.4', 'P0.5', 'P0.6', 'P0.7', 'P3.4' + ], + "QFN33": [ + 'P2.0', 'P3.0', 'P1.7', 'VSS', 'P1.6', 'VDD', 'P1.5', 'P2.5', + 'P3.6', 'P3.7', 'P1.4', 'P1.3', 'P2.4', 'P2.3', 'P2.2', 'P2.1', + 'P3.5', 'P3.1', 'P3.2', 'P1.2', 'P1.1', 'P1.0', 'P0.0', 'P0.1', + 'P3.3', 'P0.2', 'P0.3', 'P0.4', 'P0.5', 'P0.6', 'P0.7', 'P3.4' + ], + "LQFP48": [ + 'P5.4', 'P2.0', 'P3.0', 'P1.7', 'VSS', 'P1.6', 'VDD', 'P5.5', 'P5.6', 'P1.5', + 'P2.5', 'P5.7', + 'P3.6', 'P3.7', 'P1.4', 'P1.3', 'P2.4', 'P2.3', 'P2.2', 'P2.1', 'P4.0', 'P4.1', + 'P4.2', 'P4.3', + 'P3.5', 'P3.1', 'P3.2', 'P1.2', 'P1.1', 'P1.0', 'P4.4', 'P4.5', 'P4.6', 'P4.7', + 'P0.0', 'P0.1', + 'P5.0', 'P5.1', 'P5.2', 'P5.3', 'P3.3', 'P0.2', 'P0.3', 'P0.4', 'P0.5', 'P0.6', + 'P0.7', 'P3.4' + ] +}; + +NUTOOL_PIN.g_cfg_OrCAD = {}; + +NUTOOL_PIN.g_cfg_gpios = [ + { f: ['P0.0:0', 'PWM0_CH3:1', 'SPI0_MOSI:2', 'IC3:3', 'UART1_RXD:4', 'T1:5', 'HXTIN:6', 'PWM2_CH1:7'] }, + { f: ['P0.1:0', 'PWM0_CH4:1', 'SPI0_MISO:2', 'IC4:3', 'HXTOUT:6', 'PWM3_CH0:7'] }, + { f: ['P0.2:0', 'ICE_CLK:1', 'I2C0_SCL:3', 'UART1_RXD:4'] }, + { f: ['P0.3:0', 'ADC_CH6:1', 'IC5:3', 'PWM0_CH5:4', 'UART2_TXD:6', 'PWM3_CH1:7'] }, + { f: ['P0.4:0', 'ADC_CH5:1', 'IC3:3', 'PWM0_CH3:4', 'STADC:5', 'UART2_RXD:6', 'PWM2_CH1:7'] }, + { f: ['P0.5:0', 'ADC_CH4:1', 'IC6:3', 'PWM0_CH2:4', 'T0:5', 'UART3_TXD:6', 'PWM2_CH0:7'] }, + { f: ['P0.6:0', 'ADC_CH3:1', 'UART0_TXD:2'] }, + { f: ['P0.7:0', 'ADC_CH2:1', 'UART0_RXD:2'] }, + + { f: ['P1.0:0', 'PWM0_CH2:1', 'SPI0_CLK:2', 'IC2:3', 'UART1_TXD:4', 'PWM2_CH0:6'] }, + { f: ['P1.1:0', 'ADC_CH7:1', 'CLKO:2', 'IC1:3', 'PWM0_CH1:4', 'UART3_RXD:5', 'PWM1_CH1:6'] }, + { f: ['P1.2:0', 'PWM0_CH0:1', 'IC0:3', 'UART3_TXD:5', 'PWM1_CH0:6'] }, + { f: ['P1.3:0', 'STADC:1', 'I2C0_SCL:2', 'ADC_CH13:4'] }, + { f: ['P1.4:0', 'PWM0_CH1:1', 'I2C0_SDA:2', 'PWM0_BRAKE:3', 'ADC_CH14:4', 'PWM1_CH1:6'] }, + { f: ['P1.5:0', 'PWM0_CH5:1', 'SPI0_SS:2', 'IC7:3', 'UART3_TXD:5', 'PWM3_CH1:6'] }, + { f: ['P1.6:0', 'ICE_DAT:1', 'I2C0_SDA:3', 'UART1_TXD:4'] }, + { f: ['P1.7:0', 'ADC_CH0:1', 'INT1:3', 'PWM3_CH0:4', 'UART2_RXD:5', 'SPI0_CLK:6'] }, + + { f: ['P2.0:0', 'nRESET:1'] }, + { f: ['P2.1:0', 'ADC_CH9:1', 'PWM2_CH0:2'] }, + { f: ['P2.2:0', 'ADC_CH10:1', 'PWM1_CH1:2', 'UART4_RXD:5'] }, + { f: ['P2.3:0', 'ADC_CH11:1', 'PWM1_CH0:2', 'UART4_TXD:5'] }, + { f: ['P2.4:0', 'ADC_CH12:1', 'T0:5'] }, + { f: ['P2.5:0', 'ADC_CH15:1', 'UART3_RXD:5', 'SPI0_MISO:6'] }, + { f: ['P2.6:0'] }, + { f: ['P2.7:0'] }, + + { f: ['P3.0:0', 'ADC_CH1:1', 'OSCIN:2', 'INT0:3', 'PWM2_CH1:4', 'UART2_TXD:5', 'SPI0_MOSI:6'] }, + { f: ['P3.1:0', 'PWM2_CH1:2'] }, + { f: ['P3.2:0', 'PWM3_CH0:2'] }, + { f: ['P3.3:0', 'PWM0_CH0:1', 'CLKO:2', 'PWM0_BRAKE:3'] }, + { f: ['P3.4:0', 'PWM3_CH1:1', 'UART3_RXD:6'] }, + { f: ['P3.5:0', 'SPI0_SS:2'] }, + { f: ['P3.6:0', 'UART1_TXD:5'] }, + { f: ['P3.7:0', 'UART1_RXD:5'] }, + + { f: ['P4.0:0'] }, + { f: ['P4.1:0'] }, + { f: ['P4.2:0'] }, + { f: ['P4.3:0'] }, + { f: ['P4.4:0'] }, + { f: ['P4.5:0'] }, + { f: ['P4.6:0'] }, + { f: ['P4.7:0'] }, + + { f: ['P5.0:0'] }, + { f: ['P5.1:0'] }, + { f: ['P5.2:0'] }, + { f: ['P5.3:0'] }, + { f: ['P5.4:0'] }, + { f: ['P5.5:0'] }, + { f: ['P5.6:0'] }, + { f: ['P5.7:0'] } +]; + +// MB20 LCWang0: MS51 no need to generate code +NUTOOL_PIN.g_cfg_gpiosDefines = [ +]; + +NUTOOL_PIN.g_cfg_gpiosDescriptions = [ + 'ADC_CH0:ADC input channel 0', + 'ADC_CH1:ADC input channel 1', + 'ADC_CH2:ADC input channel 2', + 'ADC_CH3:ADC input channel 3', + 'ADC_CH4:ADC input channel 4', + 'ADC_CH5:ADC input channel 5', + 'ADC_CH6:ADC input channel 6', + 'ADC_CH7:ADC input channel 7', + 'ADC_CH9:ADC input channel 9', + 'ADC_CH10:ADC input channel 10', + 'ADC_CH11:ADC input channel 11', + 'ADC_CH12:ADC input channel 12', + 'ADC_CH13:ADC input channel 13', + 'ADC_CH14:ADC input channel 14', + 'ADC_CH15:ADC input channel 15', + 'AVSS:Ground pin for analog circuit', + 'CLKO:System clock output', + 'I2C0_SCL:I2C clock', + 'I2C0_SDA:I2C data', + 'IC0:Input capture channel 0', + 'IC1:Input capture channel 1', + 'IC2:Input capture channel 2', + 'IC3:Input capture channel 3', + 'IC4:Input capture channel 4', + 'IC5:Input capture channel 5', + 'IC6:Input capture channel 6', + 'IC7:Input capture channel 7', + 'ICE_CLK:ICP / OCD clock input', + 'ICE_DAT:ICP / OCD data input or output', + 'INT0:External interrupt 0 input', + 'INT1:External interrupt 1 input', + 'nRESET:nRESET pin', + 'OSCIN:Xin is the external clock input pin', + 'PWM0_BRAKE:Fault Brake input', + 'PWM0_CH0:PWM0 output channel 0', + 'PWM0_CH1:PWM0 output channel 1', + 'PWM0_CH2:PWM0 output channel 2', + 'PWM0_CH3:PWM0 output channel 3', + 'PWM0_CH4:PWM0 output channel 4', + 'PWM0_CH5:PWM0 output channel 5', + 'PWM1_CH0:PWM1 output channel 0', + 'PWM1_CH1:PWM1 output channel 1', + 'PWM2_CH0:PWM2 output channel 0', + 'PWM2_CH1:PWM2 output channel 1', + 'PWM3_CH0:PWM3 output channel 0', + 'PWM3_CH1:PWM3 output channel 1', + 'SPI0_CLK:SPI clock', + 'SPI0_MISO:SPI master input/slave output', + 'SPI0_MOSI:SPI master output/slave input', + 'SPI0_SS:SPI slave select input', + 'STADC:External start ADC trigger', + 'T0:External count input to Timer/Counter 0 or its toggle output', + 'T1:External count input to Timer/Counter 1 or its toggle output', + 'UART0_RXD:Serial port 0 receive input', + 'UART0_TXD:Serial port 0 transmit data output', + 'UART1_RXD:Serial port 1 receive input', + 'UART1_TXD:Serial port 1 transmit data output', + 'UART2_RXD:Serial port 2 receive input', + 'UART2_TXD:Serial port 2 transmit data output', + 'UART3_RXD:Serial port 3 receive input', + 'UART3_TXD:Serial port 3 transmit data output', + 'UART4_RXD:Serial port 4 receive input', + 'UART4_TXD:Serial port 4 transmit data output' +]; + +NUTOOL_PIN.g_cfg_regDescriptions = {}; +NUTOOL_PIN.g_cfg_regDescriptions.P0MF76543210 = 'This register is nonexistent'; +NUTOOL_PIN.g_cfg_regDescriptions.P1MF76543210 = 'This register is nonexistent'; +NUTOOL_PIN.g_cfg_regDescriptions.P2MF76543210 = 'This register is nonexistent'; +NUTOOL_PIN.g_cfg_regDescriptions.P3MF76543210 = 'This register is nonexistent'; + +NUTOOL_PIN.g_cfg_gpioMatrix = []; +NUTOOL_PIN.g_cfg_shareBits = []; +NUTOOL_PIN.g_cfg_addGPIO = {}; +NUTOOL_PIN.g_cfg_unusedGPIO = {}; +NUTOOL_PIN.g_cfg_WPPin = []; + +NUTOOL_PIN.decidepackageNumber = function (given_partNumber_package) { + var partNumber_package, + partNumber; + + if (typeof given_partNumber_package === 'undefined') { + partNumber_package = NUTOOL_PIN.getg_partNumber_package(); + } + else { + partNumber_package = given_partNumber_package; + } + + NUTOOL_PIN.g_packageNumber = partNumber_package.substring(partNumber_package.indexOf('(') + 1); + NUTOOL_PIN.g_packageNumber = NUTOOL_PIN.g_packageNumber.substring(0, NUTOOL_PIN.g_packageNumber.indexOf(')')); + + partNumber = partNumber_package.substring(0, partNumber_package.indexOf('(')); + switch (NUTOOL_PIN.g_packageNumber) { + case 'TSSOP28': + NUTOOL_PIN.g_packageNumberIndex = "TSSOP28"; + break; + case 'LQFP32': + NUTOOL_PIN.g_packageNumberIndex = "LQFP32"; + break; + case 'QFN33': + NUTOOL_PIN.g_packageNumberIndex = "QFN33"; + break; + case 'LQFP48': + NUTOOL_PIN.g_packageNumberIndex = "LQFP48"; + break; + } + partNumber_package = null; + partNumber = null; +}; \ No newline at end of file diff --git a/src/NUC_N9H31KxxIFC_Content.js b/src/NUC_N9H31KxxIFC_Content.js new file mode 100644 index 0000000..ad5145d --- /dev/null +++ b/src/NUC_N9H31KxxIFC_Content.js @@ -0,0 +1,514 @@ +NUTOOL_PIN.g_cfg_chips = [ + { name: "N9H31K51IFC", pkg: "LQFP128" } +]; + +NUTOOL_PIN.g_cfg_pkgs = { + "LQFP128(14*14)": [ + 'USB0_ID', 'PG.1', 'PG.0', 'PG.14', 'PG.13', 'PG.12', 'PG.11', 'PG.10', 'IO_VDD', 'CORE_VDD', + 'DDR_VDD', 'DDR_VDD', 'CORE_VDD', 'PG.9', 'PG.8', 'PG.7', 'PG.6', 'PD.15', 'PD.14', 'PD.13', + 'PD.12', 'PD.11', 'PD.10', 'PD.9', 'PD.8', 'PA.15', 'PA.14', 'PA.13', 'PA.12', 'PA.11', + 'PA.10', 'IO_VDD', 'PA.9', 'PA.8', 'PA.7', 'PA.6', 'PA.5', 'PA.4', 'PA.3', 'PA.2', + 'PA.1', 'PA.0', 'ADC6', 'ADC4', 'AVDD', 'ADC7', 'ADC5', 'RTC_VDD', 'X32_IN', 'X32_OUT', + 'CORE_VDD', 'PI.1', 'PI.3', 'PI.4', 'PI.5', 'PI.6', 'PI.7', 'PI.8', 'PI.9', 'PI.10', + 'PI.11', 'PI.12', 'PI.13', 'VSS', 'PI.14', 'PI.15', 'IO_VDD', 'PB.6', 'PB.7', 'PB.8', + 'PB.9', 'PB.10', 'PB.11', 'PB.12', 'PB.13', 'PJ.3', 'PJ.0', 'PJ.1', 'PJ.2', 'PJ.4', + 'nRESET', 'CORE_VDD', 'DDR_VDD', 'DDR_VDD', 'IO_VDD', 'PD.0', 'PD.1', 'PD.2', 'PD.3', 'PD.4', + 'PD.5', 'PD.6', 'PD.7', 'CORE_VDD', 'PLL_VSS', 'PH.3', 'PH.2', 'PE.13', 'PE.12', 'PE.1', + 'PE.0', 'IO_VDD', 'XT1_IN', 'XT1_OUT', 'PF.9', 'PF.8', 'PF.7', 'PF.6', 'PF.5', 'PF.4', + 'PF.3', 'PF.2', 'PF.1', 'PF.0', 'PH.1', 'PH.0', 'PF.10', 'CORE_VDD', 'USB1_DM', 'USB1_DP', + 'USB1_VDD', 'USB1_REXT', 'USBPLL0_VDD', 'USB0_DM', 'USB0_DP', 'USB0_VDD', 'USB0_REXT', 'VSS' + ] +}; + +NUTOOL_PIN.g_cfg_gpios = [ + { f: ['PA.0:0', 'LCD_DATA0:1', 'PWRON_SET0:2']}, + { f: ['PA.1:0', 'LCD_DATA1:1', 'PWRON_SET1:2']}, + { f: ['PA.2:0', 'LCD_DATA2:1', 'PWRON_SET2:2']}, + { f: ['PA.3:0', 'LCD_DATA3:1', 'PWRON_SET3:2']}, + { f: ['PA.4:0', 'LCD_DATA4:1', 'PWRON_SET4:2']}, + { f: ['PA.5:0', 'LCD_DATA5:1', 'PWRON_SET5:2']}, + { f: ['PA.6:0', 'LCD_DATA6:1', 'PWRON_SET6:2']}, + { f: ['PA.7:0', 'LCD_DATA7:1', 'PWRON_SET7:2']}, + { f: ['PA.8:0', 'LCD_DATA8:1', 'PWRON_SET8:2']}, + { f: ['PA.9:0', 'LCD_DATA9:1', 'PWRON_SET9:2']}, + { f: ['PA.10:0', 'LCD_DATA10:1']}, + { f: ['PA.11:0', 'LCD_DATA11:1']}, + { f: ['PA.12:0', 'LCD_DATA12:1', 'PWM0:2']}, + { f: ['PA.13:0', 'LCD_DATA13:1', 'PWM1:2']}, + { f: ['PA.14:0', 'LCD_DATA14:1', 'PWM2:2']}, + { f: ['PA.15:0', 'LCD_DATA15:1', 'PWM3:2']}, + + { f: ['PB.0:0']}, + { f: ['PB.1:0']}, + { f: ['PB.2:0']}, + { f: ['PB.3:0']}, + { f: ['PB.4:0']}, + { f: ['PB.5:0']}, + { f: ['PB.6:0', 'SPI0_SS0:2']}, + { f: ['PB.7:0', 'SPI0_CLK:2']}, + { f: ['PB.8:0', 'SPI0_DO/D0:2']}, + { f: ['PB.9:0', 'SPI0_DI/D1:2']}, + { f: ['PB.10:0', 'UART10_TXD:1', 'SPI0_DATA2:2', 'CAN0_RXD:3']}, + { f: ['PB.11:0', 'UART10_RXD:1', 'SPI0_DATA3:2', 'CAN0_TXD:3']}, + { f: ['PB.12:0', 'UART10_TXD:1', 'SPI1_SS0:2']}, + { f: ['PB.13:0', 'UART10_RXD:1', 'SPI1_CLK:2']}, + { f: ['PB.14:0']}, + { f: ['PB.15:0']}, + + { f: ['PC.0:0']}, + { f: ['PC.1:0']}, + { f: ['PC.2:0']}, + { f: ['PC.3:0']}, + { f: ['PC.4:0']}, + { f: ['PC.5:0']}, + { f: ['PC.6:0']}, + { f: ['PC.7:0']}, + { f: ['PC.8:0']}, + { f: ['PC.9:0']}, + { f: ['PC.10:0']}, + { f: ['PC.11:0']}, + { f: ['PC.12:0']}, + { f: ['PC.13:0']}, + { f: ['PC.14:0']}, + { f: ['PC.15:0']}, + + { f: ['PD.0:0', 'SD0_CMD:1']}, + { f: ['PD.1:0', 'SD0_CLK:1']}, + { f: ['PD.2:0', 'SD0_DAT0:1']}, + { f: ['PD.3:0', 'SD0_DAT1:1']}, + { f: ['PD.4:0', 'SD0_DAT2:1']}, + { f: ['PD.5:0', 'SD0_DAT3:1']}, + { f: ['PD.6:0', 'SD0_nCD:1']}, + { f: ['PD.7:0', 'SD0_nPWR:1']}, + { f: ['PD.8:0', 'LCD_DATA16:1', 'EBI_nCS0:2']}, + { f: ['PD.9:0', 'LCD_DATA17:1', 'EBI_nCS1:2']}, + { f: ['PD.10:0', 'LCD_DATA18:1', 'EBI_nCS2:2']}, + { f: ['PD.11:0', 'LCD_DATA19:1', 'EBI_nCS3:2', 'UART9_TXD:4']}, + { f: ['PD.12:0', 'LCD_DATA20:1', 'EBI_nCS4:2', 'PWM0:3', 'UART9_RXD:4']}, + { f: ['PD.13:0', 'LCD_DATA21:1', 'EBI_nWE:2', 'PWM1:3']}, + { f: ['PD.14:0', 'LCD_DATA22:1', 'EBI_nOE:2', 'PWM2:3', 'UART9_TXD:4']}, + { f: ['PD.15:0', 'LCD_DATA23:1', 'EBI_nWAIT:2', 'PWM3:3', 'UART9_RXD:4']}, + + { f: ['PE.0:0', 'UART0_TXD:2']}, + { f: ['PE.1:0', 'UART0_RXD:2']}, + { f: ['PE.2:0']}, + { f: ['PE.3:0']}, + { f: ['PE.4:0']}, + { f: ['PE.5:0']}, + { f: ['PE.6:0']}, + { f: ['PE.7:0']}, + { f: ['PE.8:0']}, + { f: ['PE.9:0']}, + { f: ['PE.10:0']}, + { f: ['PE.11:0']}, + { f: ['PE.12:0', 'UART3_TXD:2', 'UART8_RTS:6']}, + { f: ['PE.13:0', 'UART3_RXD:2', 'UART8_CTS:6', 'RMII1_PPS:7', 'CLK_OUT:8']}, + { f: ['PE.14:0']}, + { f: ['PE.15:0']}, + + { f: ['PF.0:0', 'RMII0_MDC:1']}, + { f: ['PF.1:0', 'RMII0_MDIO:1']}, + { f: ['PF.2:0', 'RMII0_TXDATA0:1']}, + { f: ['PF.3:0', 'RMII0_TXDATA1:1']}, + { f: ['PF.4:0', 'RMII0_TXEN:1']}, + { f: ['PF.5:0', 'RMII0_REFCLK:1']}, + { f: ['PF.6:0', 'RMII0_RXDATA0:1']}, + { f: ['PF.7:0', 'RMII0_RXDATA1:1']}, + { f: ['PF.8:0', 'RMII0_CRSDV:1']}, + { f: ['PF.9:0', 'RMII0_RXERR:1']}, + { f: ['PF.10:0', 'USB_PWREN:2', 'WDT_nRST:3']}, + { f: ['PF.11:0']}, + { f: ['PF.12:0']}, + { f: ['PF.13:0']}, + { f: ['PF.14:0']}, + { f: ['PF.15:0']}, + + { f: ['PG.0:0', 'I2C0_SCL:1']}, + { f: ['PG.1:0', 'I2C0_SDA:1']}, + { f: ['PG.2:0']}, + { f: ['PG.3:0']}, + { f: ['PG.4:0']}, + { f: ['PG.5:0']}, + { f: ['PG.6:0', 'LCD_CLK:1']}, + { f: ['PG.7:0', 'LCD_HSYNC:1']}, + { f: ['PG.8:0', 'LCD_VSYNC:1']}, + { f: ['PG.9:0', 'LCD_DEN:1']}, + { f: ['PG.10:0', 'I2S_MCLK:1', 'SC0_RST:2']}, + { f: ['PG.11:0', 'I2S_DO:1', 'SC0_CLK:2', 'UART6_TXD:3']}, + { f: ['PG.12:0', 'I2S_DI:1', 'SC0_DAT:2', 'UART6_RXD:3']}, + { f: ['PG.13:0', 'I2S_BCLK:1', 'SC0_PWR:2', 'UART6_RTS:3']}, + { f: ['PG.14:0', 'I2S_LRCK:1', 'SC0_CD:2', 'UART6_CTS:3', 'CLK_OUT:4']}, + { f: ['PG.15:0']}, + + { f: ['PH.0:0', 'INT0:1', 'USB0_VBUSVLD:2']}, + { f: ['PH.1:0', 'INT1:1', 'USB_OVRCUR:2']}, + { f: ['PH.2:0', 'I2C1_SCL:1', 'UART9_TXD:2', 'PWM2:3', 'CAN0_RXD:4', 'INT2:5']}, + { f: ['PH.3:0', 'I2C1_SDA:1', 'UART9_RXD:2', 'PWM3:3', 'CAN0_TXD:4', 'INT3:5']}, + { f: ['PH.4:0']}, + { f: ['PH.5:0']}, + { f: ['PH.6:0']}, + { f: ['PH.7:0']}, + { f: ['PH.8:0']}, + { f: ['PH.9:0']}, + { f: ['PH.10:0']}, + { f: ['PH.11:0']}, + { f: ['PH.12:0']}, + { f: ['PH.13:0']}, + { f: ['PH.14:0']}, + { f: ['PH.15:0']}, + + { f: ['PI.0:0']}, + { f: ['PI.1:0', 'NAND_nCS0:2', 'UART7_TXD:3', 'INT6:4', 'EBI_DATA1:8']}, + { f: ['PI.2:0']}, + { f: ['PI.3:0', 'I2C1_SCL:1', 'NAND_ALE:2', 'VCAP_CLKO:4', 'CAN0_RXD:5', 'EBI_DATA3:8']}, + { f: ['PI.4:0', 'I2C1_SDA:1', 'NAND_CLE:2', 'VCAP_PCLK:4', 'CAN0_TXD:5', 'EBI_DATA4:8']}, + { f: ['PI.5:0', 'NAND_nWE:2', 'UART1_TXD:3', 'VCAP_HSYNC:4', 'SPI1_SS0:5', 'SD1_CMD:6', 'eMMC_CMD:7', 'EBI_DATA5:8']}, + { f: ['PI.6:0', 'SC1_RST:1', 'NAND_nRE:2', 'UART1_RXD:3', 'VCAP_VSYNC:4', 'SPI1_CLK:5', 'SD1_CLK:6', 'eMMC_CLK:7', 'EBI_DATA6:8']}, + { f: ['PI.7:0', 'SC1_CLK:1', 'NAND_RDY0:2', 'UART1_RTS:3', 'VCAP_FIELD:4', 'SPI1_DO/D0:5', 'SD1_DAT0:6', 'eMMC_DATA3:7', 'EBI_DATA7:8']}, + { f: ['PI.8:0', 'SC1_DAT:1', 'NAND_DATA0:2', 'UART1_CTS:3', 'VCAP_DATA0:4', 'SPI1_DI/D1:5', 'SD1_DAT1:6', 'eMMC_DATA0:7', 'EBI_DATA8:8']}, + { f: ['PI.9:0', 'SC1_PWR:1', 'NAND_DATA1:2', 'UART4_TXD:3', 'VCAP_DATA1:4', 'SD1_DAT2:6', 'eMMC_DATA1:7', 'EBI_DATA9:8']}, + { f: ['PI.10:0', 'SC1_CD:1', 'NAND_DATA2:2', 'UART4_RXD:3', 'VCAP_DATA2:4', 'SD1_DAT3:6', 'eMMC_DATA2:7', 'EBI_DATA10:8']}, + { f: ['PI.11:0', 'SC0_RST:1', 'NAND_DATA3:2', 'VCAP_DATA3:4', 'EBI_DATA11:8']}, + { f: ['PI.12:0', 'SC0_CLK:1', 'NAND_DATA4:2', 'UART8_TXD:3', 'VCAP_DATA4:4', 'SD1_nCD:6', 'EBI_DATA12:8']}, + { f: ['PI.13:0', 'SC0_DAT:1', 'NAND_DATA5:2', 'UART8_RXD:3', 'VCAP_DATA5:4', 'SD1_nPWR:6', 'EBI_DATA13:8']}, + { f: ['PI.14:0', 'SC0_PWR:1', 'NAND_DATA6:2', 'UART8_RTS:3', 'VCAP_DATA6:4', 'EBI_DATA14:8']}, + { f: ['PI.15:0', 'SC0_CD:1', 'NAND_DATA7:2', 'UART8_CTS:3', 'VCAP_DATA7:4', 'EBI_DATA15:8', 'CLK_OUT:9']}, + + { f: ['PJ.0:0', 'JTAG_TCK:1']}, + { f: ['PJ.1:0', 'JTAG_TMS:1']}, + { f: ['PJ.2:0', 'JTAG_TDI:1']}, + { f: ['PJ.3:0', 'JTAG_TDO:1']}, + { f: ['PJ.4:0', 'JTAG_nTRST:1']}, + { f: ['PJ.5:0']}, + { f: ['PJ.6:0']}, + { f: ['PJ.7:0']}, + { f: ['PJ.8:0']}, + { f: ['PJ.9:0']}, + { f: ['PJ.10:0']}, + { f: ['PJ.11:0']}, + { f: ['PJ.12:0']}, + { f: ['PJ.13:0']}, + { f: ['PJ.14:0']}, + { f: ['PJ.15:0']}, + + { f: ['ADC4:0', 'YM:0']}, + { f: ['ADC5:0', 'YP:0']}, + { f: ['ADC6:0', 'XM:0']}, + { f: ['ADC7:0', 'XP:0']} +]; + +NUTOOL_PIN.g_cfg_gpiosDefines = [ +]; + +NUTOOL_PIN.g_cfg_gpiosDescriptions = [ + 'CAN0_RXD:CAN0 bus receiver input.', + 'CAN0_TXD:CAN0 bus transmitter output.', + 'CAN1_RXD:CAN1 bus receiver input.', + 'CAN1_TXD:CAN1 bus transmitter output.', + // 'CLK_OUT:', + 'EBI_ADDR0:EBI address/data bus bit D.', + 'EBI_ADDR1:EBI address/data bus bit D.', + 'EBI_ADDR2:EBI address/data bus bit D.', + 'EBI_ADDR3:EBI address/data bus bit D.', + 'EBI_ADDR4:EBI address/data bus bit D.', + 'EBI_ADDR5:EBI address/data bus bit D.', + 'EBI_ADDR6:EBI address/data bus bit D.', + 'EBI_ADDR7:EBI address/data bus bit D.', + 'EBI_ADDR8:EBI address/data bus bit D.', + 'EBI_ADDR9:EBI address/data bus bit D.', + 'EBI_DATA0:EBI data bus bit 0.', + 'EBI_DATA1:EBI data bus bit 1.', + 'EBI_DATA2:EBI data bus bit 2.', + 'EBI_DATA3:EBI data bus bit 3.', + 'EBI_DATA4:EBI data bus bit 4.', + 'EBI_DATA5:EBI data bus bit 5.', + 'EBI_DATA6:EBI data bus bit 6.', + 'EBI_DATA7:EBI data bus bit 7.', + 'EBI_DATA8:EBI data bus bit 8.', + 'EBI_DATA9:EBI data bus bit 9.', + 'EBI_DATA10:EBI data bus bit 10.', + 'EBI_DATA11:EBI data bus bit 11.', + 'EBI_DATA12:EBI data bus bit 12.', + 'EBI_DATA13:EBI data bus bit 13.', + 'EBI_DATA14:EBI data bus bit 14.', + 'EBI_DATA15:EBI data bus bit 15.', + // 'EBI_nBE0:', + // 'EBI_nBE1:', + 'EBI_nCS0:EBI chip select 0 output pin.', + 'EBI_nCS1:EBI chip select 1 output pin.', + 'EBI_nCS2:EBI chip select 2 output pin.', + 'EBI_nCS3:EBI chip select 3 output pin.', + 'EBI_nCS4:EBI chip select 4 output pin.', + // 'EBI_nOE:', + // 'EBI_nWAIT:', + // 'EBI_nWE:', + // 'eMMC_CLK:', + // 'eMMC_CMD:', + // 'eMMC_DATA0:', + // 'eMMC_DATA1:', + // 'eMMC_DATA2:', + // 'eMMC_DATA3:', + 'I2C0_SCL:I2C0 clock pin.', + 'I2C0_SDA:I2C0 data input/output pin.', + 'I2C1_SCL:I2C1 clock pin.', + 'I2C1_SDA:I2C1 data input/output pin.', + 'I2S_BCLK:I2S_ bit clock output pin.', + 'I2S_DI:I2S_ data input pin.', + 'I2S_DO:I2S_ data output pin.', + 'I2S_LRCK:I2S_ left right channel clock output pin.', + 'I2S_MCLK:I2S_ master clock output pin.', + 'INT0:External interrupt 0 input pin.', + 'INT1:External interrupt 1 input pin.', + 'INT2:External interrupt 2 input pin.', + 'INT3:External interrupt 3 input pin.', + 'INT4:External interrupt 4 input pin.', + 'INT5:External interrupt 5 input pin.', + 'INT6:External interrupt 6 input pin.', + 'INT7:External interrupt 7 input pin.', + 'JTAG_nTRST:JTAG reset input pin.', + 'JTAG_TCK:JTAG clock input pin.', + 'JTAG_TDI:JTAG data input pin.', + 'JTAG_TDO:JTAG data output pin.', + 'JTAG_TMS:JTAG test mode selection input pin.', + // 'LCD_CLK:', + // 'LCD_DATA0:', + // 'LCD_DATA1:', + // 'LCD_DATA2:', + // 'LCD_DATA3:', + // 'LCD_DATA4:', + // 'LCD_DATA5:', + // 'LCD_DATA6:', + // 'LCD_DATA7:', + // 'LCD_DATA8:', + // 'LCD_DATA9:', + // 'LCD_DATA10:', + // 'LCD_DATA11:', + // 'LCD_DATA12:', + // 'LCD_DATA13:', + // 'LCD_DATA14:', + // 'LCD_DATA15:', + // 'LCD_DATA16:', + // 'LCD_DATA17:', + // 'LCD_DATA18:', + // 'LCD_DATA19:', + // 'LCD_DATA20:', + // 'LCD_DATA21:', + // 'LCD_DATA22:', + // 'LCD_DATA23:', + // 'LCD_DEN:', + // 'LCD_HSYNC:', + // 'LCD_VSYNC:', + // 'NAND_ALE:', + // 'NAND_CLE:', + // 'NAND_DATA0:', + // 'NAND_DATA1:', + // 'NAND_DATA2:', + // 'NAND_DATA3:', + // 'NAND_DATA4:', + // 'NAND_DATA5:', + // 'NAND_DATA6:', + // 'NAND_DATA7:', + // 'NAND_nCS0:', + // 'NAND_nCS1:', + // 'NAND_nRE:', + // 'NAND_nWE:', + // 'NAND_nWP:', + // 'NAND_RDY0:', + // 'NAND_RDY1:', + // 'PWM0:', + // 'PWM1:', + // 'PWM2:', + // 'PWM3:', + // 'PWRON_SET0:', + // 'PWRON_SET1:', + // 'PWRON_SET2:', + // 'PWRON_SET3:', + // 'PWRON_SET4:', + // 'PWRON_SET5:', + // 'PWRON_SET6:', + // 'PWRON_SET7:', + // 'PWRON_SET8:', + // 'PWRON_SET9:', + 'RMII_MDC:RMII PHY Management Clock output pin.', + // 'RMII0_CRSDV:', + // 'RMII0_MDC:', + // 'RMII0_MDIO:', + // 'RMII0_PPS:', + // 'RMII0_REFCLK:', + // 'RMII0_RXDATA0:', + // 'RMII0_RXDATA1:', + // 'RMII0_RXERR:', + // 'RMII0_TXDATA0:', + // 'RMII0_TXDATA1:', + // 'RMII0_TXEN:', + // 'RMII1_CRSDV:', + // 'RMII1_MDIO:', + // 'RMII1_PPS:', + // 'RMII1_REFCLK:', + // 'RMII1_RXDATA0:', + // 'RMII1_RXDATA1:', + // 'RMII1_RXERR:', + // 'RMII1_TXDATA0:', + // 'RMII1_TXDATA1:', + // 'RMII1_TXEN:', + // 'RTC_TICK:', + // 'SC0_CD:', + 'SC0_CLK:Smart Card 0 clock pin.', + 'SC0_DAT:Smart Card 0 data pin.', + 'SC0_PWR:Smart Card 0 power pin.', + 'SC0_RST:Smart Card 0 reset pin.', + // 'SC1_CD:', + 'SC1_CLK:Smart Card 1 clock pin.', + 'SC1_DAT:Smart Card 1 data pin.', + 'SC1_PWR:Smart Card 1 power pin.', + 'SC1_RST:Smart Card 1 reset pin.', + 'SD0_CLK:SD/SDIO0 clock output pin', + 'SD0_CMD:SD/SDIO0 command/response pin', + 'SD0_DAT0:SD/SDIO0 data line bit 0.', + 'SD0_DAT1:SD/SDIO0 data line bit 1.', + 'SD0_DAT2:SD/SDIO0 data line bit 2.', + 'SD0_DAT3:SD/SDIO0 data line bit 3.', + 'SD0_nCD:SD/SDIO0 card detect input pin', + // 'SD0_nPWR:', + 'SD1_CLK:SD/SDIO1 clock output pin', + 'SD1_CMD:SD/SDIO1 command/response pin', + 'SD1_DAT0:SD/SDIO1 data line bit 0.', + 'SD1_DAT1:SD/SDIO1 data line bit 1.', + 'SD1_DAT2:SD/SDIO1 data line bit 2.', + 'SD1_DAT3:SD/SDIO1 data line bit 3.', + 'SD1_nCD:SD/SDIO1 card detect input pin', + // 'SD1_nPWR:', + 'SPI0_CLK:SPI0 serial clock pin.', + // 'SPI0_DATA2:', + // 'SPI0_DATA3:', + // 'SPI0_DI/D1:', + // 'SPI0_DO/D0:', + 'SPI0_SS0:SPI0 slave select 0 pin.', + 'SPI0_SS1:SPI0 slave select 1 pin.', + 'SPI1_CLK:SPI1 serial clock pin.', + // 'SPI1_DATA2:', + // 'SPI1_DATA3:', + // 'SPI1_DI/D1:', + // 'SPI1_DO/D0:', + 'SPI1_SS0:SPI1 slave select 0 pin.', + 'SPI1_SS1:SPI1 slave select 1 pin.', + 'TM0_EXT:Timer0 external capture input/toggle output pin.', + 'TM0_TGL:Timer0 event counter input/toggle output pin.', + 'TM1_EXT:Timer1 external capture input/toggle output pin.', + 'TM1_TGL:Timer1 event counter input/toggle output pin.', + 'TM2_EXT:Timer2 external capture input/toggle output pin.', + 'TM2_TGL:Timer2 event counter input/toggle output pin.', + 'TM3_EXT:Timer3 external capture input/toggle output pin.', + 'TM3_TGL:Timer3 event counter input/toggle output pin.', + 'UART0_RXD:UART0 data receiver input pin.', + 'UART0_TXD:UART0 data transmitter output pin.', + // 'UART1_CD:', + // 'UART1_CTS:', + // 'UART1_DSR:', + // 'UART1_DTR:', + // 'UART1_RI:', + // 'UART1_RTS:', + 'UART1_RXD:UART1 data receiver input pin.', + 'UART1_TXD:UART1 data transmitter output pin.', + // 'UART2_CTS:', + // 'UART2_RTS:', + 'UART2_RXD:UART2 data receiver input pin.', + 'UART2_TXD:UART2 data transmitter output pin.', + 'UART3_RXD:UART3 data receiver input pin.', + 'UART3_TXD:UART3 data transmitter output pin.', + // 'UART4_CTS:', + // 'UART4_RTS:', + 'UART4_RXD:UART4 data receiver input pin.', + 'UART4_TXD:UART4 data transmitter output pin.', + 'UART5_RXD:UART5 data receiver input pin.', + 'UART5_TXD:UART5 data transmitter output pin.', + // 'UART6_CTS:', + // 'UART6_RTS:', + 'UART6_RXD:UART6 data receiver input pin.', + 'UART6_TXD:UART6 data transmitter output pin.', + 'UART7_RXD:UART7 data receiver input pin.', + 'UART7_TXD:UART7 data transmitter output pin.', + // 'UART8_CTS:', + // 'UART8_RTS:', + 'UART8_RXD:UART8 data receiver input pin.', + 'UART8_TXD:UART8 data transmitter output pin.', + 'UART9_RXD:UART9 data receiver input pin.', + 'UART9_TXD:UART9 data transmitter output pin.', + // 'UART10_CTS:', + // 'UART10_RTS:', + 'UART10_RXD:UART10 data receiver input pin.', + 'UART10_TXD:UART10 data transmitter output pin.', + // 'USB_OVRCUR:', + // 'USB_PWREN:', + // 'USB0_PWREN:', + // 'USB0_VBUSVLD:', + // 'USB1_PWREN:', + // 'VCAP_CLKO:', + // 'VCAP_DATA0:', + // 'VCAP_DATA1:', + // 'VCAP_DATA2:', + // 'VCAP_DATA3:', + // 'VCAP_DATA4:', + // 'VCAP_DATA5:', + // 'VCAP_DATA6:', + // 'VCAP_DATA7:', + // 'VCAP_FIELD:', + // 'VCAP_HSYNC:', + // 'VCAP_PCLK:', + // 'VCAP_VSYNC:', + // 'WDT_nRST:' +]; + +NUTOOL_PIN.g_cfg_regDescriptions = {}; +NUTOOL_PIN.g_cfg_regDescriptions.GPA_MFPL = '0xB0000070'; +NUTOOL_PIN.g_cfg_regDescriptions.GPA_MFPH = '0xB0000074'; +NUTOOL_PIN.g_cfg_regDescriptions.GPB_MFPL = '0xB0000078'; +NUTOOL_PIN.g_cfg_regDescriptions.GPB_MFPH = '0xB000007C'; +NUTOOL_PIN.g_cfg_regDescriptions.GPC_MFPL = '0xB0000080'; +NUTOOL_PIN.g_cfg_regDescriptions.GPC_MFPH = '0xB0000084'; +NUTOOL_PIN.g_cfg_regDescriptions.GPD_MFPL = '0xB0000088'; +NUTOOL_PIN.g_cfg_regDescriptions.GPD_MFPH = '0xB000008C'; +NUTOOL_PIN.g_cfg_regDescriptions.GPE_MFPL = '0xB0000090'; +NUTOOL_PIN.g_cfg_regDescriptions.GPE_MFPH = '0xB0000094'; +NUTOOL_PIN.g_cfg_regDescriptions.GPF_MFPL = '0xB0000098'; +NUTOOL_PIN.g_cfg_regDescriptions.GPF_MFPH = '0xB000009C'; +NUTOOL_PIN.g_cfg_regDescriptions.GPG_MFPL = '0xB00000A0'; +NUTOOL_PIN.g_cfg_regDescriptions.GPG_MFPH = '0xB00000A4'; +NUTOOL_PIN.g_cfg_regDescriptions.GPH_MFPL = '0xB00000A8'; +NUTOOL_PIN.g_cfg_regDescriptions.GPH_MFPH = '0xB00000AC'; +NUTOOL_PIN.g_cfg_regDescriptions.GPI_MFPL = '0xB00000B0'; +NUTOOL_PIN.g_cfg_regDescriptions.GPI_MFPH = '0xB00000B4'; +NUTOOL_PIN.g_cfg_regDescriptions.GPJ_MFPL = '0xB00000B8'; + +NUTOOL_PIN.g_cfg_gpioMatrix = []; +NUTOOL_PIN.g_cfg_shareBits = []; +NUTOOL_PIN.g_cfg_addGPIO = {}; +NUTOOL_PIN.g_cfg_unusedGPIO = { +}; +NUTOOL_PIN.g_cfg_WPPin = []; + +NUTOOL_PIN.decidepackageNumber = function (given_partNumber_package) { + var partNumber_package, + partNumber; + + if (typeof given_partNumber_package === 'undefined') { + partNumber_package = NUTOOL_PIN.getg_partNumber_package(); + } + else { + partNumber_package = given_partNumber_package; + } + + NUTOOL_PIN.g_packageNumber = partNumber_package.substring(partNumber_package.indexOf('(') + 1); + NUTOOL_PIN.g_packageNumber = NUTOOL_PIN.g_packageNumber.substring(0, NUTOOL_PIN.g_packageNumber.indexOf(')')); + + partNumber = partNumber_package.substring(0, partNumber_package.indexOf('(')); + switch (NUTOOL_PIN.g_packageNumber) { + case 'LQFP128': + NUTOOL_PIN.g_packageNumberIndex = "LQFP128(14*14)"; + break; + default: + break; + } + partNumber_package = null; + partNumber = null; +}; \ No newline at end of file diff --git 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0!==Ke[_]))){for(i=0,o=Ke[_].length;i>>0)>>>8*n>>>0,c=n+4*d,f="P"+e.slice(e.indexOf("P")+1,e.indexOf("P")+2)+"."+c.toString(),-1!==(u=$.inArray(f,NUTOOL_PIN.g_cfg_pkgs[NUTOOL_PIN.g_packageNumberIndex]))&&""!==we[u]&&(g=(g=we[u]+"_Pin"+(u+1)).replaceSpecialCharacters(),$("#moduleTree").jstree("uncheck_node",$("#"+g)),!$("#"+g).hasClass("jstree-unchecked")&&(_=Hi(g.slicePriorToX("_")),h[0]=u+1,Oi(g,_,h),$("#"+g).addClass("jstree-unchecked"),void 0!==Ke[_]))){for(i=0,o=Ke[_].length;i>>0)>>>4*n>>>0,c=n,f="P"+e.slice(e.indexOf("P")+1,e.indexOf("P")+2)+"."+c.toString(),-1!==(u=$.inArray(f,NUTOOL_PIN.g_cfg_pkgs[NUTOOL_PIN.g_packageNumberIndex]))&&""!==we[u]&&(g=(g=we[u]+"_Pin"+(u+1)).replaceSpecialCharacters(),$("#moduleTree").jstree("uncheck_node",$("#"+g)),!$("#"+g).hasClass("jstree-unchecked")&&(_=Hi(g.slicePriorToX("_")),h[0]=u+1,Oi(g,_,h),$("#"+g).addClass("jstree-unchecked"),void 0!==Ke[_]))){for(i=0,o=Ke[_].length;i>>0)>>>2*n>>>0,c=n,f="P"+e.slice(e.indexOf("P")+1,e.indexOf("P")+2)+"."+c.toString(),-1!==(u=$.inArray(f,NUTOOL_PIN.g_cfg_pkgs[NUTOOL_PIN.g_packageNumberIndex]))&&""!==we[u]&&(g=(g=we[u]+"_Pin"+(u+1)).replaceSpecialCharacters(),$("#moduleTree").jstree("uncheck_node",$("#"+g)),!$("#"+g).hasClass("jstree-unchecked")&&(_=Hi(g.slicePriorToX("_")),h[0]=u+1,Oi(g,_,h),$("#"+g).addClass("jstree-unchecked"),void 0!==Ke[_]))){for(i=0,o=Ke[_].length;i>>0)>>>n>>>0)for(N=e.slice(e.indexOf("P"),e.indexOf(":"))+"["+n+"]",t=0,s=NUTOOL_PIN.g_cfg_gpioMatrix.length;t";if("undefined"!=typeof NUTOOL_PER&&Ki(),"h"!==NUTOOL_PIN.g_pinFunctionString&&"dtsi"!==NUTOOL_PIN.g_pinFunctionString||a.sliceAfterX(".")===NUTOOL_PIN.g_pinFunctionString||(a=a.slicePriorToX(".")+"."+NUTOOL_PIN.g_pinFunctionString+'"\r\n'),d="",0!==NUTOOL_PIN.g_cfg_gpiosDefines.length&&NUTOOL_PIN.g_cfg_gpiosDefines[0].f.length>1&&0===NUTOOL_PIN.g_cfg_gpiosDefines[0].f[1].indexOf("GPIO:GPIO_")&&(w=""),k=qi(Re),"KM1M7CF"!==l&&k.sort(),0!==NUTOOL_PIN.g_cfg_gpiosDefines.length){if(-1===a.indexOf(".dtsi"))for(e=0,c=k.length;e0)for(i=y[k[e]].length-1;i>=0;i-=1)d+=" "+y[k[e]][i]+";\r\n",f=f+" "+y[k[e]][i]+";"}else if(0===l.indexOf("MS51")||0===l.indexOf("MG51")||0===l.indexOf("N76S003")||0===l.indexOf("N76E003")){for(e=0,c=k.length;e0)for(i=0,g=y[k[e]].length;iIOPnMD = 0x"+Yi(Re[k[e]]).toUpperCase()+"UL;\r\n";for(d+="\r\n","undefined"==typeof NUTOOL_PER&&(d+=" /* If the macros do not exist in your project, please refer to the corresponding header file in Header folder of the tool package */\r\n"),f="",e=0,c=k.length;e0)for(d+=" "+w+"GPIO_MD(0x"+k[e][3]+")->IOPnMD = ",f=f+" "+w+"GPIO_MD(0x"+k[e][3]+")->IOPnMD = ",i=y[k[e]].length-1;i>=0;i-=1)0!==i?(d+=y[k[e]][i]+" | ",f=f+y[k[e]][i]+" | "):(d+=y[k[e]][i]+";\r\n",f=f+y[k[e]][i]+";");else d+=" "+w+"GPIO_MD(0x"+k[e][3]+")->IOPnMD = 0x00000000;\r\n"}else if(0===l.indexOf("KM1M4BF")){for(e=0,c=k.length;eIOPnMD = 0x"+Yi(Re[k[e]]).toUpperCase()+"UL;\r\n":d+=" //"+w+"DBG->SELSWD = 0x"+Yi(Re[k[e]]).toUpperCase().slice(-2)+"UL;\r\n";for(d+="\r\n","undefined"==typeof NUTOOL_PER&&(d+=" /* If the macros do not exist in your project, please refer to the corresponding header file in Header folder of the tool package */\r\n"),f="",e=0,c=k.length;e0)for(d+=" "+w+"GPIO_MD"+k[e][3]+"->IOPnMD = ",f=f+" "+w+"GPIO_MD"+k[e][3]+"->IOPnMD = ",i=y[k[e]].length-1;i>=0;i-=1)0!==i?(d+=y[k[e]][i]+" | ",f=f+y[k[e]][i]+" | "):(d+=y[k[e]][i]+";\r\n",f=f+y[k[e]][i]+";");else d+=" "+w+"GPIO_MD"+k[e][3]+"->IOPnMD = 0x00000000;\r\n";else 0==Yi(Re[k[e]])?d+=" "+w+"DBG->SELSWD = DEBUG_INTERFACE_DISABLE;\r\n":d+=" "+w+"DBG->SELSWD = DEBUG_INTERFACE_ENABLE;\r\n"}else if(0===l.indexOf("KM1M7CF")){for(e=0,c=k.length;eIOPnMD = 0x"+Yi(Re[k[e]]).toUpperCase()+"UL;\r\n":d+=" //"+w+k[e].slicePriorToX("_")+"->FPS"+k[e][3]+"n_SEL = 0x"+Yi(Re[k[e]]).toUpperCase()+"UL;\r\n";for(d+="\r\n","undefined"==typeof NUTOOL_PER&&(d+=" /* If the macros do not exist in your project, please refer to the corresponding header file in Header folder of the tool package */\r\n"),f="",e=0,c=k.length;e0)for(d+=" "+w+"GPIO_MD"+k[e][3]+"->IOPnMD = ",f=f+" "+w+"GPIO_MD"+k[e][3]+"->IOPnMD = ",i=y[k[e]].length-1;i>=0;i-=1)0!==i?(d+=y[k[e]][i]+" | ",f=f+y[k[e]][i]+" | "):(d+=y[k[e]][i]+";\r\n",f=f+y[k[e]][i]+";");else d+=" "+w+"GPIO_MD"+k[e][3]+"->IOPnMD = 0x00000000;\r\n";else if(y[k[e]].length>0)for(d+=" "+w+k[e].slicePriorToX("_")+"->FPS"+k[e][3]+"n_SEL = ",f=f+" "+w+k[e].slicePriorToX("_")+"->FPS"+k[e][3]+"n_SEL = ",i=y[k[e]].length-1;i>=0;i-=1)0!==i?(d+=y[k[e]][i]+" | ",f=f+y[k[e]][i]+" | "):(d+=y[k[e]][i]+";\r\n",f=f+y[k[e]][i]+";");else d+=" "+w+k[e].slicePriorToX("_")+"->FPS"+k[e][3]+"n_SEL = 0x00000000;\r\n"}else if(0===l.indexOf("M55M1"))for(d+="\r\n",f="",e=0,c=we.length;e;\r\n};\r\n\r\n";for(d+="&pinctrl {\r\n",e=0,c=k.length;eU&&(U=y[k[e]][i].length);for(U+=1,C=k[e].toLowerCase(),d+=" "+C+" {\r\n pinctrl_"+C+": "+C+"grp {\r\n nuvoton,pins =\r\n",f+=" "+C+" {\r\n pinctrl_"+C+": "+C+"grp {\r\n nuvoton,pins =\r\n",i=0,g=y[k[e]].length;i0)for(d+=" "+w+k[e]+" = ",f=f+" "+w+k[e]+" = ",i=y[k[e]].length-1;i>=0;i-=1)0!==i?(d+=y[k[e]][i]+" | ",f=f+y[k[e]][i]+" | "):(d+=y[k[e]][i]+";\r\n",f=f+y[k[e]][i]+";");else d+=" "+w+k[e]+" = 0x00000000;\r\n"}}else{for(e=0,c=k.length;e\{\}\[\]\\\/]/gi,"_").toUpperCase()).charAt(0))&&(U="_"+U),T+="#define "+U+" "+P.replace(/[.]/g,"").replace(/\s/g,"_").replace(/[`~!@#$%^&*()|+\-=?;:'",<>\{\}\[\]\\\/]/gi,"_")+"\r\n");"/* User-defined pins */\r\n"===T&&(T=""),L||("STADC"===C&&""===f&&(f="We do not Have the Define for STADC;"),$("#NUC_PinConfiguration_Canvas")[0].setAttribute("innerHTML",f))}function zi(){var e,i,n,t,r,o,s,f,_,u,N,O,p,h,P,x,I,M,C,m,U,b,L,k,$=[],A=[],S=[],y="",D=[],w=[],F="SYS->",E=localStorage.getItem("ProjectName");for(O=function(e,i,n){return k=!1,(-1!==e.indexOf("_"+i)||-1!==e.indexOf(i+":")||0===e.indexOf(i+"_")||-1!==e.indexOf(","+i+"_")||-1!==e.lastIndexOf(i)&&e.lastIndexOf(i)+i.length===e.length||"GPIO"===i&&-1!==e.indexOf("_MFP_G"+n)||0===e.indexOf(i)&&-1!==e.indexOf("_FPS"))&&(k=!0),"GPIO"===i&&-1===e.indexOf("SYS_G"+n)&&-1===e.indexOf("SYS_MFP_"+n)&&-1===e.indexOf("SYS_"+n)&&-1===e.indexOf("MD_"+n)&&-1===e.indexOf("GPIO_"+n)&&(k=!1),k},p=function(e){return 0===e.indexOf("SYS_MFP")?e.substring(0,11)+"_Msk":0===e.indexOf("SYS_GP")&&-1!==e.indexOf("_MFP_")?-1===e.indexOf("_MFPL_")&&-1===e.indexOf("_MFPH_")?e.substring(0,15)+"_Msk":e.slicePriorToX("MFP_")+"MFP_Msk":-1===e.indexOf("SYS_GP")&&e.indexOf("_MFP_")!==e.lastIndexOf("_MFP_")?e.substring(0,e.lastIndexOf("_MFP_")+5)+"Msk":0===e.indexOf("GPIO_IO")?e.substring(0,e.lastIndexOf("MD_")+3)+"Msk":0===e.indexOf("GPIO_P")?"GPIO_MD_IOPnMD_Pn"+e.substring(7,e.lastIndexOf("GPIO_P")+8)+"MD_Msk":0===e.indexOf("GPIO_FPS")?"":e.slicePriorToX("MFP_")+"MFP_Msk"},0!==NUTOOL_PIN.g_cfg_gpiosDefines.length&&NUTOOL_PIN.g_cfg_gpiosDefines[0].f.length>1&&0===NUTOOL_PIN.g_cfg_gpiosDefines[0].f[1].indexOf("GPIO:GPIO_")&&(F=""),"undefined"!=typeof NUTOOL_PER&&Ki(),"h"!==NUTOOL_PIN.g_pinFunctionString&&"dtsi"!==NUTOOL_PIN.g_pinFunctionString||a.sliceAfterX(".")===NUTOOL_PIN.g_pinFunctionString||(a=a.slicePriorToX(".")+"."+NUTOOL_PIN.g_pinFunctionString+'"\r\n'),($=qi(Re)).sort(),e=0,r=$.length;e0&&O(w[$[e]].join(),y,S[n])){for(b=!1,L=!0,i=w[$[e]].length-1;i>=0;i-=1){if(O(w[$[e]][i],y,S[n]))b&&(U+="();\r\n",g+="();
"),U+=" SET_"+(C=w[$[e]][i].slicePriorToX(":"))+"_"+(j=w[$[e]][i].slicePriorToX("MFP_").sliceAfterX("_MFP").sliceAfterX("_")),g+=" SET_"+C+"_"+j,b=!0}U+="();\r\n",g+="();
"}for(U+="\r\n return;\r\n}\r\n\r\n",L?d+=U:g+=S[n]+" did not generate modularized code!!
",U="void "+E+"_deinit_"+S[n].toLowerCase()+"(void)\r\n{\r\n",L=!1,e=0,r=$.length;e0&&O(w[$[e]].join(),y,S[n])){for(b=!1,L=!0,i=w[$[e]].length-1;i>=0;i-=1){var j;if(O(w[$[e]][i],y,S[n]))b&&(U+="();\r\n"),U+=" SET_GPIO_"+(j=w[$[e]][i].slicePriorToX("MFP_").sliceAfterX("_MFP").sliceAfterX("_")),g+=" SET_GPIO_"+j,b=!0}U+="();\r\n"}U+="\r\n return;\r\n}\r\n\r\n",L&&(d+=U)}else for(n=0,s=S.length;n0&&O(w[$[e]].join(),y,S[n])){for(b=!1,L=!0,U+=" "+F+$[e]+" &= ~(",g+=" "+F+$[e]+" &= ~(",i=w[$[e]].length-1;i>=0;i-=1)O(w[$[e]][i],y,S[n])&&(b&&(U+=" | ",g+=" | "),U+=p(C=w[$[e]][i].sliceAfterX(":")),g+=p(C),b=!0);for(U+=");\r\n",g+=");
",b=!1,U+=" "+F+$[e]+" |= (",g+=" "+F+$[e]+" |= (",i=w[$[e]].length-1;i>=0;i-=1)O(w[$[e]][i],y,S[n])&&(b&&(U+=" | ",g+=" | "),U+=C=w[$[e]][i].sliceAfterX(":"),g+=C,b=!0);U+=");\r\n",g+=");
"}for(U+="\r\n return;\r\n}\r\n\r\n",L?d+=U:g+=S[n]+" did not generate modularized code!!
",U="void "+E+"_deinit_"+S[n].toLowerCase()+"(void)\r\n{\r\n",L=!1,e=0,r=$.length;e0&&O(w[$[e]].join(),y,S[n])){for(b=!1,L=!0,U+=" "+F+$[e]+" &= ~(",i=w[$[e]].length-1;i>=0;i-=1)O(w[$[e]][i],y,S[n])&&(b&&(U+=" | "),U+=p(C=w[$[e]][i].sliceAfterX(":")),b=!0);U+=");\r\n"}U+="\r\n return;\r\n}\r\n\r\n",L&&(d+=U)}for("undefined"==typeof NUTOOL_PER?d+="void "+E+"_init(void)\r\n{\r\n":d+="void Pin_Init(void)\r\n{\r\n",e=0,r=$.length;e\{\}\[\]\\\/]/gi,"_").toUpperCase()).charAt(0))&&(C="_"+C),T+="#define "+C+" "+_.replace(/[.]/g,"").replace(/\s/g,"_").replace(/[`~!@#$%^&*()|+\-=?;:'",<>\{\}\[\]\\\/]/gi,"_")+"\r\n");"/* User-defined pins */\r\n"===T&&(T=""),$=null,A=null,S=null,D=null,w=null,gpio_MFPsDefine=null}function Yi(e,i){var n=Number(e).toString(16);for(i=null==i?i=8:i;n.lengthae/3?ae/3:18*qi(Re).length+20,0===_.length&&($("#rootTree_Pin")[0].appendChild(Qi("div","mfpTree","Loading...")),_=$("#mfpTree"),$("#ChipType").hover((function(){$(this).css("background-color","#FAFAFA"),en()}),(function(){$(this).css("background-color","#FFFFFF")})),$("#MCU").hover((function(){$(this).css("background-color","#FAFAFA"),en()}),(function(){$(this).css("background-color","#FFFFFF")}))),_[0].setAttribute("style","background-color: #FFFFFF; float:left; overflow-y: scroll; width:"+R+"px; height: "+se+"px; border-bottom: 5px solid #F2F2F2;"),-1!==o.indexOf("WLCSP")||-1!==o.indexOf("BGA")?ii?_.hover((function(){$(this).css("background-color","#FAFAFA"),en(),$("#pin_side_0").show(),$("#NUC_PinConfiguration_Canvas_Lining").hide()}),(function(){$(this).css("background-color","#FFFFFF"),$("#pin_side_0").hide(),$("#NUC_PinConfiguration_Canvas_Lining").show()})):_.hover((function(){$(this).css("background-color","#FAFAFA"),en(),$("#pin_side_0").css("opacity","0.8"),$("#NUC_PinConfiguration_Canvas_Lining").css("opacity","0")}),(function(){$(this).css("background-color","#FFFFFF"),$("#pin_side_0").css("opacity","0.1"),$("#NUC_PinConfiguration_Canvas_Lining").css("opacity","1")})):_.hover((function(){$(this).css("background-color","#FAFAFA"),en()}),(function(){$(this).css("background-color","#FFFFFF")})),_.jstree({json_data:{data:g},themes:{theme:"default",icons:!1},core:{animation:0},plugins:["themes","json_data","ui","crrm"]}).bind("hover_node.jstree",(function(e,i){var n=i.rslt.obj.attr("id").slicePriorToX(":"),t="";r&&NUTOOL_PIN.g_cfg_regDescriptions.hasOwnProperty(n)&&(-1===NUTOOL_PIN.g_cfg_regDescriptions[n].indexOf("nonexistent")&&(t="Simplified Chinese"===Ne||"Traditional Chinese"===Ne?"位址: ":"Address: "),et(n,t+=NUTOOL_PIN.g_cfg_regDescriptions[n],"right"))})).bind("dblclick.jstree",(function(e){var i=$(e.target).closest("li")[0].id;"mfp_tree"!==i&&void 0===Re.ALT_MFP&&"MINI55"!==l&&"NM1200"!==l&&_.jstree("rename",$("#"+i))})).bind("rename.jstree",(function(e,i){var n,t,r=i.rslt.obj.attr("id"),o=i.rslt.old_name,s=i.rslt.new_name;n=s,t=!1,"NANO100AN"===l||"NANO100BN"===l||"NANO112"===l?8===n.slice(n.toLowerCase().indexOf("0x")+2).length&&0===n.toLowerCase().indexOf("p")&&4===n.toLowerCase().lastIndexOf("_mfp")&&8===n.toLowerCase().lastIndexOf(":0x")&&(t=!0):"NM1500"===l||"M0519"===l||"M051DN_DE"===l||"M051BN"===l||"M051AN"===l||"M058S"===l||"MINI51AN"===l||"MINI51DE"===l||"MINI55"===l||"MINI58"===l||"NUC029AE"===l||"NUC029TAE"===l||"NUC029AN"===l||"NM1200"===l?8===n.slice(n.toLowerCase().indexOf("0x")+2).length&&0===n.toLowerCase().indexOf("p")&&2===n.toLowerCase().lastIndexOf("_mfp")&&6===n.toLowerCase().lastIndexOf(":0x")&&(t=!0):0===l.indexOf("ML5")||0===l.indexOf("MS51")||0===l.indexOf("MG51")||0===l.indexOf("MUG51")||0===l.indexOf("N76S003")||0===l.indexOf("N76E003")?8===n.slice(n.toLowerCase().indexOf("0x")+2).length&&0===n.toLowerCase().lastIndexOf("p")&&2===n.toLowerCase().lastIndexOf("mf")&&12===n.toLowerCase().lastIndexOf(":0x")&&(t=!0):0===l.indexOf("KM1M7CF")?(8===n.slice(n.toLowerCase().indexOf("0x")+2).length&&0===n.toLowerCase().lastIndexOf("iop")&&4===n.toLowerCase().lastIndexOf("md")||0===n.toLowerCase().lastIndexOf("fps")&&6===n.toLowerCase().lastIndexOf("_sel"))&&(t=!0):0===l.indexOf("KM1M7AF")||0===l.indexOf("KM1M7BF")||0===l.indexOf("KM1M4BF")?8===n.slice(n.toLowerCase().indexOf("0x")+2).length&&0===n.toLowerCase().lastIndexOf("iop")&&4===n.toLowerCase().lastIndexOf("md")&&6===n.toLowerCase().lastIndexOf(":0x")&&(t=!0):8!==n.slice(n.toLowerCase().indexOf("0x")+2).length||0!==n.toLowerCase().lastIndexOf("gp")||3!==n.toLowerCase().lastIndexOf("_mfp")||7!==n.toLowerCase().lastIndexOf(":0x")&&8!==n.toLowerCase().lastIndexOf(":0x")||(t=!0),t?(Ri(o),s=Bi(s),Zi()):_.jstree("rename_node",$("#"+r),o)})).bind("destroy.jstree",(function(){e=null,i=null,n=null,t=null,c=[],f=[],s=null,g=null,a=null,_=null,u=null,d=null})),_.css("font-size","16px"),_.css("font-family",'Monaco, Consolas, "Lucida Console", monospace;')}function Zi(){var e,i,n,t,r,l=[],o=0;for(e=0,n=(l=qi(Re)).length;e=0;n-=1)if(c=NUTOOL_PIN.g_cfg_gpios[t].f[n],parseInt(c.slice(c.indexOf(":")+1),10)=0;r-=1)0===l.indexOf("MA35D0")||0===l.indexOf("MA35H0")?0===NUTOOL_PIN.g_cfg_gpios[t].f[r].toUpperCase().indexOf(f+"_")&&NUTOOL_PIN.g_cfg_gpios[t].f.splice(r,1):0===NUTOOL_PIN.g_cfg_gpios[t].f[r].toUpperCase().indexOf(f)&&NUTOOL_PIN.g_cfg_gpios[t].f.splice(r,1);else if("PARTIAL"===u[e])for(t=0,d=NUTOOL_PIN.g_cfg_gpios.length;t=0;r-=1)NUTOOL_PIN.g_cfg_gpios[t].f[r].slicePriorToX(":").toUpperCase()===f&&NUTOOL_PIN.g_cfg_gpios[t].f.splice(r,1);else for(c=u[e]+":0",t=0,d=NUTOOL_PIN.g_cfg_gpios.length;t=0;r-=1)0===NUTOOL_PIN.g_cfg_gpios[t].f[r].toUpperCase().indexOf(f)&&NUTOOL_PIN.g_cfg_gpios[t].f.splice(r,1);break}for(e=(N=qi(NUTOOL_PIN.g_cfg_regDescriptions)).length-1;e>=0;e-=1)void 0===Re[N[e]]&&delete NUTOOL_PIN.g_cfg_regDescriptions[N[e]];for(je=[],e=0;e=y&&r=y+D&&r=y+D+w&&r4&&(i=i.slice(0,4)+".."),r.savedPinName[e]=i,r.ctx.font=B,r.ctx.fillStyle="black",r.ctx.fillText(i,Y+V,r.y[e]-r.y[0]+V+4*H/5);break;case 1:for(e=0;e4&&(i=i.slice(0,4)+".."),r.savedPinName[e]=i,r.ctx.font=B,r.ctx.fillStyle="black",r.ctx.fillText(i,Y+V,r.y[e]-r.y[r.oneSidePinNumber-1]+V+4*H/5)}else if(-1!==o.indexOf("WLCSP")||-1!==o.indexOf("BGA"))for(e=0;e6&&(i=i.slice(0,6)+".."),r.savedPinName[e]=i,r.ctx.font=B,r.ctx.fillStyle="black",r.ctx.fillText(i,r.x[e]-r.ctx.measureText(i).width/2,r.y[e]+parseInt(r.ctx.font,10)/2));else switch(r.whichSide){case 0:for(e=0;e4&&(i=i.slice(0,4)+".."),r.savedPinName[e]=i,r.ctx.font=B,r.ctx.fillStyle="black",n=r.x[e]-r.x[0]+V,t=Y+V+K,r.ctx.save(),r.ctx.translate(n,t),r.ctx.rotate(-Math.PI/2),r.ctx.fillText(i,Y,4*H/5),r.ctx.restore();break;case 1:for(e=0;e4&&(i=i.slice(0,4)+".."),r.savedPinName[e]=i,r.ctx.font=B,r.ctx.fillStyle="black",r.ctx.fillText(i,Y+V,r.y[e]-r.y[r.oneSidePinNumber-1]+V+4*H/5);break;case 2:for(e=0;e4&&(i=i.slice(0,4)+".."),r.savedPinName[e]=i,r.ctx.font=B,r.ctx.fillStyle="black",n=r.x[e]-r.x[r.oneSidePinNumber-1]+V,t=V+K,r.ctx.save(),r.ctx.translate(n,t),r.ctx.rotate(-Math.PI/2),r.ctx.textAlign="end",r.ctx.fillText(i,K,4*H/5),r.ctx.restore();break;case 3:for(e=0;e4&&(i=i.slice(0,4)+".."),r.savedPinName[e]=i,r.ctx.font=B,r.ctx.fillStyle="black",r.ctx.fillText(i,Y+V,r.y[e]-r.y[0]+V+4*H/5)}i=null,n=null,t=null},restore:function(){ge.removeContext($("#"+r.inner)),r=null},getMousePos:function(e,i){var n=e.getBoundingClientRect();return{x:i.clientX-n.left,y:i.clientY-n.top}},decideWhichPin:function(){var e,i,n;if(-1!==o.indexOf("WLCSP")||-1!==o.indexOf("BGA"))for(e=r.mousePosition.x-ce*Le/100,i=r.mousePosition.y-fe*Le/100,n=0;n=(r.x[n]-r.r)*Le/100&&e<=(r.x[n]+r.r)*Le/100&&i>=(r.y[n]-r.r)*Le/100&&i<=(r.y[n]+r.r)*Le/100){r.currentPinIndex=n;break}r.currentPinIndex=-1}else for(n=0;n=e&&r.mousePosition.x<=e+r.w*Le/100&&r.mousePosition.y>=r.y[n]*Le/100&&r.mousePosition.y<=(r.y[n]+r.h)*Le/100){r.currentPinIndex=n;break}r.currentPinIndex=-1}-1!==r.currentPinIndex?r.mouseEnter():r.mouseLeave()},mouseEnter:function(){var e,i,n,s,a,d,c,f,g,_,u,N;for(e=0,i=$e.length;e6&&(N=u.slice(0,6)+".."),r.ctx.font=B,r.ctx.fillStyle="black",r.ctx.fillText(N,r.x[n]-r.ctx.measureText(N).width/2,r.y[n]+parseInt(r.ctx.font,10)/2);else switch(r.whichSide){case 0:ii&&r.ctx.strokeRect(r.x[n]-r.x[0]+V,Y+V,r.w,r.h),r.ctx.fillRect(r.x[n]-r.x[0]+V,Y+V,r.w,r.h),r.ctx.font=B,r.ctx.fillStyle="black",s=r.x[n]-r.x[0]+V,a=Y+V+K,r.ctx.save(),r.ctx.translate(s,a),r.ctx.rotate(-Math.PI/2),r.ctx.fillText(r.savedPinName[n],Y,4*H/5),r.ctx.restore();break;case 1:ii&&r.ctx.strokeRect(Y+V,r.y[n]-r.y[r.oneSidePinNumber-1]+V,r.w,r.h),r.ctx.fillRect(Y+V,r.y[n]-r.y[r.oneSidePinNumber-1]+V,r.w,r.h),r.ctx.font=B,r.ctx.fillStyle="black",r.ctx.fillText(r.savedPinName[n],Y+V,r.y[n]-r.y[r.oneSidePinNumber-1]+V+4*H/5);break;case 2:ii&&r.ctx.strokeRect(r.x[n]-r.x[r.oneSidePinNumber-1]+V,V,r.w,r.h),r.ctx.fillRect(r.x[n]-r.x[r.oneSidePinNumber-1]+V,V,r.w,r.h),r.ctx.font=B,r.ctx.fillStyle="black",s=r.x[n]-r.x[r.oneSidePinNumber-1]+V,a=V+K,r.ctx.save(),r.ctx.translate(s,a),r.ctx.rotate(-Math.PI/2),r.ctx.textAlign="end",r.ctx.fillText(r.savedPinName[n],K,4*H/5),r.ctx.restore();break;case 3:ii&&r.ctx.strokeRect(Y+V,r.y[n]-r.y[0]+V,r.w,r.h),r.ctx.fillRect(Y+V,r.y[n]-r.y[0]+V,r.w,r.h),r.ctx.font=B,r.ctx.fillStyle="black",r.ctx.fillText(r.savedPinName[n],Y+V,r.y[n]-r.y[0]+4*H/5+V)}(!$i(u)||Si(u)||vi(u)||Ai(u))&&(Ai(u)?"AVDD/OPA_VDD"==u&&(d="AVDD + OPA_VDD"):$i(u)?Si(u)?0===l.indexOf("M2L31")?d="Can change function to Write_Protect_Pin by chip configuration":0===l.indexOf("KM1M4BF0")?d="When NDMOD pin input is L level, SWDCLK would be selected. Configurable only when NDMOD pin input is H level.":0===l.indexOf("KM1M4BF5")&&(d="When SELSWD.SWDEN = 1, SWDCLK would be selected. Configurable only when SELSWD.SWDEN = 0."):vi(u)&&(d="Simplified Chinese"===Ne?"此脚位包含CCDB功能，带下拉电阻(Rd_ccdb)，并不可被禁用。 当该管脚没用于UTCPD应用时，请检查Rd_ccdb的影响。":"Traditional Chinese"===Ne?"此腳位包含CCDB功能，帶下拉電阻(Rd_ccdb)，並不可被禁用。 當該管腳沒用於UTCPD應用時，請檢查Rd_ccdb的影響。":"This pin includes CCDB function with a pull-low resistor(Rd_ccdb) that cannot be disabled. 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position:absolute; left:"+c+"px; top:"+f+"px;"),t.stage.setAttribute("width",t.w+3*ie),t.stage.setAttribute("height",t.h),t.ctx=ge.getContext(t.stage),t.ctx.font=g,t.ctx.strokeStyle="#000000",t.ctx.lineWidth=2,t.ctx.strokeRect(0,0,t.w+3*ie,t.h),t.ctx.fillStyle="#FFF6C0",t.ctx.fillRect(ne,ne,t.w+3*ie-2*ne,t.h-2*ne),t.ctx.fillStyle="#000000",t.ctx.fillText(d,ie,_),d=null))}},mouseLeave:function(){var e,t=r.lastPinIndex;if(-1!==r.lastPinIndex){if(r.ctx.strokeStyle="#000000",r.ctx.fillStyle=r.savedPinPadColor[t],-1!==o.indexOf("SOP"))switch(r.whichSide){case 0:ii&&r.ctx.strokeRect(Y+V,r.y[t]-r.y[0]+V,r.w,r.h),r.ctx.fillRect(Y+V,r.y[t]-r.y[0]+V,r.w,r.h),r.ctx.fillStyle="black",r.ctx.fillText(r.savedPinName[t],Y+V,r.y[t]-r.y[0]+4*H/5+V);break;case 1:ii&&r.ctx.strokeRect(Y+V,r.y[t]-r.y[r.oneSidePinNumber-1]+V,r.w,r.h),r.ctx.fillRect(Y+V,r.y[t]-r.y[r.oneSidePinNumber-1]+V,r.w,r.h),r.ctx.fillStyle="black",r.ctx.fillText(r.savedPinName[t],Y+V,r.y[t]-r.y[r.oneSidePinNumber-1]+V+4*H/5)}else if(-1!==o.indexOf("WLCSP")||-1!==o.indexOf("BGA"))-1===(e=""!==we[t]?rn(we[t]):r.savedPinName[t]).toLowerCase().indexOf("toolnotshow")&&(r.ctx.beginPath(),r.ctx.arc(r.x[t],r.y[t],r.r,0,2*Math.PI,!0),r.ctx.fill(),e.length>6&&(e=e.slice(0,6)+".."),r.ctx.font=B,r.ctx.fillStyle="black",r.ctx.fillText(e,r.x[t]-r.ctx.measureText(e).width/2,r.y[t]+parseInt(r.ctx.font,10)/2));else switch(r.whichSide){case 0:ii&&r.ctx.strokeRect(r.x[t]-r.x[0]+V,Y+V,r.w,r.h),r.ctx.fillRect(r.x[t]-r.x[0]+V,Y+V,r.w,r.h),r.ctx.fillStyle="black",i=r.x[t]-r.x[0]+V,n=Y+V+K,r.ctx.save(),r.ctx.translate(i,n),r.ctx.rotate(-Math.PI/2),r.ctx.fillText(r.savedPinName[t],Y,4*H/5),r.ctx.restore();break;case 1:ii&&r.ctx.strokeRect(Y+V,r.y[t]-r.y[r.oneSidePinNumber-1]+V,r.w,r.h),r.ctx.fillRect(Y+V,r.y[t]-r.y[r.oneSidePinNumber-1]+V,r.w,r.h),r.ctx.fillStyle="black",r.ctx.fillText(r.savedPinName[t],Y+V,r.y[t]-r.y[r.oneSidePinNumber-1]+V+4*H/5);break;case 2:ii&&r.ctx.strokeRect(r.x[t]-r.x[r.oneSidePinNumber-1]+V,V,r.w,r.h),r.ctx.fillRect(r.x[t]-r.x[r.oneSidePinNumber-1]+V,V,r.w,r.h),r.ctx.fillStyle="black",i=r.x[t]-r.x[r.oneSidePinNumber-1]+V,n=V+K,r.ctx.save(),r.ctx.translate(i,n),r.ctx.rotate(-Math.PI/2),r.ctx.textAlign="end",r.ctx.fillText(r.savedPinName[t],K,4*H/5),r.ctx.restore();break;case 3:ii&&r.ctx.strokeRect(Y+V,r.y[t]-r.y[0]+V,r.w,r.h),r.ctx.fillRect(Y+V,r.y[t]-r.y[0]+V,r.w,r.h),r.ctx.fillStyle="black",r.ctx.fillText(r.savedPinName[t],Y+V,r.y[t]-r.y[0]+4*H/5+V)}r.lastPinIndex=-1,ge.removeContext($("#"+r.inner+"_tooltip_pin")),t=null}},pinClickHandler:function(){var i,n,t,s,a,d,c,f,g=NUTOOL_PIN.g_cfg_pkgs[NUTOOL_PIN.g_packageNumberIndex][r.pin[r.currentPinIndex]-1],_=[],u=0,N=ge.getContext($("#NUC_PinConfiguration_Canvas")[0]),O=NUTOOL_PIN.g_cfg_pkgs[NUTOOL_PIN.g_packageNumberIndex].indexOf(g)+1;if(-1!==r.currentPinIndex&&dt(O))ct();else if(-1!==r.currentPinIndex)if(on(),"N9H30xxxIIM"===l&&-1!=g.indexOf("ADC")){switch(parseInt(g.sliceAfterX("."),10),s=Xi(g+=":0",parseInt(g.sliceAfterX("."),10)),a=r.x[r.currentPinIndex],d=r.y[r.currentPinIndex],u=60,g.slicePriorToX(":")){case"ADC3":_.push("VSENSE");break;case"ADC4":_.push("YM");break;case"ADC5":_.push("YP");break;case"ADC6":_.push("XM");break;case"ADC7":_.push("XP")}for(_.push("Reset"),ze=[],i=0,n=_.length;i100?d+i*ee:d+i*ee/Le*100,f="#6495ED",i!==n-1&&_[i]===we[r.pin[r.currentPinIndex]-1]&&(f=($.inArray(r.pin[r.currentPinIndex],Ye),Ce)),-1!==l.indexOf("KM1M7CF")){var p=Math.floor(i/10);ze[i]=sn().init(r.pin[r.currentPinIndex],i.toString(),_[i],u,a+r.w+u*p/Le*100+3*ie*p,t-10*p*ee/Le*100,f,!0)}else ze[i]=sn().init(r.pin[r.currentPinIndex],i.toString(),_[i],u,a+r.w,t,f,!0);c=(c=i.toString()).replaceSpecialCharacters(),$("#Pin_MultiFunction_Selection_"+c).hover(ze[i].mouseEnter,ze[i].mouseLeave),ze[i].draw()}}else if($i(g)){for(parseInt(g.sliceAfterX("."),10),s=Xi(g+=":0",parseInt(g.sliceAfterX("."),10)),-1!==o.indexOf("WLCSP")||-1!==o.indexOf("BGA")?(a=r.x[r.currentPinIndex]+ce,d=r.y[r.currentPinIndex]+fe+10):(a=r.x[r.currentPinIndex],d=r.y[r.currentPinIndex]),i=0,n=NUTOOL_PIN.g_cfg_gpios[s].f.length;iu&&(u=N.measureText(_[i]).width);for(_.push("Reset"),ze=[],i=0,n=_.length;i100?d+i*ee:d+i*ee/Le*100,f="#6495ED",i!==n-1&&_[i]===we[r.pin[r.currentPinIndex]-1]&&(f=($.inArray(r.pin[r.currentPinIndex],Ye),Ce)),-1!==l.indexOf("KM1M7CF")){p=Math.floor(i/10);ze[i]=sn().init(r.pin[r.currentPinIndex],i.toString(),_[i],u,a+r.w+u*p/Le*100+3*ie*p,t-10*p*ee/Le*100,f,!0)}else ze[i]=sn().init(r.pin[r.currentPinIndex],i.toString(),_[i],u,a+r.w,t,f,!0);c=(c=i.toString()).replaceSpecialCharacters(),$("#Pin_MultiFunction_Selection_"+c).hover(ze[i].mouseEnter,ze[i].mouseLeave),ze[i].draw()}}g=null,_=[],u=null,N=null,t=null,s=null,e=null,a=null,d=null,c=null,f=null}};return r}function on(){var e,i;for(e=0,i=ze.length;e0&&"Reset"!==i.label&&("MA35D0"===l||"MA35D1"===l||"MA35H0"===l||!$i(i.label))&&"unknown"!==(s=dn(i.label,i.pin))){for(e.stage=$("#panel")[0].appendChild(Qi("canvas",i.inner+"_tooltip")),a=s.split("
"),e.w=0,n=0,t=a.length;ne.w&&(e.w=i.ctx.measureText(a[n]).width);for(-1!==o.indexOf("SOP")||-1!==o.indexOf("WLCSP")||-1!==o.indexOf("BGA")?i.pin>v/2?e.stage.setAttribute("style","z-index:2; position:absolute; left:"+(i.positionX-e.w-3*ie-ne)+"px; top:"+i.positionY+"px;"):e.stage.setAttribute("style","z-index:2; position:absolute; left:"+(i.positionX+i.w+3*ie+ne)+"px; top:"+i.positionY+"px;"):i.pin>y/2&&i.pin<=y+D+w/2?e.stage.setAttribute("style","z-index:2; position:absolute; left:"+(i.positionX-e.w-3*ie-ne)+"px; top:"+i.positionY+"px;"):e.stage.setAttribute("style","z-index:2; position:absolute; left:"+(i.positionX+i.w+3*ie+ne)+"px; top:"+i.positionY+"px;"),e.stage.setAttribute("width",e.w+3*ie),e.stage.setAttribute("height",i.h*a.length),L||e.stage.setAttribute("innerText",s),e.ctx=ge.getContext(e.stage),e.ctx.font=i.ctx.font,e.ctx.strokeStyle="#000000",e.ctx.lineWidth=2,e.ctx.strokeRect(0,0,e.w+3*ie,i.h*a.length),e.ctx.fillStyle="#FFF6C0",e.ctx.fillRect(ne,ne,e.w+3*ie-2*ne,i.h*a.length-2*ne),e.ctx.fillStyle="#000000",n=0,t=a.length;n

'+r+'

').dialog({modal:!1,resizable:!1,title:t,width:500,height:"auto",show:"fade",hide:"fade",close:function(){$("#noticeForMultipleSelectionsDialog").dialog("destroy")},buttons:[{text:l,click:function(){e(),$("#noticeForMultipleSelectionsDialog").dialog("isOpen")&&$("#noticeForMultipleSelectionsDialog").dialog("destroy")}},{text:o,click:function(){on(),$("#noticeForMultipleSelectionsDialog").dialog("isOpen")&&$("#noticeForMultipleSelectionsDialog").dialog("destroy")}}]}));t=null,r=null,l=null,o=null}((function(){an(r,i.pin,i.label)}),i.label,tn(a))):an(Hi(t.slicePriorToX("_")),i.pin,i.label),s=null,a=null}t=null}};return i}function an(e,i,n){var t,r,l,o,s=$("#moduleTree"),a=we[i-1]+"_Pin"+i,d=[];if(a=a.replaceSpecialCharacters(),s.jstree("uncheck_node",$("#"+a)),!$("#"+a).hasClass("jstree-unchecked")){if(l=Hi(a.slicePriorToX("_")),(o=[])[0]=i,Oi(a,l,o),void 0!==Ke[l]){for(t=0,r=Ke[l].length;tNote:"),s=!1,-1!==r.indexOf("@")&&(l=l.slice(l.indexOf("@")+1,l.indexOf(":")),s=!0),!(0!==r.indexOf(e+":")&&0!==r.indexOf(e+"@")||s&&l!==NUTOOL_PIN.g_cfg_pkgs[NUTOOL_PIN.g_packageNumberIndex][i-1])){o=!0;break}return n=null,t=null,r=o?r.slice(r.indexOf(":")+1):"unknown"}function cn(){je=[],ye=[],Re=[],Ge=[],De=[],we=[],ve=[],Ye=[],void 0!==Hi.specialModuleNames&&delete Hi.specialModuleNames,si(),on(),$("#panel").unbind("mouseenter mouseleave"),ge.removeContext($("#NUC_PinConfiguration_Canvas")),ge.removeContext($("#NUC_PinConfiguration_Canvas_Lining")),$("#mfpTree").jstree("destroy"),$("#supportedModules").jstree("destroy"),$("#moduleTree").jstree("destroy"),$("#mfpTree").remove(),$("#supportedModules").remove(),$("#moduleTree").remove(),$("div").remove(".tooltip")}function fn(){var e,i,n=$("#MCUselect"),r={},s=[],a=!1;for(n.children().length>0&&n.children().remove(),e=0,i=NUTOOL_PIN.g_cfg_chips.length;e=0;r-=1)d[r]&&null!==d[r].getAttribute(a)&&(d[r].getAttribute(a)===e||d[r].getAttribute(a)===c)&&d[r].parentNode.removeChild(d[r]);for(d[0].parentNode.appendChild(l),"undefined"!=typeof NUTOOL_PER&&"js"===n&&(e="PinConfigure/"+e,i="PinConfigure/"+i),"PeripheralConfigure/"!==i&&(o=Nn(i,n),"function"==typeof t&&(o.onload=function(){t()})),!L&&window.console&&window.console.log("In replacejscssfile, oldfilename:"+e+" / newfilename:"+i),r=d.length;r>=0;r-=1)d[r]&&null!==d[r].getAttribute(a)&&(d[r].getAttribute(a)===e||d[r].getAttribute(a)===i)&&d[r].parentNode.removeChild(d[r]);d[0].parentNode.appendChild(o)}function pn(){$("#conflictDialog").dialog("isOpen")&&$("#conflictDialog").dialog("destroy"),$("#adjustedModulesDialog").dialog("isOpen")&&$("#adjustedModulesDialog").dialog("destroy"),$("#warningForSavingDialog").dialog("isOpen")&&$("#warningForSavingDialog").dialog("destroy"),$("#showPinErrorDialog").dialog("isOpen")&&$("#showPinErrorDialog").dialog("destroy"),$("#noticeForMultipleSelectionsDialog").dialog("isOpen")&&$("#noticeForMultipleSelectionsDialog").dialog("destroy"),$("#generateCodeDialog").dialog("isOpen")&&$("#generateCodeDialog").dialog("destroy"),$("#printReportDialog").dialog("isOpen")&&$("#printReportDialog").dialog("destroy"),$("#runAnotherToolDialog").dialog("isOpen")&&$("#runAnotherToolDialog").dialog("destroy"),$("#connectToTargetDialog").dialog("isOpen")&&$("#connectToTargetDialog").dialog("destroy"),$("#languageDialog").dialog("isOpen")&&$("#languageDialog").dialog("destroy")}function hn(){var e,i,n,t,r,l,o=ge.getContext($("#NUC_PinConfiguration_Canvas")[0]),s=0;"Simplified Chinese"===Ne?(n="被用户配置",t="悬停工具提示",r="滑鼠焦点",l="非可配置的","双击用户定义",o.font="12px 新細明體"):"Traditional Chinese"===Ne?(n="被使用者配置",t="懸停工具提示",r="滑鼠焦點",l="非可配置的","雙擊用戶定義",o.font="12px 新細明體"):(n="Configured by User",t="Tooltip on Hover",r="Focused by Mouse",l="Not Configurable","Dblclicked for UserDefined",o.font=B),o.strokeStyle="black",e=ce-xe-K-Ie,i=fe-Te-(s+=1)*(H+Me),o.strokeRect(e,i,K,H),o.fillStyle=Ce,o.fillRect(e,i,K,H),o.fillStyle="black",o.fillText(n,e+K+3,i+4*H/5),e=ce-xe-K-Ie,i=fe-Te-(s+=1)*(H+Me),o.strokeRect(e,i,K,H),o.fillStyle=me,o.fillRect(e,i,K,H),o.fillStyle="black",o.fillText(t,e+K+3,i+4*H/5),e=ce-xe-K-Ie,i=fe-Te-(s+=1)*(H+Me),o.strokeRect(e,i,K,H),o.fillStyle=Ue,o.fillRect(e,i,K,H),o.fillStyle="black",o.fillText(r,e+K+3,i+4*H/5),e=ce-xe-K-Ie,i=fe-Te-(s+=1)*(H+Me),o.strokeRect(e,i,K,H),o.fillStyle=be,o.fillRect(e,i,K,H),o.fillStyle="black",o.fillText(l,e+K+3,i+4*H/5)}function Pn(e,i,n){var t,r,o,s,a,d;for(i=i.restorePinTreeNodeName().restoreSpecialCharacters(),d=(a=NUTOOL_PIN.g_cfg_pkgs[NUTOOL_PIN.g_packageNumberIndex][e])+":0",t=0,o=NUTOOL_PIN.g_cfg_gpios.length;t>>0:0}}break}break}-1!==l.indexOf("KM1M4BF5")&&(0!=we.filter((function(e){return/DBG_SWDD/.test(e)})).length||0!=we.filter((function(e){return/DBG_SWDCLK/.test(e)})).length?Re.SELSWD=1:Re.SELSWD=0),t=null,r=null,o=null,s=null,a=null,d=null}function xn(){yi(),"none"===$("#mfpTree").css("display")?$("#moduleTree").height(ae-$("#supportedModules").height()):($("#mfpTree").height(se),$("#moduleTree").height(ae-$("#ChipType").height()-$("#MCU").height()-se-6-$("#supportedModules").height())),ai(),function(){var e,i,n,t,r=[];for(e=0,i=(r=qi(we)).length;e0&&a<1e3;)for(a+=1,e=parseInt(ye[0].slicePriorToX(":"),10),i=ve[e-1],r=-1,l=0,o=De[e-1];r!==l;)r=i.indexOf(o),l=i.lastIndexOf(o),n=Hi((t=(t=i.slice(r).slicePriorToX("/")+"_Pin"+e).replaceSpecialCharacters()).slicePriorToX("_")),s[0]=e,Oi(t,n,s),$("#"+t).removeClass("jstree-checked"),$("#"+t).addClass("jstree-unchecked"),$("#"+n+"_Root").removeClass("jstree-undetermined"),$("#"+n+"_Root").removeClass("jstree-checked"),$("#"+n+"_Root").addClass("jstree-unchecked"),i=i.slice(r+1);Zi(),$("#moduleTree").find("li").each((function(e,i){$("#"+$(i).attr("id")+" >a").css("color","black")})),$("#moduleTree").jstree("close_all"),ye=[],s=[],Ke=[],We=[],e=null,i=null,n=null,t=null,r=null,l=null,o=null,a=null}function Mn(e){var i,n,t,r,l,o,s,a,d,c,f,g,_,u,N,O,p,h,P,x,T,I,M,C,m,U=[],b="",L=[],k=!0;if(0!==NUTOOL_PIN.g_cfg_shareBits.length){for(void 0===(d=localStorage.getItem("UIlanguage"))||null==d?(I=" or ",M=" should be ",C=".",m="(configure it again)"):"Simplified Chinese"===d?(I="或",M="应为",C="。",m="(再次配置它)"):"Traditional Chinese"===d?(I="或",M="應為",C="。",m="(再次配置它)"):(I=" or ",M=" should be ",C=".",m="(configure it again)"),i=0,l=NUTOOL_PIN.g_cfg_shareBits.length;i>>0,x=P.slicePriorToX("["),f+=((Re[x]&c)>>>T)*Math.pow(2,t-1);for(N=we[_],g=0,p=Xi(u,parseInt(u.sliceAfterX("."),10)),t=1,s=NUTOOL_PIN.g_cfg_gpios[p].f.length;t>>0,x=P.slicePriorToX("["),Re[x]&c))for(c=1<>>0,r=1,a=NUTOOL_PIN.g_cfg_gpios[p].f.length;r"}}}k||e("shareBit",b)}return void 0!==Xe.USB&&-1!==(h=we.join()).indexOf("USB_D+")&&-1!==h.indexOf("USB_D-")&&-1===h.indexOf("USB_OTG_ID")&&(k=!1,e("USB_OTG_ID",b)),k}function Cn(e,i){var n,t,r,l=localStorage.getItem("UIlanguage");if("shareBit"===e)void 0===l||null==l?(n="Shared Bits Error",t="Some bits of GPIO registers would be configured by multiple multi-functions.These bits are called Shared Bits. The following corresponding relations between shared bits and multi-functions are incorrect.

"+i+"
Unless they are all fixed, the operations of saving configuration, generating code and printing report will not be permitted.",r="Confirm"):"Simplified Chinese"===l?(n="共享位元错误",t="一些寄存器位元可能被复数个多功能给设置。这些位元称之为共享位元。下面共享位元与多功能组成的对应关系会是不正确的。

"+i+"
除非它们都被修正，否则存档丶产生程式码及印出报告这些操作将不被允许。",r="确定"):"Traditional Chinese"===l?(n="共享位元錯誤",t="一些暫存器位元可能被複數個多功能給設置。這些位元稱之為共享位元。下面共享位元與多功能組成的對應關係會是不正確的。

"+i+"
除非它們都被修正，否則存檔、產生程式碼及印出報告這些操作將不被允許。",r="確定"):(n="Shared Bits Error",t="Some bits of GPIO registers would be configured by multiple multi-functions.These bits are called Shared Bits. The following corresponding relations between shared bits and multi-functions are incorrect.

"+i+"
Unless they are all fixed, the operations of saving configuration, generating code and printing report will not be permitted.",r="Confirm");else{if("USB_OTG_ID"!==e)return;void 0===l||null==l?(n="Incorrect USB Settings",t="USB_OTG_ID must be configured when enabling USB.",r="Confirm"):"Simplified Chinese"===l?(n="不正确的USB设置",t="当USB开启时，USB_OTG_ID必须被设置。",r="确定"):"Traditional Chinese"===l?(n="不正確的USB設置",t="當USB開啟時，USB_OTG_ID必須被設置。",r="確定"):(n="Incorrect USB Settings",t="USB_OTG_ID must be configured when enabling USB.",r="Confirm")}pn(),$('

'+t+'

').dialog({modal:!1,resizable:!1,title:n,width:500,height:"auto",show:"fade",hide:"fade",close:function(){$("#showPinErrorDialog").dialog("destroy")},buttons:[{text:r,click:function(){$("#showPinErrorDialog").dialog("isOpen")&&$("#showPinErrorDialog").dialog("destroy")}}]}),n=null,t=null,r=null,l=null}function mn(e,i){var n,t,r,l,o=localStorage.getItem("UIlanguage");if("shareBit"===e)void 0===o||null==o?(n="Shared Bit Error",t="Some bits of GPIO registers would be configured by multiple multi-functions.These bits are called Shared Bits. The following corresponding relations between shared bits and multi-functions are incorrect.

"+i+"
If you still want to close the application, please press Close. But all the configuration will be restored to the default.If you want to fix them, please press Fix.",r="Close",l="Fix"):"Simplified Chinese"===o?(n="共享位元错误",t="一些寄存器位元可能被复数个多功能给设置。这些位元称之为共享位元。下面共享位元与多功能组成的对应关系会是不正确的。

"+i+"
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for(r=0,l=Se.length;r0)$("#"+e.restorePinTreeNodeName()+"_Intermediate").find("li").each((function(i,n){(O=$(n).attr("id"))===e||!$("#"+O).hasClass("jstree-checked")&&-1===$.inArray(O,t)||(""!==P&&(g=P.slice(P.lastIndexOf("/")+1).slicePriorToX(";"))!==x[0].toString()&&"removed"!==g&&"end"!==g&&(P+=we[parseInt(g,10)-1]+":"+g+"/end;"),P+=e.restorePinTreeNodeName()+":"+x[0]+"/"+O.sliceAfterX("Pin")+";"),O!==e&&$("#"+O).removeClass("jstree-checked jstree-undetermined").addClass("jstree-unchecked")}));else for(o=0,s=Se.length;oa").css("color","blue"),0===$("#"+e.restorePinTreeNodeName()+"_Intermediate").find("li").length){for(a=0,d=We.length;a0){for(r=0;r0)$("#"+e.restorePinTreeNodeName()+"_Intermediate").find("li").each(I);else for(o=0,s=Se.length;oa").css("color","blue"),0===$("#"+e.restorePinTreeNodeName()+"_Intermediate").find("li").length){for(a=0,d=We.length;aa").css("color")||"rgb(255, 0, 0)"===$("#"+o+" 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>a").css("color","red"),!1}function u(e,i){if("red"===$("#"+$(i).attr("id")+" >a").css("color")||"rgb(255, 0, 0)"===$("#"+$(i).attr("id")+" >a").css("color"))return $("#"+g[t]+" >a").css("color","red"),!1}if(n)for(;""!==c;)-1!==c.indexOf("/")?(s=c.slicePriorToX("/")+"_Pin"+i,a=c.slicePriorToX("/")+"_Intermediate"):(s=c+"_Pin"+i,a=c+"_Intermediate"),s=s.replaceSpecialCharacters(),a=a.replaceSpecialCharacters(),e=e.replaceSpecialCharacters(),s.restorePinTreeNodeName()!==e.restorePinTreeNodeName()?"red"===$("#"+s+" >a").css("color")&&"rgb(255, 0, 0)"===$("#"+s+" >a").css("color")||($("#"+s+" >a").css("color","red"),$("#"+a+" >a").css("color","red"),-1!==s.indexOf("_")&&$("#"+Ki(s.slicePriorToX("_"))+"_Root >a").css("color","red")):"black"===$("#"+s+" >a").css("color")&&"rgb(0, 0, 0)"===$("#"+s+" >a").css("color")||($("#"+s+" >a").css("color","black"),$("#"+a+" >a").css("color","black"),-1===$.inArray(a,f)&&f.push(a),-1!==s.indexOf("_")&&(d=Ki(s.slicePriorToX("_"))+"_Root",0===$("#"+d).find("li").length&&"red"===$("#"+d+" >a").css("color")||"rgb(255, 0, 0)"===$("#"+d+" >a").css("color")||($("#"+d+" >a").css("color","black"),-1===$.inArray(d,g)&&g.push(d)))),c=-1!==c.indexOf("/")?c.sliceAfterX("/"):"";else for(;""!==c;){if(-1!==c.indexOf("/")?(s=c.slicePriorToX("/")+"_Pin"+i,a=c.slicePriorToX("/")+"_Intermediate"):(s=c+"_Pin"+i,a=c+"_Intermediate"),s=s.replaceSpecialCharacters(),a=a.replaceSpecialCharacters(),s.restorePinTreeNodeName()===we[i-1].replaceSpecialCharacters()||""===we[i-1]){if(("black"!==$("#"+s+" >a").css("color")||"rgb(0, 0, 0)"!==$("#"+s+" >a").css("color"))&&($("#"+s+" >a").css("color","black"),$("#"+a+" >a").css("color","black"),-1===$.inArray(a,f)&&f.push(a),-1!==s.indexOf("_")&&(d=Ki(s.slicePriorToX("_"))+"_Root","red"===$("#"+d+" >a").css("color")||"rgb(255, 0, 0)"===$("#"+d+" >a").css("color"))))if($("#"+d+" >a").css("color","black"),0!==$("#"+d).find("li").length)-1===$.inArray(d,g)&&g.push(d);else for(d=d.restorePinTreeNodeName(),t=0,l=je[d].length;ta").css("color","red");break}}else"red"===$("#"+s+" >a").css("color")&&"rgb(255, 0, 0)"===$("#"+s+" >a").css("color")||($("#"+s+" >a").css("color","red"),$("#"+a+" >a").css("color","red"),-1!==s.indexOf("_")&&$("#"+Ki(s.slicePriorToX("_"))+"_Root >a").css("color","red"));c=-1!==c.indexOf("/")?c.sliceAfterX("/"):""}for(t=0,l=f.length;t15||0===e.toLowerCase().indexOf("pin:")&&4===e.length)return c.jstree("close_all"),c.jstree("clear_search"),void(""!==e?(Ui(),e.length<2?Ii("最小输入字元为两个。请更换至更合适的搜寻。","最小輸入字元為兩個。請更換至更合適的搜尋。","The minimum inputting characters are two. Please change to a proper search."):Ii("预期的搜寻将花费很多时间。请更换至更合适的搜寻。","預期的搜尋將花費很多時間。請更換至更合適的搜尋。","The expected search will take much time. Please change to a proper search."),f.val("")):f.val(""));try{if(-1!==e.toLowerCase().indexOf("pin:")){if(-1!==(e=e.slice(e.toLowerCase().indexOf("pin:")+4)).indexOf(")")&&(e=e.slicePriorToX(")")),parseInt(e,10)>v)return;for(a=ve[parseInt(e,10)-1],N=[],i=0,n=a.length;i";if(""!==e&&void 0!==e){for(0!==NUTOOL_PIN.g_cfg_gpiosDefines.length&&NUTOOL_PIN.g_cfg_gpiosDefines[0].f.length>1&&0===NUTOOL_PIN.g_cfg_gpiosDefines[0].f[1].indexOf("GPIO:GPIO_")&&(a="GPIO_MD->"),Fe=[];-1!==e.indexOf("GPIOpin:");)t=(i=e.slice(e.indexOf("GPIOpin:"))).slice(i.indexOf("GPIOpin:")+8,i.indexOf("\r\n")),$i(o=NUTOOL_PIN.g_cfg_pkgs[NUTOOL_PIN.g_packageNumberIndex][parseInt(t,10)])&&(void 0===Fe?Fe[0]=parseInt(t,10):Fe.push(parseInt(t,10))),e=i.slice(1);for(Ve={};-1!==e.indexOf("UserDefined:");)o=(t=(n=e.slice(e.indexOf("UserDefined:"))).slice(n.indexOf("UserDefined:")+12,n.indexOf("\r\n"))).sliceAfterX("=>"),t=t.slicePriorToX("=>"),Ve[t]=o,e=n.slice(1);for(e=s;-1!==e.indexOf(a);)l=(r=e.sliceAfterX(a)).slice(r.indexOf(" = ")+3,r.indexOf("\r\n")),isNaN(parseInt(l.slice(2),16))?Ii("寄存器的值"+r.slicePriorToX("\r")+"存在一些错误，请更正它并重载配置档。","暫存器的值"+r.slicePriorToX("\r")+"存在一些錯誤，請更正它並重載配置檔。","The register value of "+r.slicePriorToX("\r")+" in the config file is incorrect.Please correct it and re-load the config file again."):Be[r.slicePriorToX(" = ")]=parseInt(l.slice(2),16),e=r.slice(1);for(e=s;-1!==e.indexOf("ALT_MFP");)l=(r=e.slice(e.indexOf("ALT_MFP"))).slice(r.indexOf(" = ")+3,r.indexOf("\r\n")),isNaN(parseInt(l.slice(2),16))?Ii("寄存器的值"+r.slicePriorToX("\r")+"存在一些错误，请更正它并重载配置档。","暫存器的值"+r.slicePriorToX("\r")+"存在一些錯誤，請更正它並重載配置檔。","The register value of "+r.slicePriorToX("\r")+" in the config file is incorrect.Please correct it and re-load the config file again."):Be[r.slicePriorToX(" = ")]=parseInt(l.slice(2),16),e=r.slice(1)}i=null,t=null,r=null,l=null,s=null,o=null}(s)):(Ii("从配置档读出的封装名称 "+r+" 不正确","從配置檔讀出的封裝名稱 "+r+" 不正確。","The package name "+r+" read from the config file is incorrect."),""!==_&&""!==g&&On(_,g,"js"),o="undefined"==typeof NUTOOL_PER?void 0===NUTOOL_PIN.g_partNumber_package_default||""===NUTOOL_PIN.g_partNumber_package_default?"NUC472VI8AE(LQFP100)":NUTOOL_PIN.g_partNumber_package_default:"M251EB2AE(TSSOP28)");NUTOOL_PIN.g_bSwitchSpeech8bitCPUMode&&rt();return e=null,i=null,a=null,N=[],O=[],n=null,r=null,t=null,g=null,_=null,d=null,null,u=null,bMismatchedRedundant=null,c=null,f}()||(e=!1),NUTOOL_PIN.decidepackageNumber(),Ci(),e}function Ci(){return 33===(v=parseInt(NUTOOL_PIN.g_packageNumber.slice(NUTOOL_PIN.g_packageNumber.indexOf(NUTOOL_PIN.g_packageNumber.match(/\d/))),10))&&(v=32),-1!==NUTOOL_PIN.g_packageNumberIndex.toLowerCase().indexOf("pin:")?(y=parseInt(NUTOOL_PIN.g_packageNumberIndex.sliceBetweenXandX("D","R"),10),D=parseInt(NUTOOL_PIN.g_packageNumberIndex.sliceBetweenXandX("R","U"),10),w=parseInt(NUTOOL_PIN.g_packageNumberIndex.sliceBetweenXandX("U","L"),10),F=parseInt(NUTOOL_PIN.g_packageNumberIndex.sliceBetweenXandX("L",")"),10)):(y=v/4,D=v/4,w=v/4,F=v/4),E=Math.max(y,D,w,F),this}function mi(){return C=30,z=2,n=.95,M="\f",ge.getContext=function(e){return e.getContext("2d")},ge.removeContext=function(e){e.remove()},ge.addEvent=function(e,i,n){e.addEventListener(i,n,!1)},$("html").addClass("ie10+"),"undefined"==typeof NUTOOL_PER&&(On("","/tabulator/promise-polyfill.js","js"),On("","/tabulator/js/tabulator.js","js"),On("","/tabulator/css/tabulator.css","css")),!1}function Ui(){var e=localStorage.getItem("UIlanguage");Ne=void 0===e||null==e?"English":e,e=null}function bi(){var e=localStorage.getItem("DisplayTooltip");r=void 0===e||null==e||"No"!==e,e=null}function Li(){$(document).keypress((function(e){e.which}))}function ki(e){return!isNaN(parseFloat(e))&&isFinite(e)}function $i(e){return!(void 0===e||"P"!==e.slice(0,1)||"."!==e.slice(2,3)||!ki(e.sliceAfterX(".")))||(!(!NUTOOL_PIN.g_bSwitchSpeech8bitCPUMode||void 0===e||"B"!==e.slice(0,1)||"P"!==e.slice(1,2)||!ki(e.sliceAfterX(".")))||("N9H30xxxIIM"===l||"N9H31KxxIFC"===l)&&void 0!==e&&-1!=e.indexOf("ADC"))}function Ai(e){return!!(NUTOOL_PIN.g_cfg_Tooltip_Pin.length>0&&NUTOOL_PIN.g_cfg_Tooltip_Pin.includes(e))}function Si(e){return!!(NUTOOL_PIN.g_cfg_WPPin.length>0&&NUTOOL_PIN.g_cfg_WPPin.includes(e))}function vi(e){var i=Xi(e,parseInt(e.sliceAfterX("."),10));return"M2L31"==l&&!isNaN(i)&&("QFN33"==NUTOOL_PIN.g_packageNumber&&("PC.0"==e||"PC.1"==e)||NUTOOL_PIN.g_cfg_gpios[i].f.filter((function(e){return-1!=e.indexOf("CCDB")})).length>0)}function yi(){var e,i,n,t,r,l,s,a,d,c,f,g,_,u,N,O=0,p=0,h=0,x=0;if(0===$("#NUC_PinConfiguration_Canvas").length&&$("#panel")[0].appendChild(Qi("canvas","NUC_PinConfiguration_Canvas")),s=$("#NUC_PinConfiguration_Canvas")[0],(a=ge.getContext(s)).font=B,N=a.measureText("012345678901234567890123456789").width,z=ii?0:2,Z=20,-1!==o.indexOf("SOP")){for(e=0,t=v/2;e=0;n-=1)f+=NUTOOL_PIN.g_cfg_gpios[i].f[n].slicePriorToX(":"),0!==n&&(f+="/");break}for(""===f&&(f=d),ve[e]=f,_="",c=(d=NUTOOL_PIN.g_cfg_pkgs[NUTOOL_PIN.g_packageNumberIndex][e+v/2])+":0",i=0,r=NUTOOL_PIN.g_cfg_gpios.length;iO&&(O=a.measureText(f).width),a.measureText(_).width>h&&(h=a.measureText(_).width))}de=v/2*(K+z)-z+2*Z,Je?(O=0;n-=1)f+=NUTOOL_PIN.g_cfg_gpios[i].f[n].slicePriorToX(":"),0!==n&&(f+="/");break}""===f&&(f=d),ve[e]=f}de=Math.sqrt(v)*(2*W+z)-z+2*Z,ce=N+H+Q,fe=N+H+Q}else{for(e=0,t=y;e=0;n-=1)g+=NUTOOL_PIN.g_cfg_gpios[i].f[n].slicePriorToX(":"),0!==n&&(g+="/");break}""===g&&(g=d),ve[e]=g,Je&&a.measureText(g).width>p&&(p=a.measureText(g).width)}for(e=0,t=D;eh&&(h=a.measureText(_).width)}for(e=0,t=w;ex&&(x=a.measureText(u).width)}for(e=0,t=F;e=0;n-=1)f+=NUTOOL_PIN.g_cfg_gpios[i].f[n].slicePriorToX(":"),0!==n&&(f+="/");break}""===f&&(f=d),ve[e+y+D+w]=f,Je&&a.measureText(f).width>O&&(O=a.measureText(f).width)}de=E*(K+z)-z+2*Z,Je?(O>>0,t=(Re[d="G"+n+"_MFPL"]&~g)>>>0,i=i<<4*a>>>0,Re[d]=(t|i)>>>0):(g=15<<4*(a-8)>>>0,t=(Re[c="G"+n+"_MFPH"]&~g)>>>0,i=i<<4*(a-8)>>>0,Re[c]=(t|i)>>>0);else if("M0A21"===l||0===l.indexOf("M46")||0===l.indexOf("M2L31")||0===l.indexOf("M55M1"))n=e.slice(0,2),g=255<<8*((a=parseInt(e.slice(3),10))-4*(s=Math.floor(a/4)))>>>0,t=(Re[d="G"+n+"_MFP"+s]&~g)>>>0,i=i<<8*(a-4*s)>>>0,Re[d]=(t|i)>>>0;else if("MINI57"===l||"NM1120"===l)n=e.slice(0,2),g=15<<4*(a=parseInt(e.slice(3),10))>>>0,t=(Re[d="G"+n+"_MFP"]&~g)>>>0,i=i<<4*a>>>0,Re[d]=(t|i)>>>0;else if("NANO100AN"===l||"NANO100BN"===l||"NANO112"===l)n=e.slice(0,2),(a=parseInt(e.slice(3),10))<8&&(f=!0),f?(g=15<<4*a>>>0,t=(Re[d=n+"_L_MFP"]&~g)>>>0,i=i<<4*a>>>0,Re[d]=(t|i)>>>0):(g=15<<4*(a-8)>>>0,t=(Re[c=n+"_H_MFP"]&~g)>>>0,i=i<<4*(a-8)>>>0,Re[c]=(t|i)>>>0);else if(0===l.indexOf("ML5")||0===l.indexOf("MS51")||0===l.indexOf("MG51")||0===l.indexOf("MUG51")||0===l.indexOf("N76S003")||0===l.indexOf("N76E003"))n=e.slice(0,2),g=15<<4*(a=parseInt(e.slice(3),10))>>>0,t=(Re[d=n+"MF76543210"]&~g)>>>0,i=i<<4*a>>>0,Re[d]=(t|i)>>>0;else if(0===l.indexOf("KM1M7")||0===l.indexOf("KM1M4")||0===l.indexOf("KM1M0"))n=e.slice(0,2),g=15<<4*(a=parseInt(e.slice(3),10))>>>0,t=(Re[d="IO"+n+"MD"]&~g)>>>0,i=i<<4*a>>>0,Re[d]=(t|i)>>>0;else if("ISD9100"===l||"ISD9300"===l)n=e.slice(0,2),g=3<<2*(a=parseInt(e.slice(3),10))>>>0,t=(Re[d="G"+n+"_MFP"]&~g)>>>0,i=i<<2*a>>>0,Re[d]=(t|i)>>>0;else if("MINI55"===l||"NM1200"===l){for(_=0,r=NUTOOL_PIN.g_cfg_gpioMatrix.length;_>>0,N=0,i&1<>>0),t=(Re[n]&~g)>>>0,Re[n]=(t|N)>>>0;break}"P3.2"===e&&1===i&&(Re.PIN_SEL=0)}else for(_=0,r=NUTOOL_PIN.g_cfg_gpioMatrix.length;_>>0,N=0,i&1<>>0),t=(Re[n]&~g)>>>0,Re[n]=(t|N)>>>0;break}n=null,g=null,t=null,_=null,u=null,r=null,o=null,s=null,N=null,O=null,a=null,d=null,c=null,f=null}function Xi(e,i){var n,t,r,o=-1;return NUTOOL_PIN.g_bSwitchSpeech8bitCPUMode&&(t=parseInt(e.sliceAfterX("BP").slicePriorToX("."))+65,r=String.fromCharCode(t),e=e.replace(/BP[0-9]{1,}\./,"P"+r+".")),e=e.replace("GP","P"),"M0519"===l||"M051DN_DE"===l||"M051BN"===l||"M051AN"===l||"M058S"===l||"MINI51AN"===l||"MINI51DE"===l||"MINI55"===l||"MINI58"===l||"NUC029AE"===l||"NUC029TAE"===l||"NUC029AN"===l||"NM1200"===l||"NM1500"===l?n=8*parseInt(e.slice(1,2),16)+parseInt(e.slice(3),10):0===l.indexOf("ML5")||0===l.indexOf("MS51")||0===l.indexOf("MG51")||0===l.indexOf("MUG51")||0===l.indexOf("N76S003")||0===l.indexOf("N76E003")?n=8*parseInt(e.slice(1,2),16)+i:0===l.indexOf("KM1M7")||0===l.indexOf("KM1M4")||0===l.indexOf("KM1M0")?(o=e.indexOf("P"),n=8*parseInt(e.slice(o+1,o+2),16)+i):n="MINI57"===l||"NM1120"===l||"M0A21"===l?8*(e.slice(1,2).charCodeAt(0)-"A".charCodeAt(0))+i:16*(e.slice(1,2).charCodeAt(0)-"A".charCodeAt(0))+i,n}function Bi(e){var i,n,t,r,o,s,a,d,c,f,g,_,u,N,O,p,h,x,P,T=[],I=$("#moduleTree");if(s=a=parseInt(e.toLowerCase().slice(e.indexOf("0x")+2),16),"NUC400"===l||"M451HD"===l||"M451LD"===l||"M4521"===l||"NANO100AN"===l||"NANO100BN"===l||"NANO112"===l||"NUC505"===l||"NUC121AE"===l||"NUC123AE"===l||"NANO103"===l||0===l.indexOf("M47")||"M433"===l||"M480MD"===l||"M480LD"===l||"AX58200"===l||0===l.indexOf("M25")||"M261"===l||0===l.indexOf("M235")||0===l.indexOf("M029")||0===l.indexOf("M030")||0===l.indexOf("M031")||0===l.indexOf("M091")||"M0564"===l||"M05641"===l||0===l.indexOf("NUC126")||"M071QV"===l||"NUC029xGE"===l||"NUC029KGE"===l||"MINI57"===l||"NM1120"===l||"NDA102"===l||"MA35D0"===l||"MA35D1"===l||"MA35H0"===l||0===l.indexOf("M2003")||0===l.indexOf("N9H30")||0===l.indexOf("N9H31")||0===l.indexOf("NUC97")||0===l.indexOf("NUC98")||0===l.indexOf("M2A23"))for(P=-1===e.indexOf("MFPH")&&-1===e.indexOf("_H_MFP"),i=0;i<8;i+=1){if(c=(a&(d=15<<4*i>>>0))>>>4*i>>>0)if(f=P?i:i+8,g="P"+e.slice(e.indexOf("P")+1,e.indexOf("P")+2)+"."+f.toString(),NUTOOL_PIN.g_bSwitchSpeech8bitCPUMode&&(code=g.charCodeAt(1)-65,g=g.replace(/P[A-Z]\./,"BP"+code+".")),-1!==(u=$.inArray(g,NUTOOL_PIN.g_cfg_pkgs[NUTOOL_PIN.g_packageNumberIndex]))){for(O="",N=Xi(e,f),n=1,r=NUTOOL_PIN.g_cfg_gpios[N].f.length;n>>0))>>>8*i>>>0)if(f=i+4*x,g="P"+e.slice(e.indexOf("P")+1,e.indexOf("P")+2)+"."+f.toString(),NUTOOL_PIN.g_bSwitchSpeech8bitCPUMode&&(code=g.charCodeAt(1)-65,g=g.replace(/P[A-Z]\./,"BP"+code+".")),-1!==(u=$.inArray(g,NUTOOL_PIN.g_cfg_pkgs[NUTOOL_PIN.g_packageNumberIndex]))){for(O="",N=Xi(e,f),n=1,r=NUTOOL_PIN.g_cfg_gpios[N].f.length;n>>0))>>>4*i>>>0)if(f=i,g="P"+e.slice(e.indexOf("P")+1,e.indexOf("P")+2)+"."+f.toString(),NUTOOL_PIN.g_bSwitchSpeech8bitCPUMode&&(code=g.charCodeAt(1)-65,g=g.replace(/P[A-Z]\./,"BP"+code+".")),-1!==(u=$.inArray(g,NUTOOL_PIN.g_cfg_pkgs[NUTOOL_PIN.g_packageNumberIndex]))){for(O="",N=Xi(e,f),n=1,r=NUTOOL_PIN.g_cfg_gpios[N].f.length;n>>0))>>>2*i>>>0)if(f=i,g="P"+e.slice(e.indexOf("P")+1,e.indexOf("P")+2)+"."+f.toString(),NUTOOL_PIN.g_bSwitchSpeech8bitCPUMode&&(code=g.charCodeAt(1)-65,g=g.replace(/P[A-Z]\./,"BP"+code+".")),-1!==(u=$.inArray(g,NUTOOL_PIN.g_cfg_pkgs[NUTOOL_PIN.g_packageNumberIndex]))){for(N=Xi(e,f),O="",n=1,r=NUTOOL_PIN.g_cfg_gpios[N].f.length;n>>0))>>>i>>>0){for(p=e.slice(e.indexOf("P"),e.indexOf(":"))+"["+i+"]",n=0,r=NUTOOL_PIN.g_cfg_gpioMatrix.length;n>>0,h.slicePriorToX("["),c+=((a&d)>>>x)*Math.pow(2,t-1),a&=~d;for(N=8*parseInt(g.slice(1,2),16)+parseInt(g.slice(3),10),O="",t=1,o=NUTOOL_PIN.g_cfg_gpios[N].f.length;t>>0);continue}_=Ki(_=O),O=O.replaceSpecialCharacters(),-1!==_.indexOf("_")&&(_=_.slicePriorToX("_")),T[0]=u+1,I.jstree("check_node",$("#"+O+"_Pin"+(u+1))),$("#"+O+"_Pin"+(u+1)).hasClass("jstree-checked")||(I.jstree("open_node",$("#"+_+"_Root")),I.jstree("open_node",$("#"+O+"_Intermediate")),I.jstree("check_node",$("#"+O+"_Pin"+(u+1))));break}}-1===u&&(s&=~d)}if(0===a)break}return e=e.slice(0,e.indexOf("0x")+2)+Yi(s),null,i=null,n=null,null,null,r=null,s=null,a=null,d=null,c=null,f=null,g=null,_=null,T=[],u=null,N=null,O=null,I=null,p=null,h=null,null,x=null,e}function Ri(e){var i,n,t,r,o,s,a,d,c,f,g,_,u,N,O,p=parseInt(e.toLowerCase().slice(e.indexOf("0x")+2),16),h=[];if("NUC400"===l||"M451HD"===l||"M451LD"===l||"M4521"===l||"NANO100AN"===l||"NANO100BN"===l||"NANO112"===l||"NUC505"===l||"NUC121AE"===l||"NUC123AE"===l||"NANO103"===l||0===l.indexOf("M47")||"M433"===l||"M480MD"===l||"M480LD"===l||"AX58200"===l||0===l.indexOf("M25")||"M261"===l||0===l.indexOf("M235")||0===l.indexOf("M029")||0===l.indexOf("M030")||0===l.indexOf("M031")||0===l.indexOf("M091")||"M0564"===l||"M05641"===l||0===l.indexOf("NUC126")||"M071QV"===l||"NUC029xGE"===l||"NUC029KGE"===l||"MINI57"===l||"NM1120"===l||"NDA102"===l||"MA35D0"===l||"MA35D1"===l||"MA35H0"===l||0===l.indexOf("M2003")||0===l.indexOf("N9H30")||0===l.indexOf("N9H31")||0===l.indexOf("NUC97")||0===l.indexOf("NUC98")||0===l.indexOf("M2A23"))for(O=-1===e.indexOf("MFPH")&&-1===e.indexOf("_H_MFP"),n=0;n<8;n+=1)if((p&15<<4*n>>>0)>>>4*n>>>0,c=O?n:n+8,f="P"+e.slice(e.indexOf("P")+1,e.indexOf("P")+2)+"."+c.toString(),-1!==(u=$.inArray(f,NUTOOL_PIN.g_cfg_pkgs[NUTOOL_PIN.g_packageNumberIndex]))&&""!==we[u]&&(g=(g=we[u]+"_Pin"+(u+1)).replaceSpecialCharacters(),$("#moduleTree").jstree("uncheck_node",$("#"+g)),!$("#"+g).hasClass("jstree-unchecked")&&(_=Ki(g.slicePriorToX("_")),h[0]=u+1,Oi(g,_,h),$("#"+g).addClass("jstree-unchecked"),void 0!==He[_]))){for(i=0,o=He[_].length;i>>0)>>>8*n>>>0,c=n+4*d,f="P"+e.slice(e.indexOf("P")+1,e.indexOf("P")+2)+"."+c.toString(),-1!==(u=$.inArray(f,NUTOOL_PIN.g_cfg_pkgs[NUTOOL_PIN.g_packageNumberIndex]))&&""!==we[u]&&(g=(g=we[u]+"_Pin"+(u+1)).replaceSpecialCharacters(),$("#moduleTree").jstree("uncheck_node",$("#"+g)),!$("#"+g).hasClass("jstree-unchecked")&&(_=Ki(g.slicePriorToX("_")),h[0]=u+1,Oi(g,_,h),$("#"+g).addClass("jstree-unchecked"),void 0!==He[_]))){for(i=0,o=He[_].length;i>>0)>>>4*n>>>0,c=n,f="P"+e.slice(e.indexOf("P")+1,e.indexOf("P")+2)+"."+c.toString(),-1!==(u=$.inArray(f,NUTOOL_PIN.g_cfg_pkgs[NUTOOL_PIN.g_packageNumberIndex]))&&""!==we[u]&&(g=(g=we[u]+"_Pin"+(u+1)).replaceSpecialCharacters(),$("#moduleTree").jstree("uncheck_node",$("#"+g)),!$("#"+g).hasClass("jstree-unchecked")&&(_=Ki(g.slicePriorToX("_")),h[0]=u+1,Oi(g,_,h),$("#"+g).addClass("jstree-unchecked"),void 0!==He[_]))){for(i=0,o=He[_].length;i>>0)>>>2*n>>>0,c=n,f="P"+e.slice(e.indexOf("P")+1,e.indexOf("P")+2)+"."+c.toString(),-1!==(u=$.inArray(f,NUTOOL_PIN.g_cfg_pkgs[NUTOOL_PIN.g_packageNumberIndex]))&&""!==we[u]&&(g=(g=we[u]+"_Pin"+(u+1)).replaceSpecialCharacters(),$("#moduleTree").jstree("uncheck_node",$("#"+g)),!$("#"+g).hasClass("jstree-unchecked")&&(_=Ki(g.slicePriorToX("_")),h[0]=u+1,Oi(g,_,h),$("#"+g).addClass("jstree-unchecked"),void 0!==He[_]))){for(i=0,o=He[_].length;i>>0)>>>n>>>0)for(N=e.slice(e.indexOf("P"),e.indexOf(":"))+"["+n+"]",t=0,s=NUTOOL_PIN.g_cfg_gpioMatrix.length;t";if("undefined"!=typeof NUTOOL_PER&&Hi(),"h"!==NUTOOL_PIN.g_pinFunctionString&&"dtsi"!==NUTOOL_PIN.g_pinFunctionString||a.sliceAfterX(".")===NUTOOL_PIN.g_pinFunctionString||(a=a.slicePriorToX(".")+"."+NUTOOL_PIN.g_pinFunctionString+'"\r\n'),d="",0!==NUTOOL_PIN.g_cfg_gpiosDefines.length&&NUTOOL_PIN.g_cfg_gpiosDefines[0].f.length>1&&0===NUTOOL_PIN.g_cfg_gpiosDefines[0].f[1].indexOf("GPIO:GPIO_")&&(w=""),k=qi(Re),"KM1M7CF"!==l&&k.sort(),0!==NUTOOL_PIN.g_cfg_gpiosDefines.length){if(-1===a.indexOf(".dtsi"))for(e=0,c=k.length;e0)for(i=y[k[e]].length-1;i>=0;i-=1)d+=" "+y[k[e]][i]+";\r\n",f=f+" "+y[k[e]][i]+";"}else if(0===l.indexOf("MS51")||0===l.indexOf("MG51")||0===l.indexOf("N76S003")||0===l.indexOf("N76E003")){for(e=0,c=k.length;e0)for(i=0,g=y[k[e]].length;iIOPnMD = 0x"+Yi(Re[k[e]]).toUpperCase()+"UL;\r\n";for(d+="\r\n","undefined"==typeof NUTOOL_PER&&(d+=" /* If the macros do not exist in your project, please refer to the corresponding header file in Header folder of the tool package */\r\n"),f="",e=0,c=k.length;e0)for(d+=" "+w+"GPIO_MD(0x"+k[e][3]+")->IOPnMD = ",f=f+" "+w+"GPIO_MD(0x"+k[e][3]+")->IOPnMD = ",i=y[k[e]].length-1;i>=0;i-=1)0!==i?(d+=y[k[e]][i]+" | ",f=f+y[k[e]][i]+" | "):(d+=y[k[e]][i]+";\r\n",f=f+y[k[e]][i]+";");else d+=" "+w+"GPIO_MD(0x"+k[e][3]+")->IOPnMD = 0x00000000;\r\n"}else if(0===l.indexOf("KM1M4BF")){for(e=0,c=k.length;eIOPnMD = 0x"+Yi(Re[k[e]]).toUpperCase()+"UL;\r\n":d+=" //"+w+"DBG->SELSWD = 0x"+Yi(Re[k[e]]).toUpperCase().slice(-2)+"UL;\r\n";for(d+="\r\n","undefined"==typeof NUTOOL_PER&&(d+=" /* If the macros do not exist in your project, please refer to the corresponding header file in Header folder of the tool package */\r\n"),f="",e=0,c=k.length;e0)for(d+=" "+w+"GPIO_MD"+k[e][3]+"->IOPnMD = ",f=f+" "+w+"GPIO_MD"+k[e][3]+"->IOPnMD = ",i=y[k[e]].length-1;i>=0;i-=1)0!==i?(d+=y[k[e]][i]+" | ",f=f+y[k[e]][i]+" | "):(d+=y[k[e]][i]+";\r\n",f=f+y[k[e]][i]+";");else d+=" "+w+"GPIO_MD"+k[e][3]+"->IOPnMD = 0x00000000;\r\n";else 0==Yi(Re[k[e]])?d+=" "+w+"DBG->SELSWD = DEBUG_INTERFACE_DISABLE;\r\n":d+=" "+w+"DBG->SELSWD = DEBUG_INTERFACE_ENABLE;\r\n"}else if(0===l.indexOf("KM1M7CF")){for(e=0,c=k.length;eIOPnMD = 0x"+Yi(Re[k[e]]).toUpperCase()+"UL;\r\n":d+=" //"+w+k[e].slicePriorToX("_")+"->FPS"+k[e][3]+"n_SEL = 0x"+Yi(Re[k[e]]).toUpperCase()+"UL;\r\n";for(d+="\r\n","undefined"==typeof NUTOOL_PER&&(d+=" /* If the macros do not exist in your project, please refer to the corresponding header file in Header folder of the tool package */\r\n"),f="",e=0,c=k.length;e0)for(d+=" "+w+"GPIO_MD"+k[e][3]+"->IOPnMD = ",f=f+" "+w+"GPIO_MD"+k[e][3]+"->IOPnMD = ",i=y[k[e]].length-1;i>=0;i-=1)0!==i?(d+=y[k[e]][i]+" | ",f=f+y[k[e]][i]+" | "):(d+=y[k[e]][i]+";\r\n",f=f+y[k[e]][i]+";");else d+=" "+w+"GPIO_MD"+k[e][3]+"->IOPnMD = 0x00000000;\r\n";else if(y[k[e]].length>0)for(d+=" "+w+k[e].slicePriorToX("_")+"->FPS"+k[e][3]+"n_SEL = ",f=f+" "+w+k[e].slicePriorToX("_")+"->FPS"+k[e][3]+"n_SEL = ",i=y[k[e]].length-1;i>=0;i-=1)0!==i?(d+=y[k[e]][i]+" | ",f=f+y[k[e]][i]+" | "):(d+=y[k[e]][i]+";\r\n",f=f+y[k[e]][i]+";");else d+=" "+w+k[e].slicePriorToX("_")+"->FPS"+k[e][3]+"n_SEL = 0x00000000;\r\n"}else if(0===l.indexOf("M55M1"))for(d+="\r\n",f="",e=0,c=we.length;e;\r\n};\r\n\r\n";for(d+="&pinctrl {\r\n",e=0,c=k.length;eU&&(U=y[k[e]][i].length);for(U+=1,C=k[e].toLowerCase(),d+=" "+C+" {\r\n pinctrl_"+C+": "+C+"grp {\r\n nuvoton,pins =\r\n",f+=" "+C+" {\r\n pinctrl_"+C+": "+C+"grp {\r\n nuvoton,pins =\r\n",i=0,g=y[k[e]].length;i0)for(d+=" "+w+k[e]+" = ",f=f+" "+w+k[e]+" = ",i=y[k[e]].length-1;i>=0;i-=1)0!==i?(d+=y[k[e]][i]+" | ",f=f+y[k[e]][i]+" | "):(d+=y[k[e]][i]+";\r\n",f=f+y[k[e]][i]+";");else d+=" "+w+k[e]+" = 0x00000000;\r\n"}}else{for(e=0,c=k.length;e\{\}\[\]\\\/]/gi,"_").toUpperCase()).charAt(0))&&(U="_"+U),T+="#define "+U+" "+x.replace(/[.]/g,"").replace(/\s/g,"_").replace(/[`~!@#$%^&*()|+\-=?;:'",<>\{\}\[\]\\\/]/gi,"_")+"\r\n");"/* User-defined pins */\r\n"===T&&(T=""),L||("STADC"===C&&""===f&&(f="We do not Have the Define for STADC;"),$("#NUC_PinConfiguration_Canvas")[0].setAttribute("innerHTML",f))}function zi(){var e,i,n,t,r,o,s,f,_,u,N,O,p,h,x,P,I,M,C,m,U,b,L,k=[],$=[],A=[],S="",y=[],D=[],w="SYS->",F=localStorage.getItem("ProjectName");for(O=function(e,i,n){return L=!1,(-1!==e.indexOf("_"+i)||-1!==e.indexOf(i+":")||0===e.indexOf(i+"_")||-1!==e.indexOf(","+i+"_")||-1!==e.lastIndexOf(i)&&e.lastIndexOf(i)+i.length===e.length||"GPIO"===i&&-1!==e.indexOf("_MFP_G"+n)||0===e.indexOf(i)&&-1!==e.indexOf("_FPS"))&&(L=!0),"GPIO"===i&&-1===e.indexOf("SYS_G"+n)&&-1===e.indexOf("SYS_MFP_"+n)&&-1===e.indexOf("SYS_"+n)&&-1===e.indexOf("MD_"+n)&&-1===e.indexOf("GPIO_"+n)&&(L=!1),L},p=function(e){return 0===e.indexOf("SYS_MFP")?e.substring(0,11)+"_Msk":0===e.indexOf("SYS_GP")&&-1!==e.indexOf("_MFP_")?-1===e.indexOf("_MFPL_")&&-1===e.indexOf("_MFPH_")?e.substring(0,15)+"_Msk":e.slicePriorToX("MFP_")+"MFP_Msk":-1===e.indexOf("SYS_GP")&&e.indexOf("_MFP_")!==e.lastIndexOf("_MFP_")?e.substring(0,e.lastIndexOf("_MFP_")+5)+"Msk":0===e.indexOf("GPIO_IO")?e.substring(0,e.lastIndexOf("MD_")+3)+"Msk":0===e.indexOf("GPIO_P")?"GPIO_MD_IOPnMD_Pn"+e.substring(7,e.lastIndexOf("GPIO_P")+8)+"MD_Msk":0===e.indexOf("GPIO_FPS")?"":e.slicePriorToX("MFP_")+"MFP_Msk"},0!==NUTOOL_PIN.g_cfg_gpiosDefines.length&&NUTOOL_PIN.g_cfg_gpiosDefines[0].f.length>1&&0===NUTOOL_PIN.g_cfg_gpiosDefines[0].f[1].indexOf("GPIO:GPIO_")&&(w=""),"undefined"!=typeof NUTOOL_PER&&Hi(),"h"!==NUTOOL_PIN.g_pinFunctionString&&"dtsi"!==NUTOOL_PIN.g_pinFunctionString||a.sliceAfterX(".")===NUTOOL_PIN.g_pinFunctionString||(a=a.slicePriorToX(".")+"."+NUTOOL_PIN.g_pinFunctionString+'"\r\n'),(k=qi(Re)).sort(),e=0,r=k.length;e0&&O(D[k[e]].join(),S,A[n])){var E;for(U=!1,b=!0,i=D[k[e]].length-1;i>=0;i-=1){var j=D[k[e]][i].slicePriorToX("MFP_").sliceAfterX("_MFP").sliceAfterX("_");if(O(D[k[e]][i],S,A[n])){M=D[k[e]][i].slicePriorToX(":"),U&&(m+="(); // Pin: "+E+"\r\n",g+="();
");var X=j.slice(0,2)+"."+j.slice(2);E=NUTOOL_PIN.g_cfg_pkgs[NUTOOL_PIN.g_packageNumberIndex].indexOf(X)+1,m+=" SET_"+M+"_"+j,g+=" SET_"+M+"_"+j,U=!0}}m+="(); // Pin: "+E+"\r\n",g+="();
"}for(m+="\r\n return;\r\n}\r\n\r\n",b?d+=m:g+=A[n]+" did not generate modularized code!!
",m="void "+F+"_deinit_"+A[n].toLowerCase()+"(void)\r\n{\r\n",b=!1,e=0,r=k.length;e0&&O(D[k[e]].join(),S,A[n])){for(U=!1,b=!0,i=D[k[e]].length-1;i>=0;i-=1){if(O(D[k[e]][i],S,A[n]))U&&(m+="();\r\n"),m+=" SET_GPIO_"+(j=D[k[e]][i].slicePriorToX("MFP_").sliceAfterX("_MFP").sliceAfterX("_")),g+=" SET_GPIO_"+j,U=!0}m+="();\r\n"}m+="\r\n return;\r\n}\r\n\r\n",b&&(d+=m)}else for(n=0,s=A.length;n0&&O(D[k[e]].join(),S,A[n])){for(U=!1,b=!0,m+=" "+w+k[e]+" &= ~(",g+=" "+w+k[e]+" &= ~(",i=D[k[e]].length-1;i>=0;i-=1)O(D[k[e]][i],S,A[n])&&(U&&(m+=" | ",g+=" | "),m+=p(M=D[k[e]][i].sliceAfterX(":")),g+=p(M),U=!0);for(m+=");\r\n",g+=");
",U=!1,m+=" "+w+k[e]+" |= (",g+=" "+w+k[e]+" |= (",i=D[k[e]].length-1;i>=0;i-=1)O(D[k[e]][i],S,A[n])&&(U&&(m+=" | ",g+=" | "),m+=M=D[k[e]][i].sliceAfterX(":"),g+=M,U=!0);m+=");\r\n",g+=");
"}for(m+="\r\n return;\r\n}\r\n\r\n",b?d+=m:g+=A[n]+" did not generate modularized code!!
",m="void "+F+"_deinit_"+A[n].toLowerCase()+"(void)\r\n{\r\n",b=!1,e=0,r=k.length;e0&&O(D[k[e]].join(),S,A[n])){for(U=!1,b=!0,m+=" "+w+k[e]+" &= ~(",i=D[k[e]].length-1;i>=0;i-=1)O(D[k[e]][i],S,A[n])&&(U&&(m+=" | "),m+=p(M=D[k[e]][i].sliceAfterX(":")),U=!0);m+=");\r\n"}m+="\r\n return;\r\n}\r\n\r\n",b&&(d+=m)}for("undefined"==typeof NUTOOL_PER?d+="void "+F+"_init(void)\r\n{\r\n":d+="void Pin_Init(void)\r\n{\r\n",e=0,r=k.length;e\{\}\[\]\\\/]/gi,"_").toUpperCase()).charAt(0))&&(M="_"+M),T+="#define "+M+" "+_.replace(/[.]/g,"").replace(/\s/g,"_").replace(/[`~!@#$%^&*()|+\-=?;:'",<>\{\}\[\]\\\/]/gi,"_")+"\r\n");"/* User-defined pins */\r\n"===T&&(T=""),k=null,$=null,A=null,y=null,D=null,gpio_MFPsDefine=null}function Yi(e,i){var n=Number(e).toString(16);for(i=null==i?i=8:i;n.lengthae/3?ae/3:18*qi(Re).length+20,0===_.length&&($("#rootTree_Pin")[0].appendChild(Qi("div","mfpTree","Loading...")),_=$("#mfpTree"),$("#ChipType").hover((function(){$(this).css("background-color","#FAFAFA"),en()}),(function(){$(this).css("background-color","#FFFFFF")})),$("#MCU").hover((function(){$(this).css("background-color","#FAFAFA"),en()}),(function(){$(this).css("background-color","#FFFFFF")}))),_[0].setAttribute("style","background-color: #FFFFFF; float:left; overflow-y: scroll; width:"+R+"px; height: "+se+"px; border-bottom: 5px solid #F2F2F2;"),-1!==o.indexOf("WLCSP")||-1!==o.indexOf("BGA")?ii?_.hover((function(){$(this).css("background-color","#FAFAFA"),en(),$("#pin_side_0").show(),$("#NUC_PinConfiguration_Canvas_Lining").hide()}),(function(){$(this).css("background-color","#FFFFFF"),$("#pin_side_0").hide(),$("#NUC_PinConfiguration_Canvas_Lining").show()})):_.hover((function(){$(this).css("background-color","#FAFAFA"),en(),$("#pin_side_0").css("opacity","0.8"),$("#NUC_PinConfiguration_Canvas_Lining").css("opacity","0")}),(function(){$(this).css("background-color","#FFFFFF"),$("#pin_side_0").css("opacity","0.1"),$("#NUC_PinConfiguration_Canvas_Lining").css("opacity","1")})):_.hover((function(){$(this).css("background-color","#FAFAFA"),en()}),(function(){$(this).css("background-color","#FFFFFF")})),_.jstree({json_data:{data:g},themes:{theme:"default",icons:!1},core:{animation:0},plugins:["themes","json_data","ui","crrm"]}).bind("hover_node.jstree",(function(e,i){var n=i.rslt.obj.attr("id").slicePriorToX(":"),t="";r&&NUTOOL_PIN.g_cfg_regDescriptions.hasOwnProperty(n)&&(-1===NUTOOL_PIN.g_cfg_regDescriptions[n].indexOf("nonexistent")&&(t="Simplified Chinese"===Ne||"Traditional Chinese"===Ne?"位址: ":"Address: "),it(n,t+=NUTOOL_PIN.g_cfg_regDescriptions[n],"right"))})).bind("dblclick.jstree",(function(e){var i=$(e.target).closest("li")[0].id;"mfp_tree"!==i&&void 0===Re.ALT_MFP&&"MINI55"!==l&&"NM1200"!==l&&_.jstree("rename",$("#"+i))})).bind("rename.jstree",(function(e,i){var n,t,r=i.rslt.obj.attr("id"),o=i.rslt.old_name,s=i.rslt.new_name;n=s,t=!1,"NANO100AN"===l||"NANO100BN"===l||"NANO112"===l?8===n.slice(n.toLowerCase().indexOf("0x")+2).length&&0===n.toLowerCase().indexOf("p")&&4===n.toLowerCase().lastIndexOf("_mfp")&&8===n.toLowerCase().lastIndexOf(":0x")&&(t=!0):"NM1500"===l||"M0519"===l||"M051DN_DE"===l||"M051BN"===l||"M051AN"===l||"M058S"===l||"MINI51AN"===l||"MINI51DE"===l||"MINI55"===l||"MINI58"===l||"NUC029AE"===l||"NUC029TAE"===l||"NUC029AN"===l||"NM1200"===l?8===n.slice(n.toLowerCase().indexOf("0x")+2).length&&0===n.toLowerCase().indexOf("p")&&2===n.toLowerCase().lastIndexOf("_mfp")&&6===n.toLowerCase().lastIndexOf(":0x")&&(t=!0):0===l.indexOf("ML5")||0===l.indexOf("MS51")||0===l.indexOf("MG51")||0===l.indexOf("MUG51")||0===l.indexOf("N76S003")||0===l.indexOf("N76E003")?8===n.slice(n.toLowerCase().indexOf("0x")+2).length&&0===n.toLowerCase().lastIndexOf("p")&&2===n.toLowerCase().lastIndexOf("mf")&&12===n.toLowerCase().lastIndexOf(":0x")&&(t=!0):0===l.indexOf("KM1M7CF")?(8===n.slice(n.toLowerCase().indexOf("0x")+2).length&&0===n.toLowerCase().lastIndexOf("iop")&&4===n.toLowerCase().lastIndexOf("md")||0===n.toLowerCase().lastIndexOf("fps")&&6===n.toLowerCase().lastIndexOf("_sel"))&&(t=!0):0===l.indexOf("KM1M7AF")||0===l.indexOf("KM1M7BF")||0===l.indexOf("KM1M4BF")||0===l.indexOf("KM1M0F")?8===n.slice(n.toLowerCase().indexOf("0x")+2).length&&0===n.toLowerCase().lastIndexOf("iop")&&4===n.toLowerCase().lastIndexOf("md")&&6===n.toLowerCase().lastIndexOf(":0x")&&(t=!0):8!==n.slice(n.toLowerCase().indexOf("0x")+2).length||0!==n.toLowerCase().lastIndexOf("gp")||3!==n.toLowerCase().lastIndexOf("_mfp")||7!==n.toLowerCase().lastIndexOf(":0x")&&8!==n.toLowerCase().lastIndexOf(":0x")||(t=!0),t?(Ri(o),s=Bi(s),Zi()):_.jstree("rename_node",$("#"+r),o)})).bind("destroy.jstree",(function(){e=null,i=null,n=null,t=null,c=[],f=[],s=null,g=null,a=null,_=null,u=null,d=null})),_.css("font-size","16px"),_.css("font-family",'Monaco, Consolas, "Lucida Console", monospace;')}function Zi(){var e,i,n,t,r,l=[],o=0;for(e=0,n=(l=qi(Re)).length;e=0;n-=1)if(c=NUTOOL_PIN.g_cfg_gpios[t].f[n],parseInt(c.slice(c.indexOf(":")+1),10)=0;r-=1)0===l.indexOf("MA35D0")||0===l.indexOf("MA35H0")?0===NUTOOL_PIN.g_cfg_gpios[t].f[r].toUpperCase().indexOf(f+"_")&&NUTOOL_PIN.g_cfg_gpios[t].f.splice(r,1):0===NUTOOL_PIN.g_cfg_gpios[t].f[r].toUpperCase().indexOf(f)&&NUTOOL_PIN.g_cfg_gpios[t].f.splice(r,1);else if("PARTIAL"===u[e])for(t=0,d=NUTOOL_PIN.g_cfg_gpios.length;t=0;r-=1)NUTOOL_PIN.g_cfg_gpios[t].f[r].slicePriorToX(":").toUpperCase()===f&&NUTOOL_PIN.g_cfg_gpios[t].f.splice(r,1);else for(c=u[e]+":0",t=0,d=NUTOOL_PIN.g_cfg_gpios.length;t=0;r-=1)0===NUTOOL_PIN.g_cfg_gpios[t].f[r].toUpperCase().indexOf(f)&&NUTOOL_PIN.g_cfg_gpios[t].f.splice(r,1);break}for(e=(N=qi(NUTOOL_PIN.g_cfg_regDescriptions)).length-1;e>=0;e-=1)void 0===Re[N[e]]&&delete NUTOOL_PIN.g_cfg_regDescriptions[N[e]];for(je=[],e=0;e=y&&r=y+D&&r=y+D+w&&r4&&(i=i.slice(0,4)+".."),r.savedPinName[e]=i,r.ctx.font=B,r.ctx.fillStyle="black",r.ctx.fillText(i,Y+V,r.y[e]-r.y[0]+V+4*K/5);break;case 1:for(e=0;e4&&(i=i.slice(0,4)+".."),r.savedPinName[e]=i,r.ctx.font=B,r.ctx.fillStyle="black",r.ctx.fillText(i,Y+V,r.y[e]-r.y[r.oneSidePinNumber-1]+V+4*K/5)}else if(-1!==o.indexOf("WLCSP")||-1!==o.indexOf("BGA"))for(e=0;e6&&(i=i.slice(0,6)+".."),r.savedPinName[e]=i,r.ctx.font=B,r.ctx.fillStyle="black",r.ctx.fillText(i,r.x[e]-r.ctx.measureText(i).width/2,r.y[e]+parseInt(r.ctx.font,10)/2));else switch(r.whichSide){case 0:for(e=0;e4&&(i=i.slice(0,4)+".."),r.savedPinName[e]=i,r.ctx.font=B,r.ctx.fillStyle="black",n=r.x[e]-r.x[0]+V,t=Y+V+H,r.ctx.save(),r.ctx.translate(n,t),r.ctx.rotate(-Math.PI/2),r.ctx.fillText(i,Y,4*K/5),r.ctx.restore();break;case 1:for(e=0;e4&&(i=i.slice(0,4)+".."),r.savedPinName[e]=i,r.ctx.font=B,r.ctx.fillStyle="black",r.ctx.fillText(i,Y+V,r.y[e]-r.y[r.oneSidePinNumber-1]+V+4*K/5);break;case 2:for(e=0;e4&&(i=i.slice(0,4)+".."),r.savedPinName[e]=i,r.ctx.font=B,r.ctx.fillStyle="black",n=r.x[e]-r.x[r.oneSidePinNumber-1]+V,t=V+H,r.ctx.save(),r.ctx.translate(n,t),r.ctx.rotate(-Math.PI/2),r.ctx.textAlign="end",r.ctx.fillText(i,H,4*K/5),r.ctx.restore();break;case 3:for(e=0;e4&&(i=i.slice(0,4)+".."),r.savedPinName[e]=i,r.ctx.font=B,r.ctx.fillStyle="black",r.ctx.fillText(i,Y+V,r.y[e]-r.y[0]+V+4*K/5)}i=null,n=null,t=null},restore:function(){ge.removeContext($("#"+r.inner)),r=null},getMousePos:function(e,i){var n=e.getBoundingClientRect();return{x:i.clientX-n.left,y:i.clientY-n.top}},decideWhichPin:function(){var e,i,n;if(-1!==o.indexOf("WLCSP")||-1!==o.indexOf("BGA"))for(e=r.mousePosition.x-ce*Le/100,i=r.mousePosition.y-fe*Le/100,n=0;n=(r.x[n]-r.r)*Le/100&&e<=(r.x[n]+r.r)*Le/100&&i>=(r.y[n]-r.r)*Le/100&&i<=(r.y[n]+r.r)*Le/100){r.currentPinIndex=n;break}r.currentPinIndex=-1}else for(n=0;n=e&&r.mousePosition.x<=e+r.w*Le/100&&r.mousePosition.y>=r.y[n]*Le/100&&r.mousePosition.y<=(r.y[n]+r.h)*Le/100){r.currentPinIndex=n;break}r.currentPinIndex=-1}-1!==r.currentPinIndex?r.mouseEnter():r.mouseLeave()},mouseEnter:function(){var e,i,n,s,a,d,c,f,g,_,u,N;for(e=0,i=$e.length;e6&&(N=u.slice(0,6)+".."),r.ctx.font=B,r.ctx.fillStyle="black",r.ctx.fillText(N,r.x[n]-r.ctx.measureText(N).width/2,r.y[n]+parseInt(r.ctx.font,10)/2);else switch(r.whichSide){case 0:ii&&r.ctx.strokeRect(r.x[n]-r.x[0]+V,Y+V,r.w,r.h),r.ctx.fillRect(r.x[n]-r.x[0]+V,Y+V,r.w,r.h),r.ctx.font=B,r.ctx.fillStyle="black",s=r.x[n]-r.x[0]+V,a=Y+V+H,r.ctx.save(),r.ctx.translate(s,a),r.ctx.rotate(-Math.PI/2),r.ctx.fillText(r.savedPinName[n],Y,4*K/5),r.ctx.restore();break;case 1:ii&&r.ctx.strokeRect(Y+V,r.y[n]-r.y[r.oneSidePinNumber-1]+V,r.w,r.h),r.ctx.fillRect(Y+V,r.y[n]-r.y[r.oneSidePinNumber-1]+V,r.w,r.h),r.ctx.font=B,r.ctx.fillStyle="black",r.ctx.fillText(r.savedPinName[n],Y+V,r.y[n]-r.y[r.oneSidePinNumber-1]+V+4*K/5);break;case 2:ii&&r.ctx.strokeRect(r.x[n]-r.x[r.oneSidePinNumber-1]+V,V,r.w,r.h),r.ctx.fillRect(r.x[n]-r.x[r.oneSidePinNumber-1]+V,V,r.w,r.h),r.ctx.font=B,r.ctx.fillStyle="black",s=r.x[n]-r.x[r.oneSidePinNumber-1]+V,a=V+H,r.ctx.save(),r.ctx.translate(s,a),r.ctx.rotate(-Math.PI/2),r.ctx.textAlign="end",r.ctx.fillText(r.savedPinName[n],H,4*K/5),r.ctx.restore();break;case 3:ii&&r.ctx.strokeRect(Y+V,r.y[n]-r.y[0]+V,r.w,r.h),r.ctx.fillRect(Y+V,r.y[n]-r.y[0]+V,r.w,r.h),r.ctx.font=B,r.ctx.fillStyle="black",r.ctx.fillText(r.savedPinName[n],Y+V,r.y[n]-r.y[0]+4*K/5+V)}(!$i(u)||Si(u)||vi(u)||Ai(u))&&(Ai(u)?"AVDD/OPA_VDD"==u&&(d="AVDD + OPA_VDD"):$i(u)?Si(u)?0===l.indexOf("M2L31")?d="Can change function to Write_Protect_Pin by chip configuration":0===l.indexOf("KM1M4BF0")?d="When NDMOD pin input is L level, SWDCLK would be selected. Configurable only when NDMOD pin input is H level.":0===l.indexOf("KM1M4BF5")?d="When SELSWD.SWDEN = 1, SWDCLK would be selected. Configurable only when SELSWD.SWDEN = 0.":0===l.indexOf("KM1M0D0F")?"P0.0"===u?d="When NDMOD pin input is L level, DBG_SWDD would be selected. Configurable only when NDMOD pin input is H level.":"P0.1"===u&&(d="When NDMOD pin input is L level, DBG_SWDCLK would be selected. Configurable only when NDMOD pin input is H level."):0===l.indexOf("KM1M0D1F")&&("P0.1"===u?d="When NDMOD pin input is L level, DBG_SWDD would be selected. Configurable only when NDMOD pin input is H level.":"P0.2"===u&&(d="When NDMOD pin input is L level, DBG_SWDCLK would be selected. Configurable only when NDMOD pin input is H level.")):vi(u)&&(d="Simplified Chinese"===Ne?"此脚位包含CCDB功能，带下拉电阻(Rd_ccdb)，并不可被禁用。 当该管脚没用于UTCPD应用时，请检查Rd_ccdb的影响。":"Traditional Chinese"===Ne?"此腳位包含CCDB功能，帶下拉電阻(Rd_ccdb)，並不可被禁用。 當該管腳沒用於UTCPD應用時，請檢查Rd_ccdb的影響。":"This pin includes CCDB function with a pull-low resistor(Rd_ccdb) that cannot be disabled. When this pin isn’t used for UTCPD, please check Rd_ccdb influence."):d=u,"unknown"!==d&&(t.stage=$("#panel")[0].appendChild(Qi("canvas",r.inner+"_tooltip_pin")),-1===d.indexOf("/")||-1===d.indexOf("XT1_IN")&&-1===d.indexOf("XT1_OUT")&&-1===d.indexOf("XTAL1")&&-1===d.indexOf("XTAL2")||(-1!==d.indexOf("XTAL1")?d+=" (XTAL1":-1!==d.indexOf("XTAL2")?d+=" (XTAL2":-1!==d.indexOf("XT1_IN")?d+=" (XT1_IN":d+=" (XT1_OUT",d+="Simplified Chinese"===Ne?"由User Configuration决定。)":"Traditional Chinese"===Ne?"由User Configuration決定。)":" is decided by User Configuration.)"),ii?(t.w=r.ctx.measureText(d).width,t.h=K,g="12px Arial",_=t.h-4,-1!==o.indexOf("WLCSP")||-1!==o.indexOf("BGA")?(c=(ce+r.x[r.currentPinIndex])*Le/100,f=(fe+r.y[r.currentPinIndex]+10)*Le/100):(c=(r.x[r.currentPinIndex]+r.w)*Le/100,f=r.y[r.currentPinIndex]*Le/100)):(Le<100?(t.w=r.ctx.measureText(d).width/Le*100,t.h=K/Le*100,g=12/Le*100+"px Times Arial",_=t.h-5/Le*100,c=r.x[r.currentPinIndex]+r.w,f=r.y[r.currentPinIndex]):(t.w=r.ctx.measureText(d).width,t.h=K,g="12px Arial",_=t.h-4,c=r.x[r.currentPinIndex]+r.w,f=r.y[r.currentPinIndex]),-1===o.indexOf("WLCSP")&&-1===o.indexOf("BGA")||(c+=ce,f+=fe+10)),t.stage.setAttribute("style","z-index:2; position:absolute; left:"+c+"px; top:"+f+"px;"),t.stage.setAttribute("width",t.w+3*ie),t.stage.setAttribute("height",t.h),t.ctx=ge.getContext(t.stage),t.ctx.font=g,t.ctx.strokeStyle="#000000",t.ctx.lineWidth=2,t.ctx.strokeRect(0,0,t.w+3*ie,t.h),t.ctx.fillStyle="#FFF6C0",t.ctx.fillRect(ne,ne,t.w+3*ie-2*ne,t.h-2*ne),t.ctx.fillStyle="#000000",t.ctx.fillText(d,ie,_),d=null))}},mouseLeave:function(){var e,t=r.lastPinIndex;if(-1!==r.lastPinIndex){if(r.ctx.strokeStyle="#000000",r.ctx.fillStyle=r.savedPinPadColor[t],-1!==o.indexOf("SOP"))switch(r.whichSide){case 0:ii&&r.ctx.strokeRect(Y+V,r.y[t]-r.y[0]+V,r.w,r.h),r.ctx.fillRect(Y+V,r.y[t]-r.y[0]+V,r.w,r.h),r.ctx.fillStyle="black",r.ctx.fillText(r.savedPinName[t],Y+V,r.y[t]-r.y[0]+4*K/5+V);break;case 1:ii&&r.ctx.strokeRect(Y+V,r.y[t]-r.y[r.oneSidePinNumber-1]+V,r.w,r.h),r.ctx.fillRect(Y+V,r.y[t]-r.y[r.oneSidePinNumber-1]+V,r.w,r.h),r.ctx.fillStyle="black",r.ctx.fillText(r.savedPinName[t],Y+V,r.y[t]-r.y[r.oneSidePinNumber-1]+V+4*K/5)}else if(-1!==o.indexOf("WLCSP")||-1!==o.indexOf("BGA"))-1===(e=""!==we[t]?rn(we[t]):r.savedPinName[t]).toLowerCase().indexOf("toolnotshow")&&(r.ctx.beginPath(),r.ctx.arc(r.x[t],r.y[t],r.r,0,2*Math.PI,!0),r.ctx.fill(),e.length>6&&(e=e.slice(0,6)+".."),r.ctx.font=B,r.ctx.fillStyle="black",r.ctx.fillText(e,r.x[t]-r.ctx.measureText(e).width/2,r.y[t]+parseInt(r.ctx.font,10)/2));else switch(r.whichSide){case 0:ii&&r.ctx.strokeRect(r.x[t]-r.x[0]+V,Y+V,r.w,r.h),r.ctx.fillRect(r.x[t]-r.x[0]+V,Y+V,r.w,r.h),r.ctx.fillStyle="black",i=r.x[t]-r.x[0]+V,n=Y+V+H,r.ctx.save(),r.ctx.translate(i,n),r.ctx.rotate(-Math.PI/2),r.ctx.fillText(r.savedPinName[t],Y,4*K/5),r.ctx.restore();break;case 1:ii&&r.ctx.strokeRect(Y+V,r.y[t]-r.y[r.oneSidePinNumber-1]+V,r.w,r.h),r.ctx.fillRect(Y+V,r.y[t]-r.y[r.oneSidePinNumber-1]+V,r.w,r.h),r.ctx.fillStyle="black",r.ctx.fillText(r.savedPinName[t],Y+V,r.y[t]-r.y[r.oneSidePinNumber-1]+V+4*K/5);break;case 2:ii&&r.ctx.strokeRect(r.x[t]-r.x[r.oneSidePinNumber-1]+V,V,r.w,r.h),r.ctx.fillRect(r.x[t]-r.x[r.oneSidePinNumber-1]+V,V,r.w,r.h),r.ctx.fillStyle="black",i=r.x[t]-r.x[r.oneSidePinNumber-1]+V,n=V+H,r.ctx.save(),r.ctx.translate(i,n),r.ctx.rotate(-Math.PI/2),r.ctx.textAlign="end",r.ctx.fillText(r.savedPinName[t],H,4*K/5),r.ctx.restore();break;case 3:ii&&r.ctx.strokeRect(Y+V,r.y[t]-r.y[0]+V,r.w,r.h),r.ctx.fillRect(Y+V,r.y[t]-r.y[0]+V,r.w,r.h),r.ctx.fillStyle="black",r.ctx.fillText(r.savedPinName[t],Y+V,r.y[t]-r.y[0]+4*K/5+V)}r.lastPinIndex=-1,ge.removeContext($("#"+r.inner+"_tooltip_pin")),t=null}},pinClickHandler:function(){var i,n,t,s,a,d,c,f,g=NUTOOL_PIN.g_cfg_pkgs[NUTOOL_PIN.g_packageNumberIndex][r.pin[r.currentPinIndex]-1],_=[],u=0,N=ge.getContext($("#NUC_PinConfiguration_Canvas")[0]),O=NUTOOL_PIN.g_cfg_pkgs[NUTOOL_PIN.g_packageNumberIndex].indexOf(g)+1;if(-1!==r.currentPinIndex&&ct(O))ft();else if(-1!==r.currentPinIndex)if(on(),"N9H30xxxIIM"!==l&&"N9H31KxxIFC"!==l||-1==g.indexOf("ADC")){if($i(g)){for(parseInt(g.sliceAfterX("."),10),s=Xi(g+=":0",parseInt(g.sliceAfterX("."),10)),-1!==o.indexOf("WLCSP")||-1!==o.indexOf("BGA")?(a=r.x[r.currentPinIndex]+ce,d=r.y[r.currentPinIndex]+fe+10):(a=r.x[r.currentPinIndex],d=r.y[r.currentPinIndex]),i=0,n=NUTOOL_PIN.g_cfg_gpios[s].f.length;iu&&(u=N.measureText(_[i]).width);for(_.push("Reset"),ze=[],i=0,n=_.length;i100?d+i*ee:d+i*ee/Le*100,f="#6495ED",i!==n-1&&_[i]===we[r.pin[r.currentPinIndex]-1]&&(f=($.inArray(r.pin[r.currentPinIndex],Ye),Ce)),-1!==l.indexOf("KM1M7CF")){p=Math.floor(i/10);ze[i]=sn().init(r.pin[r.currentPinIndex],i.toString(),_[i],u,a+r.w+u*p/Le*100+3*ie*p,t-10*p*ee/Le*100,f,!0)}else ze[i]=sn().init(r.pin[r.currentPinIndex],i.toString(),_[i],u,a+r.w,t,f,!0);c=(c=i.toString()).replaceSpecialCharacters(),$("#Pin_MultiFunction_Selection_"+c).hover(ze[i].mouseEnter,ze[i].mouseLeave),ze[i].draw()}}}else{switch(parseInt(g.sliceAfterX("."),10),s=Xi(g+=":0",parseInt(g.sliceAfterX("."),10)),a=r.x[r.currentPinIndex],d=r.y[r.currentPinIndex],u=60,g.slicePriorToX(":")){case"ADC3":_.push("VSENSE");break;case"ADC4":_.push("YM");break;case"ADC5":_.push("YP");break;case"ADC6":_.push("XM");break;case"ADC7":_.push("XP")}for(_.push("Reset"),ze=[],i=0,n=_.length;i100?d+i*ee:d+i*ee/Le*100,f="#6495ED",i!==n-1&&_[i]===we[r.pin[r.currentPinIndex]-1]&&(f=($.inArray(r.pin[r.currentPinIndex],Ye),Ce)),-1!==l.indexOf("KM1M7CF")){var p=Math.floor(i/10);ze[i]=sn().init(r.pin[r.currentPinIndex],i.toString(),_[i],u,a+r.w+u*p/Le*100+3*ie*p,t-10*p*ee/Le*100,f,!0)}else ze[i]=sn().init(r.pin[r.currentPinIndex],i.toString(),_[i],u,a+r.w,t,f,!0);c=(c=i.toString()).replaceSpecialCharacters(),$("#Pin_MultiFunction_Selection_"+c).hover(ze[i].mouseEnter,ze[i].mouseLeave),ze[i].draw()}}g=null,_=[],u=null,N=null,t=null,s=null,e=null,a=null,d=null,c=null,f=null}};return r}function on(){var e,i;for(e=0,i=ze.length;e0&&"Reset"!==i.label&&("MA35D0"===l||"MA35D1"===l||"MA35H0"===l||!$i(i.label))&&"unknown"!==(s=dn(i.label,i.pin))){for(e.stage=$("#panel")[0].appendChild(Qi("canvas",i.inner+"_tooltip")),a=s.split("
"),e.w=0,n=0,t=a.length;ne.w&&(e.w=i.ctx.measureText(a[n]).width);for(-1!==o.indexOf("SOP")||-1!==o.indexOf("WLCSP")||-1!==o.indexOf("BGA")?i.pin>v/2?e.stage.setAttribute("style","z-index:2; position:absolute; left:"+(i.positionX-e.w-3*ie-ne)+"px; top:"+i.positionY+"px;"):e.stage.setAttribute("style","z-index:2; position:absolute; left:"+(i.positionX+i.w+3*ie+ne)+"px; top:"+i.positionY+"px;"):i.pin>y/2&&i.pin<=y+D+w/2?e.stage.setAttribute("style","z-index:2; position:absolute; left:"+(i.positionX-e.w-3*ie-ne)+"px; top:"+i.positionY+"px;"):e.stage.setAttribute("style","z-index:2; position:absolute; left:"+(i.positionX+i.w+3*ie+ne)+"px; top:"+i.positionY+"px;"),e.stage.setAttribute("width",e.w+3*ie),e.stage.setAttribute("height",i.h*a.length),L||e.stage.setAttribute("innerText",s),e.ctx=ge.getContext(e.stage),e.ctx.font=i.ctx.font,e.ctx.strokeStyle="#000000",e.ctx.lineWidth=2,e.ctx.strokeRect(0,0,e.w+3*ie,i.h*a.length),e.ctx.fillStyle="#FFF6C0",e.ctx.fillRect(ne,ne,e.w+3*ie-2*ne,i.h*a.length-2*ne),e.ctx.fillStyle="#000000",n=0,t=a.length;n

'+r+'

').dialog({modal:!1,resizable:!1,title:t,width:500,height:"auto",show:"fade",hide:"fade",close:function(){$("#noticeForMultipleSelectionsDialog").dialog("destroy")},buttons:[{text:l,click:function(){e(),$("#noticeForMultipleSelectionsDialog").dialog("isOpen")&&$("#noticeForMultipleSelectionsDialog").dialog("destroy")}},{text:o,click:function(){on(),$("#noticeForMultipleSelectionsDialog").dialog("isOpen")&&$("#noticeForMultipleSelectionsDialog").dialog("destroy")}}]}));t=null,r=null,l=null,o=null}((function(){an(r,i.pin,i.label)}),i.label,tn(a))):an(Ki(t.slicePriorToX("_")),i.pin,i.label),s=null,a=null}t=null}};return i}function an(e,i,n){var t,r,l,o,s=$("#moduleTree"),a=we[i-1]+"_Pin"+i,d=[];if(a=a.replaceSpecialCharacters(),s.jstree("uncheck_node",$("#"+a)),!$("#"+a).hasClass("jstree-unchecked")){if(l=Ki(a.slicePriorToX("_")),(o=[])[0]=i,Oi(a,l,o),void 0!==He[l]){for(t=0,r=He[l].length;tNote:"),s=!1,-1!==r.indexOf("@")&&(l=l.slice(l.indexOf("@")+1,l.indexOf(":")),s=!0),!(0!==r.indexOf(e+":")&&0!==r.indexOf(e+"@")||s&&l!==NUTOOL_PIN.g_cfg_pkgs[NUTOOL_PIN.g_packageNumberIndex][i-1])){o=!0;break}return n=null,t=null,r=o?r.slice(r.indexOf(":")+1):"unknown"}function cn(){je=[],ye=[],Re=[],Ge=[],De=[],we=[],ve=[],Ye=[],void 0!==Ki.specialModuleNames&&delete Ki.specialModuleNames,si(),on(),$("#panel").unbind("mouseenter mouseleave"),ge.removeContext($("#NUC_PinConfiguration_Canvas")),ge.removeContext($("#NUC_PinConfiguration_Canvas_Lining")),$("#mfpTree").jstree("destroy"),$("#supportedModules").jstree("destroy"),$("#moduleTree").jstree("destroy"),$("#mfpTree").remove(),$("#supportedModules").remove(),$("#moduleTree").remove(),$("div").remove(".tooltip")}function fn(){var e,i,n=$("#MCUselect"),r={},s=[],a=!1;for(n.children().length>0&&n.children().remove(),e=0,i=NUTOOL_PIN.g_cfg_chips.length;e=0;r-=1)d[r]&&null!==d[r].getAttribute(a)&&(d[r].getAttribute(a)===e||d[r].getAttribute(a)===c)&&d[r].parentNode.removeChild(d[r]);for(d[0].parentNode.appendChild(l),"undefined"!=typeof NUTOOL_PER&&"js"===n&&(e="PinConfigure/"+e,i="PinConfigure/"+i),"PeripheralConfigure/"!==i&&(o=Nn(i,n),"function"==typeof t&&(o.onload=function(){t()})),!L&&window.console&&window.console.log("In replacejscssfile, oldfilename:"+e+" / newfilename:"+i),r=d.length;r>=0;r-=1)d[r]&&null!==d[r].getAttribute(a)&&(d[r].getAttribute(a)===e||d[r].getAttribute(a)===i)&&d[r].parentNode.removeChild(d[r]);d[0].parentNode.appendChild(o)}function pn(){$("#conflictDialog").dialog("isOpen")&&$("#conflictDialog").dialog("destroy"),$("#adjustedModulesDialog").dialog("isOpen")&&$("#adjustedModulesDialog").dialog("destroy"),$("#warningForSavingDialog").dialog("isOpen")&&$("#warningForSavingDialog").dialog("destroy"),$("#showPinErrorDialog").dialog("isOpen")&&$("#showPinErrorDialog").dialog("destroy"),$("#noticeForMultipleSelectionsDialog").dialog("isOpen")&&$("#noticeForMultipleSelectionsDialog").dialog("destroy"),$("#generateCodeDialog").dialog("isOpen")&&$("#generateCodeDialog").dialog("destroy"),$("#printReportDialog").dialog("isOpen")&&$("#printReportDialog").dialog("destroy"),$("#runAnotherToolDialog").dialog("isOpen")&&$("#runAnotherToolDialog").dialog("destroy"),$("#connectToTargetDialog").dialog("isOpen")&&$("#connectToTargetDialog").dialog("destroy"),$("#languageDialog").dialog("isOpen")&&$("#languageDialog").dialog("destroy")}function hn(){var e,i,n,t,r,l,o=ge.getContext($("#NUC_PinConfiguration_Canvas")[0]),s=0;"Simplified Chinese"===Ne?(n="被用户配置",t="悬停工具提示",r="滑鼠焦点",l="非可配置的","双击用户定义",o.font="12px 新細明體"):"Traditional Chinese"===Ne?(n="被使用者配置",t="懸停工具提示",r="滑鼠焦點",l="非可配置的","雙擊用戶定義",o.font="12px 新細明體"):(n="Configured by User",t="Tooltip on Hover",r="Focused by Mouse",l="Not Configurable","Dblclicked for UserDefined",o.font=B),o.strokeStyle="black",e=ce-Pe-H-Ie,i=fe-Te-(s+=1)*(K+Me),o.strokeRect(e,i,H,K),o.fillStyle=Ce,o.fillRect(e,i,H,K),o.fillStyle="black",o.fillText(n,e+H+3,i+4*K/5),e=ce-Pe-H-Ie,i=fe-Te-(s+=1)*(K+Me),o.strokeRect(e,i,H,K),o.fillStyle=me,o.fillRect(e,i,H,K),o.fillStyle="black",o.fillText(t,e+H+3,i+4*K/5),e=ce-Pe-H-Ie,i=fe-Te-(s+=1)*(K+Me),o.strokeRect(e,i,H,K),o.fillStyle=Ue,o.fillRect(e,i,H,K),o.fillStyle="black",o.fillText(r,e+H+3,i+4*K/5),e=ce-Pe-H-Ie,i=fe-Te-(s+=1)*(K+Me),o.strokeRect(e,i,H,K),o.fillStyle=be,o.fillRect(e,i,H,K),o.fillStyle="black",o.fillText(l,e+H+3,i+4*K/5)}function xn(e,i,n){var t,r,o,s,a,d;for(i=i.restorePinTreeNodeName().restoreSpecialCharacters(),d=(a=NUTOOL_PIN.g_cfg_pkgs[NUTOOL_PIN.g_packageNumberIndex][e])+":0",t=0,o=NUTOOL_PIN.g_cfg_gpios.length;t>>0:0}}break}break}-1!==l.indexOf("KM1M4BF5")&&(0!=we.filter((function(e){return/DBG_SWDD/.test(e)})).length||0!=we.filter((function(e){return/DBG_SWDCLK/.test(e)})).length?Re.SELSWD=1:Re.SELSWD=0),t=null,r=null,o=null,s=null,a=null,d=null}function Pn(){yi(),"none"===$("#mfpTree").css("display")?$("#moduleTree").height(ae-$("#supportedModules").height()):($("#mfpTree").height(se),$("#moduleTree").height(ae-$("#ChipType").height()-$("#MCU").height()-se-6-$("#supportedModules").height())),ai(),function(){var e,i,n,t,r=[];for(e=0,i=(r=qi(we)).length;eae/3?ae/3:18*qi(Re).length+20,$("#panel").width(le-R-8),$("#panel").height(window.innerHeight-G-8-45),"none"===$("#mfpTree").css("display")?$("#moduleTree").height(ae-$("#supportedModules").height()-45):($("#mfpTree").height(se),$("#moduleTree").height(ae-$("#ChipType").height()-$("#MCU").height()-se-6-$("#supportedModules").height()-45)),Le=100,Tn(),recordedDialogSize=null}function Mn(){for(var e,i,n,t,r,l,o,s=[],a=0;ye.length>0&&a<1e3;)for(a+=1,e=parseInt(ye[0].slicePriorToX(":"),10),i=ve[e-1],r=-1,l=0,o=De[e-1];r!==l;)r=i.indexOf(o),l=i.lastIndexOf(o),n=Ki((t=(t=i.slice(r).slicePriorToX("/")+"_Pin"+e).replaceSpecialCharacters()).slicePriorToX("_")),s[0]=e,Oi(t,n,s),$("#"+t).removeClass("jstree-checked"),$("#"+t).addClass("jstree-unchecked"),$("#"+n+"_Root").removeClass("jstree-undetermined"),$("#"+n+"_Root").removeClass("jstree-checked"),$("#"+n+"_Root").addClass("jstree-unchecked"),i=i.slice(r+1);Zi(),$("#moduleTree").find("li").each((function(e,i){$("#"+$(i).attr("id")+" >a").css("color","black")})),$("#moduleTree").jstree("close_all"),ye=[],s=[],He=[],We=[],e=null,i=null,n=null,t=null,r=null,l=null,o=null,a=null}function Cn(e){var i,n,t,r,l,o,s,a,d,c,f,g,_,u,N,O,p,h,x,P,T,I,M,C,m,U=[],b="",L=[],k=!0;if(0!==NUTOOL_PIN.g_cfg_shareBits.length){for(void 0===(d=localStorage.getItem("UIlanguage"))||null==d?(I=" or ",M=" should be ",C=".",m="(configure it again)"):"Simplified Chinese"===d?(I="或",M="应为",C="。",m="(再次配置它)"):"Traditional Chinese"===d?(I="或",M="應為",C="。",m="(再次配置它)"):(I=" or ",M=" should be ",C=".",m="(configure it again)"),i=0,l=NUTOOL_PIN.g_cfg_shareBits.length;i>>0,P=x.slicePriorToX("["),f+=((Re[P]&c)>>>T)*Math.pow(2,t-1);for(N=we[_],g=0,p=Xi(u,parseInt(u.sliceAfterX("."),10)),t=1,s=NUTOOL_PIN.g_cfg_gpios[p].f.length;t>>0,P=x.slicePriorToX("["),Re[P]&c))for(c=1<>>0,r=1,a=NUTOOL_PIN.g_cfg_gpios[p].f.length;r"}}}k||e("shareBit",b)}return void 0!==Xe.USB&&-1!==(h=we.join()).indexOf("USB_D+")&&-1!==h.indexOf("USB_D-")&&-1===h.indexOf("USB_OTG_ID")&&(k=!1,e("USB_OTG_ID",b)),k}function mn(e,i){var n,t,r,l=localStorage.getItem("UIlanguage");if("shareBit"===e)void 0===l||null==l?(n="Shared Bits Error",t="Some bits of GPIO registers would be configured by multiple multi-functions.These bits are called Shared Bits. The following corresponding relations between shared bits and multi-functions are incorrect.

"+i+"
Unless they are all fixed, the operations of saving configuration, generating code and printing report will not be permitted.",r="Confirm"):"Simplified Chinese"===l?(n="共享位元错误",t="一些寄存器位元可能被复数个多功能给设置。这些位元称之为共享位元。下面共享位元与多功能组成的对应关系会是不正确的。

"+i+"
除非它们都被修正，否则存档丶产生程式码及印出报告这些操作将不被允许。",r="确定"):"Traditional Chinese"===l?(n="共享位元錯誤",t="一些暫存器位元可能被複數個多功能給設置。這些位元稱之為共享位元。下面共享位元與多功能組成的對應關係會是不正確的。

"+i+"
除非它們都被修正，否則存檔、產生程式碼及印出報告這些操作將不被允許。",r="確定"):(n="Shared Bits Error",t="Some bits of GPIO registers would be configured by multiple multi-functions.These bits are called Shared Bits. The following corresponding relations between shared bits and multi-functions are incorrect.

"+i+"
Unless they are all fixed, the operations of saving configuration, generating code and printing report will not be permitted.",r="Confirm");else{if("USB_OTG_ID"!==e)return;void 0===l||null==l?(n="Incorrect USB Settings",t="USB_OTG_ID must be configured when enabling USB.",r="Confirm"):"Simplified Chinese"===l?(n="不正确的USB设置",t="当USB开启时，USB_OTG_ID必须被设置。",r="确定"):"Traditional Chinese"===l?(n="不正確的USB設置",t="當USB開啟時，USB_OTG_ID必須被設置。",r="確定"):(n="Incorrect USB Settings",t="USB_OTG_ID must be configured when enabling USB.",r="Confirm")}pn(),$('

'+t+'

').dialog({modal:!1,resizable:!1,title:n,width:500,height:"auto",show:"fade",hide:"fade",close:function(){$("#showPinErrorDialog").dialog("destroy")},buttons:[{text:r,click:function(){$("#showPinErrorDialog").dialog("isOpen")&&$("#showPinErrorDialog").dialog("destroy")}}]}),n=null,t=null,r=null,l=null}function Un(e,i){var n,t,r,l,o=localStorage.getItem("UIlanguage");if("shareBit"===e)void 0===o||null==o?(n="Shared Bit Error",t="Some bits of GPIO registers would be configured by multiple multi-functions.These bits are called Shared Bits. The following corresponding relations between shared bits and multi-functions are incorrect.

"+i+"
If you still want to close the application, please press Close. But all the configuration will be restored to the default.If you want to fix them, please press Fix.",r="Close",l="Fix"):"Simplified Chinese"===o?(n="共享位元错误",t="一些寄存器位元可能被复数个多功能给设置。这些位元称之为共享位元。下面共享位元与多功能组成的对应关系会是不正确的。

"+i+"
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