Support Inline assembly

  Chapter 10.2

Author: P2Tree

llvm/lib/Target/Cpu0/Cpu0AsmPrinter.cpp

@@ -283,6 +283,136 @@ void Cpu0AsmPrinter::PrinterDebugValueComment(const MachineInstr *MI,
           // Opcode == Cpu0::LONG_BRANCH_ADDiu);
 // }
 //
+
+// Print out an operand for an inline asm expression
+bool Cpu0AsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
+                                     unsigned AsmVariant, const char *ExtraCode,
+                                     raw_ostream &O) {
+  // Asm operand only have single letter modifier
+  if (ExtraCode && ExtraCode[0]) {
+    if (ExtraCode[1] != 0) return true;    // Unknown modifier
+
+    const MachineOperand &MO = MI->getOperand(OpNum);
+    switch (ExtraCode[0]) {
+    default:
+      // See if this is a generic print operand
+      return AsmPrinter::PrintAsmOperand(MI, OpNum, AsmVariant, ExtraCode, O);
+    case 'X': // hex const int
+      if ((MO.getType()) != MachineOperand::MO_Immediate)
+        return true;
+      O << "0x" << StringRef(utohexstr(MO.getImm())).lower();
+      return false;
+    case 'x': // hex const int (low 16 bits)
+      if ((MO.getType()) != MachineOperand::MO_Immediate)
+        return true;
+      O << "0x" << StringRef(utohexstr(MO.getImm() & 0xffff)).lower();
+      return false;
+    case 'd': // decimal const int
+      if ((MO.getType()) != MachineOperand::MO_Immediate)
+        return true;
+      O << MO.getImm();
+      return false;
+    case 'm': // decimal const int minus 1
+      if ((MO.getType()) != MachineOperand::MO_Immediate)
+        return true;
+      O << MO.getImm() - 1;
+      return false;
+    case 'z': {
+      // $0 if zero, regular printing otherwise
+      if (MO.getType() != MachineOperand::MO_Immediate)
+        return true;
+      int64_t Val = MO.getImm();
+      if (Val)
+        O << Val;
+      else
+        O << "$0";
+      return false;
+    }
+    }
+  }
+
+  printOperand(MI, OpNum, O);
+  return false;
+}
+
+bool Cpu0AsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
+                                           unsigned OpNum, unsigned AsmVariant,
+                                           const char *ExtraCode,
+                                           raw_ostream &O) {
+  int Offset = 0;
+  // Currently we are expecting either no ExtraCode or 'D'
+  if (ExtraCode) {
+    return true; // Unknown modifier
+  }
+
+  const MachineOperand &MO = MI->getOperand(OpNum);
+  assert(MO.isReg() && "unexpected inline asm memory operand");
+  O << Offset << "($" << Cpu0InstPrinter::getRegisterName(MO.getReg()) << ")";
+
+  return false;
+}
+
+void Cpu0AsmPrinter::printOperand(const MachineInstr *MI, int OpNum,
+                                  raw_ostream &O) {
+  const MachineOperand &MO = MI->getOperand(OpNum);
+
+  switch (MO.getTargetFlags()) {
+  case Cpu0II::MO_GPREL:     O << "%gp_rel(";  break;
+  case Cpu0II::MO_GOT_CALL:  O << "%call16(";  break;
+  case Cpu0II::MO_GOT:       O << "%got(";     break;
+  case Cpu0II::MO_ABS_HI:    O << "%hi(";      break;
+  case Cpu0II::MO_ABS_LO:    O << "%lo(";      break;
+  case Cpu0II::MO_GOT_HI16:  O << "got_hi16("; break;
+  case Cpu0II::MO_GOT_LO16:  O << "got_lo16("; break;
+  }
+
+  switch (MO.getType()) {
+    case MachineOperand::MO_Register:
+      O << '$' << StringRef(Cpu0InstPrinter::getRegisterName(MO.getReg())).lower();
+      break;
+
+    case MachineOperand::MO_Immediate:
+      O << MO.getImm();
+      break;
+
+    case MachineOperand::MO_MachineBasicBlock:
+      O << *MO.getMBB()->getSymbol();
+      return;
+
+    case MachineOperand::MO_GlobalAddress:
+      O << *getSymbol(MO.getGlobal());
+      break;
+
+    case MachineOperand::MO_BlockAddress: {
+      MCSymbol *BA = GetBlockAddressSymbol(MO.getBlockAddress());
+      O << BA->getName();
+      break;
+    }
+
+    case MachineOperand::MO_ExternalSymbol:
+      O << *GetExternalSymbolSymbol(MO.getSymbolName());
+      break;
+
+    case MachineOperand::MO_JumpTableIndex:
+      O << MAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
+        << '_' << MO.getIndex();
+      break;
+
+    case MachineOperand::MO_ConstantPoolIndex:
+      O << MAI->getPrivateGlobalPrefix() << "CPI"
+        << getFunctionNumber() << "_" << MO.getIndex();
+      if (MO.getOffset())
+        O << "+" << MO.getOffset();
+      break;
+
+    default:
+      llvm_unreachable("<unknown operand type>");
+  }
+
+  if (MO.getTargetFlags())
+    O << ")";
+}
+
 // Force static initialization.
 extern "C" void LLVMInitializeCpu0AsmPrinter() {
   RegisterAsmPrinter<Cpu0AsmPrinter> X(getTheCpu0Target());

llvm/lib/Target/Cpu0/Cpu0AsmPrinter.h

@@ -74,6 +74,14 @@ class LLVM_LIBRARY_VISIBILITY Cpu0AsmPrinter : public AsmPrinter {
   void EmitStartOfAsmFile(Module &M) override;
   void PrinterDebugValueComment(const MachineInstr *MI, raw_ostream &OS);
 
+  bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
+                       unsigned AsmVariant, const char *ExtraCode,
+                       raw_ostream &O) override;
+  bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum,
+                             unsigned AsmVariant, const char *ExtraCode,
+                             raw_ostream &O) override;
+  void printOperand(const MachineInstr *MI, int opNum, raw_ostream &O);
+
 };
 } // end namespace llvm
 

llvm/lib/Target/Cpu0/Cpu0ISelDAGToDAG.cpp

@@ -157,3 +157,19 @@ SDNode *Cpu0DAGToDAGISel::getGlobalBaseReg() {
                                                 CurDAG->getDataLayout()))
       .getNode();
 }
+
+// Inlineasm
+bool Cpu0DAGToDAGISel::
+SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID,
+                             std::vector<SDValue> &OutOps) {
+  // All memory constraints can at least accept raw pointers
+  switch (ConstraintID) {
+  default:
+    llvm_unreachable("Unexpected asm memory constraint");
+  case InlineAsm::Constraint_m:
+    OutOps.push_back(Op);
+    return false;
+  }
+
+  return true;
+}

llvm/lib/Target/Cpu0/Cpu0ISelDAGToDAG.h

@@ -61,6 +61,8 @@ class Cpu0DAGToDAGISel : public SelectionDAGISel {
   // Complex Pattern
   bool SelectAddr(SDNode *Parent, SDValue N, SDValue &Base, SDValue &Offset);
 
+  bool SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID,
+                                    std::vector<SDValue> &OutOps) override;
   // Return a target constant with the specified value.
   inline SDValue getImm(const SDNode *Node, unsigned Imm) {
     return CurDAG->getTargetConstant(Imm, SDLoc(Node), Node->getValueType(0));
@@ -72,4 +74,4 @@ class Cpu0DAGToDAGISel : public SelectionDAGISel {
 
 } // end of llvm namespace
 
-#endif
+#endif