This repository was archived by the owner on Dec 18, 2021. It is now read-only.
This repository was archived by the owner on Dec 18, 2021. It is now read-only.
Note on upcoming refactor of memory layout #38
Description
To improve the performance of batched registers, we will swith the storage to batch-as-row layout.
Some unpleasant changes
- for batch-as-row storage, the input matrix should be transpose to be multiplied on left.
- it is more effective to focus on last n bits rather than first n bits.