Update Makefile

RDSik · web-flow · commit 553fa7f8d80f · 2025-01-18T02:28:12.000+03:00
diff --git a/src/Makefile b/src/Makefile
@@ -40,6 +40,7 @@ else ifeq ($(SIM), iverilog)
 	$(SIM) -o $(TOP_NAME) $(SRC_FILES)
 else ifeq ($(SIM), questa)
 	vsim -do $(MACRO_FILE)
+endif
 
 run:
 ifeq ($(SIM), verilator)
