Upd cocotb test with verilator

Author: RDSik

.gitignore

@@ -1,4 +1,4 @@
-sim/verilator/cocotb/*
+sim/verilator/*
 !si5340_config_loader_tb.py
 !si5340_config_loader.sv
 !test.py

sim/verilator/test.py

@@ -6,7 +6,7 @@
 from cocotb.runner import get_runner
 
 def test_runner():
-    src = Path("../../../src")
+    src = Path("../../src")
 
     hdl_toplevel_lang = os.getenv("HDL_TOPLEVEL_LANG", "verilog")
     sim = os.getenv("SIM", "verilator")