@@ -1508,6 +1508,165 @@ static void pci_update_irq_disabled(PCIDevice *d, int was_irq_disabled)
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}
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}
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+ /* PCI Bus Address and MMIO - We match stock xbox */
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+ #define PCI_XBOX_SYSTEM_BUS 0
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+ #define PCI_XBOX_GPU_BUS 1
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+
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+ // Bus 0, device 0, function 0.
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+ #define PCI_HOSTBRIDGE_DEVICE_ID 0
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+ #define PCI_HOSTBRIDGE_FUNCTION_ID 0
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+
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+ // Bus 0, device 1, function 0.
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+ #define PCI_LPCBRIDGE_DEVICE_ID 1
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+ #define PCI_LPCBRIDGE_FUNCTION_ID 0
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+ #define PCI_LPCBRIDGE_IO_REGISTER_BASE_0 0x8000
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+
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+ // Bus 0, device 1, function 1.
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+ #define PCI_SMBUS_DEVICE_ID 1
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+ #define PCI_SMBUS_FUNCTION_ID 1
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+ #define PCI_SMBUS_IO_REGISTER_BASE_1 0xC000
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+ #define PCI_SMBUS_IO_REGISTER_BASE_2 0xC200
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+
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+ // Bus 0, device 2, function 0.
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+ #define PCI_USB0_DEVICE_ID 2
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+ #define PCI_USB0_FUNCTION_ID 0
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+ #define PCI_USB0_IRQ 1
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+ #define PCI_USB0_MEMORY_REGISTER_BASE_0 0xFED00000
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+
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+ // Bus 0, device 3, function 0.
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+ #define PCI_USB1_DEVICE_ID 3
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+ #define PCI_USB1_FUNCTION_ID 0
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+ #define PCI_USB1_IRQ 9
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+ #define PCI_USB1_MEMORY_REGISTER_BASE_0 0xFED08000
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+
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+ // Bus 0, device 4, function 0.
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+ #define PCI_NIC_DEVICE_ID 4
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+ #define PCI_NIC_FUNCTION_ID 0
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+ #define PCI_NIC_IRQ 4
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+ #define PCI_NIC_MEMORY_REGISTER_BASE_0 0xFEF00000
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+ #define PCI_NIC_IO_REGISTER_BASE_1 0xE000
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+
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+ // Bus 0, device 5, function 0.
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+ #define PCI_APU_DEVICE_ID 5
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+ #define PCI_APU_FUNCTION_ID 0
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+ #define PCI_APU_IRQ 5
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+ #define PCI_APU_MEMORY_REGISTER_BASE_0 0xFE800000
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+
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+ // Bus 0, device 6, function 0.
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+ #define PCI_ACI_DEVICE_ID 6
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+ #define PCI_ACI_FUNCTION_ID 0
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+ #define PCI_ACI_IRQ 6
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+ #define PCI_ACI_IO_REGISTER_BASE_0 0xD000
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+ #define PCI_ACI_IO_REGISTER_BASE_1 0xD200
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+ // On retail, this is 0xFEC00000, but we use 0xFEC10000 to prevent overlaying
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+ // with the IOAPIC as we use it for FreeRTOS
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+ #define PCI_ACI_MEMORY_REGISTER_BASE_2 0xFEC20000 //0xFEC00000
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+
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+ // Bus 0, device 9, function 0.
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+ #define PCI_IDE_DEVICE_ID 9
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+ #define PCI_IDE_FUNCTION_ID 0
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+ #define PCI_IDE_IRQ 14
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+ #define PCI_IDE_IO_REGISTER_BASE_4 0xFF60
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+
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+ // Bus 0, device 30, function 0.
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+ #define PCI_AGPBRIDGE_DEVICE_ID 30
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+ #define PCI_AGPBRIDGE_FUNCTION_ID 0
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+
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+ // Bus 1, device 0, device 0.
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+ #define PCI_GPU_DEVICE_ID 0
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+ #define PCI_GPU_FUNCTION_ID 0
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+ #define PCI_GPU_IRQ 3
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+ #define PCI_GPU_MEMORY_REGISTER_BASE_0 0xFD000000
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+
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+ static void slot_to_string (uint8_t bus_n , uint32_t devfn , const char * * slot_name , const char * * function_name ){
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+ uint8_t device = PCI_SLOT (devfn );
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+ uint8_t function = PCI_FUNC (devfn );
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+
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+ if (bus_n == PCI_XBOX_SYSTEM_BUS && device == PCI_HOSTBRIDGE_DEVICE_ID && function == PCI_HOSTBRIDGE_FUNCTION_ID ) {
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+ * function_name = "PCI_HOSTBRIDGE_FUNCTION_ID" ;
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+ * slot_name = "PCI_HOSTBRIDGE_DEVICE_ID" ;
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+ return ;
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+ }
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+
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+ if (bus_n == PCI_XBOX_SYSTEM_BUS && device == PCI_LPCBRIDGE_DEVICE_ID && function == PCI_LPCBRIDGE_FUNCTION_ID ) {
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+ * function_name = "PCI_LPCBRIDGE_FUNCTION_ID" ;
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+ * slot_name = "PCI_LPCBRIDGE_DEVICE_ID" ;
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+ return ;
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+ }
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+
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+ if (bus_n == PCI_XBOX_SYSTEM_BUS && device == PCI_SMBUS_DEVICE_ID && function == PCI_SMBUS_FUNCTION_ID ) {
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+ * function_name = "PCI_SMBUS_FUNCTION_ID" ;
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+ * slot_name = "PCI_SMBUS_DEVICE_ID" ;
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+ return ;
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+ }
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+
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+ if (bus_n == PCI_XBOX_SYSTEM_BUS && device == PCI_SMBUS_DEVICE_ID && function == PCI_SMBUS_FUNCTION_ID ) {
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+ * function_name = "PCI_SMBUS_FUNCTION_ID" ;
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+ * slot_name = "PCI_SMBUS_DEVICE_ID" ;
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+ return ;
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+ }
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+
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+ if (bus_n == PCI_XBOX_SYSTEM_BUS && device == PCI_USB0_DEVICE_ID && function == PCI_USB0_FUNCTION_ID ) {
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+ * function_name = "PCI_USB0_FUNCTION_ID" ;
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+ * slot_name = "PCI_USB0_DEVICE_ID" ;
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+ return ;
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+ }
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+
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+ if (bus_n == PCI_XBOX_SYSTEM_BUS && device == PCI_USB1_DEVICE_ID && function == PCI_USB1_FUNCTION_ID ) {
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+ * function_name = "PCI_USB1_FUNCTION_ID" ;
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+ * slot_name = "PCI_USB1_DEVICE_ID" ;
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+ return ;
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+ }
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+
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+ if (bus_n == PCI_XBOX_SYSTEM_BUS && device == PCI_NIC_DEVICE_ID && function == PCI_NIC_FUNCTION_ID ) {
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+ * function_name = "PCI_NIC_FUNCTION_ID" ;
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+ * slot_name = "PCI_NIC_DEVICE_ID" ;
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+ return ;
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+ }
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+
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+ if (bus_n == PCI_XBOX_SYSTEM_BUS && device == PCI_APU_DEVICE_ID && function == PCI_APU_FUNCTION_ID ) {
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+ * function_name = "PCI_APU_FUNCTION_ID" ;
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+ * slot_name = "PCI_APU_DEVICE_ID" ;
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+ return ;
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+ }
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+
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+ if (bus_n == PCI_XBOX_SYSTEM_BUS && device == PCI_ACI_DEVICE_ID && function == PCI_ACI_FUNCTION_ID ) {
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+ * function_name = "PCI_ACI_FUNCTION_ID" ;
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+ * slot_name = "PCI_ACI_DEVICE_ID" ;
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+ return ;
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+ }
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+
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+ if (bus_n == PCI_XBOX_SYSTEM_BUS && device == PCI_IDE_DEVICE_ID && function == PCI_IDE_FUNCTION_ID ) {
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+ * function_name = "PCI_IDE_FUNCTION_ID" ;
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+ * slot_name = "PCI_IDE_DEVICE_ID" ;
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+ return ;
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+ }
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+
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+ if (bus_n == PCI_XBOX_SYSTEM_BUS && device == PCI_AGPBRIDGE_DEVICE_ID && function == PCI_AGPBRIDGE_FUNCTION_ID ) {
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+ * function_name = "PCI_AGPBRIDGE_FUNCTION_ID" ;
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+ * slot_name = "PCI_AGPBRIDGE_DEVICE_ID" ;
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+ return ;
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+ }
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+
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+ if (bus_n == PCI_XBOX_GPU_BUS && device == PCI_GPU_DEVICE_ID && function == PCI_GPU_FUNCTION_ID ) {
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+ * function_name = "PCI_GPU_FUNCTION_ID" ;
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+ * slot_name = "PCI_GPU_DEVICE_ID" ;
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+ return ;
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+ }
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+
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+ static char function_name_buffer [32 ];
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+ static char slot_name_buffer [32 ];
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+ snprintf (function_name_buffer , sizeof (function_name_buffer ), "UNKNOWN_FUNCTION_%02x" , function );
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+ snprintf (slot_name_buffer , sizeof (slot_name_buffer ), "UNKNOWN_DEVICE_%02x" , device );
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+
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+
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+ * function_name = function_name_buffer ;
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+ * slot_name = slot_name_buffer ;
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+
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+ }
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+
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+
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+
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uint32_t pci_default_read_config (PCIDevice * d ,
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uint32_t address , int len )
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{
@@ -1520,6 +1679,21 @@ uint32_t pci_default_read_config(PCIDevice *d,
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pcie_sync_bridge_lnk (d );
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}
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memcpy (& val , d -> config + address , len );
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+
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+ #if (1 )
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+ const char * function_name = NULL ;
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+ const char * slot_name = NULL ;
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+ uint8_t bus = pci_dev_bus_num (d );
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+ uint32_t devid = object_property_get_int (OBJECT (d ), "addr" , & error_abort );
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+ slot_to_string (bus , devid , & slot_name , & function_name );
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+ if (len == 4 ) {
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+ printf ("pci_io_input_dword(%s, %s, %s, 0x%08x); //%08x\n" , (bus == 0 ) ? "PCI_XBOX_SYSTEM_BUS" : "PCI_XBOX_GPU_BUS" , slot_name , function_name , address , val );
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+ } else if (len == 2 ){
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+ printf ("pci_io_input_word(%s, %s, %s, 0x%08x); //%08x\n" , (bus == 0 ) ? "PCI_XBOX_SYSTEM_BUS" : "PCI_XBOX_GPU_BUS" , slot_name , function_name , address , val );
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+ } else {
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+ printf ("pci_io_input_byte(%s, %s, %s, 0x%08x); //%08x\n" , (bus == 0 ) ? "PCI_XBOX_SYSTEM_BUS" : "PCI_XBOX_GPU_BUS" , slot_name , function_name , address , val );
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+ }
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+ #endif
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return le32_to_cpu (val );
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}
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@@ -1528,6 +1702,24 @@ void pci_default_write_config(PCIDevice *d, uint32_t addr, uint32_t val_in, int
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int i , was_irq_disabled = pci_irq_disabled (d );
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uint32_t val = val_in ;
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+ #if (1 )
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+ const char * function_name = NULL ;
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+ const char * slot_name = NULL ;
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+ uint8_t bus = pci_dev_bus_num (d );
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+ uint32_t devid = object_property_get_int (OBJECT (d ), "addr" , & error_abort );
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+ slot_to_string (bus , devid , & slot_name , & function_name );
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+
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+ uint32_t address = addr ;
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+ int len = l ;
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+ if (len == 4 ) {
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+ printf ("pci_io_output_dword(%s, %s, %s, 0x%08x, 0x%08x);\n" , (bus == 0 ) ? "PCI_XBOX_SYSTEM_BUS" : "PCI_XBOX_GPU_BUS" , slot_name , function_name , address , val );
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+ } else if (len == 2 ){
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+ printf ("pci_io_output_word(%s, %s, %s, 0x%08x, 0x%04x);\n" , (bus == 0 ) ? "PCI_XBOX_SYSTEM_BUS" : "PCI_XBOX_GPU_BUS" , slot_name , function_name , address , val );
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+ } else {
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+ printf ("pci_io_output_byte(%s, %s, %s, 0x%08x, 0x%02x);\n" , (bus == 0 ) ? "PCI_XBOX_SYSTEM_BUS" : "PCI_XBOX_GPU_BUS" , slot_name , function_name , address , val );
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+ }
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+ #endif
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+
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assert (addr + l <= pci_config_size (d ));
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for (i = 0 ; i < l ; val >>= 8 , ++ i ) {
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