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debug_pci
1 parent a8d8ef5 commit b054ca5

14 files changed

+325
-19
lines changed

‎hw/dma/i8257.c

+1-1
Original file line numberDiff line numberDiff line change
@@ -34,7 +34,7 @@
3434
#include "trace.h"
3535

3636

37-
/* #define DEBUG_DMA */
37+
#define DEBUG_DMA
3838

3939
#define dolog(...) fprintf (stderr, "dma: " __VA_ARGS__)
4040
#ifdef DEBUG_DMA

‎hw/pci/pci.c

+192
Original file line numberDiff line numberDiff line change
@@ -1508,6 +1508,165 @@ static void pci_update_irq_disabled(PCIDevice *d, int was_irq_disabled)
15081508
}
15091509
}
15101510

1511+
/* PCI Bus Address and MMIO - We match stock xbox */
1512+
#define PCI_XBOX_SYSTEM_BUS 0
1513+
#define PCI_XBOX_GPU_BUS 1
1514+
1515+
// Bus 0, device 0, function 0.
1516+
#define PCI_HOSTBRIDGE_DEVICE_ID 0
1517+
#define PCI_HOSTBRIDGE_FUNCTION_ID 0
1518+
1519+
// Bus 0, device 1, function 0.
1520+
#define PCI_LPCBRIDGE_DEVICE_ID 1
1521+
#define PCI_LPCBRIDGE_FUNCTION_ID 0
1522+
#define PCI_LPCBRIDGE_IO_REGISTER_BASE_0 0x8000
1523+
1524+
// Bus 0, device 1, function 1.
1525+
#define PCI_SMBUS_DEVICE_ID 1
1526+
#define PCI_SMBUS_FUNCTION_ID 1
1527+
#define PCI_SMBUS_IO_REGISTER_BASE_1 0xC000
1528+
#define PCI_SMBUS_IO_REGISTER_BASE_2 0xC200
1529+
1530+
// Bus 0, device 2, function 0.
1531+
#define PCI_USB0_DEVICE_ID 2
1532+
#define PCI_USB0_FUNCTION_ID 0
1533+
#define PCI_USB0_IRQ 1
1534+
#define PCI_USB0_MEMORY_REGISTER_BASE_0 0xFED00000
1535+
1536+
// Bus 0, device 3, function 0.
1537+
#define PCI_USB1_DEVICE_ID 3
1538+
#define PCI_USB1_FUNCTION_ID 0
1539+
#define PCI_USB1_IRQ 9
1540+
#define PCI_USB1_MEMORY_REGISTER_BASE_0 0xFED08000
1541+
1542+
// Bus 0, device 4, function 0.
1543+
#define PCI_NIC_DEVICE_ID 4
1544+
#define PCI_NIC_FUNCTION_ID 0
1545+
#define PCI_NIC_IRQ 4
1546+
#define PCI_NIC_MEMORY_REGISTER_BASE_0 0xFEF00000
1547+
#define PCI_NIC_IO_REGISTER_BASE_1 0xE000
1548+
1549+
// Bus 0, device 5, function 0.
1550+
#define PCI_APU_DEVICE_ID 5
1551+
#define PCI_APU_FUNCTION_ID 0
1552+
#define PCI_APU_IRQ 5
1553+
#define PCI_APU_MEMORY_REGISTER_BASE_0 0xFE800000
1554+
1555+
// Bus 0, device 6, function 0.
1556+
#define PCI_ACI_DEVICE_ID 6
1557+
#define PCI_ACI_FUNCTION_ID 0
1558+
#define PCI_ACI_IRQ 6
1559+
#define PCI_ACI_IO_REGISTER_BASE_0 0xD000
1560+
#define PCI_ACI_IO_REGISTER_BASE_1 0xD200
1561+
// On retail, this is 0xFEC00000, but we use 0xFEC10000 to prevent overlaying
1562+
// with the IOAPIC as we use it for FreeRTOS
1563+
#define PCI_ACI_MEMORY_REGISTER_BASE_2 0xFEC20000 //0xFEC00000
1564+
1565+
// Bus 0, device 9, function 0.
1566+
#define PCI_IDE_DEVICE_ID 9
1567+
#define PCI_IDE_FUNCTION_ID 0
1568+
#define PCI_IDE_IRQ 14
1569+
#define PCI_IDE_IO_REGISTER_BASE_4 0xFF60
1570+
1571+
// Bus 0, device 30, function 0.
1572+
#define PCI_AGPBRIDGE_DEVICE_ID 30
1573+
#define PCI_AGPBRIDGE_FUNCTION_ID 0
1574+
1575+
// Bus 1, device 0, device 0.
1576+
#define PCI_GPU_DEVICE_ID 0
1577+
#define PCI_GPU_FUNCTION_ID 0
1578+
#define PCI_GPU_IRQ 3
1579+
#define PCI_GPU_MEMORY_REGISTER_BASE_0 0xFD000000
1580+
1581+
static void slot_to_string(uint8_t bus_n, uint32_t devfn, const char **slot_name, const char **function_name){
1582+
uint8_t device = PCI_SLOT(devfn);
1583+
uint8_t function = PCI_FUNC(devfn);
1584+
1585+
if (bus_n == PCI_XBOX_SYSTEM_BUS && device == PCI_HOSTBRIDGE_DEVICE_ID && function == PCI_HOSTBRIDGE_FUNCTION_ID) {
1586+
*function_name = "PCI_HOSTBRIDGE_FUNCTION_ID";
1587+
*slot_name = "PCI_HOSTBRIDGE_DEVICE_ID";
1588+
return;
1589+
}
1590+
1591+
if (bus_n == PCI_XBOX_SYSTEM_BUS && device == PCI_LPCBRIDGE_DEVICE_ID && function == PCI_LPCBRIDGE_FUNCTION_ID) {
1592+
*function_name = "PCI_LPCBRIDGE_FUNCTION_ID";
1593+
*slot_name = "PCI_LPCBRIDGE_DEVICE_ID";
1594+
return;
1595+
}
1596+
1597+
if (bus_n == PCI_XBOX_SYSTEM_BUS && device == PCI_SMBUS_DEVICE_ID && function == PCI_SMBUS_FUNCTION_ID) {
1598+
*function_name = "PCI_SMBUS_FUNCTION_ID";
1599+
*slot_name = "PCI_SMBUS_DEVICE_ID";
1600+
return;
1601+
}
1602+
1603+
if (bus_n == PCI_XBOX_SYSTEM_BUS && device == PCI_SMBUS_DEVICE_ID && function == PCI_SMBUS_FUNCTION_ID) {
1604+
*function_name = "PCI_SMBUS_FUNCTION_ID";
1605+
*slot_name = "PCI_SMBUS_DEVICE_ID";
1606+
return;
1607+
}
1608+
1609+
if (bus_n == PCI_XBOX_SYSTEM_BUS && device == PCI_USB0_DEVICE_ID && function == PCI_USB0_FUNCTION_ID) {
1610+
*function_name = "PCI_USB0_FUNCTION_ID";
1611+
*slot_name = "PCI_USB0_DEVICE_ID";
1612+
return;
1613+
}
1614+
1615+
if (bus_n == PCI_XBOX_SYSTEM_BUS && device == PCI_USB1_DEVICE_ID && function == PCI_USB1_FUNCTION_ID) {
1616+
*function_name = "PCI_USB1_FUNCTION_ID";
1617+
*slot_name = "PCI_USB1_DEVICE_ID";
1618+
return;
1619+
}
1620+
1621+
if (bus_n == PCI_XBOX_SYSTEM_BUS && device == PCI_NIC_DEVICE_ID && function == PCI_NIC_FUNCTION_ID) {
1622+
*function_name = "PCI_NIC_FUNCTION_ID";
1623+
*slot_name = "PCI_NIC_DEVICE_ID";
1624+
return;
1625+
}
1626+
1627+
if (bus_n == PCI_XBOX_SYSTEM_BUS && device == PCI_APU_DEVICE_ID && function == PCI_APU_FUNCTION_ID) {
1628+
*function_name = "PCI_APU_FUNCTION_ID";
1629+
*slot_name = "PCI_APU_DEVICE_ID";
1630+
return;
1631+
}
1632+
1633+
if (bus_n == PCI_XBOX_SYSTEM_BUS && device == PCI_ACI_DEVICE_ID && function == PCI_ACI_FUNCTION_ID) {
1634+
*function_name = "PCI_ACI_FUNCTION_ID";
1635+
*slot_name = "PCI_ACI_DEVICE_ID";
1636+
return;
1637+
}
1638+
1639+
if (bus_n == PCI_XBOX_SYSTEM_BUS && device == PCI_IDE_DEVICE_ID && function == PCI_IDE_FUNCTION_ID) {
1640+
*function_name = "PCI_IDE_FUNCTION_ID";
1641+
*slot_name = "PCI_IDE_DEVICE_ID";
1642+
return;
1643+
}
1644+
1645+
if (bus_n == PCI_XBOX_SYSTEM_BUS && device == PCI_AGPBRIDGE_DEVICE_ID && function == PCI_AGPBRIDGE_FUNCTION_ID) {
1646+
*function_name = "PCI_AGPBRIDGE_FUNCTION_ID";
1647+
*slot_name = "PCI_AGPBRIDGE_DEVICE_ID";
1648+
return;
1649+
}
1650+
1651+
if (bus_n == PCI_XBOX_GPU_BUS && device == PCI_GPU_DEVICE_ID && function == PCI_GPU_FUNCTION_ID) {
1652+
*function_name = "PCI_GPU_FUNCTION_ID";
1653+
*slot_name = "PCI_GPU_DEVICE_ID";
1654+
return;
1655+
}
1656+
1657+
static char function_name_buffer[32];
1658+
static char slot_name_buffer[32];
1659+
snprintf(function_name_buffer, sizeof(function_name_buffer), "UNKNOWN_FUNCTION_%02x", function);
1660+
snprintf(slot_name_buffer, sizeof(slot_name_buffer), "UNKNOWN_DEVICE_%02x", device);
1661+
1662+
1663+
*function_name = function_name_buffer;
1664+
*slot_name = slot_name_buffer;
1665+
1666+
}
1667+
1668+
1669+
15111670
uint32_t pci_default_read_config(PCIDevice *d,
15121671
uint32_t address, int len)
15131672
{
@@ -1520,6 +1679,21 @@ uint32_t pci_default_read_config(PCIDevice *d,
15201679
pcie_sync_bridge_lnk(d);
15211680
}
15221681
memcpy(&val, d->config + address, len);
1682+
1683+
#if (1)
1684+
const char *function_name = NULL;
1685+
const char *slot_name = NULL;
1686+
uint8_t bus = pci_dev_bus_num(d);
1687+
uint32_t devid = object_property_get_int(OBJECT(d), "addr", &error_abort);
1688+
slot_to_string(bus, devid, &slot_name, &function_name);
1689+
if (len == 4) {
1690+
printf("pci_io_input_dword(%s, %s, %s, 0x%08x); //%08x\n", (bus == 0) ? "PCI_XBOX_SYSTEM_BUS" : "PCI_XBOX_GPU_BUS", slot_name, function_name, address, val);
1691+
} else if (len == 2){
1692+
printf("pci_io_input_word(%s, %s, %s, 0x%08x); //%08x\n", (bus == 0) ? "PCI_XBOX_SYSTEM_BUS" : "PCI_XBOX_GPU_BUS", slot_name, function_name, address, val);
1693+
} else {
1694+
printf("pci_io_input_byte(%s, %s, %s, 0x%08x); //%08x\n", (bus == 0) ? "PCI_XBOX_SYSTEM_BUS" : "PCI_XBOX_GPU_BUS", slot_name, function_name, address, val);
1695+
}
1696+
#endif
15231697
return le32_to_cpu(val);
15241698
}
15251699

@@ -1528,6 +1702,24 @@ void pci_default_write_config(PCIDevice *d, uint32_t addr, uint32_t val_in, int
15281702
int i, was_irq_disabled = pci_irq_disabled(d);
15291703
uint32_t val = val_in;
15301704

1705+
#if (1)
1706+
const char *function_name = NULL;
1707+
const char *slot_name = NULL;
1708+
uint8_t bus = pci_dev_bus_num(d);
1709+
uint32_t devid = object_property_get_int(OBJECT(d), "addr", &error_abort);
1710+
slot_to_string(bus, devid, &slot_name, &function_name);
1711+
1712+
uint32_t address = addr;
1713+
int len = l;
1714+
if (len == 4) {
1715+
printf("pci_io_output_dword(%s, %s, %s, 0x%08x, 0x%08x);\n", (bus == 0) ? "PCI_XBOX_SYSTEM_BUS" : "PCI_XBOX_GPU_BUS", slot_name, function_name, address, val);
1716+
} else if (len == 2){
1717+
printf("pci_io_output_word(%s, %s, %s, 0x%08x, 0x%04x);\n", (bus == 0) ? "PCI_XBOX_SYSTEM_BUS" : "PCI_XBOX_GPU_BUS", slot_name, function_name, address, val);
1718+
} else {
1719+
printf("pci_io_output_byte(%s, %s, %s, 0x%08x, 0x%02x);\n", (bus == 0) ? "PCI_XBOX_SYSTEM_BUS" : "PCI_XBOX_GPU_BUS", slot_name, function_name, address, val);
1720+
}
1721+
#endif
1722+
15311723
assert(addr + l <= pci_config_size(d));
15321724

15331725
for (i = 0; i < l; val >>= 8, ++i) {

‎hw/xbox/acpi_xbox.c

+3-1
Original file line numberDiff line numberDiff line change
@@ -32,7 +32,7 @@
3232
#include "migration/vmstate.h"
3333
#include "ui/xemu-widescreen.h"
3434

35-
// #define DEBUG
35+
#define DEBUG
3636
#ifdef DEBUG
3737
# define XBOX_DPRINTF(format, ...) printf(format, ## __VA_ARGS__)
3838
#else
@@ -110,13 +110,15 @@ static void xbox_pm_update_sci_fn(ACPIREGS *regs)
110110
static uint64_t xbox_pm_gpe_readb(void *opaque, hwaddr addr, unsigned width)
111111
{
112112
XBOX_PMRegs *pm = opaque;
113+
printf("GPE readb: %08x\n", (uint32_t)addr);
113114
return acpi_gpe_ioport_readb(&pm->acpi_regs, addr);
114115
}
115116

116117
static void xbox_pm_gpe_writeb(void *opaque, hwaddr addr, uint64_t val,
117118
unsigned width)
118119
{
119120
XBOX_PMRegs *pm = opaque;
121+
printf("GPE writeb: %08x = %02x\n", (uint32_t)addr, (uint8_t)val);
120122
acpi_gpe_ioport_writeb(&pm->acpi_regs, addr, val);
121123
acpi_update_sci(&pm->acpi_regs, pm->irq);
122124
}

‎hw/xbox/mcpx/apu.c

+5-2
Original file line numberDiff line numberDiff line change
@@ -58,7 +58,7 @@
5858
case (v)+(step)*2: \
5959
case (v)+(step)*3
6060

61-
// #define DEBUG_MCPX
61+
//#define DEBUG_MCPX
6262

6363
#ifdef DEBUG_MCPX
6464
#define DPRINTF(fmt, ...) \
@@ -377,6 +377,7 @@ static uint64_t mcpx_apu_read(void *opaque, hwaddr addr, unsigned int size)
377377
{
378378
MCPXAPUState *d = opaque;
379379

380+
printf("mcpx_apu_read: addr=%08x size=%d\n", (uint32_t)addr, size);
380381
uint64_t r = 0;
381382
switch (addr) {
382383
case NV_PAPU_XGSCNT:
@@ -398,6 +399,8 @@ static void mcpx_apu_write(void *opaque, hwaddr addr, uint64_t val,
398399
{
399400
MCPXAPUState *d = opaque;
400401

402+
printf("mcpx_apu_write: addr=%08x val=%08x size=%d\n", (uint32_t)addr, (uint32_t)val, size);
403+
401404
trace_mcpx_apu_reg_write(addr, size, val);
402405

403406
switch (addr) {
@@ -1320,7 +1323,7 @@ static hwaddr get_data_ptr(hwaddr sge_base, unsigned int max_sge, uint32_t addr)
13201323
ldl_le_phys(&address_space_memory, sge_base + entry * 4 * 2);
13211324
// uint32_t prd_control =
13221325
// ldl_le_phys(&address_space_memory, sge_base + entry * 4 * 2 + 4);
1323-
DPRINTF("Addr: 0x%08X, control: 0x%08X\n", prd_address, prd_control);
1326+
//DPRINTF("Addr: 0x%08X, control: 0x%08X\n", prd_address, prd_control);
13241327
return prd_address + addr % TARGET_PAGE_SIZE;
13251328
}
13261329

‎hw/xbox/nv2a/nv2a_int.h

+30
Original file line numberDiff line numberDiff line change
@@ -525,6 +525,8 @@ void nv2a_reg_log_read(int block, hwaddr addr, unsigned int size, uint64_t val)
525525
block_name = blocktable[block].name;
526526
}
527527
trace_nv2a_reg_read(block_name, addr, size, val);
528+
return;
529+
printf("nv2a_reg_log_read: %s, addr=%" HWADDR_PRIx ", size=%d, val=%" PRIx64 "\n", block_name, addr, size, val);
528530
}
529531

530532
static inline
@@ -535,6 +537,34 @@ void nv2a_reg_log_write(int block, hwaddr addr, unsigned int size, uint64_t val)
535537
block_name = blocktable[block].name;
536538
}
537539
trace_nv2a_reg_write(block_name, addr, size, val);
540+
return;
541+
if (block == 18) return;
542+
// PRAMDAC
543+
#if (0)
544+
if (block == 17) {
545+
printf("nv2a_reg_log_write: %s, addr=%" HWADDR_PRIx ", size=%d, val=%" PRIx64 "\n", block_name, addr, size, val);
546+
switch (addr) {
547+
case(0x800) : printf("FP_VDISPLAY_END: %d\n", val); break;
548+
case(0x804) : printf("FP_VTOTAL: %d\n", val); break;
549+
case(0x808) : printf("FP_VCRTC: %d\n", val); break;
550+
case(0x80c) : printf("FP_VSYNC_START: %d\n", val); break;
551+
case(0x810) : printf("FP_VSYNC_END: %d\n", val); break;
552+
case(0x814) : printf("FP_VVALID_START: %d\n", val); break;
553+
case(0x818) : printf("FP_VVALID_END: %d\n", val); break;
554+
case(0x820) : printf("FP_HDISPLAY_END: %d\n", val); break;
555+
case(0x824) : printf("FP_HTOTAL: %d\n", val); break;
556+
case(0x828) : printf("FP_HCRTC: %d\n", val); break;
557+
case(0x82c) : printf("FP_HSYNC_START: %d\n", val); break;
558+
case(0x830) : printf("FP_HSYNC_END: %d\n", val); break;
559+
case(0x834) : printf("FP_HVALID_START: %d\n", val); break;
560+
case(0x838) : printf("FP_HVALID_END: %d\n", val); break;
561+
case(0x84c) : printf("FP_MARGIN_COLOR: %d\n", val); break;
562+
default: break;
563+
}
564+
} else {
565+
printf("nv2a_reg_log_write: %s, addr=%" HWADDR_PRIx ", size=%d, val=%" PRIx64 "\n", block_name, addr, size, val);
566+
}
567+
#endif
538568
}
539569

540570
#define DEFINE_PROTO(n) \

‎hw/xbox/nv2a/user.c

+2-2
Original file line numberDiff line numberDiff line change
@@ -57,11 +57,11 @@ uint64_t user_read(void *opaque, hwaddr addr, unsigned int size)
5757
}
5858
} else {
5959
/* ramfc */
60-
assert(false);
60+
//assert(false);
6161
}
6262
} else {
6363
/* PIO Mode */
64-
assert(false);
64+
//assert(false);
6565
}
6666

6767
qemu_mutex_unlock(&d->pfifo.lock);

‎hw/xbox/smbus_adm1032.c

+1-1
Original file line numberDiff line numberDiff line change
@@ -33,7 +33,7 @@
3333
#define TYPE_SMBUS_ADM1032 "smbus-adm1032"
3434
#define SMBUS_ADM1032(obj) OBJECT_CHECK(SMBusADM1032Device, (obj), TYPE_SMBUS_ADM1032)
3535

36-
// #define DEBUG
36+
#define DEBUG
3737
#ifdef DEBUG
3838
# define DPRINTF(format, ...) printf(format, ## __VA_ARGS__)
3939
#else

‎hw/xbox/smbus_cx25871.c

+1-1
Original file line numberDiff line numberDiff line change
@@ -33,7 +33,7 @@
3333
#define TYPE_SMBUS_CX25871 "smbus-cx25871"
3434
#define SMBUS_CX25871(obj) OBJECT_CHECK(SMBusCX25871Device, (obj), TYPE_SMBUS_CX25871)
3535

36-
// #define DEBUG
36+
#define DEBUG
3737
#ifdef DEBUG
3838
# define DPRINTF(format, ...) printf(format, ## __VA_ARGS__)
3939
#else

‎hw/xbox/smbus_fs454.c

+6-2
Original file line numberDiff line numberDiff line change
@@ -33,7 +33,7 @@
3333
#define TYPE_SMBUS_fs454 "smbus-fs454"
3434
#define SMBUS_fs454(obj) OBJECT_CHECK(SMBusfs454Device, (obj), TYPE_SMBUS_fs454)
3535

36-
// #define DEBUG
36+
//#define DEBUG
3737
#ifdef DEBUG
3838
# define DPRINTF(format, ...) printf(format, ## __VA_ARGS__)
3939
#else
@@ -62,8 +62,12 @@ static int smbus_fs454_write_data(SMBusDevice *dev, uint8_t *buf, uint8_t len)
6262

6363
if (len < 1) return 0;
6464

65-
DPRINTF("smbus_fs454_write_data: addr=0x%02x cmd=0x%02x val=0x%02x\n",
65+
DPRINTF("smbus_fs454_write_data: addr=0x%02x cmd=0x%02x val=0x%02x",
6666
dev->i2c.address, cmd, buf[0]);
67+
for (int i = 1; i < len; i++) {
68+
DPRINTF(" 0x%02x", buf[i]);
69+
}
70+
DPRINTF(" len=%d\n", len);
6771

6872
memcpy(cx->registers + cmd, buf, MIN(len, 256 - cmd));
6973

‎hw/xbox/smbus_xbox_smc.c

+1-1
Original file line numberDiff line numberDiff line change
@@ -41,7 +41,7 @@
4141
#define TYPE_XBOX_SMC "smbus-xbox-smc"
4242
#define XBOX_SMC(obj) OBJECT_CHECK(SMBusSMCDevice, (obj), TYPE_XBOX_SMC)
4343

44-
// #define DEBUG
44+
#define DEBUG
4545
#ifdef DEBUG
4646
# define DPRINTF(format, ...) printf(format, ## __VA_ARGS__)
4747
#else

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