Files

code
- adder_cum_sub_4bit.v
- adder_cum_sub_4bit_fh.v
- all_basic_gates.v
- alu.v
- and_g.v
- binary_to_graycode_vector.v
- cmos_for_exp.v
- cmos_inverter.v
- cmos_nand.v
- counter_design_down.v
- decoder38.v
- decoder_24.v
- dff.v
- even_parity_3bit.v
- even_parity_6bit.v
- exp_using_decoder38.v
- expression-1.v
- expression-2.v
- expression-4.v
- expression-5.v
- forloop_1.v
- forloop_2.v
- full_adder_data_flow.v
- full_adder_gate_flow.v
- full_adder_using_mux41.v
- full_subtractor_data_flow.v
- full_subtractor_gate_flow.v
- graycode_to_binary_4bit.v
- half_adder_data_flow.v
- half_adder_gate_flow.v
- half_adder_using_decoder.v
- half_subtractor_data_flow.v
- half_subtractor_gate_flow.v
- jkff.v
- mag_comp_1bit.v
- magnitude_comp_4bit.v
- mealy_101.v
- mealy_1100.v
- moore_101.v
- mul22_data_flow.v
- multiplier2x2.v
- mux21_cond.v
- mux21_data_flow.v
- mux41_cond.v
- mux41_data_flow.v
- mux41_gate_flow.v
- nand_g.v
- nand_to_not.v
- nor_g.v
- not_g.v
- not_to_or.v
- odd_parity_6bit.v
- ripple_carry_adder_4bit.v
- srff.v
- structural_nand.v
- tff.v
- up_counter_design.v
img
ReadME.md

nor_g.v

Sep 30, 2021

97e0bb5 · Sep 30, 2021