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radaretrufae
radare
authored and
trufae
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Fix flag register usage and conditional branching in v850.np
1 parent 5d564ef commit 227d8b6

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4 files changed

+24
-22
lines changed

4 files changed

+24
-22
lines changed

‎libr/anal/arch/v850np/opc.inc‎

Lines changed: 18 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -703,14 +703,16 @@ const struct v850_operand v850_operands[] = {
703703

704704

705705
// this array can be used for the assembler, not just the disassembler
706+
// flag registers are: s, z, ov and cy (for sign, zero, overflow and carry
707+
706708
const struct v850_opcode v850_opcodes[] = {
707709
/* Standard instructions. */
708710
{ "add", OP (0x0e), OP_MASK, IF1, 0, V850_CPU_ALL, R_ANAL_OP_TYPE_ADD, "#0,#1,+="},
709711
{ "add", OP (0x12), OP_MASK, IF2, 0, V850_CPU_ALL, R_ANAL_OP_TYPE_ADD, "#0,#1,+=" },
710712
{ "addi", OP (0x30), OP_MASK, IF6, 0, V850_CPU_ALL, R_ANAL_OP_TYPE_ADD, "#0,#1,+,#2,=" },
711713
{ "adf", two (0x07e0, 0x03a0), two (0x07e0, 0x07e1), {CCCC_NOTSA, R1, R2, R3}, 0, V850_CPU_E2_UP },
712-
{ "and", OP (0x0a), OP_MASK, IF1, 0, V850_CPU_ALL, R_ANAL_OP_TYPE_AND, "#0,#1,&,#1,=,1,#1,<<,?{1,$s,:=},0,$s,:=,0,$o,:=,#1,?{1,$z,:=},0,$z,:=" },
713-
{ "andi", OP (0x36), OP_MASK, IF6U, 0, V850_CPU_ALL, R_ANAL_OP_TYPE_AND, "#0,#1,&,#1,=,$o=0,$s,$z" },
714+
{ "and", OP (0x0a), OP_MASK, IF1, 0, V850_CPU_ALL, R_ANAL_OP_TYPE_AND, "#0,#1,&,#1,=,0,o,:=,$s,s,:=,$z,z,:=" },
715+
{ "andi", OP (0x36), OP_MASK, IF6U, 0, V850_CPU_ALL, R_ANAL_OP_TYPE_AND, "#0,#1,&,#1,=,0,o,:=,$s,s,:=,$z,z,:=" },
714716
/* Signed integer. */
715717
{ "bge", BOP (0xe), BOP_MASK, IF3, 0, V850_CPU_ALL, R_ANAL_OP_TYPE_CJMP },
716718
{ "bgt", BOP (0xf), BOP_MASK, IF3, 0, V850_CPU_ALL, R_ANAL_OP_TYPE_CJMP },
@@ -722,8 +724,8 @@ const struct v850_opcode v850_opcodes[] = {
722724
{ "bnh", BOP (0x3), BOP_MASK, IF3, 0, V850_CPU_ALL, R_ANAL_OP_TYPE_CJMP },
723725
{ "bnl", BOP (0x9), BOP_MASK, IF3, 0, V850_CPU_ALL, R_ANAL_OP_TYPE_CJMP },
724726
/* Common. */
725-
{ "be", BOP (0x2), BOP_MASK, IF3, 0, V850_CPU_ALL, R_ANAL_OP_TYPE_CJMP, "$z,!,?{,#0,PC,=,}" }, // TODO: shouldn't those two be flipped?
726-
{ "bne", BOP (0xa), BOP_MASK, IF3, 0, V850_CPU_ALL, R_ANAL_OP_TYPE_CJMP, "$z,?{,#0,PC,=,}" },
727+
{ "be", BOP (0x2), BOP_MASK, IF3, 0, V850_CPU_ALL, R_ANAL_OP_TYPE_CJMP, "z,?{,#0,PC,=,}" }, // TODO: shouldn't those two be flipped?
728+
{ "bne", BOP (0xa), BOP_MASK, IF3, 0, V850_CPU_ALL, R_ANAL_OP_TYPE_CJMP, "z,!,?{,#0,PC,=,}" },
727729
/* Others. */
728730
{ "bc", BOP (0x1), BOP_MASK, IF3, 0, V850_CPU_ALL, R_ANAL_OP_TYPE_CJMP },
729731
{ "bf", BOP (0xa), BOP_MASK, IF3, 0, V850_CPU_ALL, R_ANAL_OP_TYPE_CJMP },
@@ -809,8 +811,8 @@ const struct v850_opcode v850_opcodes[] = {
809811
{ "clr1", two (0x07e0, 0x00e4), two (0x07e0, 0xffff), {R2, R1}, 3, V850_CPU_NON0 },
810812
{ "cmov", two (0x07e0, 0x0320), two (0x07e0, 0x07e1), {MOVCC, R1, R2, R3}, 0, V850_CPU_NON0 },
811813
{ "cmov", two (0x07e0, 0x0300), two (0x07e0, 0x07e1), {MOVCC, I5, R2, R3}, 0, V850_CPU_NON0 },
812-
{ "cmp", OP (0x0f), OP_MASK, IF1, 0, V850_CPU_ALL, R_ANAL_OP_TYPE_CMP, "#0,#1,==,$z,z,:=,$s,s,:=,$c,c,:=" },
813-
{ "cmp", OP (0x13), OP_MASK, IF2, 0, V850_CPU_ALL, R_ANAL_OP_TYPE_CMP, "#0,#1,==,$z,z,:=,$s,s,:=,$c,c,:=" },
814+
{ "cmp", OP (0x0f), OP_MASK, IF1, 0, V850_CPU_ALL, R_ANAL_OP_TYPE_CMP, "#0,#1,==,$z,z,:=,$s,s,:=,$c,cy,:=" },
815+
{ "cmp", OP (0x13), OP_MASK, IF2, 0, V850_CPU_ALL, R_ANAL_OP_TYPE_CMP, "#0,#1,==,$z,z,:=,$s,s,:=,$c,cy,:=" },
814816
{ "ctret", two (0x07e0, 0x0144), two (0xffff, 0xffff), {0}, 0, V850_CPU_NON0 },
815817
{ "dbcp", one (0xe840), one (0xffff), {0}, 0, V850_CPU_E3V5_UP },
816818
{ "dbhvtrap", one (0xe040), one (0xffff), {0}, 0, V850_CPU_E3V5_UP },
@@ -872,12 +874,12 @@ const struct v850_opcode v850_opcodes[] = {
872874
{ "jmp32", one (0x06e0), one (0xffe0), {D32_31, R1}, 2, V850_CPU_E2_UP | V850_CPU_OPTION_ALIAS },
873875
{ "jmpw", one (0x06e0), one (0xffe0), {D32_31, R1}, 2, V850_CPU_E2_UP | V850_CPU_OPTION_ALIAS },
874876

875-
{ "jr", two (0x0780, 0x0000), two (0xffc0, 0x0001), {D22}, 0, V850_CPU_ALL, R_ANAL_OP_TYPE_JMP },
876-
{ "jr", one (0x02e0), one (0xffff), {D32_31_PCREL}, 0, V850_CPU_E2_UP, R_ANAL_OP_TYPE_JMP },
877+
{ "jr", two (0x0780, 0x0000), two (0xffc0, 0x0001), {D22}, 0, V850_CPU_ALL, R_ANAL_OP_TYPE_JMP, "#0,PC,:=" },
878+
{ "jr", one (0x02e0), one (0xffff), {D32_31_PCREL}, 0, V850_CPU_E2_UP, R_ANAL_OP_TYPE_JMP, "#0,PC,:=" },
877879
/* Gas local alias of mov imm22(not defined in spec). */
878-
{ "jr22", two (0x0780, 0x0000), two (0xffc0, 0x0001), {D22}, 0, V850_CPU_ALL | V850_CPU_OPTION_ALIAS },
880+
{ "jr22", two (0x0780, 0x0000), two (0xffc0, 0x0001), {D22}, 0, V850_CPU_ALL | V850_CPU_OPTION_ALIAS, R_ANAL_OP_TYPE_JMP, "#0,PC,:=" },
879881
/* Gas local alias of mov imm32(not defined in spec). */
880-
{ "jr32", one (0x02e0), one (0xffff), {D32_31_PCREL}, 0, V850_CPU_E2_UP | V850_CPU_OPTION_ALIAS },
882+
{ "jr32", one (0x02e0), one (0xffff), {D32_31_PCREL}, 0, V850_CPU_E2_UP | V850_CPU_OPTION_ALIAS, R_ANAL_OP_TYPE_JMP, "#0,PC,:=" },
881883

882884
/* Alias of bcond (same as CA850). */
883885
{ "jgt", BOP (0xf), BOP_MASK, IF3, 0, V850_CPU_ALL, R_ANAL_OP_TYPE_CJMP },
@@ -890,17 +892,17 @@ const struct v850_opcode v850_opcodes[] = {
890892
{ "jl", BOP (0x1), BOP_MASK, IF3, 0, V850_CPU_ALL, R_ANAL_OP_TYPE_CJMP },
891893
{ "jnl", BOP (0x9), BOP_MASK, IF3, 0, V850_CPU_ALL, R_ANAL_OP_TYPE_CJMP },
892894
/* Common. */
893-
{ "je", BOP (0x2), BOP_MASK, IF3, 0, V850_CPU_ALL, R_ANAL_OP_TYPE_CJMP },
894-
{ "jne", BOP (0xa), BOP_MASK, IF3, 0, V850_CPU_ALL, R_ANAL_OP_TYPE_CJMP },
895+
{ "je", BOP (0x2), BOP_MASK, IF3, 0, V850_CPU_ALL, R_ANAL_OP_TYPE_CJMP, "z,?{,#0,PC,:=,}" },
896+
{ "jne", BOP (0xa), BOP_MASK, IF3, 0, V850_CPU_ALL, R_ANAL_OP_TYPE_CJMP, "z,!,?{,#0,PC,:=,}" },
895897
/* Others. */
896898
{ "jv", BOP (0x0), BOP_MASK, IF3, 0, V850_CPU_ALL, R_ANAL_OP_TYPE_CJMP },
897899
{ "jnv", BOP (0x8), BOP_MASK, IF3, 0, V850_CPU_ALL, R_ANAL_OP_TYPE_CJMP },
898900
{ "jn", BOP (0x4), BOP_MASK, IF3, 0, V850_CPU_ALL, R_ANAL_OP_TYPE_CJMP },
899901
{ "jp", BOP (0xc), BOP_MASK, IF3, 0, V850_CPU_ALL, R_ANAL_OP_TYPE_CJMP },
900-
{ "jc", BOP (0x1), BOP_MASK, IF3, 0, V850_CPU_ALL, R_ANAL_OP_TYPE_CJMP },
901-
{ "jnc", BOP (0x9), BOP_MASK, IF3, 0, V850_CPU_ALL, R_ANAL_OP_TYPE_CJMP },
902-
{ "jz", BOP (0x2), BOP_MASK, IF3, 0, V850_CPU_ALL, R_ANAL_OP_TYPE_CJMP },
903-
{ "jnz", BOP (0xa), BOP_MASK, IF3, 0, V850_CPU_ALL, R_ANAL_OP_TYPE_CJMP },
902+
{ "jc", BOP (0x1), BOP_MASK, IF3, 0, V850_CPU_ALL, R_ANAL_OP_TYPE_CJMP, "cy,?{,#0,PC,:=,}" },
903+
{ "jnc", BOP (0x9), BOP_MASK, IF3, 0, V850_CPU_ALL, R_ANAL_OP_TYPE_CJMP, "cy,!,?{,#0,PC,:=,}" },
904+
{ "jz", BOP (0x2), BOP_MASK, IF3, 0, V850_CPU_ALL, R_ANAL_OP_TYPE_CJMP , "z,?{,#0,PC,:=,}" },
905+
{ "jnz", BOP (0xa), BOP_MASK, IF3, 0, V850_CPU_ALL, R_ANAL_OP_TYPE_CJMP, "z,!,?{,#0,PC,:=,}" },
904906
{ "jbr", BOP (0x5), BOP_MASK, IF3, 0, V850_CPU_ALL, R_ANAL_OP_TYPE_CJMP },
905907
{ "ldacc", two (0x07e0, 0x0bc4), two (0x07e0, 0xffff), {R1, R2}, 0, V850_CPU_E2_UP | V850_CPU_OPTION_EXTENSION, R_ANAL_OP_TYPE_LOAD },
906908
{ "ld.b", two (0x0700, 0x0000), two (0x07e0, 0x0000), {D16, R1, R2}, 2, V850_CPU_ALL, R_ANAL_OP_TYPE_LOAD, "#0,[1],#1,=" },

‎libr/anal/arch/v850np/v850dis.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
/* V850 disassembler inspired by the GNU binutils one -- 2021 - pancake */
1+
/* V850 disassembler inspired by the GNU binutils one -- 2021-2022 - pancake */
22

33
#include "v850dis.h"
44
#include "opc.inc"

‎libr/anal/p/anal_arm_regprofile.inc‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -504,7 +504,7 @@ static char *get_reg_profile(RAnal *anal) {
504504
"flg vf .1 .540 0 overflow\n" // +28
505505
"flg cf .1 .541 0 carry\n" // +29
506506
"flg zf .1 .542 0 zero\n" // +30
507-
"flg nf .1 .543 0 negative\n" // +31
507+
"flg nf .1 .543 0 sign\n" // +31 - also known as negative
508508

509509
/* NEON and VFP registers */
510510
/* 32bit float sub-registers */

‎libr/anal/p/anal_v850_np.c‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -143,10 +143,10 @@ static char *get_reg_profile(RAnal *anal) {
143143
"gpr epi .1 132.17 0\n" // exception processing interrupt
144144
"gpr id .1 132.18 0\n" // :? should be id
145145
"gpr sat .1 132.19 0\n" // saturation detection
146-
"flg cy .1 132.28 0\n" // carry or borrow
147-
"flg ov .1 132.29 0\n" // overflow
148-
"flg s .1 132.30 0\n" // signed result
149-
"flg z .1 132.31 0\n"; // zero result
146+
"flg cy .1 132.28 0 carry\n" // carry or borrow
147+
"flg ov .1 132.29 0 overflow\n" // overflow
148+
"flg s .1 132.30 0 sign\n" // signed result
149+
"flg z .1 132.31 0 zero\n"; // zero result
150150
return strdup (p);
151151
}
152152

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