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Description
From here.
What I did
- Connect “Com I/O output” to “Gate mode CV input”
- Turn “Gate mode knob” clockwise fully
- Set the fader values as [0.1, 0, 0.2, 0, 0.3, 0, 0.4, 0] from left to right
I chose 0 at even-numbered steps, so I thought no gates would occur at it, but a short trigger occurred. I don’t have a hardware, so I can’t tell it is intended or not. I put an image which I hope to explain this situation.
I suspect that this is due to the there being a 1 sample delay being introduced by the patch cable. A possible solution is to introduce a 1 sample delay to the gate out generator, but more investigation needed.
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