Clock.SMAClock.ucf

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## Clock Sources
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##
## SMA Clock
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##		Bank:						9
##			VCCO:					2.5V (VADJ_FPGA)
##		Location:				J67, J68
NET "ZC706_SMAClock_p"									LOC = "AD18" | IOSTANDARD = LVDS_25;	## {INOUT}	J67
NET "ZC706_SMAClock_n"									LOC = "AD19" | IOSTANDARD = LVDS_25;	## {INOUT}	J68