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xusheng6 opened this issue Apr 8, 2024 · 1 comment · May be fixed by #6423
Open

Add support for Intel APX #5246

xusheng6 opened this issue Apr 8, 2024 · 1 comment · May be fixed by #6423
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Arch: x86 Issues with the x86/x64 architecture plugin Effort: Medium Issue should take < 1 month Impact: Low Issue is a papercut or has a good, supported workaround Type: Enhancement Issue is a small enhancement to existing functionality

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@xusheng6
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xusheng6 commented Apr 8, 2024 •
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Intel recently introduced a large extention to the existing x64 ISA, adding registers R16-R31, as well as three operand style instrutions for many arithematic operations, e.g.,

Relevant links:

  1. https://www.intel.com/content/www/us/en/developer/articles/technical/advanced-performance-extensions-apx.html
  2. https://en.wikipedia.org/wiki/X86#APX_(Advanced_Performance_Extensions)

This extension is slated for future CPUs so we are not rushing to add support for it, but we still wish to add it in at a reasonable point.

Note, that I have been working on updating xed to v2024.04.01 (https://github.com/intelxed/xed/releases/tag/v2024.04.01), which already has the support for APX. However, there are various changes needed on my end to actually add support for it, e.g., extending the register list (https://github.com/Vector35/binaryninja-api/blob/dev/arch/x86/arch_x86.cpp#L2930), etc.
@xusheng6 xusheng6 added Type: Enhancement Issue is a small enhancement to existing functionality Arch: x86 Issues with the x86/x64 architecture plugin Impact: Low Issue is a papercut or has a good, supported workaround Effort: Low Issue should take < 1 week labels Apr 8, 2024
@plafosse plafosse added Effort: Medium Issue should take < 1 month and removed Effort: Low Issue should take < 1 week labels Apr 9, 2024
@nullableVoidPtr nullableVoidPtr linked a pull request Feb 17, 2025 that will close this issue
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I've tried my hand with some untested code - I've had to add EGPRs and JMPABS for a CTF, and I figured I could add the rest. I've made some assumptions about XED operands with NDD and they'll have to be properly tested. I'm not too certain with how ZU should be properly implemented in the IL however.

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Arch: x86 Issues with the x86/x64 architecture plugin Effort: Medium Issue should take < 1 month Impact: Low Issue is a papercut or has a good, supported workaround Type: Enhancement Issue is a small enhancement to existing functionality
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[arch/x86] Intel APX support nullableVoidPtr/binaryninja-api
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@plafosse @nullableVoidPtr @xusheng6