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WalterBrightdlang-bot
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move dfoidx to CGstate
1 parent 4559aee commit ac008f9

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4 files changed

+10
-10
lines changed

4 files changed

+10
-10
lines changed

compiler/src/dmd/backend/cgcod.d

Lines changed: 6 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -113,8 +113,6 @@ regm_t msavereg; // Mask of registers that we would like to save.
113113
regm_t mfuncreg; // Mask of registers preserved by a function
114114

115115
regm_t allregs; // ALLREGS optionally including mBP
116-
117-
int dfoidx; /* which block we are in */
118116
}
119117

120118
/*********************************
@@ -252,11 +250,11 @@ void codgen(Symbol *sfunc)
252250
cgreg_reset();
253251
foreach (i, b; dfo[])
254252
{
255-
dfoidx = cast(int)i;
253+
cgstate.dfoidx = cast(int)i;
256254
regcon.used = msavereg | regcon.cse.mval; // registers already in use
257255
blcodgen(b); // gen code in depth-first order
258256
//printf("b.Bregcon.used = %s\n", regm_str(b.Bregcon.used));
259-
cgreg_used(dfoidx, b.Bregcon.used); // gather register used information
257+
cgreg_used(cgstate.dfoidx, b.Bregcon.used); // gather register used information
260258
}
261259
}
262260
else
@@ -1368,14 +1366,14 @@ private void blcodgen(block *bl)
13681366
sflsave[i] = s.Sfl;
13691367
if (regParamInPreg(s) &&
13701368
regcon.params & s.Spregm() &&
1371-
vec_testbit(dfoidx,s.Srange))
1369+
vec_testbit(cgstate.dfoidx,s.Srange))
13721370
{
13731371
// regcon.used |= s.Spregm();
13741372
}
13751373

13761374
if (s.Sfl == FLreg)
13771375
{
1378-
if (vec_testbit(dfoidx,s.Srange))
1376+
if (vec_testbit(cgstate.dfoidx,s.Srange))
13791377
{
13801378
regcon.mvar |= s.Sregm;
13811379
if (s.Sclass == SC.fastpar || s.Sclass == SC.shadowreg)
@@ -1384,11 +1382,11 @@ private void blcodgen(block *bl)
13841382
}
13851383
else if (s.Sflags & SFLspill)
13861384
{
1387-
if (vec_testbit(dfoidx,s.Srange))
1385+
if (vec_testbit(cgstate.dfoidx,s.Srange))
13881386
{
13891387
anyspill = cast(int)(i + 1);
13901388
cgreg_spillreg_prolog(bl,s,cdbstore,cdbload);
1391-
if (vec_testbit(dfoidx,s.Slvreg))
1389+
if (vec_testbit(cgstate.dfoidx,s.Slvreg))
13921390
{
13931391
s.Sfl = FLreg;
13941392
regcon.mvar |= s.Sregm;

compiler/src/dmd/backend/cod1.d

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3990,7 +3990,7 @@ static if (0)
39903990
if (config.flags4 & CFG4optimized)
39913991
{ // If symbol is live in this basic block and
39923992
// isn't already in a register
3993-
if (s.Srange && vec_testbit(dfoidx, s.Srange) &&
3993+
if (s.Srange && vec_testbit(cgstate.dfoidx, s.Srange) &&
39943994
s.Sfl != FLreg)
39953995
{ // Then symbol must be allocated on stack
39963996
needframe = true;

compiler/src/dmd/backend/cod3.d

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -941,7 +941,7 @@ void outblkexitcode(ref CodeBuilder cdb, block *bl, ref int anyspill, const(char
941941
{ Symbol *s = globsym[i];
942942

943943
if (s.Sflags & SFLspill &&
944-
vec_testbit(dfoidx,s.Srange))
944+
vec_testbit(cgstate.dfoidx,s.Srange))
945945
{
946946
s.Sfl = sflsave[i]; // undo block register assignments
947947
cgreg_spillreg_epilog(bl,s,cdbstore,cdbload);

compiler/src/dmd/backend/code.d

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -188,6 +188,8 @@ struct CGstate
188188
targ_size_t funcoffset; // offset of start of function
189189
targ_size_t retoffset; // offset from start of func to ret code
190190
targ_size_t retsize; // size of function return code
191+
192+
int dfoidx; // which block we are in
191193
}
192194

193195
public import dmd.backend.nteh;

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