AIE/D/08-n-body-simulator: update README.md

Author: Nirdesh S A

AI_Engine_Development/AIE/Design_Tutorials/08-n-body-simulator/Module_03_pl_kernels/README.md

@@ -62,7 +62,7 @@ After coming up with 400 tile AI Engine design, the next step is the come up wit
 |`packet_receiver`|Packet switching kernel that evaluates packet headers from incoming streams and reroutes data to one of 4 AXI4-Streams|499.5 MHz|
 |`s2mm_mp`|Quad-channel data-mover that moves data from AXI4-Stream to DDR.|411 MHz|
 
-Using Vivado timing closure techniques, you can increase the FMax if needed. To showcase the example, integrate using the 300 MHz clock. There is also a 400 MHz timing-closed design in the [beamforming tutorial](https://github.com/Xilinx/Vitis-Tutorials/tree/master/AI_Engine_Development/Design_Tutorials/03-beamforming).
+Using Vivado timing closure techniques, you can increase the FMax if needed. To showcase the example, integrate using the 300 MHz clock. There is also a 400 MHz timing-closed design in the [beamforming tutorial](../../03-beamforming).
 
 ![alt text](images/pl_kernels_highlighted.PNG)
 
@@ -95,10 +95,7 @@ The `s2mm_mp` kernel is generated from the `kernel/spec.json` specification. Rev
 
 * [Vitis Utilities Library Documentation](https://docs.amd.com/r/en-US/Vitis_Libraries/utils/index.html)
 
-* [Generating PL Data-Mover Kernels](https://docs.amd.com/r/en-US/Vitis_Libraries/utils/datamover/kernel_gen_guide.html)
-
-* [Vitis Compiler Command](https://docs.amd.com/r/en-US/ug1393-vitis-application-acceleration/v-Command)
-
+* [Vitis Compiler Command](https://docs.amd.com/r/en-US/ug1399-vitis-hls/vitis-v-and-vitis-run-Commands)
 ## Next Steps
 
 After compiling the PL datamover kernels, you are ready to link the entire hardware design together in the next module, [Module 04 - Full System Design](../Module_04_full_system_design).

AI_Engine_Development/AIE/Design_Tutorials/08-n-body-simulator/Module_04_full_system_design/README.md

@@ -50,9 +50,9 @@ The following image was taken from the Vivado project for the entire design. It
 
 ## References
 
-* [Beamforming Tutorial - Module_04 - AI Engine and PL Integration](https://github.com/Xilinx/Vitis-Tutorials/tree/master/AI_Engine_Development/Design_Tutorials/03-beamforming)
+* [Beamforming Tutorial - Module_04 - AI Engine and PL Integration](../../03-beamforming)
 
-* [Vitis Compiler Command](https://docs.amd.com/r/en-US/ug1393-vitis-application-acceleration/v-Command)
+* [Vitis Compiler Command](https://docs.amd.com/r/en-US/ug1399-vitis-hls/vitis-v-and-vitis-run-Commands)
 
 ## Next Steps
 

AI_Engine_Development/AIE/Design_Tutorials/08-n-body-simulator/Module_05_host_sw/README.md

@@ -112,8 +112,10 @@ The following is the general execution flow for the host applications.
 
 * [XRT Github Repo](https://github.com/Xilinx/XRT)
 
-* [Vitis Developing Application Documentation](https://docs.amd.com/r/en-US/ug1393-vitis-application-acceleration/Developing-Applications)
-* [Vitis Building-and-Running-the-Application Documentation](https://docs.amd.com/r/en-US/ug1393-vitis-application-acceleration/Building-and-Running-the-Application)
+* [Vitis Developing Application Documentation](https://docs.amd.com/r/en-US/ug1701-vitis-accelerated-embedded/Developing-Vitis-Kernels-and-Applications)
+
+* [Vitis Building-and-Running-the-Application Documentation](https://docs.amd.com/r/en-US/ug1701-vitis-accelerated-embedded/Building-and-Running-the-System)
+
 
 ## Next Steps
 After compiling the host software, you are ready to create the sd_card.img and run the design on hardware in the next module, [Module 06 - SD Card and Hardware Run](../Module_06_sd_card_and_hw_run).

AI_Engine_Development/AIE/Design_Tutorials/08-n-body-simulator/Module_07_results/README.md

@@ -33,8 +33,8 @@ Following is a table comparing the executions times to simulate 12,800 particles
 |Name|Hardware|Algorithm|Average Execution Time for 1 Timestep (seconds)|
 |---|---|--|---|
 |Python NBody Simulator|x86 Linux Machine|O(N)|14.96|
-|C++ NBody Simulator|A72 Embedded Arm Processor|O(N<sup>2</sup>)|120.487|
-|AI Engine NBody Simulator|Versal AI Engine IP|O(N)|0.0118|
+|C++ NBody Simulator|A72 Embedded Arm Processor|O(N<sup>2</sup>)|120.591|
+|AI Engine NBody Simulator|Versal AI Engine IP|O(N)|0.0074065|
 
 As you can see, the N-Body Simulator implemented on the AI Engine offers a x2,800 improvement over the Python O(N) implementation and a x24,800 improvement over the C++ O(N<sup>2</sup>) implementation. A vectorized C++ NBody Simulator O(N) implementation can be created with pthreads, but is left as an exercise for the user.
 

AI_Engine_Development/AIE/Design_Tutorials/08-n-body-simulator/README.md

@@ -35,16 +35,13 @@ This tutorial can be run on the [VCK190 Board](https://www.xilinx.com/products/b
 
 * [AM009 AI Engine Architecture Manual](https://docs.amd.com/r/en-US/am009-versal-ai-engine/Revision-History)
 
-* [AI Engine Documentation](https://docs.amd.com/v/u/en-US/ug1416-vitis-documentation)
-
 ### *Tools*: Installing the Tools
 
 1. Obtain a license to enable beta devices in AMD tools (to use the VCK190 platform).
 2. Obtain licenses for AI Engine tools.
 3. Follow the instructions for the [Vitis Software Platform Installation](https://docs.amd.com/r/en-US/ug1393-vitis-application-acceleration/Vitis-Software-Platform-Installation) and ensure you have the following tools:
 
       * [Vitis™ Unified Software Development Platform 2024.2](https://docs.amd.com/v/u/en-US/ug1416-vitis-documentation)
-      * [Xilinx® Runtime and Platforms (XRT)](https://docs.amd.com/r/en-US/ug1393-vitis-application-acceleration/Installing-Xilinx-Runtime-and-Platforms)
       * [Embedded Platform VCK190 Base or VCK190 Base](https://www.xilinx.com/support/download/index.html/content/xilinx/en/downloadNav/embedded-platforms.html)
 
 ### *Environment*: Setting Up Your Shell Environment
@@ -83,17 +80,15 @@ which aiecompiler
 ### HPC Applications
 The goal of this tutorial is to create a general-purpose floating point accelerator for HPC applications. This tutorial demonstrates a x24,800 performance improvement using the AI Engine accelerator over the naive C++ implementation on the A72 embedded Arm® processor.
 
-#### A similar accelerator example was implemented on the AMD UltraScale+™-based Ultra96 device using only PL resources [here](https://www.hackster.io/rajeev-patwari-ultra96-2019/ultra96-fpga-accelerated-parallel-n-particle-gravity-sim-87f45e).
-
 
 |Name|Hardware|Algorithm Complexity|Average Execution Time to Simulate 12,800 Particles for 1 Timestep (seconds)|
 |---|---|--|---|
 |Python N-Body Simulator|x86 Linux Machine|O(N)|14.96|
-|C++ N-Body Simulator|A72 Embedded Arm Processor|O(N<sup>2</sup>)|120.487|
-|AI Engine N-Body SImulator|Versal AI Engine IP|O(N)|0.0118|
+|C++ N-Body Simulator|A72 Embedded Arm Processor|O(N<sup>2</sup>)|120.591|
+|AI Engine N-Body SImulator|Versal AI Engine IP|O(N)|0.007405|
 
 ### PL Data-Mover Kernels
-Another goal of this tutorial is to showcase how to generate PL Data-Mover kernels from the [AMD Vitis Utility Library](https://docs.amd.com/r/en-US/Vitis_Libraries/utils/datamover/kernel_gen_guide.html). These kernels moves any amount of data from DDR buffers to AXI-Streams.  
+Another goal of this tutorial is to showcase how to generate PL Data-Mover kernels These kernels moves any amount of data from DDR buffers to AXI-Streams.  
 
 ## The N-Body Problem
 The N-Body problem is the problem of predicting the motions of a group of N objects which each have a gravitational force on each other. For any particle `i` in the system, the summation of the gravitational forces from all the other particles results in the acceleration of particle `i`. From this acceleration, we can calculate a particle's velocity and position (`x y z vx vy vz`) will be in the next timestep. Newtonian physics describes the behavior of very large bodies/particles within our universe. With certain assumptions, the laws can be applied to bodies/particles ranging from astronomical size to a golf ball (and even smaller).
@@ -272,8 +267,6 @@ By default, the Makefiles build the design for the VCK190 Production board (i.e.
 
 * [N-body problem wiki page](https://en.wikipedia.org/wiki/N-body_problem)
 
-* [Ultra96 FPGA-Accelerated Parallel N-Particle Gravity Sim](https://www.hackster.io/rajeev-patwari-ultra96-2019/ultra96-fpga-accelerated-parallel-n-particle-gravity-sim-87f45e)
-
 ## Next Steps
 
 Let's get started with running the python model of the N-Body simulator on an x86 machine in [Module 01 - Python Simulations on x86](Module_01_python_sims).