AI_Engine_Development/AIE/Design_Tutorials/12-IFFT64K-2D - Issues with an adjustment to the code

[mengstro]

Hi all, I attempted to convert the 256pt FFT's into 128pt ones throughout the code, only adding code to support doing the 128pt FFT's in AIE hardware (all other changes were to the design constants, like zero padding, FFT size, etc). I've confirmed that the individual FFT's work in emulation, however it appears that the FPGA kernel that performs the transpose is not behaving as it should be, as the result is only zeros after resizing everything. I tried removing the "back" set of FFT's, so the code only features the front 5 and the transpose function, with DMA transfer FPGA kernels encapsulating it.

Could I have someone check to see if there are issues with the transpose function when reducing the size of the FFT's to 128pt with 12pt of padding?

I'm going to be testing the transpose function in isolation to provide relevant data for this conversation

Thanks and all the best,
Matt

[AnusheelXilinx]

Hi @mengstro,
The example source code is supposed to be used as-is and may not support the parameterized usage, please refer below the link for your use case:
https://docs.amd.com/r/en-US/Vitis_Libraries/dsp/user_guide/L2/func-fft-vss.html

Thanks
Anusheel