Skip to content

Actions: Xilinx/finn

Actions

All workflows

Actions

Loading...
Loading

Showing runs from all workflows
1,117 workflow runs
1,117 workflow runs

Filter by Event

Filter by Status

Filter by Branch

Filter by Actor

Update folding configuration for FPGA flow tutorial QuicktestPRAgainstDev #1911: Pull request #1212 opened by auphelia
15m 10s hotfix/tutorial
hotfix/tutorial
15m 10s
Merge pull request #1030 from iksnagreb/fix/round-and-clip-thresholds Pre-commit #1301: Commit 8da09eb pushed by auphelia
32s dev
dev
32s
Merge pull request #1030 from iksnagreb/fix/round-and-clip-thresholds QuicktestPRAgainstDev #1908: Commit 8da09eb pushed by auphelia
14m 55s dev
dev
14m 55s
Merge pull request #1030 from iksnagreb/fix/round-and-clip-thresholds DockerImage #462: Commit 8da09eb pushed by auphelia
15m 22s dev
dev
15m 22s
4-BIT DSP-MVU: Allow very wide lanes requiring even a high-lane extension. Pre-commit #1300: Pull request #1203 opened by preusser
42s tpreusse.mvu_harden
tpreusse.mvu_harden
42s
4-BIT DSP-MVU: Allow very wide lanes requiring even a high-lane extension. QuicktestPRAgainstDev #1907: Pull request #1203 opened by preusser
14m 29s tpreusse.mvu_harden
tpreusse.mvu_harden
14m 29s
Fix RoundAndClipThresholds Transformation Pre-commit #1299: Pull request #1030 synchronize by auphelia
36s iksnagreb:fix/round-and-clip-thresholds
iksnagreb:fix/round-and-clip-thresholds
36s
Fix RoundAndClipThresholds Transformation QuicktestPRAgainstDev #1906: Pull request #1030 synchronize by auphelia
15m 47s iksnagreb:fix/round-and-clip-thresholds
iksnagreb:fix/round-and-clip-thresholds
15m 47s
InsertDWC and multiple input/output nodes Pre-commit #1297: Pull request #1201 opened by mdanilow
43s mdanilow:fix/branched_dwc
mdanilow:fix/branched_dwc
43s
InsertDWC and multiple input/output nodes QuicktestPRAgainstDev #1904: Pull request #1201 opened by mdanilow
14m 28s mdanilow:fix/branched_dwc
mdanilow:fix/branched_dwc
14m 28s
Merge pull request #1188 from mdanilow/fix/branched_structures DockerImage #461: Commit ab1c721 pushed by auphelia
15m 6s dev
dev
15m 6s
Merge pull request #1188 from mdanilow/fix/branched_structures QuicktestPRAgainstDev #1903: Commit ab1c721 pushed by auphelia
14m 13s dev
dev
14m 13s
Merge pull request #1188 from mdanilow/fix/branched_structures Pre-commit #1296: Commit ab1c721 pushed by auphelia
38s dev
dev
38s
Fix RoundAndClipThresholds Transformation QuicktestPRAgainstDev #1902: Pull request #1030 synchronize by auphelia
14m 41s iksnagreb:fix/round-and-clip-thresholds
iksnagreb:fix/round-and-clip-thresholds
14m 41s
Fix RoundAndClipThresholds Transformation Pre-commit #1295: Pull request #1030 synchronize by auphelia
38s iksnagreb:fix/round-and-clip-thresholds
iksnagreb:fix/round-and-clip-thresholds
38s
Fix RoundAndClipThresholds Transformation Pre-commit #1294: Pull request #1030 synchronize by auphelia
30s iksnagreb:fix/round-and-clip-thresholds
iksnagreb:fix/round-and-clip-thresholds
30s
Fix RoundAndClipThresholds Transformation QuicktestPRAgainstDev #1901: Pull request #1030 synchronize by auphelia
15m 38s iksnagreb:fix/round-and-clip-thresholds
iksnagreb:fix/round-and-clip-thresholds
15m 38s
Fix RoundAndClipThresholds Transformation Pre-commit #1293: Pull request #1030 synchronize by auphelia
31s iksnagreb:fix/round-and-clip-thresholds
iksnagreb:fix/round-and-clip-thresholds
31s
Fix RoundAndClipThresholds Transformation QuicktestPRAgainstDev #1900: Pull request #1030 synchronize by auphelia
15m 21s iksnagreb:fix/round-and-clip-thresholds
iksnagreb:fix/round-and-clip-thresholds
15m 21s
Merge pull request #1198 from Xilinx/tpreusse.mvu_harden QuicktestPRAgainstDev #1899: Commit 7076ed3 pushed by preusser
14m 1s dev
dev
14m 1s
Merge pull request #1198 from Xilinx/tpreusse.mvu_harden Pre-commit #1292: Commit 7076ed3 pushed by preusser
30s dev
dev
30s
Merge pull request #1198 from Xilinx/tpreusse.mvu_harden DockerImage #460: Commit 7076ed3 pushed by preusser
15m 16s dev
dev
15m 16s
pages build and deployment pages-build-deployment #32: by auphelia
54s github-pages
github-pages
54s
Harden synthesis-time lane width computation against numeric overflow in exponentials. Pre-commit #1291: Pull request #1198 opened by preusser
37s tpreusse.mvu_harden
tpreusse.mvu_harden
37s
Harden synthesis-time lane width computation against numeric overflow in exponentials. QuicktestPRAgainstDev #1898: Pull request #1198 opened by preusser
14m 19s tpreusse.mvu_harden
tpreusse.mvu_harden
14m 19s
ProTip! You can narrow down the results and go further in time using created:<2024-09-25 or the other filters available.