Ideas on how to streamline Stitched IP-MIPI integration

[JPPalacios]

Hi,

I have been using FINN for a bit now but I am curious to see how others have included FINN/PYNQ IPs into their designs.

My first attempt was to generate a zynq project design, manually splice my PCam5C MIPI hierarchy block into the input end of the streamingdataflow pipeline via TCL script, and regenerate the hardware files. Before I delve deeper, I wanted to see if there were other ways to merge the MIPI and FINN IPs over to a Kria-PYNQ notebook runtime.

Is there another way to do this via FINN build steps? Maybe using a TCL script to bring in a MIPI block? Should I import the IP straight into the Base PYNQ design instead? I am looking to automate this process too so would love to hear your feedback!

Thanks!

Update:
For those curious, I was able to hijack the Kria-PYNQ build_bitstream.tcl file after generating my FINN IPs and updating my IP paths. I now have a working capture pipeline that sends 720p video frames to a resizer HLS IP and then to the FINN feature extraction IPs.