AssertionError with set_top <name> variable missing

[ixiotidi]

Prerequisites

Please make sure to check off these prerequisites before submitting a bug report.

• Test that the bug appears on the current version of the dev-branch. Make sure to include the commit hash of the commit you checked out.
• Check that the issue hasn't already been reported, by checking the currently open issues.
• If there are steps to reproduce the problem, make sure to write them down below.
• If relevant, please include the ONNX files, which were created directly before and/or after the bug.

Quick summary

When running build.build_dataflow_cfg('model.onnx',cfg), I'm getting an error at the step_hw_ipgen which indicates that the name of the project hasn't been set

Details

I'm getting the following error:

AssertionError: IPGen failed: /tmp/finn_builds/code_gen_ipgen__qvp1hitw/project_/sol1/impl/ip not found. Check log under /tmp/finn_builds/code_gen_ipgen__qvp1hitw

/workspace/finn/src/finn/custom_op/fpgadataflow/hlsbackend.py(186)ipgen_singlenode_code()
-> assert os.path.isdir(ip_path), "IPGen failed: %s not found. Check log under %s" % (

with the following configuration

cfg = build.DataflowBuildConfig(
steps=build_steps,
board="fpga",
output_dir='output_%s_%s' % ("tfc_w1a1","fpga"),
synth_clk_period_ns=10.0,
fpga_part="xczu3eg-sbva484-1-e",
shell_flow_type=build_cfg.ShellFlowType.VIVADO_ZYNQ,
stitched_ip_gen_dcp=False,
generate_outputs=[
build_cfg.DataflowOutputType.STITCHED_IP,
],
# verify_steps=[
# build_cfg.VerificationStepType.TIDY_UP_PYTHON,
# build_cfg.VerificationStepType.STREAMLINED_PYTHON,
# build_cfg.VerificationStepType.FOLDED_HLS_CPPSIM,
# build_cfg.VerificationStepType.STITCHED_IP_RTLSIM,
# ],
save_intermediate_models=True,
)

Steps to Reproduce

Add what needs to be done to reproduce the bug. Add code examples where useful
and make sure to include the resulting ONNX files, and the commit hash you are working on.

1. Clone the FINN repository
2. Checkout the dev branch, with commit hash: [...]
3. Start the docker container with the command: [...]
4. Run transformation on ONNX file model.onnx (from the example) or run the dataflow builder with the following settings:

Expected behavior

I would have expected that this would work for the example model

Actual behavior

The project name isn't set and hence the ipgen step crashes

Optional

Possible fix

If you already know where the issue stems from, or you have a hint please let us know.

Additional context

Add any other context about the problem here.

[auphelia]

Hi @ixiotidi, which example is this? Is this one of the notebooks or finn-examples and with which finn branch are you working?
From the error message, it looks like there might be an issue with Vivado/Vitis.
Please check the vitis hls logfile that will be in: /tmp/finn_builds/code_gen_ipgen__qvp1hitw

[ixiotidi]

Hi @auphelia thanks for the reply, so we are using the model.onnx file from the xample in the fpgadataflow folder. This is basically running the notebook for loading the configuration but without the tb data part. Finally this is finn v0.10.0. For the Vitis log I'm getting the following (sorry the filename is different because I had to re-run it):

****** Vitis HLS - High-Level Synthesis from C, C++ and OpenCL v2024.2 (64-bit)
**** SW Build 5238294 on Nov 8 2024
**** IP Build 5239520 on Sun Nov 10 16:12:51 MST 2024
**** SharedData Build 5239561 on Fri Nov 08 14:39:27 MST 2024
**** Start of session at: Wed Sep 3 17:34:32 2025
** Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
** Copyright 2022-2024 Advanced Micro Devices, Inc. All Rights Reserved.

source /opt/modules/Vitis/2024.2/scripts/vitis_hls/hls.tcl -notrace
INFO: [HLS 200-10] For user 'ixiotidi' on host 'atlas-nextgen-wp21.dyndns.cern.ch' (Linux_x86_64 version 5.14.0-503.23.2.el9_5.x86_64) on Wed Sep 03 17:34:34 CEST 2025
INFO: [HLS 200-10] In directory '/tmp/finn_builds/code_gen_ipgen__ot94ast5'
WARNING: [HLS 200-2053] The vitis_hls executable is deprecated. Consider using vitis-run --mode hls --tcl
Sourcing Tcl script '/tmp/finn_builds//code_gen_ipgen__ot94ast5/hls_syn_.tcl'
INFO: [HLS 200-1510] Running: source /tmp/finn_builds//code_gen_ipgen__ot94ast5/hls_syn_.tcl
HLS project: project_
HW source dir: /tmp/finn_builds//code_gen_ipgen__ot94ast5
finn-hlslib dir: /workspace/finn/deps/finn-hlslib
custom HLS dir: /workspace/finn/custom_hls
INFO: [HLS 200-1510] Running: open_project project_
INFO: [HLS 200-10] Creating and opening project '/tmp/finn_builds/code_gen_ipgen__ot94ast5/project_'.
INFO: [HLS 200-1510] Running: add_files /tmp/finn_builds//code_gen_ipgen__ot94ast5/top_.cpp -cflags -std=c++14 -I/workspace/finn/deps/finn-hlslib -I/workspace/finn/custom_hls
INFO: [HLS 200-10] Adding design file '/tmp/finn_builds//code_gen_ipgen__ot94ast5/top_.cpp' to the project
INFO: [HLS 200-1510] Running: set_top
ERROR: [HLS 200-101] set_top: Argument 'name' requires a value!
SYNTAX syn.top=name=

invoked from within

"set_top $config_toplevelfxn"
(file "/tmp/finn_builds//code_gen_ipgen__ot94ast5/hls_syn_.tcl" line 17)
invoked from within
"source /tmp/finn_builds//code_gen_ipgen__ot94ast5/hls_syn_.tcl"
invoked from within
"hls::main /tmp/finn_builds//code_gen_ipgen__ot94ast5/hls_syn_.tcl"
("uplevel" body line 1)
invoked from within
"uplevel 1 hls::main {*}$newargs"
(procedure "hls_proc" line 16)
invoked from within
"hls_proc [info nameofexecutable] $::argv"
INFO: [HLS 200-112] Total CPU user time: 1.27 seconds. Total CPU system time: 0.12 seconds. Total elapsed time: 2.9 seconds; peak allocated memory: 109.102 MB.

[auphelia]

Hi @ixiotidi , could you please try to use dev instead? I will have a look if I can reproduce the error, it looks like at the time of the code generation the name of the node is not set, which is unexpected behaviour.

[auphelia]

What are build_steps? Are these the default build steps from FINN? If you have custom steps instead, it might be a simple fix to call GiveUniqueNodeNames at the end of your custom step.

from qonnx.transformation.general import GiveUniqueNodeNames
model = model.transform(GiveUniqueNodeNames())

We are using the node name as a top module name in the code generation and if it is not set, the string is empty which might cause the behaviour you are seeing above.

[ixiotidi]

Hi @auphelia

I'm getting the same error with the dev branch, looking into the model.onnx file I can see that all the nodes have their names:

Div_0
Div_0
Div_0
Reshape_0
Reshape_0
Reshape_0
Mul_0
Mul_0
Mul_0
Sub_0
Sub_0
Sub_0
...

what I'm doing is basically the following:

import finn.builder.build_dataflow as build
import finn.builder.build_dataflow_config as build_cfg
import finn.util.data_packing as dpk

build_steps = build_cfg.default_build_dataflow_steps

cfg = build.DataflowBuildConfig(
output_dir='output_model_fpga',
mvau_wwidth_max=80,
synth_clk_period_ns=10.0,
fpga_part='xc7z020clg400-1',
generate_outputs=[
build_cfg.DataflowOutputType.STITCHED_IP,
]
)

build.build_dataflow_cfg('model.onnx', cfg)

And all the steps up to step_hw_ipgen pass and then I get the error

[auphelia]

Hi @ixiotidi,

Thank you! I was able to reproduce the error, the issue is that you have neither a folding configuration file nor a target for FPS (frames per second) set. I will add something to FINN that detects that better and throws an error earlier in the flow.

So, if you add either:
target_fps=100,
or
folding_config_file="folding_config.json",
to your build_cfg then the error will disappear.