From cb3924b6059db3762743d52901f25e98824fe0e0 Mon Sep 17 00:00:00 2001 From: Andreu Carminati Date: Mon, 11 Nov 2024 12:34:17 +0000 Subject: [PATCH] [AIEX] Shift G_CONCAT_VECTORS closer to the user When commiting applyUpdToConcat. This enables more postinc combiner cases. --- llvm/lib/Target/AIE/AIECombinerHelper.cpp | 17 +++++++++- .../AIE/GlobalISel/combine-upd-concat.mir | 33 +++++++++++++++++++ 2 files changed, 49 insertions(+), 1 deletion(-) diff --git a/llvm/lib/Target/AIE/AIECombinerHelper.cpp b/llvm/lib/Target/AIE/AIECombinerHelper.cpp index 066484417e62..92a192b39acc 100644 --- a/llvm/lib/Target/AIE/AIECombinerHelper.cpp +++ b/llvm/lib/Target/AIE/AIECombinerHelper.cpp @@ -1367,10 +1367,25 @@ bool llvm::matchUpdToConcat(MachineInstr &MI, MachineRegisterInfo &MRI, return true; } +/// Find a use of \p MI in the same block where it can be moved +MachineInstr &findClosestToUseInsertPoint(MachineInstr &MI, + MachineRegisterInfo &MRI) { + + for (auto &User : MRI.use_instructions(MI.getOperand(0).getReg())) { + if (User.isPHI()) + continue; + if (User.getParent() == MI.getParent() && canDelayMemOp(MI, User, MRI)) + return User; + } + + return MI; +} + void llvm::applyUpdToConcat(MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B, std::map &IndexRegMap) { - B.setInstrAndDebugLoc(MI); + B.setDebugLoc(MI.getDebugLoc()); + B.setInstr(findClosestToUseInsertPoint(MI, MRI)); SmallVector SrcRegs; for (unsigned Op = 0; Op < IndexRegMap.size(); Op++) { diff --git a/llvm/test/CodeGen/AIE/GlobalISel/combine-upd-concat.mir b/llvm/test/CodeGen/AIE/GlobalISel/combine-upd-concat.mir index c17fddf54b75..705a68302a3f 100644 --- a/llvm/test/CodeGen/AIE/GlobalISel/combine-upd-concat.mir +++ b/llvm/test/CodeGen/AIE/GlobalISel/combine-upd-concat.mir @@ -178,3 +178,36 @@ body: | $wh0 = COPY %254:_(<8 x s32>) $wh1 = COPY %255:_(<8 x s32>) ... + +--- +name: upd_I512.I256_shift_insert_point +body: | + bb.0: + liveins: $p0, $wl2, $wl3 + ; CHECK-LABEL: name: upd_I512.I256_shift_insert_point + ; CHECK: liveins: $p0, $wl2, $wl3 + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<32 x s8>) = COPY $wl2 + ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<32 x s8>) = COPY $wl3 + ; CHECK-NEXT: [[INT:%[0-9]+]]:_(<64 x s8>) = G_INTRINSIC intrinsic(@llvm.aie2.v64int8) + ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(<16 x s32>) = G_BITCAST [[INT]](<64 x s8>) + ; CHECK-NEXT: [[BITCAST1:%[0-9]+]]:_(<8 x s32>) = G_BITCAST [[COPY]](<32 x s8>) + ; CHECK-NEXT: [[BITCAST2:%[0-9]+]]:_(<8 x s32>) = G_BITCAST [[COPY1]](<32 x s8>) + ; CHECK-NEXT: $x1 = COPY [[BITCAST]](<16 x s32>) + ; CHECK-NEXT: $x2 = COPY [[BITCAST]](<16 x s32>) + ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<16 x s32>) = G_CONCAT_VECTORS [[BITCAST1]](<8 x s32>), [[BITCAST2]](<8 x s32>) + ; CHECK-NEXT: $x0 = COPY [[CONCAT_VECTORS]](<16 x s32>) + %95:_(<32 x s8>) = COPY $wl2 + %98:_(<32 x s8>) = COPY $wl3 + %8:_(<64 x s8>) = G_INTRINSIC intrinsic(@llvm.aie2.v64int8) + %9:_(<16 x s32>) = G_BITCAST %8(<64 x s8>) + %21:_(s32) = G_CONSTANT i32 0 + %51:_(s32) = G_CONSTANT i32 1 + %96:_(<8 x s32>) = G_BITCAST %95(<32 x s8>) + %97:_(<16 x s32>) = G_INTRINSIC intrinsic(@llvm.aie2.upd.I512.I256), %9(<16 x s32>), %96(<8 x s32>), %21(s32) + %99:_(<8 x s32>) = G_BITCAST %98(<32 x s8>) + %100:_(<16 x s32>) = G_INTRINSIC intrinsic(@llvm.aie2.upd.I512.I256), %97(<16 x s32>), %99(<8 x s32>), %51(s32) + $x1 = COPY %9:_(<16 x s32>) + $x2 = COPY %9:_(<16 x s32>) + $x0 = COPY %100:_(<16 x s32>) +...