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Merge pull request #323 from yrabbit/pll-script
Fix PLL parameter generation script
2 parents ac3bfa0 + d40220d commit dacb8a7

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.github/workflows/chipdb.yml

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@@ -271,7 +271,7 @@ jobs:
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strategy:
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fail-fast: false
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matrix:
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yosys: [main, yosys-0.44]
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yosys: [main, v0.51]
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nextpnr: [master, nextpnr-0.8]
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steps:
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- uses: actions/checkout@v4

apycula/gowin_pll.py

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@@ -249,7 +249,7 @@ def main():
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for FBDIV_SEL in range(64):
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for ODIV_SEL in [2, 4, 8, 16, 32, 48, 64, 80, 96, 112, 128]:
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PFD = FCLKIN / (IDIV_SEL + 1)
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if not (limits["pfd_min"] < PFD < limits["pfd_max"]):
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if not (limits["pfd_min"] <= PFD <= limits["pfd_max"]):
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continue
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CLKOUT = FCLKIN * (FBDIV_SEL + 1) / (IDIV_SEL + 1)
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if not (limits["clkout_min"] < CLKOUT < limits["clkout_max"]):

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