Stuck in MotherBoard Logo

[emmy-linda]

After Hypervisor loaded switchs to mb logo and nothing happens anymore, maybe the advance rip need be updated?

[emmy-linda]

Basically it loads the hv but doesn't load Windows. I've even tried using reefind to load but it doesn't work. im on AMD.

[Zero-Tang]

Because it just doesn't work yet. It's still in progress.

[emmy-linda]

Because it just doesn't work yet. It's still in progress.

So I can't wait to see this working perfectly, what's missing for this to work? I can help you finish this.

[Zero-Tang]

Glad to hear it. Thing is, it needs some debugging, which is the most annoying part. I would guess there was something wrong with emulating APIC writes. I would recommend you to get started with QEMU+KVM (WSL2 from Windows 11 can run KVM for AMD). While QEMU's TCG could emulate AMD-V, it doesn't work on Windows. I submitted the patch for it but it wasn't merged until 10.0.4 and 10.1.1 versions. Stefan Weil's pre-built binaries don't have these versions yet. You can also try Bochs if you want.

[botellum]

After Hypervisor loaded switchs to mb logo and nothing happens anymore, maybe the advance rip need be updated?

Seems like NoirVisors INIT handling is broken, some firmware likes to send an INIT to all cores exlcuding itself (BSP) before handing full control (exit boot services) to the operating system. Noirvisor then exits and waits for the SIPI. Yet the guest os always sends an INIT - (de-assert INIT) - SIPI - SIPI sequence, regardless of whether the firmware already sent the INIT to all APs. Since GIF is currently 0, since we are in the #VMEXIT handler, waiting for a SIPI, the INIT will be latched onto the LAPIC, and is now pending. Once NoirVisor receives the SIPI's, it continues execution in the guest at the specified RIP, but now, since GIF = 1, the pending INIT gets converted into a #SX and immediately #VMEXITs again and waits for a SIPI again, which will never be sent by the guest. Should be the issue of your problem. There's two ways I could think of to fix this: Virtualize INITs as well, and only send the first INIT to the actual LAPIC in order to force the target vcpu to exit and gain control of it, and discard the remaining INITs, or, stgi before the vmexit handler and register a #SX idt handler that handles this properly.