arch/risc-v: inline up_cpu_index if RISCV_PERCPU_SCRATCH is not enabled

Inline the short function to provide better performance.

Signed-off-by: Huang Qi <[email protected]>

Author: no1wudi

arch/risc-v/include/irq.h

@@ -697,10 +697,27 @@ irqstate_t up_irq_enable(void);
  * Description:
  *   Return the real core number regardless CONFIG_SMP setting
  *
+ *   When CONFIG_RISCV_PERCPU_SCRATCH is enabled, this uses the percpu
+ *   scratch area to store the hart ID. This is needed when the CSR_MHARTID
+ *   register may not contain the actual hart ID.
+ *
+ *   When CONFIG_RISCV_PERCPU_SCRATCH is not enabled, this directly reads
+ *   the CSR_MHARTID register. Use this version when you can guarantee
+ *   CSR_MHARTID contains the actual hart ID. This is the default behavior
+ *   that can be achieved by single instruction to provide better
+ *   performance.
+ *
  ****************************************************************************/
 
 #ifdef CONFIG_ARCH_HAVE_MULTICPU
-int up_cpu_index(void) noinstrument_function;
+noinstrument_function static inline int up_cpu_index(void)
+{
+#ifdef CONFIG_RISCV_PERCPU_SCRATCH
+  return (int)riscv_mhartid();
+#else
+  return READ_CSR(CSR_MHARTID);
+#endif
+}
 #endif /* CONFIG_ARCH_HAVE_MULTICPU */
 
 /****************************************************************************

arch/risc-v/src/common/riscv_cpuindex.c

@@ -37,19 +37,6 @@
  * Public Functions
  ****************************************************************************/
 
-/****************************************************************************
- * Name: up_cpu_index
- *
- * Description:
- *   Return the real core number regardless CONFIG_SMP setting
- *
- ****************************************************************************/
-
-int up_cpu_index(void)
-{
-  return (int)riscv_mhartid();
-}
-
 /****************************************************************************
  * Name: up_this_cpu
  *