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wangzhi16wangzhi16
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Use small lock to protect resources about irq in arch ARM.
Signed-off-by: wangzhi16 <[email protected]>
1 parent 0e1214d commit 682cacc

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54 files changed

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-229
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54 files changed

+707
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lines changed

‎arch/arm/src/a1x/a1x_irq.c‎

Lines changed: 24 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -30,8 +30,9 @@
3030
#include <assert.h>
3131
#include <errno.h>
3232
#include <debug.h>
33+
#include <sched.h>
3334

34-
#include <nuttx/irq.h>
35+
#include <nuttx/spinlock.h>
3536
#include <nuttx/arch.h>
3637

3738
#include "arm_internal.h"
@@ -40,6 +41,12 @@
4041
#include "a1x_pio.h"
4142
#include "a1x_irq.h"
4243

44+
/****************************************************************************
45+
* Private Data
46+
****************************************************************************/
47+
48+
static spinlock_t g_irq_lock = SP_UNLOCKED;
49+
4350
/****************************************************************************
4451
* Private Functions
4552
****************************************************************************/
@@ -59,7 +66,8 @@ static void a1x_dumpintc(const char *msg, int irq)
5966

6067
/* Dump some relevant ARMv7 register contents */
6168

62-
flags = enter_critical_section();
69+
flags = spin_lock_irqsave(&g_irq_lock);
70+
sched_lock();
6371

6472
irqinfo("ARMv7 (%s, irq=%d):\n", msg, irq);
6573
irqinfo(" CPSR: %08x SCTLR: %08x\n", flags, cp15_rdsctlr());
@@ -96,7 +104,8 @@ static void a1x_dumpintc(const char *msg, int irq)
96104
getreg32(A1X_INTC_PRIO2), getreg32(A1X_INTC_PRIO3),
97105
getreg32(A1X_INTC_PRIO4));
98106

99-
leave_critical_section(flags);
107+
spin_unlock_irqrestore(&g_irq_lock, flags);
108+
sched_unlock();
100109
}
101110
#else
102111
# define a1x_dumpintc(msg, irq)
@@ -297,7 +306,8 @@ void up_disable_irq(int irq)
297306
{
298307
/* These operations must be atomic */
299308

300-
flags = enter_critical_section();
309+
flags = spin_lock_irqsave(&g_irq_lock);
310+
sched_lock();
301311

302312
/* Make sure that the interrupt is disabled. */
303313

@@ -314,7 +324,8 @@ void up_disable_irq(int irq)
314324
putreg32(regval, regaddr);
315325

316326
a1x_dumpintc("disable", irq);
317-
leave_critical_section(flags);
327+
spin_unlock_irqrestore(&g_irq_lock, flags);
328+
sched_unlock();
318329
}
319330

320331
#ifdef CONFIG_A1X_PIO_IRQ
@@ -345,7 +356,8 @@ void up_enable_irq(int irq)
345356
{
346357
/* These operations must be atomic */
347358

348-
flags = enter_critical_section();
359+
flags = spin_lock_irqsave(&g_irq_lock);
360+
sched_lock();
349361

350362
/* Make sure that the interrupt is enabled. */
351363

@@ -362,7 +374,8 @@ void up_enable_irq(int irq)
362374
putreg32(regval, regaddr);
363375

364376
a1x_dumpintc("enable", irq);
365-
leave_critical_section(flags);
377+
spin_unlock_irqrestore(&g_irq_lock, flags);
378+
sched_unlock();
366379
}
367380

368381
#ifdef CONFIG_A1X_PIO_IRQ
@@ -398,7 +411,8 @@ int up_prioritize_irq(int irq, int priority)
398411
{
399412
/* These operations must be atomic */
400413

401-
flags = enter_critical_section();
414+
flags = spin_lock_irqsave(&g_irq_lock);
415+
sched_lock();
402416

403417
/* Set the new priority */
404418

@@ -409,7 +423,8 @@ int up_prioritize_irq(int irq, int priority)
409423
putreg32(regval, regaddr);
410424

411425
a1x_dumpintc("prioritize", irq);
412-
leave_critical_section(flags);
426+
spin_unlock_irqrestore(&g_irq_lock, flags);
427+
sched_unlock();
413428
return OK;
414429
}
415430

‎arch/arm/src/at32/at32_irq.c‎

Lines changed: 12 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -30,8 +30,9 @@
3030
#include <stdint.h>
3131
#include <assert.h>
3232
#include <debug.h>
33+
#include <sched.h>
3334

34-
#include <nuttx/irq.h>
35+
#include <nuttx/spinlock.h>
3536
#include <nuttx/arch.h>
3637
#include <arch/irq.h>
3738
#include <arch/armv7-m/nvicpri.h>
@@ -62,6 +63,12 @@
6263
#define NVIC_ENA_OFFSET (0)
6364
#define NVIC_CLRENA_OFFSET (NVIC_IRQ0_31_CLEAR - NVIC_IRQ0_31_ENABLE)
6465

66+
/****************************************************************************
67+
* Private Data
68+
****************************************************************************/
69+
70+
static spinlock_t g_irq_lock = SP_UNLOCKED;
71+
6572
/****************************************************************************
6673
* Private Functions
6774
****************************************************************************/
@@ -79,7 +86,8 @@ static void at32_dumpnvic(const char *msg, int irq)
7986
{
8087
irqstate_t flags;
8188

82-
flags = enter_critical_section();
89+
flags = spin_lock_irqsave(&g_irq_lock);
90+
sched_lock();
8391

8492
irqinfo("NVIC (%s, irq=%d):\n", msg, irq);
8593
irqinfo(" INTCTRL: %08x VECTAB: %08x\n",
@@ -123,7 +131,8 @@ static void at32_dumpnvic(const char *msg, int irq)
123131
irqinfo(" %08x\n",
124132
getreg32(NVIC_IRQ64_67_PRIORITY));
125133

126-
leave_critical_section(flags);
134+
spin_unlock_irqrestore(&g_irq_lock, flags);
135+
sched_unlock();
127136
}
128137
#else
129138
# define at32_dumpnvic(msg, irq)

‎arch/arm/src/efm32/efm32_gpioirq.c‎

Lines changed: 15 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -31,7 +31,7 @@
3131
#include <assert.h>
3232

3333
#include <nuttx/arch.h>
34-
#include <nuttx/irq.h>
34+
#include <nuttx/spinlock.h>
3535

3636
#include "arm_internal.h"
3737
#include "hardware/efm32_gpio.h"
@@ -44,6 +44,12 @@
4444
* Pre-processor Definitions
4545
****************************************************************************/
4646

47+
/****************************************************************************
48+
* Private Data
49+
****************************************************************************/
50+
51+
static spinlock_t g_gpioirq_lock = SP_UNLOCKED;
52+
4753
/****************************************************************************
4854
* Private Functions
4955
****************************************************************************/
@@ -198,7 +204,7 @@ void efm32_gpioirq(gpio_pinset_t pinset)
198204

199205
/* Make sure that the pin interrupt is disabled */
200206

201-
flags = enter_critical_section();
207+
flags = spin_lock_irqsave(&g_gpioirq_lock);
202208
regval = getreg32(EFM32_GPIO_IEN);
203209
regval &= ~bit;
204210
putreg32(regval, EFM32_GPIO_IEN);
@@ -248,7 +254,7 @@ void efm32_gpioirq(gpio_pinset_t pinset)
248254
}
249255

250256
putreg32(regval, EFM32_GPIO_EXTIFALL);
251-
leave_critical_section(flags);
257+
spin_unlock_irqrestore(&g_gpioirq_lock, flags);
252258
}
253259

254260
/****************************************************************************
@@ -270,11 +276,11 @@ void efm32_gpioirqenable(int irq)
270276
uint32_t regval;
271277
uint32_t bit;
272278
bit = ((uint32_t)1 << (irq - EFM32_IRQ_EXTI0));
273-
flags = enter_critical_section();
279+
flags = spin_lock_irqsave(&g_gpioirq_lock);
274280
regval = getreg32(EFM32_GPIO_IEN);
275281
regval |= bit;
276282
putreg32(regval, EFM32_GPIO_IEN);
277-
leave_critical_section(flags);
283+
spin_unlock_irqrestore(&g_gpioirq_lock, flags);
278284
#else
279285
bitband_set_peripheral(EFM32_GPIO_IEN, (irq - EFM32_IRQ_EXTI0), 1);
280286
#endif
@@ -301,11 +307,11 @@ void efm32_gpioirqdisable(int irq)
301307
uint32_t bit;
302308

303309
bit = ((uint32_t)1 << (irq - EFM32_IRQ_EXTI0));
304-
flags = enter_critical_section();
310+
flags = spin_lock_irqsave(&g_gpioirq_lock);
305311
regval = getreg32(EFM32_GPIO_IEN);
306312
regval &= ~bit;
307313
putreg32(regval, EFM32_GPIO_IEN);
308-
leave_critical_section(flags);
314+
spin_unlock_irqrestore(&g_gpioirq_lock, flags);
309315
#else
310316
bitband_set_peripheral(EFM32_GPIO_IEN, (irq - EFM32_IRQ_EXTI0), 0);
311317
#endif
@@ -332,11 +338,11 @@ void efm32_gpioirqclear(int irq)
332338
uint32_t bit;
333339

334340
bit = ((uint32_t)1 << (irq - EFM32_IRQ_EXTI0));
335-
flags = enter_critical_section();
341+
flags = spin_lock_irqsave(&g_gpioirq_lock);
336342
regval = getreg32(EFM32_GPIO_IFC);
337343
regval |= bit;
338344
putreg32(regval, EFM32_GPIO_IFC);
339-
leave_critical_section(flags);
345+
spin_unlock_irqrestore(&g_gpioirq_lock, flags);
340346
#else
341347
bitband_set_peripheral(EFM32_GPIO_IFC, (irq - EFM32_IRQ_EXTI0), 1);
342348
#endif

‎arch/arm/src/efm32/efm32_irq.c‎

Lines changed: 12 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -30,8 +30,9 @@
3030
#include <assert.h>
3131
#include <errno.h>
3232
#include <debug.h>
33+
#include <sched.h>
3334

34-
#include <nuttx/irq.h>
35+
#include <nuttx/spinlock.h>
3536
#include <nuttx/arch.h>
3637
#include <arch/armv7-m/nvicpri.h>
3738

@@ -61,6 +62,12 @@
6162
#define NVIC_ENA_OFFSET (0)
6263
#define NVIC_CLRENA_OFFSET (NVIC_IRQ0_31_CLEAR - NVIC_IRQ0_31_ENABLE)
6364

65+
/****************************************************************************
66+
* Private Data
67+
****************************************************************************/
68+
69+
static spinlock_t g_irq_lock = SP_UNLOCKED;
70+
6471
/****************************************************************************
6572
* Private Function
6673
****************************************************************************/
@@ -78,7 +85,8 @@ static void efm32_dumpnvic(const char *msg, int irq)
7885
{
7986
irqstate_t flags;
8087

81-
flags = enter_critical_section();
88+
flags = spin_lock_irqsave(&g_irq_lock);
89+
sched_lock();
8290

8391
irqinfo("NVIC (%s, irq=%d):\n", msg, irq);
8492
irqinfo(" INTCTRL: %08x VECTAB: %08x\n",
@@ -126,7 +134,8 @@ static void efm32_dumpnvic(const char *msg, int irq)
126134
#endif
127135
#endif
128136

129-
leave_critical_section(flags);
137+
spin_unlock_irqrestore(&g_irq_lock, flags);
138+
sched_unlock();
130139
}
131140
#else
132141
# define efm32_dumpnvic(msg, irq)

‎arch/arm/src/eoss3/eoss3_irq.c‎

Lines changed: 12 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -30,8 +30,9 @@
3030
#include <assert.h>
3131
#include <errno.h>
3232
#include <debug.h>
33+
#include <sched.h>
3334

34-
#include <nuttx/irq.h>
35+
#include <nuttx/spinlock.h>
3536
#include <nuttx/arch.h>
3637
#include <arch/armv7-m/nvicpri.h>
3738

@@ -60,6 +61,12 @@
6061
#define NVIC_ENA_OFFSET (0)
6162
#define NVIC_CLRENA_OFFSET (NVIC_IRQ0_31_CLEAR - NVIC_IRQ0_31_ENABLE)
6263

64+
/****************************************************************************
65+
* Private Data
66+
****************************************************************************/
67+
68+
static spinlock_t g_irq_lock = SP_UNLOCKED;
69+
6370
/****************************************************************************
6471
* Private Functions
6572
****************************************************************************/
@@ -77,7 +84,8 @@ static void eoss3_dumpnvic(const char *msg, int irq)
7784
{
7885
irqstate_t flags;
7986

80-
flags = enter_critical_section();
87+
flags = spin_lock_irqsave(&g_irq_lock);
88+
sched_lock();
8189

8290
irqinfo("NVIC (%s, irq=%d):\n", msg, irq);
8391
irqinfo(" INTCTRL: %08x VECTAB: %08x\n",
@@ -107,7 +115,8 @@ static void eoss3_dumpnvic(const char *msg, int irq)
107115
getreg32(NVIC_IRQ24_27_PRIORITY),
108116
getreg32(NVIC_IRQ28_31_PRIORITY));
109117

110-
leave_critical_section(flags);
118+
spin_unlock_irqrestore(&g_irq_lock, flags);
119+
sched_unlock();
111120
}
112121
#else
113122
# define eoss3_dumpnvic(msg, irq)

‎arch/arm/src/gd32f4/gd32f4xx_irq.c‎

Lines changed: 12 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -30,8 +30,9 @@
3030
#include <stdint.h>
3131
#include <assert.h>
3232
#include <debug.h>
33+
#include <sched.h>
3334

34-
#include <nuttx/irq.h>
35+
#include <nuttx/spinlock.h>
3536
#include <nuttx/arch.h>
3637
#include <arch/irq.h>
3738
#include <arch/armv7-m/nvicpri.h>
@@ -62,6 +63,12 @@
6263
#define NVIC_ENA_OFFSET (0)
6364
#define NVIC_CLRENA_OFFSET (NVIC_IRQ0_31_CLEAR - NVIC_IRQ0_31_ENABLE)
6465

66+
/****************************************************************************
67+
* Private Data
68+
****************************************************************************/
69+
70+
static spinlock_t g_irq_lock = SP_UNLOCKED;
71+
6572
/****************************************************************************
6673
* Private Functions
6774
****************************************************************************/
@@ -79,7 +86,8 @@ static void gd32_dumpnvic(const char *msg, int irq)
7986
{
8087
irqstate_t flags;
8188

82-
flags = enter_critical_section();
89+
flags = spin_lock_irqsave(&g_irq_lock);
90+
sched_lock();
8391

8492
irqinfo("NVIC (%s, irq=%d):\n", msg, irq);
8593
irqinfo(" INTCTRL: %08x VECTAB: %08x\n",
@@ -133,7 +141,8 @@ static void gd32_dumpnvic(const char *msg, int irq)
133141
getreg32(NVIC_IRQ92_95_PRIORITY));
134142
#endif
135143

136-
leave_critical_section(flags);
144+
spin_unlock_irqrestore(&g_irq_lock, flags);
145+
sched_unlock();
137146
}
138147
#else
139148
# define gd32_dumpnvic(msg, irq)

‎arch/arm/src/imx9/imx9_gpioirq.c‎

Lines changed: 5 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -33,7 +33,7 @@
3333
#include <debug.h>
3434

3535
#include <nuttx/arch.h>
36-
#include <nuttx/irq.h>
36+
#include <nuttx/spinlock.h>
3737

3838
#include "arm_internal.h"
3939
#include "imx9_gpio.h"
@@ -64,6 +64,8 @@ struct imx9_portisr_s
6464

6565
static struct imx9_portisr_s g_isrtab[IMX9_GPIO_NPORTS];
6666

67+
static spinlock_t g_gpioirq_lock = SP_UNLOCKED;
68+
6769
/****************************************************************************
6870
* Private Functions
6971
****************************************************************************/
@@ -204,12 +206,12 @@ int imx9_gpioirq_attach(gpio_pinset_t pinset, xcpt_t isr, void *arg)
204206

205207
/* Atomically change the handler */
206208

207-
irqstate_t flags = enter_critical_section();
209+
irqstate_t flags = spin_lock_irqsave(&g_gpioirq_lock);
208210

209211
g_isrtab[port].pins[pin].isr = isr;
210212
g_isrtab[port].pins[pin].arg = arg;
211213

212-
leave_critical_section(flags);
214+
spin_unlock_irqrestore(&g_gpioirq_lock, flags);
213215
return OK;
214216
}
215217

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