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wangzhi16wangzhi16
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Use small lock to protect resources related to irq in arch ARM.
Signed-off-by: wangzhi16 <[email protected]>
1 parent 0e1214d commit bad22a0

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-229
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55 files changed

+793
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‎arch/arm/src/a1x/a1x_irq.c‎

Lines changed: 26 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -30,8 +30,9 @@
3030
#include <assert.h>
3131
#include <errno.h>
3232
#include <debug.h>
33+
#include <sched.h>
3334

34-
#include <nuttx/irq.h>
35+
#include <nuttx/spinlock.h>
3536
#include <nuttx/arch.h>
3637

3738
#include "arm_internal.h"
@@ -40,6 +41,14 @@
4041
#include "a1x_pio.h"
4142
#include "a1x_irq.h"
4243

44+
/****************************************************************************
45+
* Private Data
46+
****************************************************************************/
47+
48+
#if defined(CONFIG_DEBUG_IRQ_INFO)
49+
static spinlock_t g_irq_lock = SP_UNLOCKED;
50+
#endif
51+
4352
/****************************************************************************
4453
* Private Functions
4554
****************************************************************************/
@@ -59,7 +68,8 @@ static void a1x_dumpintc(const char *msg, int irq)
5968

6069
/* Dump some relevant ARMv7 register contents */
6170

62-
flags = enter_critical_section();
71+
flags = spin_lock_irqsave(&g_irq_lock);
72+
sched_lock();
6373

6474
irqinfo("ARMv7 (%s, irq=%d):\n", msg, irq);
6575
irqinfo(" CPSR: %08x SCTLR: %08x\n", flags, cp15_rdsctlr());
@@ -96,7 +106,8 @@ static void a1x_dumpintc(const char *msg, int irq)
96106
getreg32(A1X_INTC_PRIO2), getreg32(A1X_INTC_PRIO3),
97107
getreg32(A1X_INTC_PRIO4));
98108

99-
leave_critical_section(flags);
109+
spin_unlock_irqrestore(&g_irq_lock, flags);
110+
sched_unlock();
100111
}
101112
#else
102113
# define a1x_dumpintc(msg, irq)
@@ -297,7 +308,8 @@ void up_disable_irq(int irq)
297308
{
298309
/* These operations must be atomic */
299310

300-
flags = enter_critical_section();
311+
flags = spin_lock_irqsave(&g_irq_lock);
312+
sched_lock();
301313

302314
/* Make sure that the interrupt is disabled. */
303315

@@ -314,7 +326,8 @@ void up_disable_irq(int irq)
314326
putreg32(regval, regaddr);
315327

316328
a1x_dumpintc("disable", irq);
317-
leave_critical_section(flags);
329+
spin_unlock_irqrestore(&g_irq_lock, flags);
330+
sched_unlock();
318331
}
319332

320333
#ifdef CONFIG_A1X_PIO_IRQ
@@ -345,7 +358,8 @@ void up_enable_irq(int irq)
345358
{
346359
/* These operations must be atomic */
347360

348-
flags = enter_critical_section();
361+
flags = spin_lock_irqsave(&g_irq_lock);
362+
sched_lock();
349363

350364
/* Make sure that the interrupt is enabled. */
351365

@@ -362,7 +376,8 @@ void up_enable_irq(int irq)
362376
putreg32(regval, regaddr);
363377

364378
a1x_dumpintc("enable", irq);
365-
leave_critical_section(flags);
379+
spin_unlock_irqrestore(&g_irq_lock, flags);
380+
sched_unlock();
366381
}
367382

368383
#ifdef CONFIG_A1X_PIO_IRQ
@@ -398,7 +413,8 @@ int up_prioritize_irq(int irq, int priority)
398413
{
399414
/* These operations must be atomic */
400415

401-
flags = enter_critical_section();
416+
flags = spin_lock_irqsave(&g_irq_lock);
417+
sched_lock();
402418

403419
/* Set the new priority */
404420

@@ -409,7 +425,8 @@ int up_prioritize_irq(int irq, int priority)
409425
putreg32(regval, regaddr);
410426

411427
a1x_dumpintc("prioritize", irq);
412-
leave_critical_section(flags);
428+
spin_unlock_irqrestore(&g_irq_lock, flags);
429+
sched_unlock();
413430
return OK;
414431
}
415432

‎arch/arm/src/am335x/am335x_irq.c‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -41,8 +41,10 @@
4141
* Private Data
4242
****************************************************************************/
4343
#ifdef CONFIG_ARCH_IRQPRIO
44+
#if defined(CONFIG_DEBUG_IRQ_INFO)
4445
static spinlock_t g_irq_lock = SP_UNLOCKED;
4546
#endif
47+
#endif
4648

4749
/****************************************************************************
4850
* Public Data

‎arch/arm/src/at32/at32_irq.c‎

Lines changed: 14 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -30,8 +30,9 @@
3030
#include <stdint.h>
3131
#include <assert.h>
3232
#include <debug.h>
33+
#include <sched.h>
3334

34-
#include <nuttx/irq.h>
35+
#include <nuttx/spinlock.h>
3536
#include <nuttx/arch.h>
3637
#include <arch/irq.h>
3738
#include <arch/armv7-m/nvicpri.h>
@@ -62,6 +63,14 @@
6263
#define NVIC_ENA_OFFSET (0)
6364
#define NVIC_CLRENA_OFFSET (NVIC_IRQ0_31_CLEAR - NVIC_IRQ0_31_ENABLE)
6465

66+
/****************************************************************************
67+
* Private Data
68+
****************************************************************************/
69+
70+
#if defined(CONFIG_DEBUG_IRQ_INFO)
71+
static spinlock_t g_irq_lock = SP_UNLOCKED;
72+
#endif
73+
6574
/****************************************************************************
6675
* Private Functions
6776
****************************************************************************/
@@ -79,7 +88,8 @@ static void at32_dumpnvic(const char *msg, int irq)
7988
{
8089
irqstate_t flags;
8190

82-
flags = enter_critical_section();
91+
flags = spin_lock_irqsave(&g_irq_lock);
92+
sched_lock();
8393

8494
irqinfo("NVIC (%s, irq=%d):\n", msg, irq);
8595
irqinfo(" INTCTRL: %08x VECTAB: %08x\n",
@@ -123,7 +133,8 @@ static void at32_dumpnvic(const char *msg, int irq)
123133
irqinfo(" %08x\n",
124134
getreg32(NVIC_IRQ64_67_PRIORITY));
125135

126-
leave_critical_section(flags);
136+
spin_unlock_irqrestore(&g_irq_lock, flags);
137+
sched_unlock();
127138
}
128139
#else
129140
# define at32_dumpnvic(msg, irq)

‎arch/arm/src/efm32/efm32_gpioirq.c‎

Lines changed: 15 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -31,7 +31,7 @@
3131
#include <assert.h>
3232

3333
#include <nuttx/arch.h>
34-
#include <nuttx/irq.h>
34+
#include <nuttx/spinlock.h>
3535

3636
#include "arm_internal.h"
3737
#include "hardware/efm32_gpio.h"
@@ -44,6 +44,12 @@
4444
* Pre-processor Definitions
4545
****************************************************************************/
4646

47+
/****************************************************************************
48+
* Private Data
49+
****************************************************************************/
50+
51+
static spinlock_t g_gpioirq_lock = SP_UNLOCKED;
52+
4753
/****************************************************************************
4854
* Private Functions
4955
****************************************************************************/
@@ -198,7 +204,7 @@ void efm32_gpioirq(gpio_pinset_t pinset)
198204

199205
/* Make sure that the pin interrupt is disabled */
200206

201-
flags = enter_critical_section();
207+
flags = spin_lock_irqsave(&g_gpioirq_lock);
202208
regval = getreg32(EFM32_GPIO_IEN);
203209
regval &= ~bit;
204210
putreg32(regval, EFM32_GPIO_IEN);
@@ -248,7 +254,7 @@ void efm32_gpioirq(gpio_pinset_t pinset)
248254
}
249255

250256
putreg32(regval, EFM32_GPIO_EXTIFALL);
251-
leave_critical_section(flags);
257+
spin_unlock_irqrestore(&g_gpioirq_lock, flags);
252258
}
253259

254260
/****************************************************************************
@@ -270,11 +276,11 @@ void efm32_gpioirqenable(int irq)
270276
uint32_t regval;
271277
uint32_t bit;
272278
bit = ((uint32_t)1 << (irq - EFM32_IRQ_EXTI0));
273-
flags = enter_critical_section();
279+
flags = spin_lock_irqsave(&g_gpioirq_lock);
274280
regval = getreg32(EFM32_GPIO_IEN);
275281
regval |= bit;
276282
putreg32(regval, EFM32_GPIO_IEN);
277-
leave_critical_section(flags);
283+
spin_unlock_irqrestore(&g_gpioirq_lock, flags);
278284
#else
279285
bitband_set_peripheral(EFM32_GPIO_IEN, (irq - EFM32_IRQ_EXTI0), 1);
280286
#endif
@@ -301,11 +307,11 @@ void efm32_gpioirqdisable(int irq)
301307
uint32_t bit;
302308

303309
bit = ((uint32_t)1 << (irq - EFM32_IRQ_EXTI0));
304-
flags = enter_critical_section();
310+
flags = spin_lock_irqsave(&g_gpioirq_lock);
305311
regval = getreg32(EFM32_GPIO_IEN);
306312
regval &= ~bit;
307313
putreg32(regval, EFM32_GPIO_IEN);
308-
leave_critical_section(flags);
314+
spin_unlock_irqrestore(&g_gpioirq_lock, flags);
309315
#else
310316
bitband_set_peripheral(EFM32_GPIO_IEN, (irq - EFM32_IRQ_EXTI0), 0);
311317
#endif
@@ -332,11 +338,11 @@ void efm32_gpioirqclear(int irq)
332338
uint32_t bit;
333339

334340
bit = ((uint32_t)1 << (irq - EFM32_IRQ_EXTI0));
335-
flags = enter_critical_section();
341+
flags = spin_lock_irqsave(&g_gpioirq_lock);
336342
regval = getreg32(EFM32_GPIO_IFC);
337343
regval |= bit;
338344
putreg32(regval, EFM32_GPIO_IFC);
339-
leave_critical_section(flags);
345+
spin_unlock_irqrestore(&g_gpioirq_lock, flags);
340346
#else
341347
bitband_set_peripheral(EFM32_GPIO_IFC, (irq - EFM32_IRQ_EXTI0), 1);
342348
#endif

‎arch/arm/src/efm32/efm32_irq.c‎

Lines changed: 14 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -30,8 +30,9 @@
3030
#include <assert.h>
3131
#include <errno.h>
3232
#include <debug.h>
33+
#include <sched.h>
3334

34-
#include <nuttx/irq.h>
35+
#include <nuttx/spinlock.h>
3536
#include <nuttx/arch.h>
3637
#include <arch/armv7-m/nvicpri.h>
3738

@@ -61,6 +62,14 @@
6162
#define NVIC_ENA_OFFSET (0)
6263
#define NVIC_CLRENA_OFFSET (NVIC_IRQ0_31_CLEAR - NVIC_IRQ0_31_ENABLE)
6364

65+
/****************************************************************************
66+
* Private Data
67+
****************************************************************************/
68+
69+
#if defined(CONFIG_DEBUG_IRQ_INFO)
70+
static spinlock_t g_irq_lock = SP_UNLOCKED;
71+
#endif
72+
6473
/****************************************************************************
6574
* Private Function
6675
****************************************************************************/
@@ -78,7 +87,8 @@ static void efm32_dumpnvic(const char *msg, int irq)
7887
{
7988
irqstate_t flags;
8089

81-
flags = enter_critical_section();
90+
flags = spin_lock_irqsave(&g_irq_lock);
91+
sched_lock();
8292

8393
irqinfo("NVIC (%s, irq=%d):\n", msg, irq);
8494
irqinfo(" INTCTRL: %08x VECTAB: %08x\n",
@@ -126,7 +136,8 @@ static void efm32_dumpnvic(const char *msg, int irq)
126136
#endif
127137
#endif
128138

129-
leave_critical_section(flags);
139+
spin_unlock_irqrestore(&g_irq_lock, flags);
140+
sched_unlock();
130141
}
131142
#else
132143
# define efm32_dumpnvic(msg, irq)

‎arch/arm/src/eoss3/eoss3_irq.c‎

Lines changed: 14 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -30,8 +30,9 @@
3030
#include <assert.h>
3131
#include <errno.h>
3232
#include <debug.h>
33+
#include <sched.h>
3334

34-
#include <nuttx/irq.h>
35+
#include <nuttx/spinlock.h>
3536
#include <nuttx/arch.h>
3637
#include <arch/armv7-m/nvicpri.h>
3738

@@ -60,6 +61,14 @@
6061
#define NVIC_ENA_OFFSET (0)
6162
#define NVIC_CLRENA_OFFSET (NVIC_IRQ0_31_CLEAR - NVIC_IRQ0_31_ENABLE)
6263

64+
/****************************************************************************
65+
* Private Data
66+
****************************************************************************/
67+
68+
#if defined(CONFIG_DEBUG_IRQ_INFO)
69+
static spinlock_t g_irq_lock = SP_UNLOCKED;
70+
#endif
71+
6372
/****************************************************************************
6473
* Private Functions
6574
****************************************************************************/
@@ -77,7 +86,8 @@ static void eoss3_dumpnvic(const char *msg, int irq)
7786
{
7887
irqstate_t flags;
7988

80-
flags = enter_critical_section();
89+
flags = spin_lock_irqsave(&g_irq_lock);
90+
sched_lock();
8191

8292
irqinfo("NVIC (%s, irq=%d):\n", msg, irq);
8393
irqinfo(" INTCTRL: %08x VECTAB: %08x\n",
@@ -107,7 +117,8 @@ static void eoss3_dumpnvic(const char *msg, int irq)
107117
getreg32(NVIC_IRQ24_27_PRIORITY),
108118
getreg32(NVIC_IRQ28_31_PRIORITY));
109119

110-
leave_critical_section(flags);
120+
spin_unlock_irqrestore(&g_irq_lock, flags);
121+
sched_unlock();
111122
}
112123
#else
113124
# define eoss3_dumpnvic(msg, irq)

‎arch/arm/src/gd32f4/gd32f4xx_irq.c‎

Lines changed: 14 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -30,8 +30,9 @@
3030
#include <stdint.h>
3131
#include <assert.h>
3232
#include <debug.h>
33+
#include <sched.h>
3334

34-
#include <nuttx/irq.h>
35+
#include <nuttx/spinlock.h>
3536
#include <nuttx/arch.h>
3637
#include <arch/irq.h>
3738
#include <arch/armv7-m/nvicpri.h>
@@ -62,6 +63,14 @@
6263
#define NVIC_ENA_OFFSET (0)
6364
#define NVIC_CLRENA_OFFSET (NVIC_IRQ0_31_CLEAR - NVIC_IRQ0_31_ENABLE)
6465

66+
/****************************************************************************
67+
* Private Data
68+
****************************************************************************/
69+
70+
#if defined(CONFIG_DEBUG_IRQ_INFO)
71+
static spinlock_t g_irq_lock = SP_UNLOCKED;
72+
#endif
73+
6574
/****************************************************************************
6675
* Private Functions
6776
****************************************************************************/
@@ -79,7 +88,8 @@ static void gd32_dumpnvic(const char *msg, int irq)
7988
{
8089
irqstate_t flags;
8190

82-
flags = enter_critical_section();
91+
flags = spin_lock_irqsave(&g_irq_lock);
92+
sched_lock();
8393

8494
irqinfo("NVIC (%s, irq=%d):\n", msg, irq);
8595
irqinfo(" INTCTRL: %08x VECTAB: %08x\n",
@@ -133,7 +143,8 @@ static void gd32_dumpnvic(const char *msg, int irq)
133143
getreg32(NVIC_IRQ92_95_PRIORITY));
134144
#endif
135145

136-
leave_critical_section(flags);
146+
spin_unlock_irqrestore(&g_irq_lock, flags);
147+
sched_unlock();
137148
}
138149
#else
139150
# define gd32_dumpnvic(msg, irq)

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