2929#include <stdio.h>
3030
3131#include "arm64_arch.h"
32+ #include "arm64_mmu.h"
3233
3334/****************************************************************************
3435 * Pre-processor Definitions
3536 ****************************************************************************/
3637
3738#define GCR_EL1_VAL 0x10001
3839
40+ /* The alignment length of the MTE must be a multiple of sixteen */
41+
42+ #define MTE_MM_AILGN 16
43+
44+ #define MTE_TAG_SHIFT 56
45+
3946/****************************************************************************
4047 * Private Functions
4148 ****************************************************************************/
4249
43- static int arm64_mte_is_support (void )
50+ static int mte_is_support (void )
4451{
4552 int supported ;
4653 __asm__ volatile (
@@ -53,15 +60,86 @@ static int arm64_mte_is_support(void)
5360 return supported != 0 ;
5461}
5562
63+ static void mte_set_tcf (bool enable )
64+ {
65+ uint64_t val = read_sysreg (sctlr_el1 );
66+
67+ if (enable )
68+ {
69+ val |= SCTLR_TCF1_BIT ;
70+ }
71+ else
72+ {
73+ val &= ~SCTLR_TCF1_BIT ;
74+ }
75+
76+ write_sysreg (val , sctlr_el1 );
77+ }
78+
79+ static inline uint8_t mte_get_ptr_tag (const void * ptr )
80+ {
81+ return 0xf0 | (uint8_t )(((uint64_t )(ptr )) >> MTE_TAG_SHIFT );
82+ }
83+
5684/****************************************************************************
5785 * Public Functions
5886 ****************************************************************************/
5987
60- void arm64_enable_mte (void )
88+ uint8_t arm64_mte_get_random_tag (const void * addr )
89+ {
90+ asm("irg %0, %0" : "=r" (addr ));
91+
92+ return mte_get_ptr_tag (addr );
93+ }
94+
95+ FAR void * arm64_mte_get_untagged_addr (const void * addr )
96+ {
97+ return (FAR void * )
98+ (((uint64_t )(addr )) & ~((uint64_t )0xff << MTE_TAG_SHIFT ));
99+ }
100+
101+ FAR void * arm64_mte_get_tagged_addr (const void * addr , uint8_t tag )
102+ {
103+ return (FAR void * )
104+ (((uint64_t )(addr )) | ((uint64_t )tag << MTE_TAG_SHIFT ));
105+ }
106+
107+ /* Disable MTE by clearing the TCF1 bit in SCTLR_EL1 */
108+
109+ void arm64_mte_disable (void )
110+ {
111+ mte_set_tcf (false);
112+ }
113+
114+ /* Enable MTE by setting the TCF1 bit in SCTLR_EL1 */
115+
116+ void arm64_mte_enable (void )
117+ {
118+ mte_set_tcf (true);
119+ }
120+
121+ /* Set memory tags for a given memory range */
122+
123+ void arm64_mte_set_tag (const void * addr , size_t size )
124+ {
125+ size_t i ;
126+
127+ DEBUGASSERT ((uintptr_t )addr % MTE_MM_AILGN == 0 );
128+ DEBUGASSERT (size % MTE_MM_AILGN == 0 );
129+
130+ for (i = 0 ; i < size ; i += MTE_MM_AILGN )
131+ {
132+ asm("stg %0, [%0]" : : "r" (addr + i ));
133+ }
134+ }
135+
136+ /* Initialize MTE settings and enable memory tagging */
137+
138+ void arm64_mte_init (void )
61139{
62140 uint64_t val ;
63141
64- if (!arm64_mte_is_support ())
142+ if (!mte_is_support ())
65143 {
66144 return ;
67145 }
@@ -78,6 +156,14 @@ void arm64_enable_mte(void)
78156 assert (!(read_sysreg (ttbr0_el1 ) & TTBR_CNP_BIT ));
79157 assert (!(read_sysreg (ttbr1_el1 ) & TTBR_CNP_BIT ));
80158
159+ /* Controls the default value for skipping high bytes */
160+
161+ val = read_sysreg (tcr_el1 );
162+ val |= TCR_TCMA1 ;
163+ write_sysreg (val , tcr_el1 );
164+
165+ /* Enable the MTE function */
166+
81167 val = read_sysreg (sctlr_el1 );
82168 val |= SCTLR_ATA_BIT | SCTLR_TCF1_BIT ;
83169 write_sysreg (val , sctlr_el1 );
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