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ci/sim: update cocotb deprecations
1 parent a0ca5da commit d1ac6e9

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3 files changed

+9
-9
lines changed

3 files changed

+9
-9
lines changed

gateware/sim/ak4619/tb_ak4619.py

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -16,7 +16,7 @@ async def test_ak4619_00(dut):
1616
TEST_L1 = 0xDEAD0000
1717
TEST_R1 = 0xBEEF0000
1818

19-
clk_256fs = Clock(dut.clk_256fs, 83, units='ns')
19+
clk_256fs = Clock(dut.clk_256fs, 83, unit='ns')
2020
cocotb.start_soon(clk_256fs.start())
2121

2222
dut.sample_in0.value = Force(0)
@@ -47,10 +47,10 @@ async def strobe():
4747
await FallingEdge(dut.strobe)
4848

4949
print("Data clocked from sdout1 present at sample_outX:")
50-
print(hex(dut.sample_out0.value.integer))
51-
print(hex(dut.sample_out1.value.integer))
52-
print(hex(dut.sample_out2.value.integer))
53-
print(hex(dut.sample_out3.value.integer))
50+
print(hex(int(dut.sample_out0.value)))
51+
print(hex(int(dut.sample_out1.value)))
52+
print(hex(int(dut.sample_out2.value)))
53+
print(hex(int(dut.sample_out3.value)))
5454

5555
assert dut.sample_out0.value == TEST_L0 >> 16
5656
assert dut.sample_out1.value == TEST_R0 >> 16

gateware/sim/pmod_i2c_master/tb_pmod_i2c_master.py

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -7,7 +7,7 @@ async def i2c_clock_in_byte(sda, scl, invert):
77
byte = 0x00
88
for i in range(8):
99
await (FallingEdge(scl) if invert else RisingEdge(scl))
10-
sda_val = sda.value.integer
10+
sda_val = int(sda.value)
1111
if invert:
1212
sda_val = 0 if sda_val else 1
1313
byte |= sda_val << (8-i)
@@ -17,7 +17,7 @@ async def i2c_clock_in_byte(sda, scl, invert):
1717
@cocotb.test()
1818
async def test_i2cinit_00(dut):
1919

20-
clock = Clock(dut.clk, 83, units='ns')
20+
clock = Clock(dut.clk, 83, unit='ns')
2121
cocotb.start_soon(clock.start())
2222

2323
dut.rst.value = 1

gateware/sim/util/i2s.py

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -16,7 +16,7 @@ async def i2s_clock_in_u32(bick, sdin):
1616
await RisingEdge(bick)
1717
for i in range(32):
1818
await FallingEdge(bick)
19-
word |= sdin.value.integer << (0x1F-i)
19+
word |= int(sdin.value) << (0x1F-i)
2020
return word
2121

2222
def bits_not(n, width):
@@ -29,7 +29,7 @@ def bits_from_signed(n, width):
2929

3030
def signed_from_bits(n, width):
3131
"""Signed integer from (2s complement) bits of `width`."""
32-
n = n.integer
32+
n = int(n)
3333
if (1 << (width-1) & n) > 0:
3434
return -int(bits_not(n, width) + 1)
3535
else:

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