Enforce non-overlapping `MemoryMap` for all DMA peripherals, `DelayLines`, etc.

[vk2seb]

Currently Tiliqua SoCs may contain quite a few DMA peripherals that have access to PSRAM (DelayLine, FramebufferPHY, Stroke and so on). There is no enforcement that these peripherals exist in the correct regions and/or are not unexpectedly overlapping.

For example, it's likely never desirable for the framebuffer to overlap with delay lines (even though this would be visually interesting). Similarly, delaylines should likely never have overlapping backing stores.

amaranth-soc provides abstractions to deal with this. We're currently using this only for the SoC peripherals (CSR registers), but likely it's desirable in any case where the PSRAM is touched.