From 00c55efa96fa27b2eaed11c6f922bd83749146db Mon Sep 17 00:00:00 2001 From: Martin Schmiedel Date: Tue, 22 Oct 2024 06:39:40 +0200 Subject: [PATCH] MBa8MPxL: Bump current kernel from 6.6.43 to 6.11.x - remove patches (already mainlined) - while at it, rename BOARD_MAINTAINER to the actual GitHub profile Signed-off-by: Martin Schmiedel --- config/boards/mba8mpxl-ras314.conf | 3 +- config/boards/mba8mpxl.conf | 2 +- config/kernel/linux-tqma-current.config | 473 ++-- .../sources/families/include/imx8_common.inc | 6 +- packages/blobs/asound.state/asound.state.tqma | 750 +++++-- .../0001-Add-HDMI-support-for-IMX8MP.patch | 1966 ----------------- ...mp-Enable-HDMI-on-TQMa8MPxL-MBa8MPxL.patch | 49 - ...scale-add-TQMa8MPQL-on-MBa8MP-RAS314.patch | 941 -------- 8 files changed, 966 insertions(+), 3224 deletions(-) delete mode 100644 patch/kernel/archive/imx8m-6.6/0001-Add-HDMI-support-for-IMX8MP.patch delete mode 100644 patch/kernel/archive/imx8m-6.6/0002-arm64-dts-imx8mp-Enable-HDMI-on-TQMa8MPxL-MBa8MPxL.patch delete mode 100644 patch/kernel/archive/imx8m-6.6/0003-arm64-dts-freescale-add-TQMa8MPQL-on-MBa8MP-RAS314.patch diff --git a/config/boards/mba8mpxl-ras314.conf b/config/boards/mba8mpxl-ras314.conf index 1bb9444f342c..72e1b3b07015 100644 --- a/config/boards/mba8mpxl-ras314.conf +++ b/config/boards/mba8mpxl-ras314.conf @@ -1,12 +1,13 @@ # MBa8MPxL-RAS314 with TQMa8MPxL BOARD_NAME="TQ8MP-RAS314" BOARDFAMILY="imx8m" -BOARD_MAINTAINER="schmiedelm" +BOARD_MAINTAINER="tq-schmiedel" HAS_VIDEO_OUTPUT="yes" ATF_PLAT="imx8mp" ATF_UART_BASE="0x30a60000" BOOTCONFIG="tqma8mpxl_multi_mba8mp_ras314_defconfig" KERNEL_TARGET="current" +MODULES_BLACKLIST="btnxpuart" # would be loaded delayed by udev rule DEFAULT_CONSOLE="serial" SERIALCON="ttymxc3" BOOT_FDT_FILE="freescale/imx8mp-tqma8mpql-mba8mp-ras314.dtb" diff --git a/config/boards/mba8mpxl.conf b/config/boards/mba8mpxl.conf index e752074ff045..9acec0daf72e 100644 --- a/config/boards/mba8mpxl.conf +++ b/config/boards/mba8mpxl.conf @@ -1,7 +1,7 @@ # MBa8MPxL with TQMa8MPxL BOARD_NAME="MBa8MPxL" BOARDFAMILY="imx8m" -BOARD_MAINTAINER="schmiedelm" +BOARD_MAINTAINER="tq-schmiedel" HAS_VIDEO_OUTPUT="yes" ATF_PLAT="imx8mp" ATF_UART_BASE="0x30a60000" diff --git a/config/kernel/linux-tqma-current.config b/config/kernel/linux-tqma-current.config index 47fd2f3f2ae4..c28ea5ef33dd 100644 --- a/config/kernel/linux-tqma-current.config +++ b/config/kernel/linux-tqma-current.config @@ -1,6 +1,6 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/arm64 6.6.43 Kernel Configuration +# Linux/arm64 6.11.3 Kernel Configuration # CONFIG_CC_VERSION_TEXT="aarch64-linux-gnu-gcc (Ubuntu 11.4.0-1ubuntu1~22.04) 11.4.0" CONFIG_CC_IS_GCC=y @@ -13,9 +13,7 @@ CONFIG_LD_VERSION=23800 CONFIG_LLD_VERSION=0 CONFIG_CC_CAN_LINK=y CONFIG_CC_CAN_LINK_STATIC=y -CONFIG_CC_HAS_ASM_GOTO_OUTPUT=y -CONFIG_CC_HAS_ASM_GOTO_TIED_OUTPUT=y -CONFIG_GCC_ASM_GOTO_OUTPUT_WORKAROUND=y +CONFIG_GCC_ASM_GOTO_OUTPUT_BROKEN=y CONFIG_CC_HAS_ASM_INLINE=y CONFIG_CC_HAS_NO_PROFILE_FN_ATTR=y CONFIG_PAHOLE_VERSION=125 @@ -118,7 +116,7 @@ CONFIG_TICK_CPU_ACCOUNTING=y # CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set CONFIG_IRQ_TIME_ACCOUNTING=y CONFIG_HAVE_SCHED_AVG_IRQ=y -CONFIG_SCHED_THERMAL_PRESSURE=y +CONFIG_SCHED_HW_PRESSURE=y CONFIG_BSD_PROCESS_ACCT=y CONFIG_BSD_PROCESS_ACCT_V3=y CONFIG_TASKSTATS=y @@ -138,6 +136,7 @@ CONFIG_PREEMPT_RCU=y # CONFIG_RCU_EXPERT is not set CONFIG_TREE_SRCU=y CONFIG_TASKS_RCU_GENERIC=y +CONFIG_NEED_TASKS_RCU=y CONFIG_TASKS_RCU=y CONFIG_TASKS_TRACE_RCU=y CONFIG_RCU_STALL_COMMON=y @@ -164,14 +163,17 @@ CONFIG_CC_HAS_INT128=y CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5" CONFIG_GCC10_NO_ARRAY_BOUNDS=y CONFIG_CC_NO_ARRAY_BOUNDS=y +CONFIG_GCC_NO_STRINGOP_OVERFLOW=y +CONFIG_CC_NO_STRINGOP_OVERFLOW=y CONFIG_ARCH_SUPPORTS_INT128=y CONFIG_NUMA_BALANCING=y CONFIG_NUMA_BALANCING_DEFAULT_ENABLED=y +CONFIG_SLAB_OBJ_EXT=y CONFIG_CGROUPS=y CONFIG_PAGE_COUNTER=y # CONFIG_CGROUP_FAVOR_DYNMODS is not set CONFIG_MEMCG=y -CONFIG_MEMCG_KMEM=y +# CONFIG_MEMCG_V1 is not set CONFIG_BLK_CGROUP=y CONFIG_CGROUP_WRITEBACK=y CONFIG_CGROUP_SCHED=y @@ -230,7 +232,7 @@ CONFIG_POSIX_TIMERS=y CONFIG_PRINTK=y CONFIG_BUG=y CONFIG_ELF_CORE=y -CONFIG_BASE_FULL=y +# CONFIG_BASE_SMALL is not set CONFIG_FUTEX=y CONFIG_FUTEX_PI=y CONFIG_EPOLL=y @@ -242,18 +244,17 @@ CONFIG_AIO=y CONFIG_IO_URING=y CONFIG_ADVISE_SYSCALLS=y CONFIG_MEMBARRIER=y +CONFIG_KCMP=y +CONFIG_RSEQ=y +# CONFIG_DEBUG_RSEQ is not set +CONFIG_CACHESTAT_SYSCALL=y +# CONFIG_PC104 is not set CONFIG_KALLSYMS=y # CONFIG_KALLSYMS_SELFTEST is not set # CONFIG_KALLSYMS_ALL is not set -CONFIG_KALLSYMS_BASE_RELATIVE=y CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y -CONFIG_KCMP=y -CONFIG_RSEQ=y -CONFIG_CACHESTAT_SYSCALL=y -# CONFIG_DEBUG_RSEQ is not set CONFIG_HAVE_PERF_EVENTS=y CONFIG_GUEST_PERF_EVENTS=y -# CONFIG_PC104 is not set # # Kernel Performance Events And Counters @@ -268,7 +269,8 @@ CONFIG_PROFILING=y # # Kexec and crash features # -CONFIG_CRASH_CORE=y +CONFIG_CRASH_RESERVE=y +CONFIG_VMCORE_INFO=y CONFIG_KEXEC_CORE=y CONFIG_KEXEC=y CONFIG_KEXEC_FILE=y @@ -281,7 +283,6 @@ CONFIG_ARM64=y CONFIG_GCC_SUPPORTS_DYNAMIC_FTRACE_WITH_ARGS=y CONFIG_64BIT=y CONFIG_MMU=y -CONFIG_ARM64_PAGE_SHIFT=12 CONFIG_ARM64_CONT_PTE_SHIFT=4 CONFIG_ARM64_CONT_PMD_SHIFT=4 CONFIG_ARCH_MMAP_RND_BITS_MIN=18 @@ -308,6 +309,7 @@ CONFIG_BUILTIN_RETURN_ADDRESS_STRIPS_PAC=y # Platform selection # # CONFIG_ARCH_ACTIONS is not set +# CONFIG_ARCH_AIROHA is not set # CONFIG_ARCH_SUNXI is not set # CONFIG_ARCH_ALPINE is not set # CONFIG_ARCH_APPLE is not set @@ -329,6 +331,7 @@ CONFIG_ARCH_MXC=y CONFIG_ARCH_S32=y # CONFIG_ARCH_MA35 is not set # CONFIG_ARCH_NPCM is not set +# CONFIG_ARCH_PENSANDO is not set # CONFIG_ARCH_QCOM is not set # CONFIG_ARCH_REALTEK is not set # CONFIG_ARCH_RENESAS is not set @@ -391,6 +394,7 @@ CONFIG_ARM64_ERRATUM_2645198=y CONFIG_ARM64_WORKAROUND_SPECULATIVE_UNPRIV_LOAD=y CONFIG_ARM64_ERRATUM_2966298=y CONFIG_ARM64_ERRATUM_3117295=y +CONFIG_ARM64_ERRATUM_3194386=y CONFIG_CAVIUM_ERRATUM_22375=y CONFIG_CAVIUM_ERRATUM_23144=y CONFIG_CAVIUM_ERRATUM_23154=y @@ -413,6 +417,7 @@ CONFIG_ARM64_4K_PAGES=y # CONFIG_ARM64_64K_PAGES is not set # CONFIG_ARM64_VA_BITS_39 is not set CONFIG_ARM64_VA_BITS_48=y +# CONFIG_ARM64_VA_BITS_52 is not set CONFIG_ARM64_VA_BITS=48 CONFIG_ARM64_PA_BITS_48=y CONFIG_ARM64_PA_BITS=48 @@ -442,6 +447,7 @@ CONFIG_ARCH_SUPPORTS_KEXEC_SIG=y CONFIG_ARCH_SUPPORTS_KEXEC_IMAGE_VERIFY_SIG=y CONFIG_ARCH_DEFAULT_KEXEC_IMAGE_VERIFY_SIG=y CONFIG_ARCH_SUPPORTS_CRASH_DUMP=y +CONFIG_ARCH_HAS_GENERIC_CRASHKERNEL_RESERVATION=y CONFIG_TRANS_TABLE=y CONFIG_XEN_DOM0=y CONFIG_XEN=y @@ -521,6 +527,7 @@ CONFIG_RANDOMIZE_BASE=y CONFIG_RANDOMIZE_MODULE_REGION_FULL=y CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y CONFIG_STACKPROTECTOR_PER_TASK=y +CONFIG_ARM64_CONTPTE=y # end of Kernel Features # @@ -530,6 +537,7 @@ CONFIG_STACKPROTECTOR_PER_TASK=y CONFIG_CMDLINE="" CONFIG_EFI_STUB=y CONFIG_EFI=y +# CONFIG_COMPRESSED_INSTALL is not set CONFIG_DMI=y # end of Boot options @@ -542,6 +550,8 @@ CONFIG_SUSPEND_FREEZER=y CONFIG_HIBERNATE_CALLBACKS=y CONFIG_HIBERNATION=y CONFIG_HIBERNATION_SNAPSHOT_DEV=y +CONFIG_HIBERNATION_COMP_LZO=y +CONFIG_HIBERNATION_DEF_COMP="lzo" CONFIG_PM_STD_PARTITION="" CONFIG_PM_SLEEP=y CONFIG_PM_SLEEP_SMP=y @@ -610,12 +620,12 @@ CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y # CONFIG_CPUFREQ_DT=y CONFIG_CPUFREQ_DT_PLATDEV=y -CONFIG_ACPI_CPPC_CPUFREQ=m -CONFIG_ACPI_CPPC_CPUFREQ_FIE=y CONFIG_ARM_SCPI_CPUFREQ=y CONFIG_ARM_IMX_CPUFREQ_DT=m CONFIG_ARM_SCMI_CPUFREQ=y CONFIG_QORIQ_CPUFREQ=y +CONFIG_ACPI_CPPC_CPUFREQ=m +CONFIG_ACPI_CPPC_CPUFREQ_FIE=y # end of CPU Frequency scaling # end of CPU Power Management @@ -623,6 +633,7 @@ CONFIG_ARCH_SUPPORTS_ACPI=y CONFIG_ACPI=y CONFIG_ACPI_GENERIC_GSI=y CONFIG_ACPI_CCA_REQUIRED=y +CONFIG_ACPI_THERMAL_LIB=y # CONFIG_ACPI_DEBUGGER is not set CONFIG_ACPI_SPCR_TABLE=y # CONFIG_ACPI_FPDT is not set @@ -648,7 +659,6 @@ CONFIG_ACPI_TABLE_UPGRADE=y CONFIG_ACPI_CONTAINER=y CONFIG_ACPI_HOTPLUG_MEMORY=y CONFIG_ACPI_HED=y -# CONFIG_ACPI_CUSTOM_METHOD is not set # CONFIG_ACPI_BGRT is not set CONFIG_ACPI_REDUCED_HARDWARE_ONLY=y CONFIG_ACPI_NUMA=y @@ -671,17 +681,15 @@ CONFIG_ACPI_PCC=y # CONFIG_ACPI_FFH is not set # CONFIG_PMIC_OPREGION is not set CONFIG_ACPI_PRMT=y -CONFIG_IRQ_BYPASS_MANAGER=y -CONFIG_HAVE_KVM=y +CONFIG_KVM_COMMON=y CONFIG_HAVE_KVM_IRQCHIP=y -CONFIG_HAVE_KVM_IRQFD=y CONFIG_HAVE_KVM_IRQ_ROUTING=y CONFIG_HAVE_KVM_DIRTY_RING=y CONFIG_HAVE_KVM_DIRTY_RING_ACQ_REL=y CONFIG_NEED_KVM_DIRTY_RING_WITH_BITMAP=y -CONFIG_HAVE_KVM_EVENTFD=y CONFIG_KVM_MMIO=y CONFIG_HAVE_KVM_MSI=y +CONFIG_HAVE_KVM_READONLY_MEM=y CONFIG_HAVE_KVM_CPU_RELAX_INTERCEPT=y CONFIG_KVM_VFIO=y CONFIG_KVM_GENERIC_DIRTYLOG_READ_PROTECT=y @@ -689,6 +697,7 @@ CONFIG_HAVE_KVM_IRQ_BYPASS=y CONFIG_HAVE_KVM_VCPU_RUN_PID_CHANGE=y CONFIG_KVM_XFER_TO_GUEST_WORK=y CONFIG_KVM_GENERIC_HARDWARE_ENABLING=y +CONFIG_KVM_GENERIC_MMU_NOTIFIER=y CONFIG_VIRTUALIZATION=y CONFIG_KVM=y # CONFIG_NVHE_EL2_DEBUG is not set @@ -725,6 +734,7 @@ CONFIG_ARCH_WANTS_NO_INSTR=y CONFIG_HAVE_ASM_MODVERSIONS=y CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y CONFIG_HAVE_RSEQ=y +CONFIG_HAVE_RUST=y CONFIG_HAVE_FUNCTION_ARG_ACCESS_API=y CONFIG_HAVE_HW_BREAKPOINT=y CONFIG_HAVE_PERF_REGS=y @@ -765,6 +775,7 @@ CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y CONFIG_ARCH_WANT_PMD_MKWRITE=y CONFIG_HAVE_MOD_ARCH_SPECIFIC=y CONFIG_MODULES_USE_ELF_RELA=y +CONFIG_ARCH_WANTS_EXECMEM_LATE=y CONFIG_HAVE_SOFTIRQ_ON_OWN_STACK=y CONFIG_SOFTIRQ_ON_OWN_STACK=y CONFIG_ARCH_HAS_ELF_RANDOMIZE=y @@ -772,8 +783,11 @@ CONFIG_HAVE_ARCH_MMAP_RND_BITS=y CONFIG_ARCH_MMAP_RND_BITS=18 CONFIG_HAVE_ARCH_MMAP_RND_COMPAT_BITS=y CONFIG_ARCH_MMAP_RND_COMPAT_BITS=11 +CONFIG_HAVE_PAGE_SIZE_4KB=y +CONFIG_PAGE_SIZE_4KB=y CONFIG_PAGE_SIZE_LESS_THAN_64KB=y CONFIG_PAGE_SIZE_LESS_THAN_256KB=y +CONFIG_PAGE_SHIFT=12 CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y CONFIG_CLONE_BACKWARDS=y CONFIG_OLD_SIGSUSPEND3=y @@ -799,6 +813,8 @@ CONFIG_ARCH_WANT_LD_ORPHAN_WARN=y CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y CONFIG_ARCH_SUPPORTS_PAGE_TABLE_CHECK=y CONFIG_ARCH_HAVE_TRACE_MMIO_ACCESS=y +CONFIG_ARCH_HAS_HW_PTE_YOUNG=y +CONFIG_ARCH_HAS_KERNEL_FPU_SUPPORT=y # # GCOV-based kernel profiling @@ -813,7 +829,6 @@ CONFIG_FUNCTION_ALIGNMENT=4 # end of General architecture-dependent options CONFIG_RT_MUTEXES=y -CONFIG_BASE_SMALL=0 CONFIG_MODULES=y # CONFIG_MODULE_DEBUG is not set # CONFIG_MODULE_FORCE_LOAD is not set @@ -837,7 +852,7 @@ CONFIG_BLK_CGROUP_PUNT_BIO=y CONFIG_BLK_DEV_BSG_COMMON=y CONFIG_BLK_DEV_BSGLIB=y CONFIG_BLK_DEV_INTEGRITY=y -CONFIG_BLK_DEV_INTEGRITY_T10=y +CONFIG_BLK_DEV_WRITE_MOUNTED=y # CONFIG_BLK_DEV_ZONED is not set # CONFIG_BLK_DEV_THROTTLING is not set # CONFIG_BLK_WBT is not set @@ -871,6 +886,7 @@ CONFIG_MQ_IOSCHED_KYBER=y # end of IO Schedulers CONFIG_PREEMPT_NOTIFIERS=y +CONFIG_PADATA=y CONFIG_ASN1=y CONFIG_UNINLINE_SPIN_UNLOCK=y CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y @@ -906,23 +922,24 @@ CONFIG_COREDUMP=y # CONFIG_SWAP=y # CONFIG_ZSWAP is not set +CONFIG_HAVE_ZSMALLOC=y CONFIG_ZSMALLOC=m # CONFIG_ZSMALLOC_STAT is not set CONFIG_ZSMALLOC_CHAIN_SIZE=8 # -# SLAB allocator options +# Slab allocator options # -# CONFIG_SLAB_DEPRECATED is not set CONFIG_SLUB=y # CONFIG_SLUB_TINY is not set CONFIG_SLAB_MERGE_DEFAULT=y # CONFIG_SLAB_FREELIST_RANDOM is not set # CONFIG_SLAB_FREELIST_HARDENED is not set +# CONFIG_SLAB_BUCKETS is not set # CONFIG_SLUB_STATS is not set CONFIG_SLUB_CPU_PARTIAL=y # CONFIG_RANDOM_KMALLOC_CACHES is not set -# end of SLAB allocator options +# end of Slab allocator options # CONFIG_SHUFFLE_PAGE_ALLOCATOR is not set # CONFIG_COMPAT_BRK is not set @@ -930,7 +947,7 @@ CONFIG_SPARSEMEM=y CONFIG_SPARSEMEM_EXTREME=y CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y CONFIG_SPARSEMEM_VMEMMAP=y -CONFIG_HAVE_FAST_GUP=y +CONFIG_HAVE_GUP_FAST=y CONFIG_ARCH_KEEP_MEMBLOCK=y CONFIG_NUMA_KEEP_MEMINFO=y CONFIG_MEMORY_ISOLATION=y @@ -953,6 +970,7 @@ CONFIG_MIGRATION=y CONFIG_ARCH_ENABLE_HUGEPAGE_MIGRATION=y CONFIG_ARCH_ENABLE_THP_MIGRATION=y CONFIG_CONTIG_ALLOC=y +CONFIG_PCP_BATCH_SCALE_MAX=5 CONFIG_PHYS_ADDR_T_64BIT=y CONFIG_MMU_NOTIFIER=y CONFIG_KSM=y @@ -964,14 +982,15 @@ CONFIG_ARCH_WANTS_THP_SWAP=y CONFIG_TRANSPARENT_HUGEPAGE=y CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS=y # CONFIG_TRANSPARENT_HUGEPAGE_MADVISE is not set +# CONFIG_TRANSPARENT_HUGEPAGE_NEVER is not set CONFIG_THP_SWAP=y # CONFIG_READ_ONLY_THP_FOR_FS is not set +CONFIG_PGTABLE_HAS_HUGE_LEAVES=y CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK=y CONFIG_USE_PERCPU_NUMA_NODE_ID=y CONFIG_HAVE_SETUP_PER_CPU_AREA=y CONFIG_CMA=y -# CONFIG_CMA_DEBUG is not set # CONFIG_CMA_DEBUGFS is not set # CONFIG_CMA_SYSFS is not set CONFIG_CMA_AREAS=19 @@ -1000,6 +1019,7 @@ CONFIG_SECRETMEM=y CONFIG_ARCH_SUPPORTS_PER_VMA_LOCK=y CONFIG_PER_VMA_LOCK=y CONFIG_LOCK_MM_AND_FIND_VMA=y +CONFIG_EXECMEM=y # # Data Access Monitoring @@ -1020,7 +1040,6 @@ CONFIG_SKB_EXTENSIONS=y CONFIG_PACKET=y # CONFIG_PACKET_DIAG is not set CONFIG_UNIX=y -CONFIG_UNIX_SCM=y CONFIG_AF_UNIX_OOB=y # CONFIG_UNIX_DIAG is not set # CONFIG_TLS is not set @@ -1260,6 +1279,7 @@ CONFIG_IP_VS_MH_TAB_INDEX=12 # IP: Netfilter Configuration # CONFIG_NF_DEFRAG_IPV4=m +CONFIG_IP_NF_IPTABLES_LEGACY=m # CONFIG_NF_SOCKET_IPV4 is not set # CONFIG_NF_TPROXY_IPV4 is not set # CONFIG_NF_DUP_IPV4 is not set @@ -1283,12 +1303,13 @@ CONFIG_IP_NF_MANGLE=m # CONFIG_IP_NF_TARGET_TTL is not set # CONFIG_IP_NF_RAW is not set # CONFIG_IP_NF_SECURITY is not set -# CONFIG_IP_NF_ARPTABLES is not set +# CONFIG_IP_NF_ARPFILTER is not set # end of IP: Netfilter Configuration # # IPv6: Netfilter Configuration # +CONFIG_IP6_NF_IPTABLES_LEGACY=m # CONFIG_NF_SOCKET_IPV6 is not set # CONFIG_NF_TPROXY_IPV6 is not set # CONFIG_NF_DUP_IPV6 is not set @@ -1320,7 +1341,6 @@ CONFIG_IP6_NF_TARGET_MASQUERADE=m CONFIG_NF_DEFRAG_IPV6=m # CONFIG_NF_CONNTRACK_BRIDGE is not set # CONFIG_BRIDGE_NF_EBTABLES is not set -# CONFIG_BPFILTER is not set # CONFIG_IP_DCCP is not set # CONFIG_IP_SCTP is not set # CONFIG_RDS is not set @@ -1357,6 +1377,7 @@ CONFIG_NET_DSA_TAG_OCELOT_8021Q=m # CONFIG_NET_DSA_TAG_LAN9303 is not set # CONFIG_NET_DSA_TAG_SJA1105 is not set # CONFIG_NET_DSA_TAG_TRAILER is not set +# CONFIG_NET_DSA_TAG_VSC73XX_8021Q is not set # CONFIG_NET_DSA_TAG_XRS700X is not set CONFIG_VLAN_8021Q=m CONFIG_VLAN_8021Q_GVRP=y @@ -1425,7 +1446,6 @@ CONFIG_NET_ACT_GACT=m # CONFIG_GACT_PROB is not set CONFIG_NET_ACT_MIRRED=m # CONFIG_NET_ACT_SAMPLE is not set -# CONFIG_NET_ACT_IPT is not set # CONFIG_NET_ACT_NAT is not set # CONFIG_NET_ACT_PEDIT is not set # CONFIG_NET_ACT_SIMP is not set @@ -1536,6 +1556,7 @@ CONFIG_BT_MRVL_SDIO=m # CONFIG_BT_MTKUART is not set # CONFIG_BT_VIRTIO is not set CONFIG_BT_NXPUART=m +# CONFIG_BT_INTEL_PCIE is not set # end of Bluetooth device drivers # CONFIG_AF_RXRPC is not set @@ -1559,7 +1580,6 @@ CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y CONFIG_MAC80211_RC_DEFAULT="minstrel_ht" # CONFIG_MAC80211_MESH is not set CONFIG_MAC80211_LEDS=y -# CONFIG_MAC80211_DEBUGFS is not set # CONFIG_MAC80211_MESSAGE_TRACING is not set # CONFIG_MAC80211_DEBUG_MENU is not set CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 @@ -1616,6 +1636,7 @@ CONFIG_ETHTOOL_NETLINK=y # CONFIG_ARM_AMBA=y CONFIG_HAVE_PCI=y +CONFIG_GENERIC_PCI_IOMAP=y CONFIG_PCI=y CONFIG_PCI_DOMAINS=y CONFIG_PCI_DOMAINS_GENERIC=y @@ -1655,6 +1676,7 @@ CONFIG_VGA_ARB=y CONFIG_VGA_ARB_MAX_GPUS=16 CONFIG_HOTPLUG_PCI=y CONFIG_HOTPLUG_PCI_ACPI=y +# CONFIG_HOTPLUG_PCI_ACPI_AMPERE_ALTRA is not set # CONFIG_HOTPLUG_PCI_ACPI_IBM is not set # CONFIG_HOTPLUG_PCI_CPCI is not set # CONFIG_HOTPLUG_PCI_SHPC is not set @@ -1670,7 +1692,6 @@ CONFIG_PCI_HOST_THUNDER_ECAM=y CONFIG_PCI_HOST_COMMON=y CONFIG_PCI_HOST_GENERIC=y # CONFIG_PCIE_HISI_ERR is not set -# CONFIG_PCIE_MICROCHIP_HOST is not set CONFIG_PCI_XGENE=y CONFIG_PCI_XGENE_MSI=y # CONFIG_PCIE_XILINX is not set @@ -1680,8 +1701,6 @@ CONFIG_PCI_XGENE_MSI=y # # CONFIG_PCIE_CADENCE_PLAT_HOST is not set # CONFIG_PCIE_CADENCE_PLAT_EP is not set -# CONFIG_PCI_J721E_HOST is not set -# CONFIG_PCI_J721E_EP is not set # end of Cadence-based PCIe controllers # @@ -1709,6 +1728,12 @@ CONFIG_PCIE_MOBIVEIL=y CONFIG_PCIE_MOBIVEIL_HOST=y CONFIG_PCIE_LAYERSCAPE_GEN4=y # end of Mobiveil-based PCIe controllers + +# +# PLDA-based PCIe controllers +# +# CONFIG_PCIE_MICROCHIP_HOST is not set +# end of PLDA-based PCIe controllers # end of PCI controller drivers # @@ -1764,6 +1789,7 @@ CONFIG_DEV_COREDUMP=y CONFIG_HMEM_REPORTING=y # CONFIG_TEST_ASYNC_DRIVER_PROBE is not set CONFIG_SYS_HYPERVISOR=y +CONFIG_GENERIC_CPU_DEVICES=y CONFIG_GENERIC_CPU_AUTOPROBE=y CONFIG_GENERIC_CPU_VULNERABILITIES=y CONFIG_SOC_BUS=y @@ -1787,7 +1813,6 @@ CONFIG_GENERIC_ARCH_NUMA=y # CONFIG_ARM_CCI=y CONFIG_ARM_CCI400_COMMON=y -# CONFIG_BRCMSTB_GISB_ARB is not set # CONFIG_MOXTET is not set # CONFIG_IMX_WEIM is not set # CONFIG_VEXPRESS_CONFIG is not set @@ -1823,12 +1848,10 @@ CONFIG_ARM_SCMI_TRANSPORT_OPTEE=y CONFIG_ARM_SCMI_TRANSPORT_SMC=y # CONFIG_ARM_SCMI_TRANSPORT_SMC_ATOMIC_ENABLE is not set # CONFIG_ARM_SCMI_TRANSPORT_VIRTIO is not set -CONFIG_ARM_SCMI_POWER_DOMAIN=y # CONFIG_ARM_SCMI_POWER_CONTROL is not set # end of ARM System Control and Management Interface Protocol CONFIG_ARM_SCPI_PROTOCOL=y -CONFIG_ARM_SCPI_POWER_DOMAIN=y # CONFIG_ARM_SDE_INTERFACE is not set # CONFIG_FIRMWARE_MEMMAP is not set CONFIG_DMIID=y @@ -1865,11 +1888,17 @@ CONFIG_EFI_CUSTOM_SSDT_OVERLAYS=y CONFIG_UEFI_CPER=y CONFIG_UEFI_CPER_ARM=y +# CONFIG_TEE_STMM_EFI is not set # CONFIG_IMX_DSP is not set CONFIG_IMX_SCU=y -CONFIG_IMX_SCU_PD=y CONFIG_ARM_PSCI_FW=y # CONFIG_ARM_PSCI_CHECKER is not set + +# +# Qualcomm firmware drivers +# +# end of Qualcomm firmware drivers + CONFIG_HAVE_ARM_SMCCC=y CONFIG_HAVE_ARM_SMCCC_DISCOVERY=y CONFIG_ARM_SMCCC_SOC_ID=y @@ -1892,7 +1921,6 @@ CONFIG_MTD=y # # Partition parsers # -# CONFIG_MTD_AR7_PARTS is not set # CONFIG_MTD_CMDLINE_PARTS is not set CONFIG_MTD_OF_PARTS=y # CONFIG_MTD_AFS_PARTS is not set @@ -1953,7 +1981,6 @@ CONFIG_MTD_PHYSMAP=y CONFIG_MTD_PHYSMAP_OF=y # CONFIG_MTD_PHYSMAP_VERSATILE is not set # CONFIG_MTD_PHYSMAP_GEMINI is not set -# CONFIG_MTD_INTEL_VR_NOR is not set # CONFIG_MTD_PLATRAM is not set # end of Mapping drivers for chip access @@ -2065,6 +2092,7 @@ CONFIG_ZRAM_DEF_COMP_LZORLE=y # CONFIG_ZRAM_DEF_COMP_LZO is not set CONFIG_ZRAM_DEF_COMP="lzo-rle" # CONFIG_ZRAM_WRITEBACK is not set +# CONFIG_ZRAM_TRACK_ENTRY_ACTIME is not set # CONFIG_ZRAM_MEMORY_TRACKING is not set # CONFIG_ZRAM_MULTI_COMP is not set CONFIG_BLK_DEV_LOOP=y @@ -2090,7 +2118,7 @@ CONFIG_BLK_DEV_NVME=m # CONFIG_NVME_HWMON is not set # CONFIG_NVME_FC is not set # CONFIG_NVME_TCP is not set -# CONFIG_NVME_AUTH is not set +# CONFIG_NVME_HOST_AUTH is not set # CONFIG_NVME_TARGET is not set # end of NVME Support @@ -2121,6 +2149,7 @@ CONFIG_PCI_ENDPOINT_TEST=m # CONFIG_HISI_HIKEY_USB is not set # CONFIG_OPEN_DICE is not set # CONFIG_VCPU_STALL_DETECTOR is not set +# CONFIG_NSM is not set # CONFIG_C2PORT is not set # @@ -2128,7 +2157,6 @@ CONFIG_PCI_ENDPOINT_TEST=m # CONFIG_EEPROM_AT24=m CONFIG_EEPROM_AT25=m -# CONFIG_EEPROM_LEGACY is not set # CONFIG_EEPROM_MAX6875 is not set # CONFIG_EEPROM_93CX6 is not set # CONFIG_EEPROM_93XX46 is not set @@ -2156,6 +2184,7 @@ CONFIG_EEPROM_AT25=m CONFIG_UACCE=m # CONFIG_PVPANIC is not set # CONFIG_GP_PCI1XXXX is not set +# CONFIG_KEBA_CP500 is not set # end of Misc devices # @@ -2358,13 +2387,10 @@ CONFIG_PATA_OF_PLATFORM=y CONFIG_MD=y CONFIG_BLK_DEV_MD=m CONFIG_MD_BITMAP_FILE=y -# CONFIG_MD_LINEAR is not set # CONFIG_MD_RAID0 is not set # CONFIG_MD_RAID1 is not set # CONFIG_MD_RAID10 is not set # CONFIG_MD_RAID456 is not set -# CONFIG_MD_MULTIPATH is not set -# CONFIG_MD_FAULTY is not set # CONFIG_BCACHE is not set CONFIG_BLK_DEV_DM_BUILTIN=y CONFIG_BLK_DEV_DM=m @@ -2392,6 +2418,7 @@ CONFIG_DM_ZERO=m # CONFIG_DM_LOG_WRITES is not set # CONFIG_DM_INTEGRITY is not set # CONFIG_DM_AUDIT is not set +# CONFIG_DM_VDO is not set # CONFIG_TARGET_CORE is not set # CONFIG_FUSION is not set @@ -2419,6 +2446,7 @@ CONFIG_MACVTAP=m # CONFIG_GENEVE is not set # CONFIG_BAREUDP is not set # CONFIG_GTP is not set +# CONFIG_PFCP is not set # CONFIG_AMT is not set # CONFIG_MACSEC is not set # CONFIG_NETCONSOLE is not set @@ -2428,6 +2456,7 @@ CONFIG_TAP=m CONFIG_VETH=m CONFIG_VIRTIO_NET=y # CONFIG_NLMON is not set +# CONFIG_NETKIT is not set # CONFIG_MHI_NET is not set # CONFIG_ARCNET is not set @@ -2592,6 +2621,7 @@ CONFIG_IGBVF=y # CONFIG_ICE is not set # CONFIG_FM10K is not set # CONFIG_IGC is not set +# CONFIG_IDPF is not set # CONFIG_JME is not set CONFIG_NET_VENDOR_ADI=y # CONFIG_ADIN1110 is not set @@ -2605,6 +2635,7 @@ CONFIG_SKY2=y # CONFIG_OCTEONTX2_AF is not set # CONFIG_OCTEONTX2_PF is not set # CONFIG_OCTEON_EP is not set +# CONFIG_OCTEON_EP_VF is not set # CONFIG_PRESTERA is not set CONFIG_NET_VENDOR_MELLANOX=y CONFIG_MLX4_EN=m @@ -2622,9 +2653,11 @@ CONFIG_MLX5_BRIDGE=y # CONFIG_MLX5_CORE_IPOIB is not set CONFIG_MLX5_SW_STEERING=y # CONFIG_MLX5_SF is not set +# CONFIG_MLX5_DPLL is not set # CONFIG_MLXSW_CORE is not set # CONFIG_MLXFW is not set # CONFIG_MLXBF_GIGE is not set +CONFIG_NET_VENDOR_META=y CONFIG_NET_VENDOR_MICREL=y # CONFIG_KS8842 is not set # CONFIG_KS8851 is not set @@ -2720,6 +2753,7 @@ CONFIG_NET_VENDOR_SYNOPSYS=y # CONFIG_DWC_XLGMAC is not set CONFIG_NET_VENDOR_TEHUTI=y # CONFIG_TEHUTI is not set +# CONFIG_TEHUTI_TN40 is not set CONFIG_NET_VENDOR_TI=y # CONFIG_TI_CPSW_PHY_SEL is not set # CONFIG_TLAN is not set @@ -2736,11 +2770,9 @@ CONFIG_NET_VENDOR_WIZNET=y # CONFIG_WIZNET_W5300 is not set CONFIG_NET_VENDOR_XILINX=y # CONFIG_XILINX_EMACLITE is not set -# CONFIG_XILINX_AXI_EMAC is not set # CONFIG_XILINX_LL_TEMAC is not set # CONFIG_FDDI is not set # CONFIG_HIPPI is not set -# CONFIG_NET_SB1000 is not set CONFIG_PHYLINK=y CONFIG_PHYLIB=y CONFIG_SWPHY=y @@ -2752,6 +2784,7 @@ CONFIG_FIXED_PHY=y # # MII PHY device drivers # +# CONFIG_AIR_EN8811H_PHY is not set # CONFIG_AMD_PHY is not set # CONFIG_ADIN_PHY is not set # CONFIG_ADIN1100_PHY is not set @@ -2787,7 +2820,11 @@ CONFIG_MICROSEMI_PHY=y # CONFIG_NXP_C45_TJA11XX_PHY is not set # CONFIG_NXP_TJA11XX_PHY is not set # CONFIG_NCN26000_PHY is not set +CONFIG_QCOM_NET_PHYLIB=y CONFIG_AT803X_PHY=y +# CONFIG_QCA83XX_PHY is not set +# CONFIG_QCA808X_PHY is not set +# CONFIG_QCA807X_PHY is not set # CONFIG_QSEMI_PHY is not set CONFIG_REALTEK_PHY=y # CONFIG_RENESAS_PHY is not set @@ -2801,6 +2838,7 @@ CONFIG_SMSC_PHY=m CONFIG_DP83867_PHY=y # CONFIG_DP83869_PHY is not set # CONFIG_DP83TD510_PHY is not set +# CONFIG_DP83TG720_PHY is not set CONFIG_VITESSE_PHY=y # CONFIG_XILINX_GMII2RGMII is not set # CONFIG_MICREL_KS8995MA is not set @@ -2821,6 +2859,7 @@ CONFIG_CAN_FLEXCAN=m # CONFIG_CAN_CC770 is not set # CONFIG_CAN_CTUCANFD_PCI is not set # CONFIG_CAN_CTUCANFD_PLATFORM is not set +# CONFIG_CAN_ESD_402_PCI is not set # CONFIG_CAN_IFI_CANFD is not set # CONFIG_CAN_M_CAN is not set # CONFIG_CAN_PEAK_PCIEFD is not set @@ -2953,6 +2992,7 @@ CONFIG_ATH10K_PCI=m # CONFIG_ATH10K_USB is not set # CONFIG_ATH10K_DEBUG is not set # CONFIG_ATH10K_DEBUGFS is not set +CONFIG_ATH10K_LEDS=y CONFIG_WCN36XX=m # CONFIG_WCN36XX_DEBUGFS is not set CONFIG_ATH11K=m @@ -2961,7 +3001,6 @@ CONFIG_ATH11K_PCI=m # CONFIG_ATH11K_DEBUG is not set # CONFIG_ATH12K is not set CONFIG_WLAN_VENDOR_ATMEL=y -# CONFIG_ATMEL is not set # CONFIG_AT76C50X_USB is not set CONFIG_WLAN_VENDOR_BROADCOM=y # CONFIG_B43 is not set @@ -2975,8 +3014,6 @@ CONFIG_BRCMFMAC_SDIO=y # CONFIG_BRCMFMAC_PCIE is not set # CONFIG_BRCM_TRACING is not set # CONFIG_BRCMDBG is not set -CONFIG_WLAN_VENDOR_CISCO=y -# CONFIG_AIRO is not set CONFIG_WLAN_VENDOR_INTEL=y # CONFIG_IPW2100 is not set # CONFIG_IPW2200 is not set @@ -2984,8 +3021,6 @@ CONFIG_WLAN_VENDOR_INTEL=y # CONFIG_IWL3945 is not set # CONFIG_IWLWIFI is not set CONFIG_WLAN_VENDOR_INTERSIL=y -# CONFIG_HOSTAP is not set -# CONFIG_HERMES is not set # CONFIG_P54_COMMON is not set CONFIG_WLAN_VENDOR_MARVELL=y # CONFIG_LIBERTAS is not set @@ -3010,6 +3045,8 @@ CONFIG_WLAN_VENDOR_MEDIATEK=y # CONFIG_MT7921S is not set # CONFIG_MT7921U is not set # CONFIG_MT7996E is not set +# CONFIG_MT7925E is not set +# CONFIG_MT7925U is not set CONFIG_WLAN_VENDOR_MICROCHIP=y # CONFIG_WILC1000_SDIO is not set # CONFIG_WILC1000_SPI is not set @@ -3030,6 +3067,7 @@ CONFIG_RTL_CARDS=m # CONFIG_RTL8192EE is not set # CONFIG_RTL8821AE is not set # CONFIG_RTL8192CU is not set +# CONFIG_RTL8192DU is not set # CONFIG_RTL8XXXU is not set # CONFIG_RTW88 is not set # CONFIG_RTW89 is not set @@ -3046,7 +3084,6 @@ CONFIG_WL18XX=m CONFIG_WLCORE=m # CONFIG_WLCORE_SPI is not set CONFIG_WLCORE_SDIO=m -# CONFIG_RTL8723DU is not set # CONFIG_RTL8723DS is not set # CONFIG_RTL8822BU is not set # CONFIG_RTL8821CU is not set @@ -3055,11 +3092,9 @@ CONFIG_WLCORE_SDIO=m # CONFIG_RTL8189FS is not set # CONFIG_RTL8189ES is not set CONFIG_WLAN_VENDOR_ZYDAS=y -# CONFIG_USB_ZD1201 is not set # CONFIG_ZD1211RW is not set CONFIG_WLAN_VENDOR_QUANTENNA=y # CONFIG_QTNFMAC_PCIE is not set -# CONFIG_USB_NET_RNDIS_WLAN is not set # CONFIG_MAC80211_HWSIM is not set # CONFIG_VIRT_WIFI is not set # CONFIG_WAN is not set @@ -3187,6 +3222,8 @@ CONFIG_TOUCHSCREEN_ATMEL_MXT=m # CONFIG_TOUCHSCREEN_EXC3000 is not set # CONFIG_TOUCHSCREEN_FUJITSU is not set CONFIG_TOUCHSCREEN_GOODIX=m +# CONFIG_TOUCHSCREEN_GOODIX_BERLIN_I2C is not set +# CONFIG_TOUCHSCREEN_GOODIX_BERLIN_SPI is not set # CONFIG_TOUCHSCREEN_HIDEEP is not set # CONFIG_TOUCHSCREEN_HYCON_HY46XX is not set # CONFIG_TOUCHSCREEN_HYNITRON_CSTXXX is not set @@ -3303,7 +3340,6 @@ CONFIG_VT=y CONFIG_CONSOLE_TRANSLATIONS=y CONFIG_VT_CONSOLE=y CONFIG_VT_CONSOLE_SLEEP=y -CONFIG_HW_CONSOLE=y CONFIG_VT_HW_CONSOLE_BINDING=y CONFIG_UNIX98_PTYS=y CONFIG_LEGACY_PTYS=y @@ -3413,6 +3449,7 @@ CONFIG_HW_RANDOM_CN10K=m CONFIG_DEVMEM=y CONFIG_DEVPORT=y CONFIG_TCG_TPM=y +# CONFIG_TCG_TPM2_HMAC is not set # CONFIG_TCG_TIS is not set # CONFIG_TCG_TIS_SPI is not set # CONFIG_TCG_TIS_I2C is not set @@ -3483,6 +3520,7 @@ CONFIG_I2C_ALGOBIT=y # CONFIG_I2C_SIS96X is not set # CONFIG_I2C_VIA is not set # CONFIG_I2C_VIAPRO is not set +# CONFIG_I2C_ZHAOXIN is not set # # ACPI drivers @@ -3554,6 +3592,7 @@ CONFIG_SPI_MEM=y # CONFIG_SPI_CADENCE is not set CONFIG_SPI_CADENCE_QUADSPI=y # CONFIG_SPI_CADENCE_XSPI is not set +# CONFIG_SPI_CH341 is not set CONFIG_SPI_DESIGNWARE=m CONFIG_SPI_DW_DMA=y # CONFIG_SPI_DW_PCI is not set @@ -3572,7 +3611,6 @@ CONFIG_SPI_FSL_DSPI=y # CONFIG_SPI_OC_TINY is not set # CONFIG_SPI_PCI1XXXX is not set CONFIG_SPI_PL022=y -# CONFIG_SPI_PXA2XX is not set # CONFIG_SPI_SC18IS602 is not set # CONFIG_SPI_SIFIVE is not set # CONFIG_SPI_SN_F_OSPI is not set @@ -3626,6 +3664,7 @@ CONFIG_PTP_1588_CLOCK_QORIQ=y CONFIG_PTP_1588_CLOCK_KVM=y # CONFIG_PTP_1588_CLOCK_IDT82P33 is not set # CONFIG_PTP_1588_CLOCK_IDTCM is not set +# CONFIG_PTP_1588_CLOCK_FC3W is not set # CONFIG_PTP_1588_CLOCK_MOCK is not set # CONFIG_PTP_1588_CLOCK_OCP is not set # end of PTP clock support @@ -3639,15 +3678,18 @@ CONFIG_GENERIC_PINCONF=y # CONFIG_DEBUG_PINCTRL is not set # CONFIG_PINCTRL_AMD is not set # CONFIG_PINCTRL_AXP209 is not set +# CONFIG_PINCTRL_AW9523 is not set # CONFIG_PINCTRL_CY8C95X0 is not set CONFIG_PINCTRL_MAX77620=y # CONFIG_PINCTRL_MCP23S08 is not set # CONFIG_PINCTRL_MICROCHIP_SGPIO is not set # CONFIG_PINCTRL_OCELOT is not set +# CONFIG_PINCTRL_SCMI is not set CONFIG_PINCTRL_SINGLE=y # CONFIG_PINCTRL_STMFX is not set # CONFIG_PINCTRL_SX150X is not set CONFIG_PINCTRL_IMX=y +# CONFIG_PINCTRL_IMX_SCMI is not set CONFIG_PINCTRL_IMX_SCU=y CONFIG_PINCTRL_IMX8MM=y CONFIG_PINCTRL_IMX8MN=y @@ -3658,6 +3700,7 @@ CONFIG_PINCTRL_IMX8QXP=y CONFIG_PINCTRL_IMX8DXL=y CONFIG_PINCTRL_IMX8ULP=y # CONFIG_PINCTRL_IMXRT1050 is not set +# CONFIG_PINCTRL_IMX91 is not set CONFIG_PINCTRL_IMX93=y # CONFIG_PINCTRL_IMXRT1170 is not set # CONFIG_PINCTRL_S32G2 is not set @@ -3730,6 +3773,7 @@ CONFIG_GPIO_PCA953X_IRQ=y # MFD GPIO expanders # CONFIG_GPIO_BD9571MWV=m +# CONFIG_GPIO_CROS_EC is not set CONFIG_GPIO_MAX77620=y CONFIG_GPIO_SL28CPLD=m # CONFIG_GPIO_WM8994 is not set @@ -3770,9 +3814,15 @@ CONFIG_GPIO_SL28CPLD=m # CONFIG_GPIO_SIM is not set # end of Virtual GPIO drivers +# +# GPIO Debugging utilities +# +# CONFIG_GPIO_SLOPPY_LOGIC_ANALYZER is not set +# CONFIG_GPIO_VIRTUSER is not set +# end of GPIO Debugging utilities + # CONFIG_W1 is not set CONFIG_POWER_RESET=y -# CONFIG_POWER_RESET_BRCMSTB is not set # CONFIG_POWER_RESET_GPIO is not set # CONFIG_POWER_RESET_GPIO_RESTART is not set # CONFIG_POWER_RESET_LTC2952 is not set @@ -3785,6 +3835,7 @@ CONFIG_POWER_RESET_SYSCON=y CONFIG_REBOOT_MODE=y CONFIG_SYSCON_REBOOT_MODE=y # CONFIG_NVMEM_REBOOT_MODE is not set +# CONFIG_POWER_SEQUENCING is not set CONFIG_POWER_SUPPLY=y # CONFIG_POWER_SUPPLY_DEBUG is not set CONFIG_POWER_SUPPLY_HWMON=y @@ -3806,6 +3857,7 @@ CONFIG_BATTERY_BQ27XXX_I2C=y # CONFIG_AXP20X_POWER is not set # CONFIG_BATTERY_MAX17040 is not set CONFIG_BATTERY_MAX17042=m +# CONFIG_BATTERY_MAX1720X is not set # CONFIG_CHARGER_ISP1704 is not set # CONFIG_CHARGER_MAX8903 is not set # CONFIG_CHARGER_LP8727 is not set @@ -3833,9 +3885,11 @@ CONFIG_CHARGER_BQ25980=m # CONFIG_CHARGER_RT9471 is not set # CONFIG_CHARGER_CROS_USBPD is not set CONFIG_CHARGER_CROS_PCHG=y +CONFIG_CHARGER_CROS_CONTROL=y # CONFIG_CHARGER_UCS1002 is not set # CONFIG_CHARGER_BD99954 is not set # CONFIG_BATTERY_UG3105 is not set +# CONFIG_FUEL_GAUGE_MM8013 is not set CONFIG_HWMON=y # CONFIG_HWMON_DEBUG_CHIP is not set @@ -3861,12 +3915,15 @@ CONFIG_HWMON=y # CONFIG_SENSORS_AQUACOMPUTER_D5NEXT is not set # CONFIG_SENSORS_AS370 is not set # CONFIG_SENSORS_ASC7621 is not set +# CONFIG_SENSORS_ASUS_ROG_RYUJIN is not set # CONFIG_SENSORS_AXI_FAN_CONTROL is not set CONFIG_SENSORS_ARM_SCMI=y CONFIG_SENSORS_ARM_SCPI=y # CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_CHIPCAP2 is not set # CONFIG_SENSORS_CORSAIR_CPRO is not set # CONFIG_SENSORS_CORSAIR_PSU is not set +CONFIG_SENSORS_CROS_EC=y # CONFIG_SENSORS_DRIVETEMP is not set # CONFIG_SENSORS_DS620 is not set # CONFIG_SENSORS_DS1621 is not set @@ -3875,6 +3932,7 @@ CONFIG_SENSORS_ARM_SCPI=y # CONFIG_SENSORS_F71882FG is not set # CONFIG_SENSORS_F75375S is not set # CONFIG_SENSORS_FTSTEUTATES is not set +# CONFIG_SENSORS_GIGABYTE_WATERFORCE is not set # CONFIG_SENSORS_GL518SM is not set # CONFIG_SENSORS_GL520SM is not set # CONFIG_SENSORS_G760A is not set @@ -3884,15 +3942,17 @@ CONFIG_SENSORS_GPIO_FAN=m # CONFIG_SENSORS_HS3001 is not set # CONFIG_SENSORS_IBMAEM is not set # CONFIG_SENSORS_IBMPEX is not set -# CONFIG_SENSORS_IIO_HWMON is not set +CONFIG_SENSORS_IIO_HWMON=y # CONFIG_SENSORS_IT87 is not set CONFIG_SENSORS_JC42=m +# CONFIG_SENSORS_POWERZ is not set # CONFIG_SENSORS_POWR1220 is not set # CONFIG_SENSORS_LINEAGE is not set # CONFIG_SENSORS_LTC2945 is not set # CONFIG_SENSORS_LTC2947_I2C is not set # CONFIG_SENSORS_LTC2947_SPI is not set # CONFIG_SENSORS_LTC2990 is not set +# CONFIG_SENSORS_LTC2991 is not set # CONFIG_SENSORS_LTC2992 is not set # CONFIG_SENSORS_LTC4151 is not set # CONFIG_SENSORS_LTC4215 is not set @@ -3900,6 +3960,7 @@ CONFIG_SENSORS_JC42=m # CONFIG_SENSORS_LTC4245 is not set # CONFIG_SENSORS_LTC4260 is not set # CONFIG_SENSORS_LTC4261 is not set +# CONFIG_SENSORS_LTC4282 is not set # CONFIG_SENSORS_MAX1111 is not set # CONFIG_SENSORS_MAX127 is not set # CONFIG_SENSORS_MAX16065 is not set @@ -3948,10 +4009,12 @@ CONFIG_SENSORS_LM90=m # CONFIG_SENSORS_NCT7904 is not set # CONFIG_SENSORS_NPCM7XX is not set # CONFIG_SENSORS_NZXT_KRAKEN2 is not set +# CONFIG_SENSORS_NZXT_KRAKEN3 is not set # CONFIG_SENSORS_NZXT_SMART2 is not set # CONFIG_SENSORS_OCC_P8_I2C is not set # CONFIG_SENSORS_PCF8591 is not set # CONFIG_PMBUS is not set +# CONFIG_SENSORS_PT5161L is not set CONFIG_SENSORS_PWM_FAN=m CONFIG_SENSORS_SL28CPLD=m # CONFIG_SENSORS_SBTSI is not set @@ -3981,6 +4044,7 @@ CONFIG_SENSORS_SL28CPLD=m CONFIG_SENSORS_INA2XX=m # CONFIG_SENSORS_INA238 is not set CONFIG_SENSORS_INA3221=m +# CONFIG_SENSORS_SPD5118 is not set # CONFIG_SENSORS_TC74 is not set # CONFIG_SENSORS_THMC50 is not set # CONFIG_SENSORS_TMP102 is not set @@ -4012,10 +4076,10 @@ CONFIG_SENSORS_INA3221=m CONFIG_THERMAL=y # CONFIG_THERMAL_NETLINK is not set # CONFIG_THERMAL_STATISTICS is not set +# CONFIG_THERMAL_DEBUGFS is not set CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 CONFIG_THERMAL_HWMON=y CONFIG_THERMAL_OF=y -# CONFIG_THERMAL_WRITABLE_TRIPS is not set CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y # CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set # CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set @@ -4053,6 +4117,7 @@ CONFIG_WATCHDOG_OPEN_TIMEOUT=0 # Watchdog Device Drivers # # CONFIG_SOFT_WATCHDOG is not set +# CONFIG_CROS_EC_WATCHDOG is not set # CONFIG_GPIO_WATCHDOG is not set # CONFIG_WDAT_WDT is not set # CONFIG_XILINX_WATCHDOG is not set @@ -4133,6 +4198,7 @@ CONFIG_MFD_HI6421_PMIC=y # CONFIG_MFD_88PM800 is not set # CONFIG_MFD_88PM805 is not set # CONFIG_MFD_88PM860X is not set +# CONFIG_MFD_88PM886_PMIC is not set # CONFIG_MFD_MAX14577 is not set # CONFIG_MFD_MAX77541 is not set CONFIG_MFD_MAX77620=y @@ -4211,11 +4277,14 @@ CONFIG_MFD_WM8994=m CONFIG_MFD_ROHM_BD718XX=y # CONFIG_MFD_ROHM_BD71828 is not set # CONFIG_MFD_ROHM_BD957XMUF is not set +# CONFIG_MFD_ROHM_BD96801 is not set # CONFIG_MFD_STPMIC1 is not set # CONFIG_MFD_STMFX is not set CONFIG_MFD_WCD934X=m # CONFIG_MFD_ATC260X_I2C is not set # CONFIG_MFD_QCOM_PM8008 is not set +# CONFIG_MFD_CS40L50_I2C is not set +# CONFIG_MFD_CS40L50_SPI is not set # CONFIG_RAVE_SP_CORE is not set # CONFIG_MFD_INTEL_M10_BMC_SPI is not set # CONFIG_MFD_RSMU_I2C is not set @@ -4227,6 +4296,7 @@ CONFIG_REGULATOR=y CONFIG_REGULATOR_FIXED_VOLTAGE=y # CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set # CONFIG_REGULATOR_USERSPACE_CONSUMER is not set +# CONFIG_REGULATOR_NETLINK_EVENTS is not set # CONFIG_REGULATOR_88PG86X is not set # CONFIG_REGULATOR_ACT8865 is not set # CONFIG_REGULATOR_AD5398 is not set @@ -4254,6 +4324,7 @@ CONFIG_REGULATOR_HI6421V530=y # CONFIG_REGULATOR_LTC3589 is not set # CONFIG_REGULATOR_LTC3676 is not set # CONFIG_REGULATOR_MAX1586 is not set +# CONFIG_REGULATOR_MAX77503 is not set CONFIG_REGULATOR_MAX77620=y # CONFIG_REGULATOR_MAX77857 is not set # CONFIG_REGULATOR_MAX8649 is not set @@ -4398,6 +4469,7 @@ CONFIG_VIDEO_V4L2_I2C=y CONFIG_VIDEO_V4L2_SUBDEV_API=y # CONFIG_VIDEO_ADV_DEBUG is not set # CONFIG_VIDEO_FIXED_MINOR_RANGES is not set +CONFIG_V4L2_JPEG_HELPER=m CONFIG_V4L2_H264=m CONFIG_V4L2_VP9=m CONFIG_V4L2_MEM2MEM_DEV=m @@ -4411,7 +4483,6 @@ CONFIG_V4L2_CCI_I2C=m # Media controller options # # CONFIG_MEDIA_CONTROLLER_DVB is not set -CONFIG_MEDIA_CONTROLLER_REQUEST_API=y # end of Media controller options # @@ -4542,6 +4613,10 @@ CONFIG_V4L_MEM2MEM_DRIVERS=y # Microchip Technology, Inc. media platform drivers # +# +# Nuvoton media platform drivers +# + # # NVidia media platform drivers # @@ -4561,6 +4636,10 @@ CONFIG_VIDEO_IMX7_CSI=m # Qualcomm media platform drivers # +# +# Raspberry Pi media platform drivers +# + # # Renesas media platform drivers # @@ -4623,7 +4702,12 @@ CONFIG_MEDIA_ATTACH=y # CONFIG_VIDEO_IR_I2C=m CONFIG_VIDEO_CAMERA_SENSOR=y +# CONFIG_VIDEO_ALVIUM_CSI2 is not set # CONFIG_VIDEO_AR0521 is not set +# CONFIG_VIDEO_GC0308 is not set +# CONFIG_VIDEO_GC05A2 is not set +# CONFIG_VIDEO_GC08A3 is not set +# CONFIG_VIDEO_GC2145 is not set # CONFIG_VIDEO_HI556 is not set # CONFIG_VIDEO_HI846 is not set # CONFIG_VIDEO_HI847 is not set @@ -4632,6 +4716,7 @@ CONFIG_VIDEO_CAMERA_SENSOR=y CONFIG_VIDEO_IMX219=m # CONFIG_VIDEO_IMX258 is not set # CONFIG_VIDEO_IMX274 is not set +# CONFIG_VIDEO_IMX283 is not set # CONFIG_VIDEO_IMX290 is not set # CONFIG_VIDEO_IMX296 is not set # CONFIG_VIDEO_IMX319 is not set @@ -4642,6 +4727,7 @@ CONFIG_VIDEO_IMX219=m # CONFIG_VIDEO_IMX415 is not set # CONFIG_VIDEO_MT9M001 is not set # CONFIG_VIDEO_MT9M111 is not set +# CONFIG_VIDEO_MT9M114 is not set # CONFIG_VIDEO_MT9P031 is not set # CONFIG_VIDEO_MT9T112 is not set # CONFIG_VIDEO_MT9V011 is not set @@ -4668,6 +4754,7 @@ CONFIG_VIDEO_OV5645=m # CONFIG_VIDEO_OV5675 is not set # CONFIG_VIDEO_OV5693 is not set # CONFIG_VIDEO_OV5695 is not set +# CONFIG_VIDEO_OV64A40 is not set # CONFIG_VIDEO_OV6650 is not set # CONFIG_VIDEO_OV7251 is not set # CONFIG_VIDEO_OV7640 is not set @@ -4687,10 +4774,16 @@ CONFIG_VIDEO_OV5645=m # CONFIG_VIDEO_S5C73M3 is not set # CONFIG_VIDEO_S5K5BAF is not set # CONFIG_VIDEO_S5K6A3 is not set -# CONFIG_VIDEO_ST_VGXY61 is not set +# CONFIG_VIDEO_VGXY61 is not set # CONFIG_VIDEO_CCS is not set # CONFIG_VIDEO_ET8EK8 is not set +# +# Camera ISPs +# +# CONFIG_VIDEO_THP7312 is not set +# end of Camera ISPs + # # Lens drivers # @@ -4760,6 +4853,7 @@ CONFIG_VIDEO_OV5645=m # CONFIG_VIDEO_TVP5150 is not set # CONFIG_VIDEO_TVP7002 is not set # CONFIG_VIDEO_TW2804 is not set +# CONFIG_VIDEO_TW9900 is not set # CONFIG_VIDEO_TW9903 is not set # CONFIG_VIDEO_TW9906 is not set # CONFIG_VIDEO_TW9910 is not set @@ -4819,6 +4913,8 @@ CONFIG_VIDEO_OV5645=m # CONFIG_VIDEO_DS90UB913 is not set # CONFIG_VIDEO_DS90UB953 is not set # CONFIG_VIDEO_DS90UB960 is not set +# CONFIG_VIDEO_MAX96714 is not set +# CONFIG_VIDEO_MAX96717 is not set # end of Video serializers and deserializers # @@ -5039,11 +5135,12 @@ CONFIG_MEDIA_TUNER_XC5000=m # Graphics support # CONFIG_APERTURE_HELPERS=y -CONFIG_VIDEO_CMDLINE=y -CONFIG_VIDEO_NOMODESET=y +CONFIG_SCREEN_INFO=y +CONFIG_VIDEO=y # CONFIG_AUXDISPLAY is not set CONFIG_DRM=m CONFIG_DRM_MIPI_DSI=y +# CONFIG_DRM_DEBUG_MM is not set CONFIG_DRM_KMS_HELPER=m # CONFIG_DRM_DEBUG_DP_MST_TOPOLOGY_REFS is not set # CONFIG_DRM_DEBUG_MODESET_LOCK is not set @@ -5051,13 +5148,15 @@ CONFIG_DRM_FBDEV_EMULATION=y CONFIG_DRM_FBDEV_OVERALLOC=100 # CONFIG_DRM_FBDEV_LEAK_PHYS_SMEM is not set # CONFIG_DRM_LOAD_EDID_FIRMWARE is not set -CONFIG_DRM_DP_AUX_BUS=m +CONFIG_DRM_DISPLAY_DP_AUX_BUS=m CONFIG_DRM_DISPLAY_HELPER=m +CONFIG_DRM_BRIDGE_CONNECTOR=y +# CONFIG_DRM_DISPLAY_DP_AUX_CEC is not set +# CONFIG_DRM_DISPLAY_DP_AUX_CHARDEV is not set CONFIG_DRM_DISPLAY_DP_HELPER=y CONFIG_DRM_DISPLAY_HDCP_HELPER=y CONFIG_DRM_DISPLAY_HDMI_HELPER=y -# CONFIG_DRM_DP_AUX_CHARDEV is not set -CONFIG_DRM_DP_CEC=y +CONFIG_DRM_DISPLAY_HDMI_STATE_HELPER=y CONFIG_DRM_GEM_DMA_HELPER=m CONFIG_DRM_SCHED=m @@ -5082,6 +5181,7 @@ CONFIG_DRM_KOMEDA=m # CONFIG_DRM_RADEON is not set # CONFIG_DRM_AMDGPU is not set # CONFIG_DRM_NOUVEAU is not set +# CONFIG_DRM_XE is not set # CONFIG_DRM_VGEM is not set # CONFIG_DRM_VKMS is not set # CONFIG_DRM_VMWGFX is not set @@ -5101,32 +5201,39 @@ CONFIG_DRM_PANEL=y # CONFIG_DRM_PANEL_AUO_A030JTN01 is not set # CONFIG_DRM_PANEL_BOE_BF060Y8M_AJ0 is not set # CONFIG_DRM_PANEL_BOE_HIMAX8279D is not set +# CONFIG_DRM_PANEL_BOE_TH101MB31UIG002_28A is not set CONFIG_DRM_PANEL_BOE_TV101WUM_NL6=m -# CONFIG_DRM_PANEL_DSI_CM is not set -CONFIG_DRM_PANEL_LVDS=m -CONFIG_DRM_PANEL_SIMPLE=m -CONFIG_DRM_PANEL_EDP=m # CONFIG_DRM_PANEL_EBBG_FT8719 is not set # CONFIG_DRM_PANEL_ELIDA_KD35T133 is not set # CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02 is not set # CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D is not set +# CONFIG_DRM_PANEL_DSI_CM is not set +CONFIG_DRM_PANEL_LVDS=m +# CONFIG_DRM_PANEL_HIMAX_HX83102 is not set +# CONFIG_DRM_PANEL_HIMAX_HX83112A is not set # CONFIG_DRM_PANEL_HIMAX_HX8394 is not set # CONFIG_DRM_PANEL_ILITEK_IL9322 is not set # CONFIG_DRM_PANEL_ILITEK_ILI9341 is not set +# CONFIG_DRM_PANEL_ILITEK_ILI9805 is not set +# CONFIG_DRM_PANEL_ILITEK_ILI9806E is not set # CONFIG_DRM_PANEL_ILITEK_ILI9881C is not set +# CONFIG_DRM_PANEL_ILITEK_ILI9882T is not set # CONFIG_DRM_PANEL_INNOLUX_EJ030NA is not set # CONFIG_DRM_PANEL_INNOLUX_P079ZCA is not set # CONFIG_DRM_PANEL_JADARD_JD9365DA_H3 is not set +# CONFIG_DRM_PANEL_JDI_LPM102A188A is not set # CONFIG_DRM_PANEL_JDI_LT070ME05000 is not set # CONFIG_DRM_PANEL_JDI_R63452 is not set # CONFIG_DRM_PANEL_KHADAS_TS050 is not set # CONFIG_DRM_PANEL_KINGDISPLAY_KD097D04 is not set # CONFIG_DRM_PANEL_LEADTEK_LTK050H3146W is not set # CONFIG_DRM_PANEL_LEADTEK_LTK500HD1829 is not set -# CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set +# CONFIG_DRM_PANEL_LINCOLNTECH_LCD197 is not set # CONFIG_DRM_PANEL_LG_LB035Q02 is not set # CONFIG_DRM_PANEL_LG_LG4573 is not set +# CONFIG_DRM_PANEL_LG_SW43408 is not set # CONFIG_DRM_PANEL_MAGNACHIP_D53E6EA8966 is not set +CONFIG_DRM_PANEL_MANTIX_MLAF057WE51=m # CONFIG_DRM_PANEL_NEC_NL8048HL11 is not set # CONFIG_DRM_PANEL_NEWVISION_NV3051D is not set # CONFIG_DRM_PANEL_NEWVISION_NV3052C is not set @@ -5135,8 +5242,8 @@ CONFIG_DRM_PANEL_EDP=m # CONFIG_DRM_PANEL_NOVATEK_NT35950 is not set # CONFIG_DRM_PANEL_NOVATEK_NT36523 is not set # CONFIG_DRM_PANEL_NOVATEK_NT36672A is not set +# CONFIG_DRM_PANEL_NOVATEK_NT36672E is not set # CONFIG_DRM_PANEL_NOVATEK_NT39016 is not set -CONFIG_DRM_PANEL_MANTIX_MLAF057WE51=m # CONFIG_DRM_PANEL_OLIMEX_LCD_OLINUXINO is not set # CONFIG_DRM_PANEL_ORISETECH_OTA5601A is not set # CONFIG_DRM_PANEL_ORISETECH_OTM8009A is not set @@ -5145,16 +5252,20 @@ CONFIG_DRM_PANEL_MANTIX_MLAF057WE51=m # CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN is not set CONFIG_DRM_PANEL_RAYDIUM_RM67191=m # CONFIG_DRM_PANEL_RAYDIUM_RM68200 is not set +# CONFIG_DRM_PANEL_RAYDIUM_RM692E5 is not set +# CONFIG_DRM_PANEL_RAYDIUM_RM69380 is not set # CONFIG_DRM_PANEL_RONBO_RB070D30 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01 is not set # CONFIG_DRM_PANEL_SAMSUNG_ATNA33XC20 is not set # CONFIG_DRM_PANEL_SAMSUNG_DB7430 is not set +# CONFIG_DRM_PANEL_SAMSUNG_LD9040 is not set +# CONFIG_DRM_PANEL_SAMSUNG_S6E3FA7 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6D16D0 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6D27A1 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6D7AA0 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6E63M0 is not set -# CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01 is not set # CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0 is not set # CONFIG_DRM_PANEL_SAMSUNG_SOFEF00 is not set # CONFIG_DRM_PANEL_SEIKO_43WVF1G is not set @@ -5169,14 +5280,17 @@ CONFIG_DRM_PANEL_SITRONIX_ST7703=m # CONFIG_DRM_PANEL_SONY_TD4353_JDI is not set # CONFIG_DRM_PANEL_SONY_TULIP_TRULY_NT35521 is not set # CONFIG_DRM_PANEL_STARTEK_KD070FHFID015 is not set +CONFIG_DRM_PANEL_EDP=m +CONFIG_DRM_PANEL_SIMPLE=m +# CONFIG_DRM_PANEL_SYNAPTICS_R63353 is not set # CONFIG_DRM_PANEL_TDO_TL070WSH30 is not set # CONFIG_DRM_PANEL_TPO_TD028TTEC1 is not set # CONFIG_DRM_PANEL_TPO_TD043MTEA1 is not set # CONFIG_DRM_PANEL_TPO_TPG110 is not set CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA=m +# CONFIG_DRM_PANEL_VISIONOX_R66451 is not set # CONFIG_DRM_PANEL_VISIONOX_RM69299 is not set # CONFIG_DRM_PANEL_VISIONOX_VTDR6130 is not set -# CONFIG_DRM_PANEL_VISIONOX_R66451 is not set # CONFIG_DRM_PANEL_WIDECHIPS_WS2401 is not set # CONFIG_DRM_PANEL_XINPENG_XPP055C272 is not set # end of Display Panels @@ -5228,13 +5342,14 @@ CONFIG_DRM_I2C_ADV7511_AUDIO=y CONFIG_DRM_I2C_ADV7511_CEC=y # CONFIG_DRM_CDNS_DSI is not set CONFIG_DRM_CDNS_MHDP8546=m +CONFIG_DRM_IMX8MP_DW_HDMI_BRIDGE=m +CONFIG_DRM_IMX8MP_HDMI_PVI=m # CONFIG_DRM_IMX8QM_LDB is not set # CONFIG_DRM_IMX8QXP_LDB is not set # CONFIG_DRM_IMX8QXP_PIXEL_COMBINER is not set # CONFIG_DRM_IMX8QXP_PIXEL_LINK is not set # CONFIG_DRM_IMX8QXP_PIXEL_LINK_TO_DPI is not set -CONFIG_DRM_IMX8MP_DW_HDMI_BRIDGE=m -CONFIG_DRM_IMX8MP_HDMI_PVI=m +# CONFIG_DRM_IMX93_MIPI_DSI is not set CONFIG_DRM_DW_HDMI=m # CONFIG_DRM_DW_HDMI_AHB_AUDIO is not set # CONFIG_DRM_DW_HDMI_I2S_AUDIO is not set @@ -5244,7 +5359,6 @@ CONFIG_DRM_DW_HDMI_CEC=m CONFIG_DRM_IMX_DCSS=m # CONFIG_DRM_IMX_LCDC is not set -# CONFIG_DRM_LOONGSON is not set CONFIG_DRM_ETNAVIV=m CONFIG_DRM_ETNAVIV_THERMAL=y # CONFIG_DRM_HISI_HIBMC is not set @@ -5272,10 +5386,12 @@ CONFIG_DRM_IMX_LCDIF=m # CONFIG_DRM_XEN_FRONTEND is not set # CONFIG_DRM_LIMA is not set # CONFIG_DRM_PANFROST is not set +# CONFIG_DRM_PANTHOR is not set # CONFIG_DRM_TIDSS is not set # CONFIG_DRM_GUD is not set # CONFIG_DRM_SSD130X is not set -# CONFIG_DRM_LEGACY is not set +# CONFIG_DRM_POWERVR is not set +# CONFIG_DRM_WERROR is not set CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y # @@ -5284,7 +5400,6 @@ CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y CONFIG_FB=y # CONFIG_FB_CIRRUS is not set # CONFIG_FB_PM2 is not set -# CONFIG_FB_ARMCLCD is not set # CONFIG_FB_IMX is not set # CONFIG_FB_CYBER2000 is not set # CONFIG_FB_ASILIANT is not set @@ -5332,7 +5447,7 @@ CONFIG_FB_SYS_FILLRECT=y CONFIG_FB_SYS_COPYAREA=y CONFIG_FB_SYS_IMAGEBLIT=y # CONFIG_FB_FOREIGN_ENDIAN is not set -CONFIG_FB_SYS_FOPS=y +CONFIG_FB_SYSMEM_FOPS=y CONFIG_FB_DEFERRED_IO=y CONFIG_FB_DMAMEM_HELPERS=y CONFIG_FB_IOMEM_FOPS=y @@ -5349,14 +5464,17 @@ CONFIG_FB_MODE_HELPERS=y # CONFIG_LCD_CLASS_DEVICE is not set CONFIG_BACKLIGHT_CLASS_DEVICE=y # CONFIG_BACKLIGHT_KTD253 is not set +# CONFIG_BACKLIGHT_KTD2801 is not set # CONFIG_BACKLIGHT_KTZ8866 is not set CONFIG_BACKLIGHT_PWM=m # CONFIG_BACKLIGHT_QCOM_WLED is not set # CONFIG_BACKLIGHT_ADP8860 is not set # CONFIG_BACKLIGHT_ADP8870 is not set +# CONFIG_BACKLIGHT_LM3509 is not set # CONFIG_BACKLIGHT_LM3630A is not set # CONFIG_BACKLIGHT_LM3639 is not set CONFIG_BACKLIGHT_LP855X=m +# CONFIG_BACKLIGHT_MP3309C is not set # CONFIG_BACKLIGHT_GPIO is not set # CONFIG_BACKLIGHT_LV5207LP is not set # CONFIG_BACKLIGHT_BD6107 is not set @@ -5538,7 +5656,6 @@ CONFIG_SND_IMX_SOC=m # # CONFIG_SND_SOC_IMX_ES8328 is not set CONFIG_SND_SOC_IMX_SGTL5000=m -CONFIG_SND_SOC_IMX_SPDIF=m CONFIG_SND_SOC_FSL_ASOC_CARD=m CONFIG_SND_SOC_IMX_AUDMIX=m # CONFIG_SND_SOC_IMX_HDMI is not set @@ -5582,6 +5699,7 @@ CONFIG_SND_SOC_WM_HUBS=m # CONFIG_SND_SOC_AK4458 is not set # CONFIG_SND_SOC_AK4554 is not set CONFIG_SND_SOC_AK4613=m +# CONFIG_SND_SOC_AK4619 is not set # CONFIG_SND_SOC_AK4642 is not set # CONFIG_SND_SOC_AK5386 is not set # CONFIG_SND_SOC_AK5558 is not set @@ -5590,6 +5708,8 @@ CONFIG_SND_SOC_AK4613=m # CONFIG_SND_SOC_AW8738 is not set # CONFIG_SND_SOC_AW88395 is not set # CONFIG_SND_SOC_AW88261 is not set +# CONFIG_SND_SOC_AW87390 is not set +# CONFIG_SND_SOC_AW88399 is not set # CONFIG_SND_SOC_BD28623 is not set # CONFIG_SND_SOC_BT_SCO is not set # CONFIG_SND_SOC_CHV3_CODEC is not set @@ -5623,12 +5743,14 @@ CONFIG_SND_SOC_AK4613=m # CONFIG_SND_SOC_CS4341 is not set # CONFIG_SND_SOC_CS4349 is not set # CONFIG_SND_SOC_CS53L30 is not set +# CONFIG_SND_SOC_CS530X_I2C is not set # CONFIG_SND_SOC_CX2072X is not set # CONFIG_SND_SOC_DA7213 is not set # CONFIG_SND_SOC_DMIC is not set CONFIG_SND_SOC_HDMI_CODEC=m CONFIG_SND_SOC_ES7134=m CONFIG_SND_SOC_ES7241=m +# CONFIG_SND_SOC_ES8311 is not set # CONFIG_SND_SOC_ES8316 is not set # CONFIG_SND_SOC_ES8326 is not set # CONFIG_SND_SOC_ES8328_I2C is not set @@ -5637,7 +5759,6 @@ CONFIG_SND_SOC_GTM601=m # CONFIG_SND_SOC_HDA is not set # CONFIG_SND_SOC_ICS43432 is not set # CONFIG_SND_SOC_IDT821034 is not set -# CONFIG_SND_SOC_INNO_RK3036 is not set # CONFIG_SND_SOC_MAX98088 is not set # CONFIG_SND_SOC_MAX98090 is not set # CONFIG_SND_SOC_MAX98357A is not set @@ -5668,13 +5789,14 @@ CONFIG_SND_SOC_PCM3168A_I2C=m # CONFIG_SND_SOC_PCM5102A is not set # CONFIG_SND_SOC_PCM512x_I2C is not set # CONFIG_SND_SOC_PCM512x_SPI is not set +# CONFIG_SND_SOC_PCM6240 is not set # CONFIG_SND_SOC_PEB2466 is not set -# CONFIG_SND_SOC_RK3328 is not set CONFIG_SND_SOC_RL6231=m # CONFIG_SND_SOC_RT1017_SDCA_SDW is not set # CONFIG_SND_SOC_RT1308_SDW is not set # CONFIG_SND_SOC_RT1316_SDW is not set # CONFIG_SND_SOC_RT1318_SDW is not set +# CONFIG_SND_SOC_RT1320_SDW is not set # CONFIG_SND_SOC_RT5616 is not set # CONFIG_SND_SOC_RT5631 is not set # CONFIG_SND_SOC_RT5640 is not set @@ -5689,6 +5811,7 @@ CONFIG_SND_SOC_RT5659=m # CONFIG_SND_SOC_RT715_SDW is not set # CONFIG_SND_SOC_RT715_SDCA_SDW is not set # CONFIG_SND_SOC_RT9120 is not set +# CONFIG_SND_SOC_RTQ9128 is not set # CONFIG_SND_SOC_SDW_MOCKUP is not set CONFIG_SND_SOC_SGTL5000=m CONFIG_SND_SOC_SIMPLE_AMPLIFIER=m @@ -5737,7 +5860,9 @@ CONFIG_SND_SOC_WCD_CLASSH=m CONFIG_SND_SOC_WCD9335=m CONFIG_SND_SOC_WCD_MBHC=m CONFIG_SND_SOC_WCD934X=m +# CONFIG_SND_SOC_WCD937X_SDW is not set # CONFIG_SND_SOC_WCD938X_SDW is not set +# CONFIG_SND_SOC_WCD939X_SDW is not set # CONFIG_SND_SOC_WM8510 is not set # CONFIG_SND_SOC_WM8523 is not set CONFIG_SND_SOC_WM8524=m @@ -5907,11 +6032,13 @@ CONFIG_HID_MULTITOUCH=m # CONFIG_HID_U2FZERO is not set # CONFIG_HID_WACOM is not set # CONFIG_HID_WIIMOTE is not set +# CONFIG_HID_WINWING is not set # CONFIG_HID_XINMO is not set # CONFIG_HID_ZEROPLUS is not set # CONFIG_HID_ZYDACRON is not set # CONFIG_HID_SENSOR_HUB is not set # CONFIG_HID_ALPS is not set +# CONFIG_HID_MCP2200 is not set # CONFIG_HID_MCP2221 is not set # end of Special HID drivers @@ -5943,6 +6070,7 @@ CONFIG_USB_ULPI_BUS=y CONFIG_USB_ARCH_HAS_HCD=y CONFIG_USB=y CONFIG_USB_PCI=y +# CONFIG_USB_PCI_AMD is not set # CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set # @@ -5957,6 +6085,7 @@ CONFIG_USB_OTG=y # CONFIG_USB_OTG_FSM is not set # CONFIG_USB_LEDS_TRIGGER_USBPORT is not set CONFIG_USB_AUTOSUSPEND_DELAY=2 +CONFIG_USB_DEFAULT_AUTHORIZATION_MODE=1 # CONFIG_USB_MON is not set # @@ -6078,6 +6207,7 @@ CONFIG_USB_CHIPIDEA_UDC=y CONFIG_USB_CHIPIDEA_HOST=y CONFIG_USB_CHIPIDEA_PCI=y CONFIG_USB_CHIPIDEA_MSM=y +CONFIG_USB_CHIPIDEA_NPCM=y CONFIG_USB_CHIPIDEA_IMX=y CONFIG_USB_CHIPIDEA_GENERIC=y CONFIG_USB_CHIPIDEA_TEGRA=y @@ -6160,6 +6290,7 @@ CONFIG_USB_SERIAL_OPTION=m # CONFIG_USB_IDMOUSE is not set # CONFIG_USB_APPLEDISPLAY is not set # CONFIG_APPLE_MFI_FASTCHARGE is not set +# CONFIG_USB_LJCA is not set # CONFIG_USB_SISUSBVGA is not set # CONFIG_USB_LD is not set # CONFIG_USB_TRANCEVIBRATOR is not set @@ -6174,7 +6305,7 @@ CONFIG_USB_HSIC_USB3503=y # CONFIG_USB_HSIC_USB4604 is not set # CONFIG_USB_LINK_LAYER_TEST is not set # CONFIG_USB_CHAOSKEY is not set -CONFIG_USB_ONBOARD_HUB=m +CONFIG_USB_ONBOARD_DEV=m # # USB Physical Layer drivers @@ -6261,7 +6392,7 @@ CONFIG_USB_CONFIGFS_F_FS=y # CONFIG_USB_GADGETFS is not set # CONFIG_USB_FUNCTIONFS is not set # CONFIG_USB_MASS_STORAGE is not set -# CONFIG_USB_G_SERIAL is not set +CONFIG_USB_G_SERIAL=m # CONFIG_USB_MIDI_GADGET is not set # CONFIG_USB_G_PRINTER is not set # CONFIG_USB_CDC_COMPOSITE is not set @@ -6294,7 +6425,10 @@ CONFIG_TYPEC_HD3SS3220=m # CONFIG_TYPEC_MUX_FSA4480 is not set # CONFIG_TYPEC_MUX_GPIO_SBU is not set # CONFIG_TYPEC_MUX_PI3USB30532 is not set +# CONFIG_TYPEC_MUX_IT5205 is not set # CONFIG_TYPEC_MUX_NB7VPQ904M is not set +# CONFIG_TYPEC_MUX_PTN36502 is not set +# CONFIG_TYPEC_MUX_WCD939X_USBSS is not set # end of USB Type-C Multiplexer/DeMultiplexer Switch support # @@ -6342,6 +6476,7 @@ CONFIG_MMC_DW_PLTFM=y # CONFIG_MMC_DW_BLUEFIELD is not set CONFIG_MMC_DW_EXYNOS=y CONFIG_MMC_DW_HI3798CV200=y +# CONFIG_MMC_DW_HI3798MV200 is not set CONFIG_MMC_DW_K3=y # CONFIG_MMC_DW_PCI is not set # CONFIG_MMC_VUB300 is not set @@ -6375,6 +6510,7 @@ CONFIG_LEDS_CLASS_MULTICOLOR=m # CONFIG_LEDS_BCM6328 is not set # CONFIG_LEDS_BCM6358 is not set # CONFIG_LEDS_CR0014114 is not set +CONFIG_LEDS_CROS_EC=m # CONFIG_LEDS_EL15203000 is not set # CONFIG_LEDS_LM3530 is not set # CONFIG_LEDS_LM3532 is not set @@ -6422,6 +6558,8 @@ CONFIG_LEDS_SYSCON=y # RGB LED drivers # # CONFIG_LEDS_GROUP_MULTICOLOR is not set +# CONFIG_LEDS_KTD202X is not set +# CONFIG_LEDS_NCP5623 is not set # CONFIG_LEDS_PWM_MULTICOLOR is not set CONFIG_LEDS_QCOM_LPG=m @@ -6437,6 +6575,7 @@ CONFIG_LEDS_TRIGGER_HEARTBEAT=y # CONFIG_LEDS_TRIGGER_BACKLIGHT is not set CONFIG_LEDS_TRIGGER_CPU=y # CONFIG_LEDS_TRIGGER_ACTIVITY is not set +# CONFIG_LEDS_TRIGGER_GPIO is not set CONFIG_LEDS_TRIGGER_DEFAULT_ON=y # @@ -6447,8 +6586,8 @@ CONFIG_LEDS_TRIGGER_DEFAULT_ON=y CONFIG_LEDS_TRIGGER_PANIC=y # CONFIG_LEDS_TRIGGER_NETDEV is not set # CONFIG_LEDS_TRIGGER_PATTERN is not set -# CONFIG_LEDS_TRIGGER_AUDIO is not set # CONFIG_LEDS_TRIGGER_TTY is not set +# CONFIG_LEDS_TRIGGER_INPUT_EVENTS is not set # # Simple LED drivers @@ -6495,6 +6634,7 @@ CONFIG_RTC_DRV_DS1307=m # CONFIG_RTC_DRV_DS1672 is not set CONFIG_RTC_DRV_HYM8563=m # CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_MAX31335 is not set CONFIG_RTC_DRV_MAX77686=y # CONFIG_RTC_DRV_NCT3018Y is not set # CONFIG_RTC_DRV_RS5C372 is not set @@ -6513,6 +6653,7 @@ CONFIG_RTC_DRV_M41T80=m # CONFIG_RTC_DRV_S35390A is not set # CONFIG_RTC_DRV_FM3130 is not set # CONFIG_RTC_DRV_RX8010 is not set +# CONFIG_RTC_DRV_RX8111 is not set CONFIG_RTC_DRV_RX8581=m # CONFIG_RTC_DRV_RX8025 is not set # CONFIG_RTC_DRV_EM3027 is not set @@ -6654,6 +6795,7 @@ CONFIG_VFIO_CONTAINER=y CONFIG_VFIO_IOMMU_TYPE1=y # CONFIG_VFIO_NOIOMMU is not set CONFIG_VFIO_VIRQFD=y +# CONFIG_VFIO_DEBUGFS is not set # # VFIO support for PCI devices @@ -6664,6 +6806,7 @@ CONFIG_VFIO_PCI_INTX=y CONFIG_VFIO_PCI=y # CONFIG_MLX5_VFIO_PCI is not set # CONFIG_HISI_ACC_VFIO_PCI is not set +# CONFIG_NVGRACE_GPU_VFIO_PCI is not set # end of VFIO support for PCI devices # @@ -6679,6 +6822,7 @@ CONFIG_VFIO_PCI=y # CONFIG_VFIO_FSL_MC is not set # end of VFIO support for FSL_MC bus devices +CONFIG_IRQ_BYPASS_MANAGER=y # CONFIG_VIRT_DRIVERS is not set CONFIG_VIRTIO_ANCHOR=y CONFIG_VIRTIO=y @@ -6692,6 +6836,7 @@ CONFIG_VIRTIO_BALLOON=y # CONFIG_VIRTIO_INPUT is not set CONFIG_VIRTIO_MMIO=y # CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES is not set +# CONFIG_VIRTIO_DEBUG is not set # CONFIG_VDPA is not set CONFIG_VHOST_MENU=y # CONFIG_VHOST_NET is not set @@ -6732,8 +6877,6 @@ CONFIG_XEN_AUTO_XLATE=y # CONFIG_GREYBUS is not set # CONFIG_COMEDI is not set CONFIG_STAGING=y -# CONFIG_PRISM2_USB is not set -# CONFIG_RTL8192U is not set # CONFIG_RTLLIB is not set # CONFIG_RTL8723BS is not set # CONFIG_R8712U is not set @@ -6776,27 +6919,22 @@ CONFIG_STAGING=y # # CONFIG_AD5933 is not set # end of Network Analyzer, Impedance Converters - -# -# Resolver to digital converters -# -# CONFIG_AD2S1210 is not set -# end of Resolver to digital converters # end of IIO staging drivers # CONFIG_FB_SM750 is not set CONFIG_STAGING_MEDIA=y # CONFIG_DVB_AV7110 is not set CONFIG_VIDEO_MAX96712=m + +# +# StarFive media platform drivers +# # CONFIG_STAGING_MEDIA_DEPRECATED is not set -# CONFIG_STAGING_BOARD is not set # CONFIG_LTE_GDM724X is not set # CONFIG_FB_TFT is not set # CONFIG_KS7010 is not set -# CONFIG_PI433 is not set # CONFIG_XIL_AXIS_FIFO is not set # CONFIG_FIELDBUS_DEV is not set -# CONFIG_QLGE is not set # CONFIG_VME_BUS is not set # CONFIG_RTL8723CS is not set # CONFIG_GOLDFISH is not set @@ -6821,6 +6959,7 @@ CONFIG_CROS_EC_TYPEC=m CONFIG_CROS_USBPD_NOTIFY=y # CONFIG_CHROMEOS_PRIVACY_SCREEN is not set CONFIG_CROS_TYPEC_SWITCH=m +# CONFIG_CZNIC_PLATFORMS is not set # CONFIG_MELLANOX_PLATFORM is not set CONFIG_SURFACE_PLATFORMS=y # CONFIG_SURFACE_3_POWER_OPREGION is not set @@ -6828,6 +6967,7 @@ CONFIG_SURFACE_PLATFORMS=y # CONFIG_SURFACE_HOTPLUG is not set # CONFIG_SURFACE_PRO3_BUTTON is not set # CONFIG_SURFACE_AGGREGATOR is not set +CONFIG_ARM64_PLATFORM_DEVICES=y CONFIG_HAVE_CLK=y CONFIG_HAVE_CLK_PREPARE=y CONFIG_COMMON_CLK=y @@ -6876,6 +7016,7 @@ CONFIG_CLK_IMX8MQ=y CONFIG_CLK_IMX8QXP=y CONFIG_CLK_IMX8ULP=y CONFIG_CLK_IMX93=y +# CONFIG_CLK_IMX95_BLK_CTL is not set # CONFIG_XILINX_VCU is not set # CONFIG_COMMON_CLK_XLNX_CLKWZRD is not set CONFIG_HWSPINLOCK=y @@ -6898,6 +7039,7 @@ CONFIG_TIMER_IMX_SYS_CTR=y CONFIG_MAILBOX=y CONFIG_ARM_MHU=y # CONFIG_ARM_MHU_V2 is not set +# CONFIG_ARM_MHU_V3 is not set CONFIG_IMX_MBOX=y CONFIG_PLATFORM_MHU=y # CONFIG_PL320_MBOX is not set @@ -6974,7 +7116,6 @@ CONFIG_SOUNDWIRE_QCOM=m # # Broadcom SoC drivers # -# CONFIG_SOC_BRCMSTB is not set # end of Broadcom SoC drivers # @@ -7000,11 +7141,8 @@ CONFIG_FSL_RCPM=y # # i.MX SoC drivers # -CONFIG_IMX_GPCV2_PM_DOMAINS=y CONFIG_SOC_IMX8M=y CONFIG_SOC_IMX9=y -CONFIG_IMX8M_BLK_CTRL=y -CONFIG_IMX9_BLK_CTRL=y # end of i.MX SoC drivers # @@ -7020,6 +7158,7 @@ CONFIG_IMX9_BLK_CTRL=y # # CONFIG_QCOM_PMIC_GLINK is not set CONFIG_QCOM_QMI_HELPERS=m +# CONFIG_QCOM_PBS is not set # end of Qualcomm SoC drivers # CONFIG_SOC_TI is not set @@ -7030,6 +7169,39 @@ CONFIG_QCOM_QMI_HELPERS=m # end of Xilinx SoC drivers # end of SOC (System On Chip) specific Drivers +# +# PM Domains +# + +# +# Amlogic PM Domains +# +# end of Amlogic PM Domains + +CONFIG_ARM_SCMI_PERF_DOMAIN=y +CONFIG_ARM_SCMI_POWER_DOMAIN=y +CONFIG_ARM_SCPI_POWER_DOMAIN=y + +# +# Broadcom PM Domains +# +# end of Broadcom PM Domains + +# +# i.MX PM Domains +# +CONFIG_IMX_GPCV2_PM_DOMAINS=y +CONFIG_IMX8M_BLK_CTRL=y +CONFIG_IMX9_BLK_CTRL=y +CONFIG_IMX_SCU_PD=y +# end of i.MX PM Domains + +# +# Qualcomm PM Domains +# +# end of Qualcomm PM Domains +# end of PM Domains + CONFIG_PM_DEVFREQ=y # @@ -7134,13 +7306,16 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # # CONFIG_AD4130 is not set # CONFIG_AD7091R5 is not set +# CONFIG_AD7091R8 is not set # CONFIG_AD7124 is not set +# CONFIG_AD7173 is not set # CONFIG_AD7192 is not set # CONFIG_AD7266 is not set # CONFIG_AD7280 is not set # CONFIG_AD7291 is not set # CONFIG_AD7292 is not set # CONFIG_AD7298 is not set +# CONFIG_AD7380 is not set # CONFIG_AD7476 is not set # CONFIG_AD7606_IFACE_PARALLEL is not set # CONFIG_AD7606_IFACE_SPI is not set @@ -7151,10 +7326,10 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # CONFIG_AD7793 is not set # CONFIG_AD7887 is not set # CONFIG_AD7923 is not set +# CONFIG_AD7944 is not set # CONFIG_AD7949 is not set # CONFIG_AD799X is not set # CONFIG_AD9467 is not set -# CONFIG_ADI_AXI_ADC is not set # CONFIG_AXP20X_ADC is not set # CONFIG_AXP288_ADC is not set # CONFIG_CC10001_ADC is not set @@ -7163,8 +7338,9 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # CONFIG_HX711 is not set # CONFIG_INA2XX_ADC is not set # CONFIG_IMX7D_ADC is not set -# CONFIG_IMX8QXP_ADC is not set +CONFIG_IMX8QXP_ADC=m # CONFIG_IMX93_ADC is not set +# CONFIG_LTC2309 is not set # CONFIG_LTC2471 is not set # CONFIG_LTC2485 is not set # CONFIG_LTC2496 is not set @@ -7176,12 +7352,16 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # CONFIG_MAX11410 is not set # CONFIG_MAX1241 is not set # CONFIG_MAX1363 is not set +# CONFIG_MAX34408 is not set CONFIG_MAX9611=m -# CONFIG_MCP320X is not set +CONFIG_MCP320X=m # CONFIG_MCP3422 is not set +# CONFIG_MCP3564 is not set # CONFIG_MCP3911 is not set +# CONFIG_MEDIATEK_MT6359_AUXADC is not set # CONFIG_MEDIATEK_MT6360_ADC is not set # CONFIG_NAU7802 is not set +# CONFIG_PAC1934 is not set CONFIG_QCOM_VADC_COMMON=m # CONFIG_QCOM_SPMI_IADC is not set CONFIG_QCOM_SPMI_VADC=m @@ -7196,8 +7376,10 @@ CONFIG_QCOM_SPMI_ADC5=m # CONFIG_TI_ADC128S052 is not set # CONFIG_TI_ADC161S626 is not set CONFIG_TI_ADS1015=m +# CONFIG_TI_ADS1119 is not set # CONFIG_TI_ADS7924 is not set # CONFIG_TI_ADS1100 is not set +# CONFIG_TI_ADS1298 is not set # CONFIG_TI_ADS7950 is not set # CONFIG_TI_ADS8344 is not set # CONFIG_TI_ADS8688 is not set @@ -7241,10 +7423,12 @@ CONFIG_TI_ADS1015=m # # Chemical Sensors # +# CONFIG_AOSONG_AGS02MA is not set # CONFIG_ATLAS_PH_SENSOR is not set # CONFIG_ATLAS_EZO_SENSOR is not set # CONFIG_BME680 is not set # CONFIG_CCS811 is not set +# CONFIG_ENS160 is not set # CONFIG_IAQCORE is not set # CONFIG_PMS7003 is not set # CONFIG_SCD30_CORE is not set @@ -7296,6 +7480,7 @@ CONFIG_IIO_ST_SENSORS_CORE=m # CONFIG_AD5593R is not set # CONFIG_AD5504 is not set # CONFIG_AD5624R_SPI is not set +# CONFIG_AD9739A is not set # CONFIG_LTC2688 is not set # CONFIG_AD5686_SPI is not set # CONFIG_AD5696_I2C is not set @@ -7319,6 +7504,7 @@ CONFIG_IIO_ST_SENSORS_CORE=m # CONFIG_MAX5821 is not set # CONFIG_MCP4725 is not set # CONFIG_MCP4728 is not set +# CONFIG_MCP4821 is not set # CONFIG_MCP4922 is not set # CONFIG_TI_DAC082S085 is not set # CONFIG_TI_DAC5571 is not set @@ -7354,6 +7540,7 @@ CONFIG_IIO_ST_SENSORS_CORE=m # CONFIG_ADF4350 is not set # CONFIG_ADF4371 is not set # CONFIG_ADF4377 is not set +# CONFIG_ADMFM2000 is not set # CONFIG_ADMV1013 is not set # CONFIG_ADMV1014 is not set # CONFIG_ADMV4420 is not set @@ -7398,6 +7585,7 @@ CONFIG_IIO_ST_SENSORS_CORE=m # CONFIG_DHT11 is not set # CONFIG_HDC100X is not set # CONFIG_HDC2010 is not set +# CONFIG_HDC3020 is not set # CONFIG_HTS221 is not set # CONFIG_HTU21 is not set # CONFIG_SI7005 is not set @@ -7413,6 +7601,8 @@ CONFIG_IIO_ST_SENSORS_CORE=m # CONFIG_ADIS16480 is not set # CONFIG_BMI160_I2C is not set # CONFIG_BMI160_SPI is not set +# CONFIG_BMI323_I2C is not set +# CONFIG_BMI323_SPI is not set # CONFIG_BOSCH_BNO055_SERIAL is not set # CONFIG_BOSCH_BNO055_I2C is not set # CONFIG_FXOS8700_I2C is not set @@ -7437,6 +7627,7 @@ CONFIG_IIO_ST_LSM6DSX_SPI=m # CONFIG_AL3010 is not set # CONFIG_AL3320A is not set # CONFIG_APDS9300 is not set +# CONFIG_APDS9306 is not set # CONFIG_APDS9960 is not set # CONFIG_AS73211 is not set # CONFIG_BH1750 is not set @@ -7452,10 +7643,12 @@ CONFIG_IIO_CROS_EC_LIGHT_PROX=m CONFIG_SENSORS_ISL29018=m # CONFIG_SENSORS_ISL29028 is not set # CONFIG_ISL29125 is not set +# CONFIG_ISL76682 is not set # CONFIG_JSA1212 is not set # CONFIG_ROHM_BU27008 is not set # CONFIG_ROHM_BU27034 is not set # CONFIG_RPR0521 is not set +# CONFIG_LTR390 is not set # CONFIG_LTR501 is not set # CONFIG_LTRF216A is not set # CONFIG_LV0104CS is not set @@ -7480,7 +7673,9 @@ CONFIG_SENSORS_ISL29018=m CONFIG_VCNL4000=m # CONFIG_VCNL4035 is not set # CONFIG_VEML6030 is not set +# CONFIG_VEML6040 is not set # CONFIG_VEML6070 is not set +# CONFIG_VEML6075 is not set # CONFIG_VL6180 is not set # CONFIG_ZOPT2201 is not set # end of Light sensors @@ -7488,6 +7683,7 @@ CONFIG_VCNL4000=m # # Magnetometer sensors # +# CONFIG_AF8133J is not set # CONFIG_AK8974 is not set # CONFIG_AK8975 is not set # CONFIG_AK09911 is not set @@ -7556,11 +7752,13 @@ CONFIG_IIO_ST_MAGN_SPI_3AXIS=m # Pressure sensors # # CONFIG_ABP060MG is not set +# CONFIG_ROHM_BM1390 is not set # CONFIG_BMP280 is not set CONFIG_IIO_CROS_EC_BARO=m # CONFIG_DLHL60D is not set # CONFIG_DPS310 is not set # CONFIG_HP03 is not set +# CONFIG_HSC030PA is not set # CONFIG_ICP10100 is not set # CONFIG_MPL115_I2C is not set # CONFIG_MPL115_SPI is not set @@ -7605,6 +7803,7 @@ CONFIG_MPL3115=m # # CONFIG_AD2S90 is not set # CONFIG_AD2S1200 is not set +# CONFIG_AD2S1210 is not set # end of Resolver to digital converters # @@ -7614,6 +7813,7 @@ CONFIG_MPL3115=m # CONFIG_MAXIM_THERMOCOUPLE is not set # CONFIG_MLX90614 is not set # CONFIG_MLX90632 is not set +# CONFIG_MLX90635 is not set # CONFIG_TMP006 is not set # CONFIG_TMP007 is not set # CONFIG_TMP117 is not set @@ -7622,17 +7822,18 @@ CONFIG_MPL3115=m # CONFIG_MAX30208 is not set # CONFIG_MAX31856 is not set # CONFIG_MAX31865 is not set +# CONFIG_MCP9600 is not set # end of Temperature sensors # CONFIG_NTB is not set CONFIG_PWM=y -CONFIG_PWM_SYSFS=y # CONFIG_PWM_DEBUG is not set # CONFIG_PWM_ATMEL_TCB is not set # CONFIG_PWM_CLK is not set CONFIG_PWM_CROS_EC=m # CONFIG_PWM_DWC is not set # CONFIG_PWM_FSL_FTM is not set +# CONFIG_PWM_GPIO is not set # CONFIG_PWM_IMX1 is not set CONFIG_PWM_IMX27=m # CONFIG_PWM_IMX_TPM is not set @@ -7651,7 +7852,9 @@ CONFIG_ARM_GIC_V3=y CONFIG_ARM_GIC_V3_ITS=y CONFIG_ARM_GIC_V3_ITS_PCI=y CONFIG_ARM_GIC_V3_ITS_FSL_MC=y +CONFIG_IRQ_MSI_LIB=y # CONFIG_AL_FIC is not set +# CONFIG_LAN966X_OIC is not set CONFIG_SL28CPLD_INTC=y # CONFIG_XILINX_INTC is not set CONFIG_IMX_GPCV2=y @@ -7665,7 +7868,9 @@ CONFIG_IMX_MU_MSI=m # CONFIG_IPACK_BUS is not set CONFIG_RESET_CONTROLLER=y +# CONFIG_RESET_GPIO is not set CONFIG_RESET_IMX7=y +CONFIG_RESET_IMX8MP_AUDIOMIX=y CONFIG_RESET_SCMI=y # CONFIG_RESET_SIMPLE is not set # CONFIG_RESET_TI_SYSCON is not set @@ -7693,6 +7898,7 @@ CONFIG_PHY_FSL_IMX8MQ_USB=y # CONFIG_PHY_MIXEL_LVDS_PHY is not set CONFIG_PHY_MIXEL_MIPI_DPHY=m CONFIG_PHY_FSL_IMX8M_PCIE=y +# CONFIG_PHY_FSL_IMX8QM_HSIO is not set CONFIG_PHY_FSL_SAMSUNG_HDMI_PHY=m # CONFIG_PHY_FSL_LYNX_28G is not set # CONFIG_PHY_PXA_28NM_HSIC is not set @@ -7731,6 +7937,7 @@ CONFIG_ARM_DMC620_PMU=m CONFIG_HISI_PMU=y # CONFIG_HISI_PCIE_PMU is not set # CONFIG_HNS3_PMU is not set +# CONFIG_DWC_PCIE_PMU is not set # CONFIG_ARM_CORESIGHT_PMU_ARCH_SYSTEM_PMU is not set # end of Performance monitor support @@ -7747,6 +7954,7 @@ CONFIG_RAS=y # CONFIG_DAX is not set CONFIG_NVMEM=y CONFIG_NVMEM_SYSFS=y +CONFIG_NVMEM_LAYOUTS=y # # Layout Types @@ -7782,6 +7990,7 @@ CONFIG_FPGA=y # CONFIG_ALTERA_PR_IP_CORE is not set # CONFIG_FPGA_MGR_ALTERA_PS_SPI is not set CONFIG_FPGA_MGR_ALTERA_CVP=m +# CONFIG_FPGA_MGR_XILINX_SELECTMAP is not set # CONFIG_FPGA_MGR_XILINX_SPI is not set # CONFIG_FPGA_MGR_ICE40_SPI is not set # CONFIG_FPGA_MGR_MACHXO2_SPI is not set @@ -7831,6 +8040,7 @@ CONFIG_INTERCONNECT_IMX8MP=m CONFIG_DCACHE_WORD_ACCESS=y # CONFIG_VALIDATE_FS_PARSER is not set CONFIG_FS_IOMAP=y +CONFIG_FS_STACK=y CONFIG_BUFFER_HEAD=y CONFIG_LEGACY_DIRECT_IO=y CONFIG_EXT2_FS=y @@ -7852,13 +8062,13 @@ CONFIG_FS_MBCACHE=y # CONFIG_OCFS2_FS is not set CONFIG_BTRFS_FS=m CONFIG_BTRFS_FS_POSIX_ACL=y -# CONFIG_BTRFS_FS_CHECK_INTEGRITY is not set # CONFIG_BTRFS_FS_RUN_SANITY_TESTS is not set # CONFIG_BTRFS_DEBUG is not set # CONFIG_BTRFS_ASSERT is not set # CONFIG_BTRFS_FS_REF_VERIFY is not set # CONFIG_NILFS2_FS is not set # CONFIG_F2FS_FS is not set +# CONFIG_BCACHEFS_FS is not set CONFIG_FS_POSIX_ACL=y CONFIG_EXPORTFS=y # CONFIG_EXPORTFS_BLOCK_OPS is not set @@ -7880,6 +8090,7 @@ CONFIG_AUTOFS_FS=y CONFIG_FUSE_FS=m CONFIG_CUSE=m # CONFIG_VIRTIO_FS is not set +CONFIG_FUSE_PASSTHROUGH=y CONFIG_OVERLAY_FS=m # CONFIG_OVERLAY_FS_REDIRECT_DIR is not set CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y @@ -7893,6 +8104,7 @@ CONFIG_OVERLAY_FS_REDIRECT_ALWAYS_FOLLOW=y # CONFIG_NETFS_SUPPORT=y # CONFIG_NETFS_STATS is not set +# CONFIG_NETFS_DEBUG is not set # CONFIG_FSCACHE is not set # end of Caches @@ -7913,8 +8125,8 @@ CONFIG_FAT_DEFAULT_CODEPAGE=437 CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" # CONFIG_FAT_DEFAULT_UTF8 is not set # CONFIG_EXFAT_FS is not set -# CONFIG_NTFS_FS is not set # CONFIG_NTFS3_FS is not set +# CONFIG_NTFS_FS is not set # end of DOS/FAT/EXFAT/NT Filesystems # @@ -8004,6 +8216,7 @@ CONFIG_NFS_V4_1_IMPLEMENTATION_ID_DOMAIN="kernel.org" # CONFIG_NFS_V4_1_MIGRATION is not set CONFIG_NFS_V4_SECURITY_LABEL=y CONFIG_ROOT_NFS=y +# CONFIG_NFS_FSCACHE is not set # CONFIG_NFS_USE_LEGACY_DNS is not set CONFIG_NFS_USE_KERNEL_DNS=y CONFIG_NFS_DISABLE_UDP_SUPPORT=y @@ -8022,9 +8235,9 @@ CONFIG_RPCSEC_GSS_KRB5=y # CONFIG_CEPH_FS is not set # CONFIG_CIFS is not set CONFIG_SMB_SERVER=m -CONFIG_SMB_SERVER_SMBDIRECT=y CONFIG_SMB_SERVER_CHECK_CAP_NET_ADMIN=y CONFIG_SMB_SERVER_KERBEROS5=y +CONFIG_SMBFS=m # CONFIG_CODA_FS is not set # CONFIG_AFS_FS is not set CONFIG_9P_FS=y @@ -8080,7 +8293,8 @@ CONFIG_NLS_ISO8859_1=y # CONFIG_NLS_MAC_INUIT is not set # CONFIG_NLS_MAC_ROMANIAN is not set # CONFIG_NLS_MAC_TURKISH is not set -# CONFIG_NLS_UTF8 is not set +CONFIG_NLS_UTF8=m +CONFIG_NLS_UCS2_UTILS=m # CONFIG_DLM is not set # CONFIG_UNICODE is not set CONFIG_IO_WQ=y @@ -8096,6 +8310,9 @@ CONFIG_KEYS=y # CONFIG_ENCRYPTED_KEYS is not set # CONFIG_KEY_DH_OPERATIONS is not set # CONFIG_SECURITY_DMESG_RESTRICT is not set +CONFIG_PROC_MEM_ALWAYS_FORCE=y +# CONFIG_PROC_MEM_FORCE_PTRACE is not set +# CONFIG_PROC_MEM_NO_FORCE is not set CONFIG_SECURITY=y CONFIG_SECURITYFS=y # CONFIG_SECURITY_NETWORK is not set @@ -8192,7 +8409,6 @@ CONFIG_CRYPTO_ECC=m CONFIG_CRYPTO_ECDH=m # CONFIG_CRYPTO_ECDSA is not set # CONFIG_CRYPTO_ECRDSA is not set -# CONFIG_CRYPTO_SM2 is not set CONFIG_CRYPTO_CURVE25519=m # end of Public-key cryptography @@ -8225,14 +8441,12 @@ CONFIG_CRYPTO_SM4_GENERIC=m # CONFIG_CRYPTO_ARC4 is not set # CONFIG_CRYPTO_CHACHA20 is not set CONFIG_CRYPTO_CBC=m -# CONFIG_CRYPTO_CFB is not set CONFIG_CRYPTO_CTR=m # CONFIG_CRYPTO_CTS is not set -CONFIG_CRYPTO_ECB=m +CONFIG_CRYPTO_ECB=y # CONFIG_CRYPTO_HCTR2 is not set # CONFIG_CRYPTO_KEYWRAP is not set # CONFIG_CRYPTO_LRW is not set -# CONFIG_CRYPTO_OFB is not set # CONFIG_CRYPTO_PCBC is not set CONFIG_CRYPTO_XTS=m # end of Length-preserving ciphers and modes @@ -8288,7 +8502,7 @@ CONFIG_CRYPTO_CRC64_ROCKSOFT=y # Compression # CONFIG_CRYPTO_DEFLATE=y -CONFIG_CRYPTO_LZO=m +CONFIG_CRYPTO_LZO=y # CONFIG_CRYPTO_842 is not set # CONFIG_CRYPTO_LZ4 is not set # CONFIG_CRYPTO_LZ4HC is not set @@ -8305,7 +8519,9 @@ CONFIG_CRYPTO_DRBG_HMAC=y # CONFIG_CRYPTO_DRBG_CTR is not set CONFIG_CRYPTO_DRBG=y CONFIG_CRYPTO_JITTERENTROPY=y -# CONFIG_CRYPTO_JITTERENTROPY_TESTINTERFACE is not set +CONFIG_CRYPTO_JITTERENTROPY_MEMORY_BLOCKS=64 +CONFIG_CRYPTO_JITTERENTROPY_MEMORY_BLOCKSIZE=32 +CONFIG_CRYPTO_JITTERENTROPY_OSR=1 # end of Random number generation # @@ -8379,6 +8595,7 @@ CONFIG_CRYPTO_DEV_FSL_DPAA2_CAAM=m # CONFIG_CRYPTO_DEV_QAT_C3XXX is not set # CONFIG_CRYPTO_DEV_QAT_C62X is not set # CONFIG_CRYPTO_DEV_QAT_4XXX is not set +# CONFIG_CRYPTO_DEV_QAT_420XX is not set # CONFIG_CRYPTO_DEV_QAT_DH895xCCVF is not set # CONFIG_CRYPTO_DEV_QAT_C3XXXVF is not set # CONFIG_CRYPTO_DEV_QAT_C62XVF is not set @@ -8429,7 +8646,6 @@ CONFIG_GENERIC_NET_UTILS=y # CONFIG_CORDIC is not set # CONFIG_PRIME_NUMBERS is not set CONFIG_RATIONAL=y -CONFIG_GENERIC_PCI_IOMAP=y CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y CONFIG_ARCH_HAS_FAST_MULTIPLIER=y CONFIG_ARCH_USE_SYM_ANNOTATIONS=y @@ -8488,7 +8704,6 @@ CONFIG_ZSTD_DECOMPRESS=y CONFIG_XZ_DEC=y CONFIG_XZ_DEC_X86=y CONFIG_XZ_DEC_POWERPC=y -CONFIG_XZ_DEC_IA64=y CONFIG_XZ_DEC_ARM=y CONFIG_XZ_DEC_ARMTHUMB=y CONFIG_XZ_DEC_SPARC=y @@ -8517,13 +8732,13 @@ CONFIG_NEED_DMA_MAP_STATE=y CONFIG_ARCH_DMA_ADDR_T_64BIT=y CONFIG_DMA_DECLARE_COHERENT=y CONFIG_ARCH_HAS_SETUP_DMA_OPS=y -CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS=y CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y CONFIG_SWIOTLB=y # CONFIG_SWIOTLB_DYNAMIC is not set CONFIG_DMA_BOUNCE_UNALIGNED_KMALLOC=y +CONFIG_DMA_NEED_SYNC=y # CONFIG_DMA_RESTRICTED_POOL is not set CONFIG_DMA_NONCOHERENT_MMAP=y CONFIG_DMA_COHERENT_POOL=y @@ -8566,11 +8781,14 @@ CONFIG_SG_POOL=y CONFIG_MEMREGION=y CONFIG_ARCH_STACKWALK=y CONFIG_STACKDEPOT=y +CONFIG_STACKDEPOT_MAX_FRAMES=64 CONFIG_SBITMAP=y +# CONFIG_LWQ_TEST is not set # end of Library routines CONFIG_GENERIC_IOREMAP=y CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y +CONFIG_FIRMWARE_TABLE=y # # Kernel hacking @@ -8598,7 +8816,7 @@ CONFIG_DEBUG_MISC=y # # Compile-time checks and compiler options # -CONFIG_AS_HAS_NON_CONST_LEB128=y +CONFIG_AS_HAS_NON_CONST_ULEB128=y CONFIG_DEBUG_INFO_NONE=y # CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT is not set # CONFIG_DEBUG_INFO_DWARF4 is not set @@ -8629,7 +8847,7 @@ CONFIG_DEBUG_FS_ALLOW_ALL=y # CONFIG_DEBUG_FS_ALLOW_NONE is not set CONFIG_HAVE_ARCH_KGDB=y # CONFIG_KGDB is not set -CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y +CONFIG_ARCH_HAS_UBSAN=y # CONFIG_UBSAN is not set CONFIG_HAVE_ARCH_KCSAN=y CONFIG_HAVE_KCSAN_COMPILER=y @@ -8673,6 +8891,7 @@ CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y # CONFIG_DEBUG_VIRTUAL is not set CONFIG_DEBUG_MEMORY_INIT=y # CONFIG_DEBUG_PER_CPU_MAPS is not set +# CONFIG_MEM_ALLOC_PROFILING is not set CONFIG_HAVE_ARCH_KASAN=y CONFIG_HAVE_ARCH_KASAN_SW_TAGS=y CONFIG_HAVE_ARCH_KASAN_HW_TAGS=y @@ -8764,6 +8983,7 @@ CONFIG_RCU_TRACE=y # CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set # CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set # CONFIG_LATENCYTOP is not set +CONFIG_USER_STACKTRACE_SUPPORT=y CONFIG_HAVE_FUNCTION_TRACER=y CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y CONFIG_HAVE_FUNCTION_GRAPH_RETVAL=y @@ -8825,8 +9045,6 @@ CONFIG_RUNTIME_TESTING_MENU=y # CONFIG_PERCPU_TEST is not set # CONFIG_ATOMIC64_SELFTEST is not set # CONFIG_TEST_HEXDUMP is not set -# CONFIG_STRING_SELFTEST is not set -# CONFIG_TEST_STRING_HELPERS is not set # CONFIG_TEST_KSTRTOX is not set # CONFIG_TEST_PRINTF is not set # CONFIG_TEST_SCANF is not set @@ -8839,7 +9057,6 @@ CONFIG_RUNTIME_TESTING_MENU=y # CONFIG_TEST_LKM is not set # CONFIG_TEST_BITOPS is not set # CONFIG_TEST_VMALLOC is not set -# CONFIG_TEST_USER_COPY is not set # CONFIG_TEST_BPF is not set # CONFIG_TEST_BLACKHOLE_DEV is not set # CONFIG_FIND_BIT_BENCHMARK is not set @@ -8851,6 +9068,8 @@ CONFIG_RUNTIME_TESTING_MENU=y # CONFIG_TEST_MEMCAT_P is not set # CONFIG_TEST_MEMINIT is not set # CONFIG_TEST_FREE_PAGES is not set +# CONFIG_TEST_FPU is not set +# CONFIG_TEST_OBJPOOL is not set CONFIG_ARCH_USE_MEMTEST=y CONFIG_MEMTEST=y # end of Kernel Testing and Coverage diff --git a/config/sources/families/include/imx8_common.inc b/config/sources/families/include/imx8_common.inc index 4c4378db46a0..e3c24e883ec2 100644 --- a/config/sources/families/include/imx8_common.inc +++ b/config/sources/families/include/imx8_common.inc @@ -26,10 +26,8 @@ case $BOARD in LINUXCONFIG='linux-tqma-'$BRANCH # one config for "tq arm modules" case $BRANCH in - current) # active lts mainline kernel - KERNEL_MAJOR_MINOR="6.6" - KERNELBRANCH='tag:v6.6.43' - KERNELPATCHDIR="archive/imx8m-6.6" + current) # mainline stable kernel + KERNEL_MAJOR_MINOR="6.11" ;; edge | default) # use for tests with recent mainline kernels diff --git a/packages/blobs/asound.state/asound.state.tqma b/packages/blobs/asound.state/asound.state.tqma index 0eea04121a3f..ae5320c0da12 100644 --- a/packages/blobs/asound.state/asound.state.tqma +++ b/packages/blobs/asound.state/asound.state.tqma @@ -1,97 +1,577 @@ -state.audiohdmi { +state.tqmtlv320aic32 { control.1 { - iface CARD - name 'HDMI Jack' + iface MIXER + name 'PCM Playback Volume' + value.0 127 + value.1 127 + comment { + access 'read write' + type INTEGER + count 2 + range '0 - 175' + dbmin -6350 + dbmax 2400 + dbvalue.0 0 + dbvalue.1 0 + } + } + control.2 { + iface MIXER + name 'DAC Left Playback PowerTune Switch' + value P3 + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 P3 + item.1 P2 + item.2 P1 + } + } + control.3 { + iface MIXER + name 'DAC Right Playback PowerTune Switch' + value P3 + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 P3 + item.1 P2 + item.2 P1 + } + } + control.4 { + iface MIXER + name 'HP Driver Gain Volume' + value.0 6 + value.1 6 + comment { + access 'read write' + type INTEGER + count 2 + range '0 - 35' + dbmin -600 + dbmax 2900 + dbvalue.0 0 + dbvalue.1 0 + } + } + control.5 { + iface MIXER + name 'LO Driver Gain Volume' + value.0 6 + value.1 6 + comment { + access 'read write' + type INTEGER + count 2 + range '0 - 35' + dbmin -600 + dbmax 2900 + dbvalue.0 0 + dbvalue.1 0 + } + } + control.6 { + iface MIXER + name 'HP DAC Playback Switch' + value.0 false + value.1 false + comment { + access 'read write' + type BOOLEAN + count 2 + } + } + control.7 { + iface MIXER + name 'LO DAC Playback Switch' + value.0 true + value.1 true + comment { + access 'read write' + type BOOLEAN + count 2 + } + } + control.8 { + iface MIXER + name 'LO Playback Common Mode Switch' + value 'Full Chip' + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 'Full Chip' + item.1 '1.65V' + } + } + control.9 { + iface MIXER + name 'Mic PGA Switch' + value.0 false + value.1 false + comment { + access 'read write' + type BOOLEAN + count 2 + } + } + control.10 { + iface MIXER + name 'ADCFGA Left Mute Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.11 { + iface MIXER + name 'ADCFGA Right Mute Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.12 { + iface MIXER + name 'ADC Level Volume' + value.0 22 + value.1 22 + comment { + access 'read write' + type INTEGER + count 2 + range '0 - 64' + dbmin -1200 + dbmax 2000 + dbvalue.0 -100 + dbvalue.1 -100 + } + } + control.13 { + iface MIXER + name 'PGA Level Volume' + value.0 0 + value.1 0 + comment { + access 'read write' + type INTEGER + count 2 + range '0 - 95' + dbmin 0 + dbmax 4750 + dbvalue.0 0 + dbvalue.1 0 + } + } + control.14 { + iface MIXER + name 'Auto-mute Switch' + value 0 + comment { + access 'read write' + type INTEGER + count 1 + range '0 - 7' + } + } + control.15 { + iface MIXER + name 'AGC Left Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.16 { + iface MIXER + name 'AGC Right Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.17 { + iface MIXER + name 'AGC Target Level' + value.0 0 + value.1 0 + comment { + access 'read write' + type INTEGER + count 2 + range '0 - 7' + } + } + control.18 { + iface MIXER + name 'AGC Gain Hysteresis' + value.0 0 + value.1 0 + comment { + access 'read write' + type INTEGER + count 2 + range '0 - 3' + } + } + control.19 { + iface MIXER + name 'AGC Hysteresis' + value.0 0 + value.1 0 + comment { + access 'read write' + type INTEGER + count 2 + range '0 - 3' + } + } + control.20 { + iface MIXER + name 'AGC Noise Threshold' + value.0 0 + value.1 0 + comment { + access 'read write' + type INTEGER + count 2 + range '0 - 31' + } + } + control.21 { + iface MIXER + name 'AGC Max PGA' + value.0 127 + value.1 127 + comment { + access 'read write' + type INTEGER + count 2 + range '0 - 127' + } + } + control.22 { + iface MIXER + name 'AGC Attack Time' + value.0 0 + value.1 0 + comment { + access 'read write' + type INTEGER + count 2 + range '0 - 31' + } + } + control.23 { + iface MIXER + name 'AGC Decay Time' + value.0 0 + value.1 0 + comment { + access 'read write' + type INTEGER + count 2 + range '0 - 31' + } + } + control.24 { + iface MIXER + name 'AGC Noise Debounce' + value.0 0 + value.1 0 + comment { + access 'read write' + type INTEGER + count 2 + range '0 - 31' + } + } + control.25 { + iface MIXER + name 'AGC Signal Debounce' + value.0 0 + value.1 0 + comment { + access 'read write' + type INTEGER + count 2 + range '0 - 15' + } + } + control.26 { + iface MIXER + name 'HPL Output Mixer L_DAC Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.27 { + iface MIXER + name 'HPL Output Mixer IN1_L Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.28 { + iface MIXER + name 'LOL Output Mixer L_DAC Switch' + value true + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.29 { + iface MIXER + name 'HPR Output Mixer R_DAC Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.30 { + iface MIXER + name 'HPR Output Mixer IN1_R Switch' + value false + comment { + access 'read write' + type BOOLEAN + count 1 + } + } + control.31 { + iface MIXER + name 'LOR Output Mixer R_DAC Switch' value true comment { - access read - type BOOLEAN + access 'read write' + type BOOLEAN + count 1 + } + } + control.32 { + iface MIXER + name 'IN1_R to Right Mixer Positive Resistor' + value '10 kOhm' + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 Off + item.1 '10 kOhm' + item.2 '20 kOhm' + item.3 '40 kOhm' + } + } + control.33 { + iface MIXER + name 'IN2_R to Right Mixer Positive Resistor' + value Off + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 Off + item.1 '10 kOhm' + item.2 '20 kOhm' + item.3 '40 kOhm' + } + } + control.34 { + iface MIXER + name 'IN3_R to Right Mixer Positive Resistor' + value Off + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 Off + item.1 '10 kOhm' + item.2 '20 kOhm' + item.3 '40 kOhm' + } + } + control.35 { + iface MIXER + name 'IN2_L to Right Mixer Positive Resistor' + value Off + comment { + access 'read write' + type ENUMERATED count 1 + item.0 Off + item.1 '10 kOhm' + item.2 '20 kOhm' + item.3 '40 kOhm' } } - control.2 { - iface PCM - name 'Playback Channel Map' - value.0 0 - value.1 0 - value.2 0 - value.3 0 - value.4 0 - value.5 0 - value.6 0 - value.7 0 - comment { - access read - type INTEGER - count 8 - range '0 - 36' + control.36 { + iface MIXER + name 'CM_R to Right Mixer Negative Resistor' + value '10 kOhm' + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 Off + item.1 '10 kOhm' + item.2 '20 kOhm' + item.3 '40 kOhm' } } - control.3 { - iface PCM - name 'IEC958 Playback Default' - value '0' + control.37 { + iface MIXER + name 'IN1_L to Right Mixer Negative Resistor' + value Off comment { access 'read write' - type IEC958 + type ENUMERATED count 1 + item.0 Off + item.1 '10 kOhm' + item.2 '20 kOhm' + item.3 '40 kOhm' } } - control.4 { - iface PCM - name ELD - value '10' + control.38 { + iface MIXER + name 'IN3_L to Right Mixer Negative Resistor' + value Off comment { - access 'read volatile' - type BYTES - count 128 + access 'read write' + type ENUMERATED + count 1 + item.0 Off + item.1 '10 kOhm' + item.2 '20 kOhm' + item.3 '40 kOhm' } } - control.5 { + control.39 { iface MIXER - name 'HDMI Support Channels' - value 2 + name 'IN1_L to Left Mixer Positive Resistor' + value '10 kOhm' comment { - access 'read volatile' - type INTEGER + access 'read write' + type ENUMERATED + count 1 + item.0 Off + item.1 '10 kOhm' + item.2 '20 kOhm' + item.3 '40 kOhm' + } + } + control.40 { + iface MIXER + name 'IN2_L to Left Mixer Positive Resistor' + value Off + comment { + access 'read write' + type ENUMERATED count 1 - range '0 - 0' + item.0 Off + item.1 '10 kOhm' + item.2 '20 kOhm' + item.3 '40 kOhm' } } - control.6 { + control.41 { iface MIXER - name 'HDMI Support Rates' - value.0 32000 - value.1 44100 - value.2 48000 - value.3 96000 + name 'IN3_L to Left Mixer Positive Resistor' + value Off comment { - access 'read volatile' - type INTEGER - count 4 - range '0 - 0' + access 'read write' + type ENUMERATED + count 1 + item.0 Off + item.1 '10 kOhm' + item.2 '20 kOhm' + item.3 '40 kOhm' } } - control.7 { + control.42 { + iface MIXER + name 'IN1_R to Left Mixer Positive Resistor' + value Off + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 Off + item.1 '10 kOhm' + item.2 '20 kOhm' + item.3 '40 kOhm' + } + } + control.43 { iface MIXER - name 'HDMI Support Formats' - value.0 16 - value.1 24 - value.2 32 + name 'CM_L to Left Mixer Negative Resistor' + value '10 kOhm' comment { - access 'read volatile' - type INTEGER - count 3 - range '0 - 0' + access 'read write' + type ENUMERATED + count 1 + item.0 Off + item.1 '10 kOhm' + item.2 '20 kOhm' + item.3 '40 kOhm' + } + } + control.44 { + iface MIXER + name 'IN2_R to Left Mixer Negative Resistor' + value Off + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 Off + item.1 '10 kOhm' + item.2 '20 kOhm' + item.3 '40 kOhm' + } + } + control.45 { + iface MIXER + name 'IN3_R to Left Mixer Negative Resistor' + value Off + comment { + access 'read write' + type ENUMERATED + count 1 + item.0 Off + item.1 '10 kOhm' + item.2 '20 kOhm' + item.3 '40 kOhm' } } } -state.tqmtlv320aic32 { +state.imxaudiotlv320a { control.1 { iface MIXER name 'PCM Playback Volume' - value.0 87 - value.1 87 + value.0 127 + value.1 127 comment { access 'read write' type INTEGER @@ -99,8 +579,8 @@ state.tqmtlv320aic32 { range '0 - 175' dbmin -6350 dbmax 2400 - dbvalue.0 -2000 - dbvalue.1 -2000 + dbvalue.0 0 + dbvalue.1 0 } } control.2 { @@ -132,8 +612,8 @@ state.tqmtlv320aic32 { control.4 { iface MIXER name 'HP Driver Gain Volume' - value.0 20 - value.1 20 + value.0 6 + value.1 6 comment { access 'read write' type INTEGER @@ -141,8 +621,8 @@ state.tqmtlv320aic32 { range '0 - 35' dbmin -600 dbmax 2900 - dbvalue.0 1400 - dbvalue.1 1400 + dbvalue.0 0 + dbvalue.1 0 } } control.5 { @@ -164,8 +644,8 @@ state.tqmtlv320aic32 { control.6 { iface MIXER name 'HP DAC Playback Switch' - value.0 true - value.1 true + value.0 false + value.1 false comment { access 'read write' type BOOLEAN @@ -175,8 +655,8 @@ state.tqmtlv320aic32 { control.7 { iface MIXER name 'LO DAC Playback Switch' - value.0 false - value.1 false + value.0 true + value.1 true comment { access 'read write' type BOOLEAN @@ -209,7 +689,7 @@ state.tqmtlv320aic32 { control.10 { iface MIXER name 'ADCFGA Left Mute Switch' - value true + value false comment { access 'read write' type BOOLEAN @@ -219,7 +699,7 @@ state.tqmtlv320aic32 { control.11 { iface MIXER name 'ADCFGA Right Mute Switch' - value true + value false comment { access 'read write' type BOOLEAN @@ -229,8 +709,8 @@ state.tqmtlv320aic32 { control.12 { iface MIXER name 'ADC Level Volume' - value.0 24 - value.1 24 + value.0 22 + value.1 22 comment { access 'read write' type INTEGER @@ -238,8 +718,8 @@ state.tqmtlv320aic32 { range '0 - 64' dbmin -1200 dbmax 2000 - dbvalue.0 0 - dbvalue.1 0 + dbvalue.0 -100 + dbvalue.1 -100 } } control.13 { @@ -400,7 +880,7 @@ state.tqmtlv320aic32 { control.26 { iface MIXER name 'HPL Output Mixer L_DAC Switch' - value true + value false comment { access 'read write' type BOOLEAN @@ -410,7 +890,7 @@ state.tqmtlv320aic32 { control.27 { iface MIXER name 'HPL Output Mixer IN1_L Switch' - value true + value false comment { access 'read write' type BOOLEAN @@ -420,7 +900,7 @@ state.tqmtlv320aic32 { control.28 { iface MIXER name 'LOL Output Mixer L_DAC Switch' - value false + value true comment { access 'read write' type BOOLEAN @@ -430,7 +910,7 @@ state.tqmtlv320aic32 { control.29 { iface MIXER name 'HPR Output Mixer R_DAC Switch' - value true + value false comment { access 'read write' type BOOLEAN @@ -440,7 +920,7 @@ state.tqmtlv320aic32 { control.30 { iface MIXER name 'HPR Output Mixer IN1_R Switch' - value true + value false comment { access 'read write' type BOOLEAN @@ -450,7 +930,7 @@ state.tqmtlv320aic32 { control.31 { iface MIXER name 'LOR Output Mixer R_DAC Switch' - value false + value true comment { access 'read write' type BOOLEAN @@ -460,7 +940,7 @@ state.tqmtlv320aic32 { control.32 { iface MIXER name 'IN1_R to Right Mixer Positive Resistor' - value Off + value '10 kOhm' comment { access 'read write' type ENUMERATED @@ -558,7 +1038,7 @@ state.tqmtlv320aic32 { control.39 { iface MIXER name 'IN1_L to Left Mixer Positive Resistor' - value Off + value '10 kOhm' comment { access 'read write' type ENUMERATED @@ -658,8 +1138,8 @@ state.tqtlv320aic32x { control.1 { iface MIXER name 'PCM Playback Volume' - value.0 87 - value.1 87 + value.0 127 + value.1 127 comment { access 'read write' type INTEGER @@ -667,8 +1147,8 @@ state.tqtlv320aic32x { range '0 - 175' dbmin -6350 dbmax 2400 - dbvalue.0 -2000 - dbvalue.1 -2000 + dbvalue.0 0 + dbvalue.1 0 } } control.2 { @@ -700,8 +1180,8 @@ state.tqtlv320aic32x { control.4 { iface MIXER name 'HP Driver Gain Volume' - value.0 20 - value.1 20 + value.0 6 + value.1 6 comment { access 'read write' type INTEGER @@ -709,8 +1189,8 @@ state.tqtlv320aic32x { range '0 - 35' dbmin -600 dbmax 2900 - dbvalue.0 1400 - dbvalue.1 1400 + dbvalue.0 0 + dbvalue.1 0 } } control.5 { @@ -732,8 +1212,8 @@ state.tqtlv320aic32x { control.6 { iface MIXER name 'HP DAC Playback Switch' - value.0 true - value.1 true + value.0 false + value.1 false comment { access 'read write' type BOOLEAN @@ -743,8 +1223,8 @@ state.tqtlv320aic32x { control.7 { iface MIXER name 'LO DAC Playback Switch' - value.0 false - value.1 false + value.0 true + value.1 true comment { access 'read write' type BOOLEAN @@ -777,7 +1257,7 @@ state.tqtlv320aic32x { control.10 { iface MIXER name 'ADCFGA Left Mute Switch' - value true + value false comment { access 'read write' type BOOLEAN @@ -787,7 +1267,7 @@ state.tqtlv320aic32x { control.11 { iface MIXER name 'ADCFGA Right Mute Switch' - value true + value false comment { access 'read write' type BOOLEAN @@ -797,8 +1277,8 @@ state.tqtlv320aic32x { control.12 { iface MIXER name 'ADC Level Volume' - value.0 24 - value.1 24 + value.0 22 + value.1 22 comment { access 'read write' type INTEGER @@ -806,8 +1286,8 @@ state.tqtlv320aic32x { range '0 - 64' dbmin -1200 dbmax 2000 - dbvalue.0 0 - dbvalue.1 0 + dbvalue.0 -100 + dbvalue.1 -100 } } control.13 { @@ -968,7 +1448,7 @@ state.tqtlv320aic32x { control.26 { iface MIXER name 'HPL Output Mixer L_DAC Switch' - value true + value false comment { access 'read write' type BOOLEAN @@ -978,7 +1458,7 @@ state.tqtlv320aic32x { control.27 { iface MIXER name 'HPL Output Mixer IN1_L Switch' - value true + value false comment { access 'read write' type BOOLEAN @@ -988,7 +1468,7 @@ state.tqtlv320aic32x { control.28 { iface MIXER name 'LOL Output Mixer L_DAC Switch' - value false + value true comment { access 'read write' type BOOLEAN @@ -998,7 +1478,7 @@ state.tqtlv320aic32x { control.29 { iface MIXER name 'HPR Output Mixer R_DAC Switch' - value true + value false comment { access 'read write' type BOOLEAN @@ -1008,7 +1488,7 @@ state.tqtlv320aic32x { control.30 { iface MIXER name 'HPR Output Mixer IN1_R Switch' - value true + value false comment { access 'read write' type BOOLEAN @@ -1018,7 +1498,7 @@ state.tqtlv320aic32x { control.31 { iface MIXER name 'LOR Output Mixer R_DAC Switch' - value false + value true comment { access 'read write' type BOOLEAN @@ -1028,7 +1508,7 @@ state.tqtlv320aic32x { control.32 { iface MIXER name 'IN1_R to Right Mixer Positive Resistor' - value Off + value '10 kOhm' comment { access 'read write' type ENUMERATED @@ -1126,7 +1606,7 @@ state.tqtlv320aic32x { control.39 { iface MIXER name 'IN1_L to Left Mixer Positive Resistor' - value Off + value '10 kOhm' comment { access 'read write' type ENUMERATED @@ -1226,8 +1706,8 @@ state.tqmba8mpras314 { control.1 { iface MIXER name 'PCM Playback Volume' - value.0 87 - value.1 87 + value.0 127 + value.1 127 comment { access 'read write' type INTEGER @@ -1235,8 +1715,8 @@ state.tqmba8mpras314 { range '0 - 175' dbmin -6350 dbmax 2400 - dbvalue.0 -2000 - dbvalue.1 -2000 + dbvalue.0 0 + dbvalue.1 0 } } control.2 { @@ -1268,8 +1748,8 @@ state.tqmba8mpras314 { control.4 { iface MIXER name 'HP Driver Gain Volume' - value.0 32 - value.1 32 + value.0 6 + value.1 6 comment { access 'read write' type INTEGER @@ -1277,15 +1757,15 @@ state.tqmba8mpras314 { range '0 - 35' dbmin -600 dbmax 2900 - dbvalue.0 2600 - dbvalue.1 2600 + dbvalue.0 0 + dbvalue.1 0 } } control.5 { iface MIXER name 'LO Driver Gain Volume' - value.0 6 - value.1 6 + value.0 0 + value.1 0 comment { access 'read write' type INTEGER @@ -1293,8 +1773,8 @@ state.tqmba8mpras314 { range '0 - 35' dbmin -600 dbmax 2900 - dbvalue.0 0 - dbvalue.1 0 + dbvalue.0 -600 + dbvalue.1 -600 } } control.6 { @@ -1345,7 +1825,7 @@ state.tqmba8mpras314 { control.10 { iface MIXER name 'ADCFGA Left Mute Switch' - value true + value false comment { access 'read write' type BOOLEAN @@ -1355,7 +1835,7 @@ state.tqmba8mpras314 { control.11 { iface MIXER name 'ADCFGA Right Mute Switch' - value true + value false comment { access 'read write' type BOOLEAN @@ -1365,8 +1845,8 @@ state.tqmba8mpras314 { control.12 { iface MIXER name 'ADC Level Volume' - value.0 24 - value.1 24 + value.0 22 + value.1 22 comment { access 'read write' type INTEGER @@ -1374,8 +1854,8 @@ state.tqmba8mpras314 { range '0 - 64' dbmin -1200 dbmax 2000 - dbvalue.0 0 - dbvalue.1 0 + dbvalue.0 -100 + dbvalue.1 -100 } } control.13 { @@ -1408,7 +1888,7 @@ state.tqmba8mpras314 { control.15 { iface MIXER name 'AGC Left Switch' - value false + value true comment { access 'read write' type BOOLEAN @@ -1476,8 +1956,8 @@ state.tqmba8mpras314 { control.21 { iface MIXER name 'AGC Max PGA' - value.0 127 - value.1 127 + value.0 0 + value.1 0 comment { access 'read write' type INTEGER @@ -1546,7 +2026,7 @@ state.tqmba8mpras314 { control.27 { iface MIXER name 'HPL Output Mixer IN1_L Switch' - value true + value false comment { access 'read write' type BOOLEAN @@ -1576,7 +2056,7 @@ state.tqmba8mpras314 { control.30 { iface MIXER name 'HPR Output Mixer IN1_R Switch' - value true + value false comment { access 'read write' type BOOLEAN @@ -1722,7 +2202,7 @@ state.tqmba8mpras314 { control.41 { iface MIXER name 'IN3_L to Left Mixer Positive Resistor' - value Off + value '10 kOhm' comment { access 'read write' type ENUMERATED diff --git a/patch/kernel/archive/imx8m-6.6/0001-Add-HDMI-support-for-IMX8MP.patch b/patch/kernel/archive/imx8m-6.6/0001-Add-HDMI-support-for-IMX8MP.patch deleted file mode 100644 index ce6e9e34f2d6..000000000000 --- a/patch/kernel/archive/imx8m-6.6/0001-Add-HDMI-support-for-IMX8MP.patch +++ /dev/null @@ -1,1966 +0,0 @@ -From 9caf66a8fc59ab89bfbfd9bb704d56c1d79d7dfd Mon Sep 17 00:00:00 2001 -From: Martin Schmiedel -Date: Wed, 10 Jan 2024 13:10:39 +0100 -Subject: [PATCH] Add HDMI support for IMX8MP - -- squash patches from Lucas Stach -- buildfixes - -Signed-off-by: Martin Schmiedel ---- - .../display/imx/fsl,imx8mp-hdmi-pvi.yaml | 79 ++ - .../bindings/display/imx/fsl,imx8mp-hdmi.yaml | 69 ++ - .../bindings/phy/fsl,imx8mp-hdmi-phy.yaml | 62 + - arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 27 + - arch/arm64/boot/dts/freescale/imx8mp.dtsi | 134 ++ - drivers/gpu/drm/bridge/imx/Kconfig | 16 + - drivers/gpu/drm/bridge/imx/Makefile | 3 + - drivers/gpu/drm/bridge/imx/imx8mp-hdmi-pvi.c | 202 +++ - drivers/gpu/drm/bridge/imx/imx8mp-hdmi.c | 140 +++ - drivers/phy/freescale/Kconfig | 6 + - drivers/phy/freescale/Makefile | 1 + - drivers/phy/freescale/phy-fsl-samsung-hdmi.c | 1078 +++++++++++++++++ - 12 files changed, 1817 insertions(+) - create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8mp-hdmi-pvi.yaml - create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8mp-hdmi.yaml - create mode 100644 Documentation/devicetree/bindings/phy/fsl,imx8mp-hdmi-phy.yaml - create mode 100644 drivers/gpu/drm/bridge/imx/imx8mp-hdmi-pvi.c - create mode 100644 drivers/gpu/drm/bridge/imx/imx8mp-hdmi.c - create mode 100644 drivers/phy/freescale/phy-fsl-samsung-hdmi.c - -diff --git a/Documentation/devicetree/bindings/display/imx/fsl,imx8mp-hdmi-pvi.yaml b/Documentation/devicetree/bindings/display/imx/fsl,imx8mp-hdmi-pvi.yaml -new file mode 100644 -index 000000000000..aa369721ac99 ---- /dev/null -+++ b/Documentation/devicetree/bindings/display/imx/fsl,imx8mp-hdmi-pvi.yaml -@@ -0,0 +1,79 @@ -+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) -+%YAML 1.2 -+--- -+$id: http://devicetree.org/schemas/display/imx/fsl,imx8mp-hdmi-pvi.yaml# -+$schema: http://devicetree.org/meta-schemas/core.yaml# -+ -+title: Freescale i.MX8MP HDMI Parallel Video Interface -+ -+maintainers: -+ - Lucas Stach -+ -+description: | -+ The HDMI parallel video interface is a timing and sync generator block in the -+ i.MX8MP SoC, that sits between the video source and the HDMI TX controller. -+ -+properties: -+ compatible: -+ enum: -+ - fsl,imx8mp-hdmi-pvi -+ -+ reg: -+ maxItems: 1 -+ -+ power-domains: -+ maxItems: 1 -+ -+ ports: -+ $ref: /schemas/graph.yaml#/properties/ports -+ -+ properties: -+ port@0: -+ $ref: /schemas/graph.yaml#/properties/port -+ description: Input from the LCDIF controller. -+ -+ port@1: -+ $ref: /schemas/graph.yaml#/properties/port -+ description: Output to the HDMI TX controller -+ -+ required: -+ - port@0 -+ - port@1 -+ -+required: -+ - compatible -+ - reg -+ - power-domains -+ - ports -+ -+additionalProperties: false -+ -+examples: -+ - | -+ #include -+ #include -+ -+ display-bridge@32fc4000 { -+ compatible = "fsl,imx8mp-hdmi-pvi"; -+ reg = <0x32fc4000 0x40>; -+ power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_PVI>; -+ -+ ports { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ port@0 { -+ reg = <0>; -+ pvi_from_lcdif3: endpoint { -+ remote-endpoint = <&lcdif3_to_pvi>; -+ }; -+ }; -+ -+ port@1 { -+ reg = <1>; -+ pvi_to_hdmi_tx: endpoint { -+ remote-endpoint = <&hdmi_tx_from_pvi>; -+ }; -+ }; -+ }; -+ }; -diff --git a/Documentation/devicetree/bindings/display/imx/fsl,imx8mp-hdmi.yaml b/Documentation/devicetree/bindings/display/imx/fsl,imx8mp-hdmi.yaml -new file mode 100644 -index 000000000000..75ebeaa8c9d5 ---- /dev/null -+++ b/Documentation/devicetree/bindings/display/imx/fsl,imx8mp-hdmi.yaml -@@ -0,0 +1,69 @@ -+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) -+%YAML 1.2 -+--- -+$id: http://devicetree.org/schemas/display/imx/fsl,imx8mp-hdmi.yaml# -+$schema: http://devicetree.org/meta-schemas/core.yaml# -+ -+title: Freescale i.MX8MP DWC HDMI TX Encoder -+ -+maintainers: -+ - Lucas Stach -+ -+description: | -+ The i.MX8MP HDMI transmitter is a Synopsys DesignWare -+ HDMI 2.0 TX controller IP. -+ -+allOf: -+ - $ref: ../bridge/synopsys,dw-hdmi.yaml# -+ -+properties: -+ compatible: -+ enum: -+ - fsl,imx8mp-hdmi -+ -+ reg-io-width: -+ const: 1 -+ -+ clocks: -+ maxItems: 5 -+ -+ clock-names: -+ items: -+ - const: iahb -+ - const: isfr -+ - const: fdcc -+ - const: cec -+ - const: pix -+ -+ power-domains: -+ maxItems: 1 -+ -+required: -+ - compatible -+ - reg -+ - clocks -+ - clock-names -+ - interrupts -+ - power-domains -+ -+unevaluatedProperties: false -+ -+examples: -+ - | -+ #include -+ #include -+ #include -+ -+ hdmi@32fd8000 { -+ compatible = "fsl,imx8mp-hdmi"; -+ reg = <0x32fd8000 0x7eff>; -+ interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&clk IMX8MP_CLK_HDMI_APB>, -+ <&clk IMX8MP_CLK_HDMI_REF_266M>, -+ <&clk IMX8MP_CLK_HDMI_FDCC_TST>, -+ <&clk IMX8MP_CLK_32K>, -+ <&hdmi_tx_phy>; -+ clock-names = "iahb", "isfr", "fdcc", "cec", "pix"; -+ power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_HDMI_TX>; -+ reg-io-width = <1>; -+ }; -diff --git a/Documentation/devicetree/bindings/phy/fsl,imx8mp-hdmi-phy.yaml b/Documentation/devicetree/bindings/phy/fsl,imx8mp-hdmi-phy.yaml -new file mode 100644 -index 000000000000..bc21c073e92a ---- /dev/null -+++ b/Documentation/devicetree/bindings/phy/fsl,imx8mp-hdmi-phy.yaml -@@ -0,0 +1,62 @@ -+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) -+%YAML 1.2 -+--- -+$id: http://devicetree.org/schemas/phy/fsl,imx8mp-hdmi-phy.yaml# -+$schema: http://devicetree.org/meta-schemas/core.yaml# -+ -+title: Freescale i.MX8MP HDMI PHY binding -+ -+maintainers: -+ - Lucas Stach -+ -+properties: -+ compatible: -+ enum: -+ - fsl,imx8mp-hdmi-phy -+ -+ reg: -+ maxItems: 1 -+ -+ "#clock-cells": -+ const: 0 -+ -+ clocks: -+ minItems: 2 -+ maxItems: 2 -+ -+ clock-names: -+ items: -+ - const: apb -+ - const: ref -+ -+ "#phy-cells": -+ const: 0 -+ -+ power-domains: -+ maxItems: 1 -+ -+required: -+ - compatible -+ - reg -+ - "#clock-cells" -+ - clocks -+ - clock-names -+ - power-domains -+ -+additionalProperties: false -+ -+examples: -+ - | -+ #include -+ #include -+ -+ phy@32fdff00 { -+ compatible = "fsl,imx8mp-hdmi-phy"; -+ reg = <0x32fdff00 0x100>; -+ clocks = <&clk IMX8MP_CLK_HDMI_APB>, -+ <&clk IMX8MP_CLK_HDMI_24M>; -+ clock-names = "apb", "ref"; -+ power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_HDMI_TX_PHY>; -+ #clock-cells = <0>; -+ #phy-cells = <0>; -+ }; -diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts -index 92f8cc05fe9d..2b0899daa8fe 100644 ---- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts -+++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts -@@ -306,6 +306,20 @@ &flexcan2 { - status = "disabled";/* can2 pin conflict with pdm */ - }; - -+&hdmi_pvi { -+ status = "okay"; -+}; -+ -+&hdmi_tx { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_hdmi>; -+ status = "okay"; -+}; -+ -+&hdmi_tx_phy { -+ status = "okay"; -+}; -+ - &i2c1 { - clock-frequency = <400000>; - pinctrl-names = "default"; -@@ -518,6 +532,10 @@ dsi_out: endpoint { - }; - }; - -+&lcdif3 { -+ status = "okay"; -+}; -+ - &pcie_phy { - fsl,refclk-pad-mode = ; - clocks = <&pcie0_refclk>; -@@ -727,6 +745,15 @@ MX8MP_IOMUXC_NAND_READY_B__GPIO3_IO16 0x140 - >; - }; - -+ pinctrl_hdmi: hdmigrp { -+ fsl,pins = < -+ MX8MP_IOMUXC_HDMI_DDC_SCL__HDMIMIX_HDMI_SCL 0x1c3 -+ MX8MP_IOMUXC_HDMI_DDC_SDA__HDMIMIX_HDMI_SDA 0x1c3 -+ MX8MP_IOMUXC_HDMI_HPD__HDMIMIX_HDMI_HPD 0x19 -+ MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_HDMI_CEC 0x19 -+ >; -+ }; -+ - pinctrl_i2c1: i2c1grp { - fsl,pins = < - MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x400001c2 -diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi -index 4b50920ac204..7b942c9e83bf 100644 ---- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi -+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi -@@ -832,6 +832,23 @@ pgc_mediamix: power-domain@10 { - <&clk IMX8MP_CLK_MEDIA_APB_ROOT>; - }; - -+ pgc_hdmimix: power-domain@14 { -+ #power-domain-cells = <0>; -+ reg = ; -+ clocks = <&clk IMX8MP_CLK_HDMI_ROOT>, -+ <&clk IMX8MP_CLK_HDMI_APB>; -+ assigned-clocks = <&clk IMX8MP_CLK_HDMI_AXI>, -+ <&clk IMX8MP_CLK_HDMI_APB>; -+ assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_500M>, -+ <&clk IMX8MP_SYS_PLL1_133M>; -+ assigned-clock-rates = <500000000>, <133000000>; -+ }; -+ -+ pgc_hdmi_phy: power-domain@15 { -+ #power-domain-cells = <0>; -+ reg = ; -+ }; -+ - pgc_mipi_phy2: power-domain@16 { - #power-domain-cells = <0>; - reg = ; -@@ -1830,6 +1847,123 @@ hsio_blk_ctrl: blk-ctrl@32f10000 { - interconnect-names = "noc-pcie", "usb1", "usb2", "pcie"; - #power-domain-cells = <1>; - #clock-cells = <0>; -+ }; -+ -+ hdmi_blk_ctrl: blk-ctrl@32fc0000 { -+ compatible = "fsl,imx8mp-hdmi-blk-ctrl", "syscon"; -+ reg = <0x32fc0000 0x1000>; -+ clocks = <&clk IMX8MP_CLK_HDMI_APB>, -+ <&clk IMX8MP_CLK_HDMI_ROOT>, -+ <&clk IMX8MP_CLK_HDMI_REF_266M>, -+ <&clk IMX8MP_CLK_HDMI_24M>, -+ <&clk IMX8MP_CLK_HDMI_FDCC_TST>; -+ clock-names = "apb", "axi", "ref_266m", "ref_24m", "fdcc"; -+ power-domains = <&pgc_hdmimix>, <&pgc_hdmimix>, -+ <&pgc_hdmimix>, <&pgc_hdmimix>, -+ <&pgc_hdmimix>, <&pgc_hdmimix>, -+ <&pgc_hdmimix>, <&pgc_hdmi_phy>, -+ <&pgc_hdmimix>, <&pgc_hdmimix>; -+ power-domain-names = "bus", "irqsteer", "lcdif", -+ "pai", "pvi", "trng", -+ "hdmi-tx", "hdmi-tx-phy", -+ "hdcp", "hrv"; -+ #power-domain-cells = <1>; -+ }; -+ -+ irqsteer_hdmi: interrupt-controller@32fc2000 { -+ compatible = "fsl,imx-irqsteer"; -+ reg = <0x32fc2000 0x44>; -+ interrupts = ; -+ interrupt-controller; -+ #interrupt-cells = <1>; -+ fsl,channel = <1>; -+ fsl,num-irqs = <64>; -+ clocks = <&clk IMX8MP_CLK_HDMI_APB>; -+ clock-names = "ipg"; -+ power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_IRQSTEER>; -+ }; -+ -+ hdmi_pvi: display-bridge@32fc4000 { -+ compatible = "fsl,imx8mp-hdmi-pvi"; -+ reg = <0x32fc4000 0x40>; -+ power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_PVI>; -+ status = "disabled"; -+ -+ ports { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ port@0 { -+ reg = <0>; -+ pvi_from_lcdif3: endpoint { -+ remote-endpoint = <&lcdif3_to_pvi>; -+ }; -+ }; -+ -+ port@1 { -+ reg = <1>; -+ pvi_to_hdmi_tx: endpoint { -+ remote-endpoint = <&hdmi_tx_from_pvi>; -+ }; -+ }; -+ }; -+ }; -+ -+ lcdif3: display-controller@32fc6000 { -+ compatible = "fsl,imx8mp-lcdif"; -+ reg = <0x32fc6000 0x238>; -+ interrupts = <8 IRQ_TYPE_LEVEL_HIGH>; -+ interrupt-parent = <&irqsteer_hdmi>; -+ clocks = <&hdmi_tx_phy>, -+ <&clk IMX8MP_CLK_HDMI_APB>, -+ <&clk IMX8MP_CLK_HDMI_ROOT>; -+ clock-names = "pix", "axi", "disp_axi"; -+ power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_LCDIF>; -+ status = "disabled"; -+ -+ port { -+ lcdif3_to_pvi: endpoint { -+ remote-endpoint = <&pvi_from_lcdif3>; -+ }; -+ }; -+ }; -+ -+ hdmi_tx: hdmi@32fd8000 { -+ compatible = "fsl,imx8mp-hdmi"; -+ reg = <0x32fd8000 0x7eff>; -+ interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; -+ interrupt-parent = <&irqsteer_hdmi>; -+ clocks = <&clk IMX8MP_CLK_HDMI_APB>, -+ <&clk IMX8MP_CLK_HDMI_REF_266M>, -+ <&clk IMX8MP_CLK_HDMI_FDCC_TST>, -+ <&clk IMX8MP_CLK_32K>, -+ <&hdmi_tx_phy>; -+ clock-names = "iahb", "isfr", "fdcc", "cec", "pix"; -+ assigned-clocks = <&clk IMX8MP_CLK_HDMI_REF_266M>; -+ assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_266M>; -+ power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_HDMI_TX>; -+ reg-io-width = <1>; -+ status = "disabled"; -+ -+ port { -+ hdmi_tx_from_pvi: endpoint { -+ remote-endpoint = <&pvi_to_hdmi_tx>; -+ }; -+ }; -+ }; -+ -+ hdmi_tx_phy: phy@32fdff00 { -+ compatible = "fsl,imx8mp-hdmi-phy"; -+ reg = <0x32fdff00 0x100>; -+ clocks = <&clk IMX8MP_CLK_HDMI_APB>, -+ <&clk IMX8MP_CLK_HDMI_24M>; -+ clock-names = "apb", "ref"; -+ assigned-clocks = <&clk IMX8MP_CLK_HDMI_24M>; -+ assigned-clock-parents = <&clk IMX8MP_CLK_24M>; -+ power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_HDMI_TX_PHY>; -+ #clock-cells = <0>; -+ #phy-cells = <0>; -+ status = "disabled"; - }; - }; - -diff --git a/drivers/gpu/drm/bridge/imx/Kconfig b/drivers/gpu/drm/bridge/imx/Kconfig -index 9fae28db6aa7..b1f4d962b2af 100644 ---- a/drivers/gpu/drm/bridge/imx/Kconfig -+++ b/drivers/gpu/drm/bridge/imx/Kconfig -@@ -49,4 +49,20 @@ config DRM_IMX8QXP_PIXEL_LINK_TO_DPI - Choose this to enable pixel link to display pixel interface(PXL2DPI) - found in Freescale i.MX8qxp processor. - -+config DRM_IMX8MP_DW_HDMI_BRIDGE -+ tristate "i.MX8MP HDMI bridge support" -+ depends on OF -+ depends on COMMON_CLK -+ select DRM_DW_HDMI -+ help -+ Choose this to enable support for the internal HDMI encoder found -+ on the i.MX8MP SoC. -+ -+config DRM_IMX8MP_HDMI_PVI -+ tristate "i.MX8MP HDMI PVI bridge support" -+ depends on OF -+ help -+ Choose this to enable support for the internal HDMI TX Parallel -+ Video Interface found on the i.MX8MP SoC. -+ - endif # ARCH_MXC || COMPILE_TEST -diff --git a/drivers/gpu/drm/bridge/imx/Makefile b/drivers/gpu/drm/bridge/imx/Makefile -index 8e2ebf3399a1..373beb358df3 100644 ---- a/drivers/gpu/drm/bridge/imx/Makefile -+++ b/drivers/gpu/drm/bridge/imx/Makefile -@@ -4,3 +4,6 @@ obj-$(CONFIG_DRM_IMX8QXP_LDB) += imx8qxp-ldb.o - obj-$(CONFIG_DRM_IMX8QXP_PIXEL_COMBINER) += imx8qxp-pixel-combiner.o - obj-$(CONFIG_DRM_IMX8QXP_PIXEL_LINK) += imx8qxp-pixel-link.o - obj-$(CONFIG_DRM_IMX8QXP_PIXEL_LINK_TO_DPI) += imx8qxp-pxl2dpi.o -+ -+obj-$(CONFIG_DRM_IMX8MP_DW_HDMI_BRIDGE) += imx8mp-hdmi.o -+obj-$(CONFIG_DRM_IMX8MP_HDMI_PVI) += imx8mp-hdmi-pvi.o -diff --git a/drivers/gpu/drm/bridge/imx/imx8mp-hdmi-pvi.c b/drivers/gpu/drm/bridge/imx/imx8mp-hdmi-pvi.c -new file mode 100644 -index 000000000000..30d40c21dabb ---- /dev/null -+++ b/drivers/gpu/drm/bridge/imx/imx8mp-hdmi-pvi.c -@@ -0,0 +1,202 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+ -+/* -+ * Copyright (C) 2022 Pengutronix, Lucas Stach -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define HTX_PVI_CTL 0x0 -+#define PVI_CTL_OP_VSYNC_POL BIT(18) -+#define PVI_CTL_OP_HSYNC_POL BIT(17) -+#define PVI_CTL_OP_DE_POL BIT(16) -+#define PVI_CTL_INP_VSYNC_POL BIT(14) -+#define PVI_CTL_INP_HSYNC_POL BIT(13) -+#define PVI_CTL_INP_DE_POL BIT(12) -+#define PVI_CTL_INPUT_LCDIF BIT(2) -+#define PVI_CTL_EN BIT(0) -+ -+struct imx8mp_hdmi_pvi { -+ struct drm_bridge bridge; -+ struct device *dev; -+ struct drm_bridge *next_bridge; -+ void __iomem *regs; -+}; -+ -+static inline struct imx8mp_hdmi_pvi * -+to_imx8mp_hdmi_pvi(struct drm_bridge *bridge) -+{ -+ return container_of(bridge, struct imx8mp_hdmi_pvi, bridge); -+} -+ -+static int imx8mp_hdmi_pvi_bridge_attach(struct drm_bridge *bridge, -+ enum drm_bridge_attach_flags flags) -+{ -+ struct imx8mp_hdmi_pvi *pvi = to_imx8mp_hdmi_pvi(bridge); -+ -+ return drm_bridge_attach(bridge->encoder, pvi->next_bridge, -+ bridge, flags); -+} -+ -+static void imx8mp_hdmi_pvi_bridge_enable(struct drm_bridge *bridge, -+ struct drm_bridge_state *bridge_state) -+{ -+ struct drm_atomic_state *state = bridge_state->base.state; -+ struct imx8mp_hdmi_pvi *pvi = to_imx8mp_hdmi_pvi(bridge); -+ struct drm_connector_state *conn_state; -+ const struct drm_display_mode *mode; -+ struct drm_crtc_state *crtc_state; -+ struct drm_connector *connector; -+ u32 bus_flags, val; -+ -+ connector = drm_atomic_get_new_connector_for_encoder(state, bridge->encoder); -+ conn_state = drm_atomic_get_new_connector_state(state, connector); -+ crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc); -+ -+ if (WARN_ON(pm_runtime_resume_and_get(pvi->dev))) -+ return; -+ -+ mode = &crtc_state->adjusted_mode; -+ -+ val = PVI_CTL_INPUT_LCDIF; -+ -+ if (mode->flags & DRM_MODE_FLAG_PVSYNC) -+ val |= PVI_CTL_OP_VSYNC_POL | PVI_CTL_INP_VSYNC_POL; -+ -+ if (mode->flags & DRM_MODE_FLAG_PHSYNC) -+ val |= PVI_CTL_OP_HSYNC_POL | PVI_CTL_INP_HSYNC_POL; -+ -+ if (pvi->next_bridge->timings) -+ bus_flags = pvi->next_bridge->timings->input_bus_flags; -+ else if (bridge_state) -+ bus_flags = bridge_state->input_bus_cfg.flags; -+ -+ if (bus_flags & DRM_BUS_FLAG_DE_HIGH) -+ val |= PVI_CTL_OP_DE_POL | PVI_CTL_INP_DE_POL; -+ -+ writel(val, pvi->regs + HTX_PVI_CTL); -+ val |= PVI_CTL_EN; -+ writel(val, pvi->regs + HTX_PVI_CTL); -+} -+ -+static void imx8mp_hdmi_pvi_bridge_disable(struct drm_bridge *bridge, -+ struct drm_bridge_state *bridge_state) -+{ -+ struct imx8mp_hdmi_pvi *pvi = to_imx8mp_hdmi_pvi(bridge); -+ -+ writel(0x0, pvi->regs + HTX_PVI_CTL); -+ -+ pm_runtime_put(pvi->dev); -+} -+ -+static u32 *imx8mp_hdmi_pvi_bridge_get_input_bus_fmts(struct drm_bridge *bridge, -+ struct drm_bridge_state *bridge_state, -+ struct drm_crtc_state *crtc_state, -+ struct drm_connector_state *conn_state, -+ u32 output_fmt, -+ unsigned int *num_input_fmts) -+{ -+ struct imx8mp_hdmi_pvi *pvi = to_imx8mp_hdmi_pvi(bridge); -+ struct drm_bridge *next_bridge = pvi->next_bridge; -+ struct drm_bridge_state *next_state; -+ -+ if (!next_bridge->funcs->atomic_get_input_bus_fmts) -+ return 0; -+ -+ next_state = drm_atomic_get_new_bridge_state(crtc_state->state, -+ next_bridge); -+ -+ return next_bridge->funcs->atomic_get_input_bus_fmts(next_bridge, -+ next_state, -+ crtc_state, -+ conn_state, -+ output_fmt, -+ num_input_fmts); -+} -+ -+static const struct drm_bridge_funcs imx_hdmi_pvi_bridge_funcs = { -+ .attach = imx8mp_hdmi_pvi_bridge_attach, -+ .atomic_enable = imx8mp_hdmi_pvi_bridge_enable, -+ .atomic_disable = imx8mp_hdmi_pvi_bridge_disable, -+ .atomic_get_input_bus_fmts = imx8mp_hdmi_pvi_bridge_get_input_bus_fmts, -+ .atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state, -+ .atomic_destroy_state = drm_atomic_helper_bridge_destroy_state, -+ .atomic_reset = drm_atomic_helper_bridge_reset, -+}; -+ -+static int imx8mp_hdmi_pvi_probe(struct platform_device *pdev) -+{ -+ struct device_node *remote; -+ struct imx8mp_hdmi_pvi *pvi; -+ -+ pvi = devm_kzalloc(&pdev->dev, sizeof(*pvi), GFP_KERNEL); -+ if (!pvi) -+ return -ENOMEM; -+ -+ platform_set_drvdata(pdev, pvi); -+ pvi->dev = &pdev->dev; -+ -+ pvi->regs = devm_platform_ioremap_resource(pdev, 0); -+ if (IS_ERR(pvi->regs)) -+ return PTR_ERR(pvi->regs); -+ -+ /* Get the next bridge in the pipeline. */ -+ remote = of_graph_get_remote_node(pdev->dev.of_node, 1, -1); -+ if (!remote) -+ return -EINVAL; -+ -+ pvi->next_bridge = of_drm_find_bridge(remote); -+ of_node_put(remote); -+ -+ if (!pvi->next_bridge) -+ return dev_err_probe(&pdev->dev, -EPROBE_DEFER, -+ "could not find next bridge\n"); -+ -+ /* Register the bridge. */ -+ pvi->bridge.funcs = &imx_hdmi_pvi_bridge_funcs; -+ pvi->bridge.of_node = pdev->dev.of_node; -+ pvi->bridge.timings = pvi->next_bridge->timings; -+ -+ drm_bridge_add(&pvi->bridge); -+ -+ pm_runtime_enable(&pdev->dev); -+ -+ return 0; -+} -+ -+static int imx8mp_hdmi_pvi_remove(struct platform_device *pdev) -+{ -+ struct imx8mp_hdmi_pvi *pvi = platform_get_drvdata(pdev); -+ -+ drm_bridge_remove(&pvi->bridge); -+ -+ return 0; -+} -+ -+static const struct of_device_id imx8mp_hdmi_pvi_match[] = { -+ { -+ .compatible = "fsl,imx8mp-hdmi-pvi", -+ }, { -+ /* sentinel */ -+ }, -+}; -+MODULE_DEVICE_TABLE(of, imx8mp_hdmi_pvi_match); -+ -+static struct platform_driver imx8mp_hdmi_pvi_driver = { -+ .probe = imx8mp_hdmi_pvi_probe, -+ .remove = imx8mp_hdmi_pvi_remove, -+ .driver = { -+ .name = "imx-hdmi-pvi", -+ .of_match_table = imx8mp_hdmi_pvi_match, -+ }, -+}; -+module_platform_driver(imx8mp_hdmi_pvi_driver); -+ -+MODULE_DESCRIPTION("i.MX8MP HDMI TX Parallel Video Interface bridge driver"); -+MODULE_LICENSE("GPL"); -diff --git a/drivers/gpu/drm/bridge/imx/imx8mp-hdmi.c b/drivers/gpu/drm/bridge/imx/imx8mp-hdmi.c -new file mode 100644 -index 000000000000..06849b817aed ---- /dev/null -+++ b/drivers/gpu/drm/bridge/imx/imx8mp-hdmi.c -@@ -0,0 +1,140 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+ -+/* -+ * Copyright (C) 2022 Pengutronix, Lucas Stach -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+ -+struct imx8mp_hdmi { -+ struct dw_hdmi_plat_data plat_data; -+ struct dw_hdmi *dw_hdmi; -+ struct clk *pixclk; -+ struct clk *fdcc; -+}; -+ -+static enum drm_mode_status -+imx8mp_hdmi_mode_valid(struct dw_hdmi *dw_hdmi, void *data, -+ const struct drm_display_info *info, -+ const struct drm_display_mode *mode) -+{ -+ struct imx8mp_hdmi *hdmi = (struct imx8mp_hdmi *)data; -+ -+ if (mode->clock < 13500) -+ return MODE_CLOCK_LOW; -+ -+ if (mode->clock > 297000) -+ return MODE_CLOCK_HIGH; -+ -+ if (clk_round_rate(hdmi->pixclk, mode->clock * 1000) != -+ mode->clock * 1000) -+ return MODE_CLOCK_RANGE; -+ -+ /* We don't support double-clocked and Interlaced modes */ -+ if ((mode->flags & DRM_MODE_FLAG_DBLCLK) || -+ (mode->flags & DRM_MODE_FLAG_INTERLACE)) -+ return MODE_BAD; -+ -+ return MODE_OK; -+} -+ -+static int imx8mp_hdmi_phy_init(struct dw_hdmi *dw_hdmi, void *data, -+ const struct drm_display_info *display, -+ const struct drm_display_mode *mode) -+{ -+ return 0; -+} -+ -+static void imx8mp_hdmi_phy_disable(struct dw_hdmi *dw_hdmi, void *data) -+{ -+} -+ -+static void im8mp_hdmi_phy_setup_hpd(struct dw_hdmi *hdmi, void *data) -+{ -+ /* -+ * Just release PHY core from reset, all other power management is done -+ * by the PHY driver. -+ */ -+ dw_hdmi_phy_gen1_reset(hdmi); -+ -+ dw_hdmi_phy_setup_hpd(hdmi, data); -+} -+ -+static const struct dw_hdmi_phy_ops imx8mp_hdmi_phy_ops = { -+ .init = imx8mp_hdmi_phy_init, -+ .disable = imx8mp_hdmi_phy_disable, -+ .setup_hpd = im8mp_hdmi_phy_setup_hpd, -+ .read_hpd = dw_hdmi_phy_read_hpd, -+ .update_hpd = dw_hdmi_phy_update_hpd, -+}; -+ -+static int imx8mp_dw_hdmi_probe(struct platform_device *pdev) -+{ -+ struct device *dev = &pdev->dev; -+ struct dw_hdmi_plat_data *plat_data; -+ struct imx8mp_hdmi *hdmi; -+ int ret; -+ -+ hdmi = devm_kzalloc(dev, sizeof(*hdmi), GFP_KERNEL); -+ if (!hdmi) -+ return -ENOMEM; -+ -+ plat_data = &hdmi->plat_data; -+ -+ hdmi->pixclk = devm_clk_get(dev, "pix"); -+ if (IS_ERR(hdmi->pixclk)) -+ return dev_err_probe(dev, PTR_ERR(hdmi->pixclk), -+ "Unable to get pixel clock\n"); -+ -+ hdmi->fdcc = devm_clk_get_enabled(dev, "fdcc"); -+ if (IS_ERR(hdmi->fdcc)) -+ return dev_err_probe(dev, PTR_ERR(hdmi->fdcc), -+ "Unable to get FDCC clock\n"); -+ -+ plat_data->mode_valid = imx8mp_hdmi_mode_valid; -+ plat_data->phy_ops = &imx8mp_hdmi_phy_ops; -+ plat_data->phy_name = "SAMSUNG HDMI TX PHY"; -+ plat_data->priv_data = hdmi; -+ -+ hdmi->dw_hdmi = dw_hdmi_probe(pdev, plat_data); -+ if (IS_ERR(hdmi->dw_hdmi)) -+ return PTR_ERR(hdmi->dw_hdmi); -+ -+ platform_set_drvdata(pdev, hdmi); -+ -+ return 0; -+} -+ -+static int imx8mp_dw_hdmi_remove(struct platform_device *pdev) -+{ -+ struct imx8mp_hdmi *hdmi = platform_get_drvdata(pdev); -+ -+ dw_hdmi_remove(hdmi->dw_hdmi); -+ -+ return 0; -+} -+ -+static const struct of_device_id imx8mp_dw_hdmi_of_table[] = { -+ { .compatible = "fsl,imx8mp-hdmi" }, -+ { /* Sentinel */ }, -+}; -+MODULE_DEVICE_TABLE(of, imx8mp_dw_hdmi_of_table); -+ -+static struct platform_driver imx8mp_dw_hdmi_platform_driver = { -+ .probe = imx8mp_dw_hdmi_probe, -+ .remove = imx8mp_dw_hdmi_remove, -+ .driver = { -+ .name = "imx8mp-dw-hdmi", -+ .of_match_table = imx8mp_dw_hdmi_of_table, -+ }, -+}; -+ -+module_platform_driver(imx8mp_dw_hdmi_platform_driver); -+ -+MODULE_DESCRIPTION("i.MX8MP HDMI encoder driver"); -+MODULE_LICENSE("GPL"); -diff --git a/drivers/phy/freescale/Kconfig b/drivers/phy/freescale/Kconfig -index 853958fb2c06..5c2b73042dfc 100644 ---- a/drivers/phy/freescale/Kconfig -+++ b/drivers/phy/freescale/Kconfig -@@ -35,6 +35,12 @@ config PHY_FSL_IMX8M_PCIE - Enable this to add support for the PCIE PHY as found on - i.MX8M family of SOCs. - -+config PHY_FSL_SAMSUNG_HDMI_PHY -+ tristate "Samsung HDMI PHY support" -+ depends on OF && HAS_IOMEM -+ help -+ Enable this to add support for the Samsung HDMI PHY in i.MX8MP. -+ - endif - - config PHY_FSL_LYNX_28G -diff --git a/drivers/phy/freescale/Makefile b/drivers/phy/freescale/Makefile -index cedb328bc4d2..dbcafdcc8751 100644 ---- a/drivers/phy/freescale/Makefile -+++ b/drivers/phy/freescale/Makefile -@@ -3,4 +3,5 @@ obj-$(CONFIG_PHY_FSL_IMX8MQ_USB) += phy-fsl-imx8mq-usb.o - obj-$(CONFIG_PHY_MIXEL_LVDS_PHY) += phy-fsl-imx8qm-lvds-phy.o - obj-$(CONFIG_PHY_MIXEL_MIPI_DPHY) += phy-fsl-imx8-mipi-dphy.o - obj-$(CONFIG_PHY_FSL_IMX8M_PCIE) += phy-fsl-imx8m-pcie.o -+obj-$(CONFIG_PHY_FSL_SAMSUNG_HDMI_PHY) += phy-fsl-samsung-hdmi.o - obj-$(CONFIG_PHY_FSL_LYNX_28G) += phy-fsl-lynx-28g.o -diff --git a/drivers/phy/freescale/phy-fsl-samsung-hdmi.c b/drivers/phy/freescale/phy-fsl-samsung-hdmi.c -new file mode 100644 -index 000000000000..6d20a5ce44e6 ---- /dev/null -+++ b/drivers/phy/freescale/phy-fsl-samsung-hdmi.c -@@ -0,0 +1,1078 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * Copyright 2020 NXP -+ * Copyright 2022 Pengutronix, Lucas Stach -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define HDMI_TX_CONTROL0 0x200 -+#define HDMI_TX_CONTROL_PHY_PWRDWN BIT(3) -+ -+#define PHY_REG_33 0x84 -+#define REG33_MODE_SET_DONE BIT(7) -+#define REG33_FIX_DA BIT(1) -+ -+#define PHY_REG_34 0x88 -+#define REG34_PHY_READY BIT(7) -+#define REG34_PLL_LOCK BIT(6) -+#define REG34_PHY_CLK_READY BIT(5) -+ -+ -+#define PHY_PLL_REGS_NUM 48 -+ -+struct phy_config { -+ u32 clk_rate; -+ u8 regs[PHY_PLL_REGS_NUM]; -+}; -+ -+const struct phy_config phy_pll_cfg[] = { -+ { 22250000, { -+ 0x00, 0xD1, 0x4B, 0xF1, 0x89, 0x88, 0x80, 0x40, -+ 0x4F, 0x30, 0x33, 0x65, 0x00, 0x15, 0x25, 0x80, -+ 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x8F, 0x30, 0x32, -+ 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, -+ 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, -+ }, -+ }, { -+ 23750000, { -+ 0x00, 0xD1, 0x50, 0xF1, 0x86, 0x85, 0x80, 0x40, -+ 0x4F, 0x30, 0x33, 0x65, 0x00, 0x03, 0x25, 0x80, -+ 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x8F, 0x30, 0x32, -+ 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, -+ 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, -+ }, -+ },{ -+ 24000000, { -+ 0x00, 0xD1, 0x50, 0xF0, 0x00, 0x00, 0x80, 0x00, -+ 0x4F, 0x30, 0x33, 0x65, 0x00, 0x01, 0x25, 0x80, -+ 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x8F, 0x30, 0x32, -+ 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, -+ 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, -+ }, -+ },{ -+ 24024000, { -+ 0x00, 0xD1, 0x50, 0xF1, 0x99, 0x02, 0x80, 0x40, -+ 0x4F, 0x30, 0x33, 0x65, 0x00, 0x00, 0x25, 0x80, -+ 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x8F, 0x30, 0x32, -+ 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, -+ 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, -+ }, -+ }, { -+ 25175000, { -+ 0x00, 0xD1, 0x54, 0xFC, 0xCC, 0x91, 0x80, 0x40, -+ 0x4F, 0x30, 0x33, 0x65, 0x00, 0xF5, 0x24, 0x80, -+ 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x8F, 0x30, 0x32, -+ 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, -+ 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, -+ }, -+ }, { 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-+ 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x81, 0x30, 0x32, -+ 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, -+ 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, -+ }, -+ }, { -+ 216216000, { -+ 0x00, 0xD1, 0x5A, 0x12, 0xFD, 0x0C, 0x80, 0x40, -+ 0x4F, 0x30, 0x33, 0x65, 0x30, 0xE4, 0x24, 0x80, -+ 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x81, 0x30, 0x32, -+ 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, -+ 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, -+ }, -+ }, { -+ 237600000, { -+ 0x00, 0xD1, 0x63, 0x10, 0x00, 0x00, 0x80, 0x00, -+ 0x4F, 0x30, 0x33, 0x65, 0x30, 0xCF, 0x24, 0x80, -+ 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x81, 0x30, 0x32, -+ 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, -+ 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, -+ }, -+ }, { -+ 254000000, { -+ 0x00, 0xD1, 0x69, 0x14, 0x89, 0x08, 0x80, 0x40, -+ 0x4F, 0x30, 0x33, 0x65, 0x30, 0xC2, 0x24, 0x80, -+ 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x81, 0x30, 0x32, -+ 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, -+ 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, -+ }, -+ }, { -+ 277500000, { -+ 0x00, 0xD1, 0x73, 0x15, 0x88, 0x05, 0x90, 0x4D, -+ 0x4F, 0x30, 0x33, 0x65, 0x30, 0xB2, 0x24, 0x80, -+ 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x81, 0x30, 0x32, -+ 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, -+ 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, -+ }, -+ }, { -+ 288000000, { -+ 0x00, 0xD1, 0x78, 0x10, 0x00, 0x00, 0x80, 0x00, -+ 0x4F, 0x30, 0x33, 0x65, 0x30, 0xAB, 0x24, 0x80, -+ 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x81, 0x30, 0x32, -+ 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, -+ 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, -+ }, -+ }, { -+ 297000000, { -+ 0x00, 0xD1, 0x7B, 0x15, 0x84, 0x03, 0x90, 0x45, -+ 0x4F, 0x30, 0x33, 0x65, 0x30, 0xA6, 0x24, 0x80, -+ 0x6C, 0xF2, 0x67, 0x00, 0x10, 0x81, 0x30, 0x32, -+ 0x60, 0x8F, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, -+ 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0xE0, 0x83, 0x0F, 0x3E, 0xF8, 0x00, 0x00, -+ }, -+ }, -+}; -+ -+struct fsl_samsung_hdmi_phy { -+ struct device *dev; -+ void __iomem *regs; -+ struct clk *apbclk; -+ struct clk *refclk; -+ -+ /* clk provider */ -+ struct clk_hw hw; -+ const struct phy_config *cur_cfg; -+}; -+ -+static inline struct fsl_samsung_hdmi_phy * -+to_fsl_samsung_hdmi_phy(struct clk_hw *hw) -+{ -+ return container_of(hw, struct fsl_samsung_hdmi_phy, hw); -+} -+ -+static int fsl_samsung_hdmi_phy_configure(struct fsl_samsung_hdmi_phy *phy, -+ const struct phy_config *cfg) -+{ -+ int i, ret; -+ u8 val; -+ -+ /* HDMI PHY init */ -+ writeb(REG33_FIX_DA, phy->regs + PHY_REG_33); -+ -+ for (i = 0; i < PHY_PLL_REGS_NUM; i++) -+ writeb(cfg->regs[i], phy->regs + i * 4); -+ -+ writeb(REG33_FIX_DA | REG33_MODE_SET_DONE , phy->regs + PHY_REG_33); -+ -+ ret = readb_poll_timeout(phy->regs + PHY_REG_34, val, -+ val & REG34_PLL_LOCK, -+ 50, 20000); -+ if (ret) -+ dev_err(phy->dev, "PLL failed to lock\n"); -+ -+ return ret; -+} -+ -+static unsigned long phy_clk_recalc_rate(struct clk_hw *hw, -+ unsigned long parent_rate) -+{ -+ struct fsl_samsung_hdmi_phy *phy = to_fsl_samsung_hdmi_phy(hw); -+ -+ if (!phy->cur_cfg) -+ return 74250000; -+ -+ return phy->cur_cfg->clk_rate; -+} -+ -+static long phy_clk_round_rate(struct clk_hw *hw, -+ unsigned long rate, unsigned long *parent_rate) -+{ -+ int i; -+ -+ for (i = ARRAY_SIZE(phy_pll_cfg) - 1; i >= 0; i--) -+ if (phy_pll_cfg[i].clk_rate <= rate) -+ return phy_pll_cfg[i].clk_rate; -+ -+ return -EINVAL; -+} -+ -+static int phy_clk_set_rate(struct clk_hw *hw, -+ unsigned long rate, unsigned long parent_rate) -+{ -+ struct fsl_samsung_hdmi_phy *phy = to_fsl_samsung_hdmi_phy(hw); -+ int i; -+ -+ for (i = ARRAY_SIZE(phy_pll_cfg) - 1; i >= 0; i--) -+ if (phy_pll_cfg[i].clk_rate <= rate) -+ break; -+ -+ if (i < 0) -+ return -EINVAL; -+ -+ phy->cur_cfg = &phy_pll_cfg[i]; -+ -+ return fsl_samsung_hdmi_phy_configure(phy, phy->cur_cfg); -+} -+ -+static const struct clk_ops phy_clk_ops = { -+ .recalc_rate = phy_clk_recalc_rate, -+ .round_rate = phy_clk_round_rate, -+ .set_rate = phy_clk_set_rate, -+}; -+ -+static int phy_clk_register(struct fsl_samsung_hdmi_phy *phy) -+{ -+ struct device *dev = phy->dev; -+ struct device_node *np = dev->of_node; -+ struct clk_init_data init; -+ const char *parent_name; -+ struct clk *phyclk; -+ int ret; -+ -+ parent_name = __clk_get_name(phy->refclk); -+ -+ init.parent_names = &parent_name; -+ init.num_parents = 1; -+ init.flags = 0; -+ init.name = "hdmi_pclk"; -+ init.ops = &phy_clk_ops; -+ -+ phy->hw.init = &init; -+ -+ phyclk = devm_clk_register(dev, &phy->hw); -+ if (IS_ERR(phyclk)) -+ return dev_err_probe(dev, PTR_ERR(phyclk), -+ "failed to register clock\n"); -+ -+ ret = of_clk_add_provider(np, of_clk_src_simple_get, phyclk); -+ if (ret) -+ return dev_err_probe(dev, ret, -+ "failed to register clock provider\n"); -+ -+ return 0; -+} -+ -+static int fsl_samsung_hdmi_phy_probe(struct platform_device *pdev) -+{ -+ struct fsl_samsung_hdmi_phy *phy; -+ int ret; -+ -+ phy = devm_kzalloc(&pdev->dev, sizeof(*phy), GFP_KERNEL); -+ if (!phy) -+ return -ENOMEM; -+ -+ platform_set_drvdata(pdev, phy); -+ phy->dev = &pdev->dev; -+ -+ phy->regs = devm_platform_ioremap_resource(pdev, 0); -+ if (IS_ERR(phy->regs)) -+ return PTR_ERR(phy->regs); -+ -+ phy->apbclk = devm_clk_get(phy->dev, "apb"); -+ if (IS_ERR(phy->apbclk)) -+ return dev_err_probe(phy->dev, PTR_ERR(phy->apbclk), -+ "failed to get apb clk\n"); -+ -+ phy->refclk = devm_clk_get(phy->dev, "ref"); -+ if (IS_ERR(phy->refclk)) -+ return dev_err_probe(phy->dev, PTR_ERR(phy->refclk), -+ "failed to get ref clk\n"); -+ -+ ret = clk_prepare_enable(phy->apbclk); -+ if (ret) { -+ dev_err(phy->dev, "failed to enable apbclk\n"); -+ return ret; -+ } -+ -+ pm_runtime_get_noresume(phy->dev); -+ pm_runtime_set_active(phy->dev); -+ pm_runtime_enable(phy->dev); -+ -+ ret = phy_clk_register(phy); -+ if (ret) { -+ dev_err(&pdev->dev, "register clk failed\n"); -+ goto register_clk_failed; -+ } -+ -+ pm_runtime_put(phy->dev); -+ -+ return 0; -+ -+register_clk_failed: -+ clk_disable_unprepare(phy->apbclk); -+ -+ return ret; -+} -+ -+static int fsl_samsung_hdmi_phy_remove(struct platform_device *pdev) -+{ -+ of_clk_del_provider(pdev->dev.of_node); -+ -+ return 0; -+} -+ -+#ifdef CONFIG_PM -+static int fsl_samsung_hdmi_phy_suspend(struct device *dev) -+{ -+ struct fsl_samsung_hdmi_phy *phy = dev_get_drvdata(dev); -+ -+ clk_disable_unprepare(phy->apbclk); -+ -+ return 0; -+} -+ -+static int fsl_samsung_hdmi_phy_resume(struct device *dev) -+{ -+ struct fsl_samsung_hdmi_phy *phy = dev_get_drvdata(dev); -+ int ret = 0; -+ -+ ret = clk_prepare_enable(phy->apbclk); -+ if (ret) { -+ dev_err(phy->dev, "failed to enable apbclk\n"); -+ return ret; -+ } -+ -+ if (phy->cur_cfg) -+ ret = fsl_samsung_hdmi_phy_configure(phy, phy->cur_cfg); -+ -+ return ret; -+ -+} -+#endif -+ -+static const struct dev_pm_ops fsl_samsung_hdmi_phy_pm_ops = { -+ SET_RUNTIME_PM_OPS(fsl_samsung_hdmi_phy_suspend, -+ fsl_samsung_hdmi_phy_resume, NULL) -+ SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, -+ pm_runtime_force_resume) -+}; -+ -+static const struct of_device_id fsl_samsung_hdmi_phy_of_match[] = { -+ { -+ .compatible = "fsl,imx8mp-hdmi-phy", -+ }, { -+ /* sentinel */ -+ } -+}; -+MODULE_DEVICE_TABLE(of, fsl_samsung_hdmi_phy_of_match); -+ -+static struct platform_driver fsl_samsung_hdmi_phy_driver = { -+ .probe = fsl_samsung_hdmi_phy_probe, -+ .remove = fsl_samsung_hdmi_phy_remove, -+ .driver = { -+ .name = "fsl-samsung-hdmi-phy", -+ .of_match_table = fsl_samsung_hdmi_phy_of_match, -+ .pm = &fsl_samsung_hdmi_phy_pm_ops, -+ }, -+}; -+module_platform_driver(fsl_samsung_hdmi_phy_driver); -+ -+MODULE_AUTHOR("Sandor Yu "); -+MODULE_DESCRIPTION("SAMSUNG HDMI 2.0 Transmitter PHY Driver"); -+MODULE_LICENSE("GPL v2"); --- -2.34.1 - diff --git a/patch/kernel/archive/imx8m-6.6/0002-arm64-dts-imx8mp-Enable-HDMI-on-TQMa8MPxL-MBa8MPxL.patch b/patch/kernel/archive/imx8m-6.6/0002-arm64-dts-imx8mp-Enable-HDMI-on-TQMa8MPxL-MBa8MPxL.patch deleted file mode 100644 index 925e54c19f32..000000000000 --- a/patch/kernel/archive/imx8m-6.6/0002-arm64-dts-imx8mp-Enable-HDMI-on-TQMa8MPxL-MBa8MPxL.patch +++ /dev/null @@ -1,49 +0,0 @@ -From aeaa5cc44382576cd30432d5ec9718fbb953dd28 Mon Sep 17 00:00:00 2001 -From: Martin Schmiedel -Date: Wed, 10 Jan 2024 14:32:45 +0100 -Subject: [PATCH] arm64: dts: imx8mp: Enable HDMI on TQMa8MPxL/MBa8MPxL - -Signed-off-by: Martin Schmiedel ---- - .../freescale/imx8mp-tqma8mpql-mba8mpxl.dts | 18 ++++++++++++++++++ - 1 file changed, 18 insertions(+) - -diff --git a/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts b/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts -index 258e90cc16ff..028f4e4e94e2 100644 ---- a/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts -+++ b/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts -@@ -454,6 +454,20 @@ &gpio5 { - "", "", "", ""; - }; - -+&hdmi_pvi { -+ status = "okay"; -+}; -+ -+&hdmi_tx { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_hdmi>; -+ status = "okay"; -+}; -+ -+&hdmi_tx_phy { -+ status = "okay"; -+}; -+ - &i2c2 { - clock-frequency = <384000>; - pinctrl-names = "default", "gpio"; -@@ -515,6 +529,10 @@ &i2c6 { - status = "okay"; - }; - -+&lcdif3 { -+ status = "okay"; -+}; -+ - &pcf85063 { - /* RTC_EVENT# is connected on MBa8MPxL */ - pinctrl-names = "default"; --- -2.34.1 - diff --git a/patch/kernel/archive/imx8m-6.6/0003-arm64-dts-freescale-add-TQMa8MPQL-on-MBa8MP-RAS314.patch b/patch/kernel/archive/imx8m-6.6/0003-arm64-dts-freescale-add-TQMa8MPQL-on-MBa8MP-RAS314.patch deleted file mode 100644 index ae1de7fd5308..000000000000 --- a/patch/kernel/archive/imx8m-6.6/0003-arm64-dts-freescale-add-TQMa8MPQL-on-MBa8MP-RAS314.patch +++ /dev/null @@ -1,941 +0,0 @@ -From b7b5ca128562c0d223d7c96df554ffc44bdc1717 Mon Sep 17 00:00:00 2001 -From: Martin Schmiedel -Date: Thu, 1 Aug 2024 10:11:51 +0200 -Subject: [PATCH] arm64: dts: freescale: add TQMa8MPQL on MBa8MP-RAS314 - -This adds support for TQMa8MPQL module on MBa8MP-RAS314 board. - -Signed-off-by: Martin Schmiedel ---- - arch/arm64/boot/dts/freescale/Makefile | 1 + - .../imx8mp-tqma8mpql-mba8mp-ras314.dts | 906 ++++++++++++++++++ - 2 files changed, 907 insertions(+) - create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mp-ras314.dts - -diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile -index 89aee6c92576..8ebaf3aa9ad7 100644 ---- a/arch/arm64/boot/dts/freescale/Makefile -+++ b/arch/arm64/boot/dts/freescale/Makefile -@@ -103,6 +103,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-icore-mx8mp-edimm2.2.dtb - dtb-$(CONFIG_ARCH_MXC) += imx8mp-msc-sm2s-ep1.dtb - dtb-$(CONFIG_ARCH_MXC) += imx8mp-phyboard-pollux-rdk.dtb - dtb-$(CONFIG_ARCH_MXC) += imx8mp-tqma8mpql-mba8mpxl.dtb -+dtb-$(CONFIG_ARCH_MXC) += imx8mp-tqma8mpql-mba8mp-ras314.dtb - dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw71xx-2x.dtb - dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw72xx-2x.dtb - dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw73xx-2x.dtb -diff --git a/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mp-ras314.dts b/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mp-ras314.dts -new file mode 100644 -index 000000000000..d7fd9d36f824 ---- /dev/null -+++ b/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mp-ras314.dts -@@ -0,0 +1,906 @@ -+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT -+/* -+ * Copyright (c) 2023-2024 TQ-Systems GmbH , -+ * D-82229 Seefeld, Germany. -+ * Author: Martin Schmiedel -+ * Author: Alexander Stein -+ */ -+ -+/dts-v1/; -+ -+#include -+#include -+#include -+#include -+#include "imx8mp-tqma8mpql.dtsi" -+ -+/ { -+ model = "TQ-Systems i.MX8MPlus TQMa8MPxL on MBa8MP-RAS314"; -+ compatible = "tq,imx8mp-tqma8mpql-mba8mp-ras314", "tq,imx8mp-tqma8mpql", "fsl,imx8mp"; -+ chassis-type = "embedded"; -+ -+ chosen { -+ stdout-path = &uart4; -+ }; -+ -+ aliases { -+ mmc0 = &usdhc3; -+ mmc1 = &usdhc2; -+ mmc2 = &usdhc1; -+ rtc0 = &pcf85063; -+ rtc1 = &snvs_rtc; -+ }; -+ -+ /* X8 */ -+ backlight_lvds: backlight { -+ compatible = "pwm-backlight"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_backlight>; -+ pwms = <&pwm2 0 5000000 0>; -+ brightness-levels = <0 4 8 16 32 64 128 255>; -+ default-brightness-level = <7>; -+ power-supply = <®_vcc_12v0>; -+ enable-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>; -+ status = "disabled"; -+ }; -+ -+ /* X7 + X8 */ -+ display: display { -+ /* -+ * Display is not fixed, so compatible has to be added from -+ * DT overlay -+ */ -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_lvdsdisplay>; -+ power-supply = <®_vcc_3v3>; -+ enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; -+ backlight = <&backlight_lvds>; -+ status = "disabled"; -+ }; -+ -+ gpio-leds { -+ compatible = "gpio-leds"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_gpioled>; -+ -+ led-1 { -+ color = ; -+ function = LED_FUNCTION_STATUS; -+ function-enumerator = <0>; -+ gpios = <&gpio4 18 GPIO_ACTIVE_HIGH>; -+ }; -+ -+ led-2 { -+ color = ; -+ function = LED_FUNCTION_STATUS; -+ function-enumerator = <1>; -+ gpios = <&gpio4 19 GPIO_ACTIVE_HIGH>; -+ }; -+ }; -+ -+ hdmi-connector { -+ compatible = "hdmi-connector"; -+ label = "X9"; -+ type = "a"; -+ -+ port { -+ hdmi_connector_in: endpoint { -+ remote-endpoint = <&hdmi_tx_out>; -+ }; -+ }; -+ }; -+ -+ reg_usdhc2_vmmc: regulator-usdhc2 { -+ compatible = "regulator-fixed"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>; -+ regulator-name = "VSD_3V3"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; -+ enable-active-high; -+ startup-delay-us = <100>; -+ off-on-delay-us = <12000>; -+ }; -+ -+ reg_vcc_3v3: regulator-3v3 { -+ compatible = "regulator-fixed"; -+ regulator-name = "V_3V3"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ }; -+ -+ reg_vcc_5v0: regulator-5v0 { -+ compatible = "regulator-fixed"; -+ regulator-name = "V_5V0"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ }; -+ -+ reg_vcc_12v0: regulator-12v0 { -+ compatible = "regulator-fixed"; -+ regulator-name = "V_12V"; -+ regulator-min-microvolt = <12000000>; -+ regulator-max-microvolt = <12000000>; -+ }; -+ -+ reserved-memory { -+ #address-cells = <2>; -+ #size-cells = <2>; -+ ranges; -+ -+ /* global autoconfigured region for contiguous allocations */ -+ linux,cma { -+ compatible = "shared-dma-pool"; -+ reusable; -+ size = <0 0x38000000>; -+ alloc-ranges = <0 0x40000000 0 0xB0000000>; -+ linux,cma-default; -+ }; -+ }; -+ -+ rfkill { -+ compatible = "rfkill-gpio"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_rfkill>; -+ label = "rfkill-pcie-wlan"; -+ radio-type = "wlan"; -+ shutdown-gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>; -+ }; -+ -+ sound { -+ compatible = "fsl,imx-audio-tlv320aic32x4"; -+ model = "tq-mba8mp-ras314"; -+ audio-cpu = <&sai5>; -+ audio-codec = <&tlv320aic3x04>; -+ audio-routing = -+ "IN3_L", "Mic Jack", -+ "Mic Jack", "Mic Bias", -+ "Headphone Jack", "HPL", -+ "Headphone Jack", "HPR"; -+ }; -+}; -+ -+&ecspi3 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_ecspi3>; -+ cs-gpios = <&gpio5 25 GPIO_ACTIVE_LOW>, <&gpio1 6 GPIO_ACTIVE_LOW>; -+ status = "okay"; -+}; -+ -+&eqos { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_eqos>; -+ phy-mode = "rgmii-id"; -+ phy-handle = <ðphy3>; -+ status = "okay"; -+ -+ mdio { -+ compatible = "snps,dwmac-mdio"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ ethphy3: ethernet-phy@3 { -+ compatible = "ethernet-phy-ieee802.3-c22"; -+ reg = <3>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_eqos_phy>; -+ reset-gpios = <&gpio4 2 GPIO_ACTIVE_LOW>; -+ reset-assert-us = <500000>; -+ reset-deassert-us = <50000>; -+ enet-phy-lane-no-swap; -+ interrupt-parent = <&gpio4>; -+ interrupts = <3 IRQ_TYPE_EDGE_FALLING>; -+ ti,rx-internal-delay = ; -+ ti,tx-internal-delay = ; -+ ti,fifo-depth = ; -+ ti,dp83867-rxctrl-strap-quirk; -+ ti,clk-output-sel = ; -+ }; -+ }; -+}; -+ -+&fec { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_fec>; -+ phy-mode = "rgmii-id"; -+ phy-handle = <ðphy0>; -+ fsl,magic-packet; -+ status = "okay"; -+ -+ mdio { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ ethphy0: ethernet-phy@0 { -+ compatible = "ethernet-phy-ieee802.3-c22"; -+ reg = <0>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_fec_phy>; -+ reset-gpios = <&gpio4 0 GPIO_ACTIVE_LOW>; -+ reset-assert-us = <500000>; -+ reset-deassert-us = <50000>; -+ enet-phy-lane-no-swap; -+ interrupt-parent = <&gpio4>; -+ interrupts = <1 IRQ_TYPE_EDGE_FALLING>; -+ ti,rx-internal-delay = ; -+ ti,tx-internal-delay = ; -+ ti,fifo-depth = ; -+ ti,dp83867-rxctrl-strap-quirk; -+ ti,clk-output-sel = ; -+ }; -+ }; -+}; -+ -+&gpio1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_gpio1>; -+ -+ gpio-line-names = "WIFI_PMIC_EN", "LVDS_RESET#", "", "", -+ "", "", "GPIO8", "", -+ "", "", "", "", -+ "", "", "GPIO12", "GPIO13", -+ "", "", "", "", -+ "", "", "", "", -+ "", "", "", "", -+ "", "", "", ""; -+ -+ wifi-pmic-en-hog { -+ gpio-hog; -+ gpios = <0 0>; -+ output-high; -+ line-name = "WIFI_PMIC_EN"; -+ }; -+}; -+ -+&gpio2 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_gpio2>; -+ -+ gpio-line-names = "GPIO22", "GPIO23", "GPIO24", "GPIO25", -+ "GPIO26", "GPIO27", "CAM_GPIO1", "CAM_GPIO2", -+ "", "", "GPIO1", "GPIO0", -+ "", "", "", "", -+ "", "", "", "", -+ "", "", "", "", -+ "", "", "", "", -+ "", "", "", ""; -+}; -+ -+&gpio3 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_gpio3>; -+ -+ gpio-line-names = "", "", "", "", -+ "", "", "", "", -+ "", "", "", "", -+ "", "", "", "", -+ "", "", "", "", -+ "TEMP_EVENT#", "", "", "", -+ "", "", "", "", -+ "", "", "", ""; -+}; -+ -+&gpio4 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_gpio4>; -+ -+ gpio-line-names = "", "", "", "", -+ "", "", "", "", -+ "", "", "", "", -+ "", "", "", "", -+ "", "", "", "", -+ "HDMI_OC#", "GPIO14", "GPIO15", "GPIO16", -+ "GPIO17", "PCIE_WAKE#", "GPIO19", "GPIO20", -+ "PCIE_PERST#", "", "", ""; -+ -+ pewake-hog { -+ gpio-hog; -+ gpios = <25 0>; -+ input; -+ line-name = "PCIE_WAKE#"; -+ }; -+}; -+ -+&gpio5 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_gpio5>, <&pinctrl_gpt1_gpio>, -+ <&pinctrl_gpt2_gpio>, <&pinctrl_gpt3_gpio>; -+ -+ gpio-line-names = "", "GPIO18", "", "GPIO3", -+ "GPIO2", "GPIO21", "", "", -+ "", "", "", "", -+ "", "", "", "", -+ "", "", "GPIO5", "GPIO6", -+ "", "", "GPIO11", "GPIO10", -+ "GPIO9", "GPIO7", "", "GPIO4", -+ "", "", "", ""; -+}; -+ -+&gpt1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_gpt1>; -+ status = "disabled"; -+}; -+ -+&gpt2 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_gpt2>; -+ status = "disabled"; -+}; -+ -+&gpt3 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_gpt3>; -+ status = "disabled"; -+}; -+ -+&hdmi_pvi { -+ status = "okay"; -+}; -+ -+&hdmi_tx { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_hdmi>; -+ status = "okay"; -+ -+ ports { -+ port@1 { -+ hdmi_tx_out: endpoint { -+ remote-endpoint = <&hdmi_connector_in>; -+ }; -+ }; -+ }; -+}; -+ -+&hdmi_tx_phy { -+ status = "okay"; -+}; -+ -+/* X5 + X6 Camera & Display interface */ -+&i2c2 { -+ clock-frequency = <384000>; -+ pinctrl-names = "default", "gpio"; -+ pinctrl-0 = <&pinctrl_i2c2>; -+ pinctrl-1 = <&pinctrl_i2c2_gpio>; -+ scl-gpios = <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; -+ sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; -+ status = "okay"; -+}; -+ -+/* X1 ID_I2C */ -+&i2c3 { -+ clock-frequency = <384000>; -+ pinctrl-names = "default", "gpio"; -+ pinctrl-0 = <&pinctrl_i2c3>; -+ pinctrl-1 = <&pinctrl_i2c3_gpio>; -+ scl-gpios = <&gpio2 10 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; -+ sda-gpios = <&gpio2 11 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; -+ status = "okay"; -+}; -+ -+&i2c4 { -+ clock-frequency = <384000>; -+ pinctrl-names = "default", "gpio"; -+ pinctrl-0 = <&pinctrl_i2c4>; -+ pinctrl-1 = <&pinctrl_i2c4_gpio>; -+ scl-gpios = <&gpio5 12 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; -+ sda-gpios = <&gpio5 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; -+ status = "okay"; -+ -+ tlv320aic3x04: audio-codec@18 { -+ compatible = "ti,tlv320aic32x4"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_tlv320aic3x04>; -+ reg = <0x18>; -+ clock-names = "mclk"; -+ clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI5_MCLK1>; -+ reset-gpios = <&gpio5 11 GPIO_ACTIVE_LOW>; -+ iov-supply = <®_vcc_3v3>; -+ ldoin-supply = <®_vcc_3v3>; -+ }; -+}; -+ -+/* X1 I2C */ -+&i2c5 { -+ clock-frequency = <384000>; -+ pinctrl-names = "default", "gpio"; -+ pinctrl-0 = <&pinctrl_i2c5>; -+ pinctrl-1 = <&pinctrl_i2c5_gpio>; -+ scl-gpios = <&gpio5 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; -+ sda-gpios = <&gpio5 4 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; -+ status = "okay"; -+}; -+ -+/* X1 I2C on GPIO24/GPIO25 */ -+&i2c6 { -+ clock-frequency = <384000>; -+ pinctrl-names = "default", "gpio"; -+ pinctrl-0 = <&pinctrl_i2c6>; -+ pinctrl-1 = <&pinctrl_i2c6_gpio>; -+ scl-gpios = <&gpio2 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; -+ sda-gpios = <&gpio2 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; -+ status = "disabled"; -+}; -+ -+&lcdif3 { -+ status = "okay"; -+}; -+ -+&pcf85063 { -+ /* RTC_EVENT# is connected on MBa8MP-RAS314 */ -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pcf85063>; -+ interrupt-parent = <&gpio3>; -+ interrupts = <19 IRQ_TYPE_EDGE_FALLING>; -+}; -+ -+&pcie_phy { -+ clocks = <&hsio_blk_ctrl>; -+ clock-names = "ref"; -+ fsl,refclk-pad-mode = ; -+ status = "okay"; -+}; -+ -+&pcie { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pcie>; -+ reset-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>; -+ status = "okay"; -+}; -+ -+&pwm2 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pwm2>; -+ status = "disabled"; -+}; -+ -+&pwm3 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pwm3>; -+ status = "okay"; -+}; -+ -+&pwm4 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pwm4>; -+ status = "okay"; -+}; -+ -+&sai5 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_sai5>; -+ assigned-clocks = <&clk IMX8MP_CLK_SAI5>; -+ assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>; -+ assigned-clock-rates = <12288000>; -+ fsl,sai-mclk-direction-output; -+ status = "okay"; -+}; -+ -+&snvs_pwrkey { -+ status = "okay"; -+}; -+ -+/* X1 UART1 */ -+&uart1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart1>; -+ uart-has-rtscts; -+ assigned-clocks = <&clk IMX8MP_CLK_UART1>; -+ assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>; -+ status = "okay"; -+}; -+ -+&uart2 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart2>; -+ uart-has-rtscts; -+ assigned-clocks = <&clk IMX8MP_CLK_UART2>; -+ assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>; -+ status = "okay"; -+ -+ bluetooth { -+ compatible = "nxp,88w8987-bt"; -+ }; -+}; -+ -+&uart3 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart3>; -+ assigned-clocks = <&clk IMX8MP_CLK_UART3>; -+ assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>; -+ status = "okay"; -+}; -+ -+&uart4 { -+ /* console */ -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart4>; -+ status = "okay"; -+}; -+ -+&usb3_0 { -+ fsl,disable-port-power-control; -+ status = "okay"; -+}; -+ -+&usb3_1 { -+ fsl,disable-port-power-control; -+ fsl,permanently-attached; -+ status = "okay"; -+}; -+ -+&usb3_phy0 { -+ vbus-supply = <®_vcc_5v0>; -+ status = "okay"; -+}; -+ -+&usb3_phy1 { -+ vbus-supply = <®_vcc_5v0>; -+ status = "okay"; -+}; -+ -+&usb_dwc3_0 { -+ dr_mode = "peripheral"; -+ status = "okay"; -+}; -+ -+&usb_dwc3_1 { -+ dr_mode = "host"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_usbhub>; -+ status = "okay"; -+ -+ hub_2_0: hub@1 { -+ compatible = "usb451,8142"; -+ reg = <1>; -+ peer-hub = <&hub_3_0>; -+ reset-gpios = <&gpio5 26 GPIO_ACTIVE_LOW>; -+ vdd-supply = <®_vcc_3v3>; -+ }; -+ -+ hub_3_0: hub@2 { -+ compatible = "usb451,8140"; -+ reg = <2>; -+ peer-hub = <&hub_2_0>; -+ reset-gpios = <&gpio5 26 GPIO_ACTIVE_LOW>; -+ vdd-supply = <®_vcc_3v3>; -+ }; -+}; -+ -+/* X1 SD card on GPIO22-GPIO27 */ -+&usdhc1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_usdhc1>; -+ disable-wp; -+ bus-width = <4>; -+ status = "disabled"; -+}; -+ -+&usdhc2 { -+ pinctrl-names = "default", "state_100mhz", "state_200mhz"; -+ pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; -+ pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; -+ pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; -+ cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; -+ vmmc-supply = <®_usdhc2_vmmc>; -+ no-mmc; -+ no-sdio; -+ disable-wp; -+ bus-width = <4>; -+ status = "okay"; -+}; -+ -+&iomuxc { -+ pinctrl_backlight: backlightgrp { -+ fsl,pins = ; -+ }; -+ -+ pinctrl_ecspi3: ecspi3grp { -+ fsl,pins = , -+ , -+ , -+ , -+ ; -+ }; -+ -+ pinctrl_ecspi3_gpio: ecspi3gpiogrp { -+ fsl,pins = , -+ , -+ , -+ , -+ ; -+ }; -+ -+ pinctrl_eqos: eqosgrp { -+ fsl,pins = , -+ , -+ , -+ , -+ , -+ , -+ , -+ , -+ , -+ , -+ , -+ , -+ , -+ ; -+ }; -+ -+ pinctrl_eqos_phy: eqosphygrp { -+ fsl,pins = , -+ ; -+ }; -+ -+ pinctrl_fec: fecgrp { -+ fsl,pins = , -+ , -+ , -+ , -+ , -+ , -+ , -+ , -+ , -+ , -+ , -+ , -+ , -+ ; -+ }; -+ -+ pinctrl_fec_phy: fecphygrp { -+ fsl,pins = , -+ ; -+ }; -+ -+ pinctrl_gpioled: gpioledgrp { -+ fsl,pins = , -+ ; -+ }; -+ -+ pinctrl_gpio1: gpio1grp { -+ fsl,pins = , -+ ; -+ }; -+ -+ pinctrl_gpio2: gpio2grp { -+ fsl,pins = , -+ , -+ , -+ , -+ , -+ , -+ , -+ ; -+ }; -+ -+ pinctrl_gpio3: gpio3grp { -+ fsl,pins = ; -+ }; -+ -+ pinctrl_gpio4: gpio4grp { -+ fsl,pins = , -+ /* PCIE_WAKE# */ -+ , -+ , -+ ; -+ }; -+ -+ pinctrl_gpio5: gpio5grp { -+ fsl,pins = , -+ ; -+ }; -+ -+ pinctrl_hdmi: hdmigrp { -+ fsl,pins = , -+ , -+ , -+ ; -+ }; -+ -+ pinctrl_gpt1: gpt1grp { -+ fsl,pins = ; -+ }; -+ -+ pinctrl_gpt1_gpio: gpt1gpiogrp { -+ fsl,pins = ; -+ }; -+ -+ pinctrl_gpt2: gpt2grp { -+ fsl,pins = ; -+ }; -+ -+ pinctrl_gpt2_gpio: gpt2gpiogrp { -+ fsl,pins = ; -+ }; -+ -+ pinctrl_gpt3: gpt3grp { -+ fsl,pins = ; -+ }; -+ -+ pinctrl_gpt3_gpio: gpt3gpiogrp { -+ fsl,pins = ; -+ }; -+ -+ pinctrl_i2c2: i2c2grp { -+ fsl,pins = , -+ ; -+ }; -+ -+ pinctrl_i2c2_gpio: i2c2-gpiogrp { -+ fsl,pins = , -+ ; -+ }; -+ -+ pinctrl_i2c3: i2c3grp { -+ fsl,pins = , -+ ; -+ }; -+ -+ pinctrl_i2c3_gpio: i2c3-gpiogrp { -+ fsl,pins = , -+ ; -+ }; -+ -+ pinctrl_i2c4: i2c4grp { -+ fsl,pins = , -+ ; -+ }; -+ -+ pinctrl_i2c4_gpio: i2c4-gpiogrp { -+ fsl,pins = , -+ ; -+ }; -+ -+ pinctrl_i2c5: i2c5grp { -+ fsl,pins = , -+ ; -+ }; -+ -+ pinctrl_i2c5_gpio: i2c5-gpiogrp { -+ fsl,pins = , -+ ; -+ }; -+ -+ pinctrl_i2c6: i2c6grp { -+ fsl,pins = , -+ ; -+ }; -+ -+ pinctrl_i2c6_gpio: i2c6-gpiogrp { -+ fsl,pins = , -+ ; -+ }; -+ -+ pinctrl_pcf85063: pcf85063grp { -+ fsl,pins = ; -+ }; -+ -+ pinctrl_pcie: pciegrp { -+ fsl,pins = , -+ ; -+ }; -+ -+ pinctrl_lvdsdisplay: lvdsdisplaygrp { -+ fsl,pins = ; -+ }; -+ -+ pinctrl_pwm2: pwm2grp { -+ fsl,pins = ; -+ }; -+ -+ pinctrl_pwm3: pwm3grp { -+ fsl,pins = ; -+ }; -+ -+ pinctrl_pwm3_gpio: pwm3grpiogrp { -+ fsl,pins = ; -+ }; -+ -+ pinctrl_pwm4: pwm4grp { -+ fsl,pins = ; -+ }; -+ -+ pinctrl_pwm4_gpio: pwm4grpiogrp { -+ fsl,pins = ; -+ }; -+ -+ pinctrl_rfkill: rfkillgrp { -+ fsl,pins = ; -+ }; -+ -+ pinctrl_sai5: sai5grp { -+ fsl,pins = , -+ , -+ , -+ , -+ ; -+ }; -+ -+ pinctrl_tlv320aic3x04: tlv320aic3x04grp { -+ fsl,pins = ; -+ }; -+ -+ pinctrl_uart1: uart1grp { -+ fsl,pins = , -+ , -+ , -+ ; -+ }; -+ -+ pinctrl_uart1_gpio: uart1gpiogrp { -+ fsl,pins = , -+ , -+ , -+ ; -+ }; -+ -+ pinctrl_uart2: uart2grp { -+ fsl,pins = , -+ , -+ , -+ ; -+ }; -+ -+ pinctrl_uart3: uart3grp { -+ fsl,pins = , -+ ; -+ }; -+ -+ pinctrl_uart4: uart4grp { -+ fsl,pins = , -+ ; -+ }; -+ -+ pinctrl_usbhub: usbhubgrp { -+ fsl,pins = ; -+ }; -+ -+ pinctrl_usdhc1: usdhc1grp { -+ fsl,pins = , -+ , -+ , -+ , -+ , -+ ; -+ }; -+ -+ pinctrl_usdhc2: usdhc2grp { -+ fsl,pins = , -+ , -+ , -+ , -+ , -+ , -+ ; -+ }; -+ -+ pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { -+ fsl,pins = , -+ , -+ , -+ , -+ , -+ , -+ ; -+ }; -+ -+ pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { -+ fsl,pins = , -+ , -+ , -+ , -+ , -+ , -+ ; -+ }; -+ -+ pinctrl_usdhc2_gpio: usdhc2-gpiogrp { -+ fsl,pins = ; -+ }; -+}; --- -2.34.1 -