|
| 1 | +From e2ac8e7fddb7ca0a18a7466bf2dc37547ec72d30 Mon Sep 17 00:00:00 2001 |
| 2 | +From: Patrick Yavitz < [email protected]> |
| 3 | +Date: Fri, 3 Oct 2025 15:54:47 -0400 |
| 4 | +Subject: [PATCH] SpacemiT: K1-X: Forward port 6.6.y DTSI |
| 5 | + |
| 6 | +Signed-off-by: Patrick Yavitz < [email protected]> |
| 7 | +--- |
| 8 | + arch/riscv/boot/dts/spacemit/k1-x.dtsi | 66 ++++++++++++++++++++++---- |
| 9 | + 1 file changed, 58 insertions(+), 8 deletions(-) |
| 10 | + |
| 11 | +diff --git a/arch/riscv/boot/dts/spacemit/k1-x.dtsi b/arch/riscv/boot/dts/spacemit/k1-x.dtsi |
| 12 | +index 8f411e7f01f3..24366372e064 100644 |
| 13 | +--- a/arch/riscv/boot/dts/spacemit/k1-x.dtsi |
| 14 | ++++ b/arch/riscv/boot/dts/spacemit/k1-x.dtsi |
| 15 | +@@ -430,7 +430,7 @@ rcpu_mem_0: mem@c0800000 { |
| 16 | + }; |
| 17 | + |
| 18 | + /* rcpu's heap */ |
| 19 | +- rcpu_mem_1: mem@30000000 { |
| 20 | ++ rcpu_mem_heap: rcpu_mem_heap@30000000 { |
| 21 | + reg = <0x0 0x30000000 0x0 0x200000>; |
| 22 | + no-map; |
| 23 | + }; |
| 24 | +@@ -465,6 +465,12 @@ rcpu_mem_snapshots: rcpu_mem_snapshots@30300000 { |
| 25 | + reg = <0x0 0x30300000 0x0 0x40000>; |
| 26 | + no-map; |
| 27 | + }; |
| 28 | ++ |
| 29 | ++ /* the dtb file of rcpu */ |
| 30 | ++ rcpu_mem_dtb: rcpu_mem_dtb@30300000 { |
| 31 | ++ reg = <0x0 0x30340000 0x0 0x40000>; |
| 32 | ++ no-map; |
| 33 | ++ }; |
| 34 | + }; |
| 35 | + |
| 36 | + soc: soc { |
| 37 | +@@ -495,13 +501,13 @@ dram_range1: dram_range@1 { |
| 38 | + status = "okay"; |
| 39 | + }; |
| 40 | + |
| 41 | +- /* dram mapping for pcie for ex. */ |
| 42 | ++ /* dram mapping for pcie0 for ex. */ |
| 43 | + dram_range2: dram_range@2 { |
| 44 | + compatible = "spacemit-dram-bus"; |
| 45 | + #address-cells = <2>; |
| 46 | + #size-cells = <2>; |
| 47 | + dma-ranges = <0x0 0x00000000 0x0 0x00000000 0x0 0x80000000>, |
| 48 | +- <0x0 0xb8000000 0x1 0x38000000 0x3 0x48000000>; |
| 49 | ++ <0x0 0x90000000 0x1 0x10000000 0x3 0x70000000>; |
| 50 | + #interconnect-cells = <0>; |
| 51 | + status = "okay"; |
| 52 | + }; |
| 53 | +@@ -539,6 +545,30 @@ dram_range5: dram_range@5 { |
| 54 | + status = "okay"; |
| 55 | + }; |
| 56 | + |
| 57 | ++ /* dram mapping for pcie1 for ex. */ |
| 58 | ++ dram_range6: dram_range@6 { |
| 59 | ++ compatible = "spacemit-dram-bus"; |
| 60 | ++ #address-cells = <2>; |
| 61 | ++ #size-cells = <2>; |
| 62 | ++ dma-ranges = <0x0 0x00000000 0x0 0x00000000 0x0 0x80000000>, |
| 63 | ++ <0x0 0x80000000 0x1 0x00000000 0x0 0x10000000>, |
| 64 | ++ <0x0 0xa0000000 0x1 0x20000000 0x3 0x60000000>; |
| 65 | ++ #interconnect-cells = <0>; |
| 66 | ++ status = "okay"; |
| 67 | ++ }; |
| 68 | ++ |
| 69 | ++ /* dram mapping for pcie2 for ex. */ |
| 70 | ++ dram_range7: dram_range@7 { |
| 71 | ++ compatible = "spacemit-dram-bus"; |
| 72 | ++ #address-cells = <2>; |
| 73 | ++ #size-cells = <2>; |
| 74 | ++ dma-ranges = <0x0 0x00000000 0x0 0x00000000 0x0 0x80000000>, |
| 75 | ++ <0x0 0x80000000 0x1 0x00000000 0x0 0x20000000>, |
| 76 | ++ <0x0 0xb8000000 0x1 0x38000000 0x3 0x48000000>; |
| 77 | ++ #interconnect-cells = <0>; |
| 78 | ++ status = "okay"; |
| 79 | ++ }; |
| 80 | ++ |
| 81 | + clint0: clint@e4000000 { |
| 82 | + compatible = "riscv,clint0"; |
| 83 | + interrupts-extended = < |
| 84 | +@@ -615,7 +645,8 @@ &cpu7_intc 11 &cpu7_intc 9 |
| 85 | + pinctrl: pinctrl@d401e000 { |
| 86 | + compatible = "pinconf-single-aib"; |
| 87 | + reg = <0x0 0xd401e000 0x0 0x250>, |
| 88 | +- <0x0 0xd4019800 0x0 0x10>; |
| 89 | ++ <0x0 0xd4019800 0x0 0x10>, |
| 90 | ++ <0x0 0xd4019000 0x0 0x800>; |
| 91 | + #address-cells = <1>; |
| 92 | + #size-cells = <1>; |
| 93 | + #pinctrl-cells = <2>; |
| 94 | +@@ -1398,8 +1429,8 @@ ri2c0: ri2c@c0887000 { |
| 95 | + spacemit,i2c-wcr = <0x142a>; |
| 96 | + /* apb clock: 26MHz or 52MHz */ |
| 97 | + spacemit,apb_clock = <52000000>; |
| 98 | +- power-domains = <&power K1X_PMU_BUS_PWR_DOMAIN>; |
| 99 | +- cpuidle,pm-runtime,sleep; |
| 100 | ++ power-domains = <&power K1X_PMU_BUS_PWR_DOMAIN>; |
| 101 | ++ cpuidle,pm-runtime,sleep; |
| 102 | + interconnects = <&dram_range4>; |
| 103 | + interconnect-names = "dma-mem"; |
| 104 | + status = "okay"; |
| 105 | +@@ -1865,6 +1896,17 @@ gcb3: gpio3 { |
| 106 | + }; |
| 107 | + }; |
| 108 | + |
| 109 | ++ ec_master: ethercat_master { |
| 110 | ++ compatible = "igh,k1x-ec-master"; |
| 111 | ++ run-on-cpu = <1>; |
| 112 | ++ debug-level = <0>; |
| 113 | ++ master-count = <1>; |
| 114 | ++ ec-devices = <ð0>,<ð1>; |
| 115 | ++ master-indexes = <0>,<0>; |
| 116 | ++ modes = "ec_main","ec_backup"; |
| 117 | ++ status = "disable"; |
| 118 | ++ }; |
| 119 | ++ |
| 120 | + eth0: ethernet@cac80000 { |
| 121 | + compatible = "spacemit,k1x-emac"; |
| 122 | + reg = <0x00000000 0xCAC80000 0x00000000 0x00000420>; |
| 123 | +@@ -2239,7 +2281,7 @@ pcie1_rc: pcie@ca400000 { |
| 124 | + #size-cells = <2>; |
| 125 | + ranges = <0x01000000 0x0 0x9f002000 0 0x9f002000 0x0 0x100000>, |
| 126 | + <0x02000000 0x0 0x90000000 0 0x90000000 0x0 0x0f000000>; |
| 127 | +- interconnects = <&dram_range2>; |
| 128 | ++ interconnects = <&dram_range6>; |
| 129 | + interconnect-names = "dma-mem"; |
| 130 | + |
| 131 | + interrupts = <142>, <146>; |
| 132 | +@@ -2289,7 +2331,7 @@ pcie2_rc: pcie@ca800000 { |
| 133 | + ranges = <0x01000000 0x0 0xb7002000 0 0xb7002000 0x0 0x100000>, |
| 134 | + <0x42000000 0x0 0xa0000000 0 0xa0000000 0x0 0x10000000>, |
| 135 | + <0x02000000 0x0 0xb0000000 0 0xb0000000 0x0 0x7000000>; |
| 136 | +- interconnects = <&dram_range2>; |
| 137 | ++ interconnects = <&dram_range7>; |
| 138 | + interconnect-names = "dma-mem"; |
| 139 | + |
| 140 | + interrupts = <143>, <147>; |
| 141 | +@@ -2486,6 +2528,14 @@ spacemit_crypto_engine@d8600000 { |
| 142 | + status = "okay"; |
| 143 | + }; |
| 144 | + |
| 145 | ++ crng: crng@f0703800 { |
| 146 | ++ compatible = "spacemit,hw_crng"; |
| 147 | ++ reg = <0x0 0xf0703800 0x0 0x100>; |
| 148 | ++ clocks = <&ccu CLK_AES>; |
| 149 | ++ resets = <&reset RESET_AES>; |
| 150 | ++ status = "okay"; |
| 151 | ++ }; |
| 152 | ++ |
| 153 | + efuse: fuse@f0702800 { |
| 154 | + compatible = "simple-mfd"; |
| 155 | + #address-cells = <1>; |
| 156 | +-- |
| 157 | +2.43.0 |
| 158 | + |
0 commit comments