diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index a97609c9fc65..bc2e2eecc147 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -1130,6 +1130,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \ rv1103g-evb-v11.dtb \ rv1103g-evb-v11-sii902x-bt6562hdmi.dtb \ rv1103g-evb2-v10.dtb \ + rv1103g-luckfox-pico-mini.dtb \ rv1103g-rmsl311-dloc-sl-v10.dtb \ rv1103g-scaner-v10.dtb \ rv1106g-38x38-ipc-v10.dtb \ diff --git a/arch/arm/boot/dts/rv1103-luckfox-pico-ipc.dtsi b/arch/arm/boot/dts/rv1103-luckfox-pico-ipc.dtsi new file mode 100755 index 000000000000..6fc24903040c --- /dev/null +++ b/arch/arm/boot/dts/rv1103-luckfox-pico-ipc.dtsi @@ -0,0 +1,406 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2022 Rockchip Electronics Co., Ltd. + */ +#include "rv1106-amp.dtsi" + +/ { + acodec_sound: acodec-sound { + compatible = "simple-audio-card"; + simple-audio-card,name = "rv-acodec"; + simple-audio-card,format = "i2s"; + simple-audio-card,mclk-fs = <256>; + simple-audio-card,cpu { + sound-dai = <&i2s0_8ch>; + }; + simple-audio-card,codec { + sound-dai = <&acodec>; + }; + }; + + vcc_1v8: vcc-1v8 { + compatible = "regulator-fixed"; + regulator-name = "vcc_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + vcc_3v3: vcc-3v3 { + compatible = "regulator-fixed"; + regulator-name = "vcc_3v3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + vdd_arm: vdd-arm { + compatible = "regulator-fixed"; + regulator-name = "vdd_arm"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + regulator-always-on; + regulator-boot-on; + }; + leds: leds { + compatible = "gpio-leds"; + work_led: work{ + gpios = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "activity"; + default-state = "on"; + }; + }; + + // DHT11 + dht11_sensor { + compatible = "dht11"; + pinctrl-names = "default"; + pinctrl-0 = <&gpio1_pc7>; + + dht11@1 { + gpios = <&gpio1 RK_PC7 GPIO_ACTIVE_HIGH>; + label = "dht11"; + linux,default-trigger = "humidity"; + }; + }; +}; + +/***************************** AUDIO ********************************/ +&i2s0_8ch { + #sound-dai-cells = <0>; + status = "okay"; +}; + +&acodec { + #sound-dai-cells = <0>; + pa-ctl-gpios = <&gpio1 RK_PA1 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +/***************************** CPU ********************************/ +&cpu0 { + cpu-supply = <&vdd_arm>; +}; + +/***************************** ADC ********************************/ +&saradc { + status = "okay"; + vref-supply = <&vcc_1v8>; +}; +&tsadc { + status = "okay"; +}; + + +/***************************** USB *********************************/ +&u2phy { + status = "okay"; +}; + +&u2phy_otg { + status = "okay"; +}; + +&usbdrd { + status = "okay"; +}; + +&usbdrd_dwc3 { + extcon = <&u2phy>; + status = "okay"; +}; + +/*****************************CSI ********************************/ +&csi2_dphy_hw { + status = "okay"; +}; + +&csi2_dphy0 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + csi_dphy_input0: endpoint@0 { + reg = <0>; + remote-endpoint = <&sc3336_out>; + data-lanes = <1 2>; + }; + + csi_dphy_input1: endpoint@1 { + reg = <1>; + remote-endpoint = <&sc4336_out>; + data-lanes = <1 2>; + }; + + csi_dphy_input2: endpoint@2 { + reg = <2>; + remote-endpoint = <&sc530ai_out>; + data-lanes = <1 2>; + }; + }; + + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + + csi_dphy_output: endpoint@0 { + reg = <0>; + remote-endpoint = <&mipi_csi2_input>; + }; + }; + }; +}; + +&i2c4 { + status = "okay"; + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c4m2_xfer>; + + sc3336: sc3336@30 { + compatible = "smartsens,sc3336"; + status = "okay"; + reg = <0x30>; + clocks = <&cru MCLK_REF_MIPI0>; + clock-names = "xvclk"; + pwdn-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&mipi_refclk_out0>; + rockchip,camera-module-index = <0>; + rockchip,camera-module-facing = "back"; + rockchip,camera-module-name = "CMK-OT2119-PC1"; + rockchip,camera-module-lens-name = "30IRC-F16"; + port { + sc3336_out: endpoint { + remote-endpoint = <&csi_dphy_input0>; + data-lanes = <1 2>; + }; + }; + }; + + sc4336: sc4336@30 { + compatible = "smartsens,sc4336"; + status = "okay"; + reg = <0x30>; + clocks = <&cru MCLK_REF_MIPI0>; + clock-names = "xvclk"; + pwdn-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&mipi_refclk_out0>; + rockchip,camera-module-index = <0>; + rockchip,camera-module-facing = "back"; + rockchip,camera-module-name = "OT01"; + rockchip,camera-module-lens-name = "40IRC_F16"; + port { + sc4336_out: endpoint { + remote-endpoint = <&csi_dphy_input1>; + data-lanes = <1 2>; + }; + }; + }; + + sc530ai: sc530ai@30 { + compatible = "smartsens,sc530ai"; + status = "okay"; + reg = <0x30>; + clocks = <&cru MCLK_REF_MIPI0>; + clock-names = "xvclk"; + pwdn-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&mipi_refclk_out0>; + rockchip,camera-module-index = <0>; + rockchip,camera-module-facing = "back"; + rockchip,camera-module-name = "CMK-OT2115-PC1"; + rockchip,camera-module-lens-name = "30IRC-F16"; + port { + sc530ai_out: endpoint { + remote-endpoint = <&csi_dphy_input2>; + data-lanes = <1 2>; + }; + }; + }; +}; + +&mipi0_csi2 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + mipi_csi2_input: endpoint@1 { + reg = <1>; + remote-endpoint = <&csi_dphy_output>; + }; + }; + + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + + mipi_csi2_output: endpoint@0 { + reg = <0>; + remote-endpoint = <&cif_mipi_in>; + }; + }; + }; +}; + +&rkcif { + status = "okay"; +}; + +&rkcif_mipi_lvds { + status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&mipi_pins>; + port { + /* MIPI CSI-2 endpoint */ + cif_mipi_in: endpoint { + remote-endpoint = <&mipi_csi2_output>; + }; + }; +}; + +&rkcif_mipi_lvds_sditf { + status = "okay"; + + port { + /* MIPI CSI-2 endpoint */ + mipi_lvds_sditf: endpoint { + remote-endpoint = <&isp_in>; + }; + }; +}; + +&rkisp { + status = "okay"; +}; + +&rkisp_vir0 { + status = "okay"; + + port@0 { + isp_in: endpoint { + remote-endpoint = <&mipi_lvds_sditf>; + }; + }; +}; + + +/***************************** PINCTRL ********************************/ +// SPI +&spi0 { + pinctrl-0 = <&spi0m0_clk &spi0m0_miso &spi0m0_mosi &spi0m0_cs0>; + #address-cells = <1>; + #size-cells = <0>; + + spidev@0 { + compatible = "rockchip,spidev"; + spi-max-frequency = <50000000>; + reg = <0>; + }; + fbtft@0 { + compatible = "sitronix,st7789v"; + reg = <0>; + spi-max-frequency = <20000000>; + fps = <30>; + buswidth = <8>; + debug = <0x7>; + led-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;//BL + dc-gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_HIGH>;//DC + reset-gpios = <&gpio1 RK_PC3 GPIO_ACTIVE_LOW>;//RES + }; +}; +// I2C +&i2c3 { + pinctrl-0 = <&i2c3m1_xfer>; +}; +&i2c0 { + pinctrl-0 = <&i2c0m2_xfer>; +}; +// UART +&uart3 { + pinctrl-0 = <&uart3m1_xfer>; +}; +&uart4 { + pinctrl-0 = <&uart4m1_xfer>; +}; +&uart5 { + pinctrl-0 = <&uart5m0_xfer>; +}; + +// PWM +&pwm0 { + pinctrl-0 = <&pwm0m0_pins &pwm0m1_pins>; +}; +&pwm1 { + pinctrl-0 = <&pwm1m0_pins>; +}; +&pwm2 { + pinctrl-0 = <&pwm2m2_pins>; +}; +&pwm3 { + pinctrl-0 = <&pwm3m2_pins>; +}; +&pwm4 { + pinctrl-0 = <&pwm4m2_pins>; +}; +&pwm5 { + pinctrl-0 = <&pwm5m2_pins>; +}; +&pwm6 { + pinctrl-0 = <&pwm6m2_pins>; +}; +&pwm8 { + pinctrl-0 = <&pwm8m0_pins &pwm8m1_pins>; +}; +&pwm9 { + pinctrl-0 = <&pwm9m0_pins &pwm9m1_pins>; +}; +&pwm10 { + pinctrl-0 = <&pwm10m0_pins &pwm10m1_pins>; +}; +&pwm11 { + pinctrl-0 = <&pwm11m0_pins &pwm11m1_pins>; +}; + +&pinctrl { + spi0 { + spi0m0_clk: spi0m0-clk { + rockchip,pins = <1 RK_PC1 4 &pcfg_pull_none>; + }; + spi0m0_mosi: spi0m0-mosi { + rockchip,pins = <1 RK_PC2 6 &pcfg_pull_none>; + }; + spi0m0_miso: spi0m0-miso { + rockchip,pins = <1 RK_PC3 6 &pcfg_pull_none>; + }; + spi0m0_cs0: spi0m0-cs0 { + rockchip,pins = <1 RK_PC0 4 &pcfg_pull_none>; + }; + }; + + gpio1-pc7 { + gpio1_pc7: gpio1-pc7 { + rockchip,pins = <1 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; diff --git a/arch/arm/boot/dts/rv1103g-luckfox-pico-mini.dts b/arch/arm/boot/dts/rv1103g-luckfox-pico-mini.dts new file mode 100755 index 000000000000..2fef5ff93baa --- /dev/null +++ b/arch/arm/boot/dts/rv1103g-luckfox-pico-mini.dts @@ -0,0 +1,91 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2023 Luckfox Electronics Co., Ltd. + */ + +/dts-v1/; + +#include "rv1103.dtsi" +#include "rv1106-evb.dtsi" +#include "rv1103-luckfox-pico-ipc.dtsi" + +/ { + model = "Luckfox Pico Mini"; + compatible = "rockchip,rv1103g-38x38-ipc-v10", "rockchip,rv1103"; +}; + +/**********SFC**********/ +&sfc { + status = "okay"; + flash@0 { + compatible = "spi-nand"; + reg = <0>; + spi-max-frequency = <75000000>; + spi-rx-bus-width = <4>; + spi-tx-bus-width = <1>; + }; +}; + +/**********SDMMC**********/ +&sdmmc { + max-frequency = <50000000>; + no-mmc; + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + disable-wp; + + //sdio + cap-sdio-irq; + non-removable; + no-1-8-v; + supports-sdio; + + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_det &sdmmc0_bus4>; + status = "okay"; +}; + +/**********ETH**********/ +&gmac { + status = "okay"; +}; + +/**********USB**********/ +&usbdrd_dwc3 { + status = "okay"; + dr_mode = "host"; +}; + +/**********SPI**********/ +/* SPI0_M0 */ +&spi0 { + status = "okay"; + spidev@0 { + spi-max-frequency = <2000000>; + }; +}; + +/**********I2C**********/ +/* I2C3_M1 */ +&i2c3 { + status = "okay"; + clock-frequency = <100000>; +}; + +/**********UART**********/ +/* UART3_M1 */ +&uart3 { + status = "okay"; +}; + +/* UART4_M1 */ +&uart4 { + status = "okay"; +}; + +/**********PWM**********/ +/* PWM1_M0 */ +&pwm1 { + status = "disabled"; +}; diff --git a/arch/arm/boot/dts/rv1106.dtsi b/arch/arm/boot/dts/rv1106.dtsi index e717c2b972f7..7aee0df97dda 100644 --- a/arch/arm/boot/dts/rv1106.dtsi +++ b/arch/arm/boot/dts/rv1106.dtsi @@ -20,6 +20,18 @@ interrupt-parent = <&gic>; + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + /* OP-TEE secure RAM */ + optee@3d00000 { + reg = <0x03d00000 0x00300000>; /* 3 MiB: 0x03D00000..0x04000000 */ + no-map; /* prevent the kernel from using this memory region */ + }; + }; + aliases { csi2dphy0 = &csi2_dphy0; csi2dphy1 = &csi2_dphy1;