From e063b4a7c15cc877e251c6106029179ee8fbd467 Mon Sep 17 00:00:00 2001 From: MCUdude Date: Mon, 24 Jul 2023 18:44:34 +0200 Subject: [PATCH 01/19] Fix incorrect sernum offset --- src/avrdude.conf.in | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/avrdude.conf.in b/src/avrdude.conf.in index 6509854ae..fc3faed53 100644 --- a/src/avrdude.conf.in +++ b/src/avrdude.conf.in @@ -18568,7 +18568,7 @@ part memory "sernum" size = 10; - offset = 0x1104; + offset = 0x1103; readsize = 1; ; From 6d8598e009b3c86e640bc56644f7a05fe8360fee Mon Sep 17 00:00:00 2001 From: MCUdude Date: Mon, 24 Jul 2023 21:10:17 +0200 Subject: [PATCH 02/19] Add syscfg_base --- src/avrdude.conf.in | 3 +++ src/config.c | 1 + src/developer_opts.c | 1 + src/doc/avrdude.texi | 1 + src/lexer.l | 2 +- src/libavrdude.h | 3 +++ 6 files changed, 10 insertions(+), 1 deletion(-) diff --git a/src/avrdude.conf.in b/src/avrdude.conf.in index fc3faed53..3abf8937d 100644 --- a/src/avrdude.conf.in +++ b/src/avrdude.conf.in @@ -155,6 +155,7 @@ # mcu_base = ; # MCU control block in ATxmega devices # nvm_base = ; # NVM controller in ATxmega devices # ocd_base = ; # OCD module in AVR8X/UPDI devices +# syscfg_base = ; # Chip revision ID in AVR8X/UPDI devices # ocdrev = ; # JTAGICE3 parameter from ATDF files # pgm_enable = ; # chip_erase = ; @@ -18445,6 +18446,7 @@ part boot_section_size = 256; nvm_base = 0x1000; ocd_base = 0x0f80; + syscfg_base = 0x0f00; memory "fuse0" size = 1; @@ -20640,6 +20642,7 @@ part hvupdi_variant = 1; nvm_base = 0x1000; ocd_base = 0x0f80; + syscfg_base = 0x0f00; memory "fuse0" size = 1; diff --git a/src/config.c b/src/config.c index a3ba6ad55..9cf14b607 100644 --- a/src/config.c +++ b/src/config.c @@ -130,6 +130,7 @@ Component_t avr_comp[] = { part_comp_desc(mcu_base, COMP_INT), part_comp_desc(nvm_base, COMP_INT), part_comp_desc(ocd_base, COMP_INT), + part_comp_desc(syscfg_base, COMP_INT), part_comp_desc(ocdrev, COMP_INT), part_comp_desc(autobaud_sync, COMP_CHAR), diff --git a/src/developer_opts.c b/src/developer_opts.c index 124791d8b..5f60784a4 100644 --- a/src/developer_opts.c +++ b/src/developer_opts.c @@ -788,6 +788,7 @@ static void dev_part_strct(const AVRPART *p, bool tsv, const AVRPART *base, bool _if_partout(intcmp, "0x%04x", mcu_base); _if_partout(intcmp, "0x%04x", nvm_base); _if_partout(intcmp, "0x%04x", ocd_base); + _if_partout(intcmp, "0x%04x", syscfg_base); _if_partout(intcmp, "%d", ocdrev); _if_partout(intcmp, "0x%02x", autobaud_sync); diff --git a/src/doc/avrdude.texi b/src/doc/avrdude.texi index ecbcd58d8..8998f0e2a 100644 --- a/src/doc/avrdude.texi +++ b/src/doc/avrdude.texi @@ -2920,6 +2920,7 @@ part mcu_base = ; # MCU control block in ATxmega devices nvm_base = ; # NVM controller in ATxmega devices ocd_base = ; # OCD module in AVR8X/UPDI devices + syscfg_base = ; # Chip revision ID in AVR8X/UPDI devices ocdrev = ; # JTAGICE3 parameter from ATDF files pgm_enable = ; chip_erase = ; diff --git a/src/lexer.l b/src/lexer.l index 6e4323cc4..dc21164e3 100644 --- a/src/lexer.l +++ b/src/lexer.l @@ -154,7 +154,7 @@ INF [Ii][Nn][Ff]([Ii][Nn][Ii][Tt][Yy])? timeout | stabdelay | cmdexedelay | synchloops | bytedelay | pollindex | pollvalue | predelay | postdelay | pollmethod | hventerstabdelay | progmodedelay | latchcycles | togglevtg | poweroffdelay | resetdelayms | resetdelayus | resetdelay | hvleavestabdelay | chiperasetime | (chiperase|program(fuse|lock))(polltimeout|pulsewidth) | synchcycles | hvspcmdexedelay | - mcu_base | nvm_base | ocd_base | ocdrev | + mcu_base | nvm_base | ocd_base | syscfg_base | ocdrev | autobaud_sync | idr | rampz | spmcr | eecr | eind | paged | size | num_pages | initval | bitmask | n_word_writes | offset | min_write_delay | max_write_delay | pwroff_after_write | readback_p1 | readback_p2 | mode | delay | blocksize | readsize ) { diff --git a/src/libavrdude.h b/src/libavrdude.h index a0b540051..9685a1740 100644 --- a/src/libavrdude.h +++ b/src/libavrdude.h @@ -220,6 +220,7 @@ typedef struct opcode { #define AVR_FAMILYIDLEN 7 #define AVR_SIBLEN 16 +#define AVR_CHIP_REVLEN 1 #define CTL_STACK_SIZE 32 #define FLASH_INSTR_SIZE 3 #define EEPROM_INSTR_SIZE 20 @@ -307,6 +308,7 @@ typedef struct avrpart { unsigned int mcu_base; /* Base address of MCU control block in ATxmega devices */ unsigned int nvm_base; /* Base address of NVM controller in ATxmega devices */ unsigned int ocd_base; /* Base address of OCD module in AVR8X/UPDI devices */ + unsigned int syscfg_base; /* Base address of revision ID in AVR8X/UPDI devices */ int ocdrev; /* OCD revision (JTAGICE3 parameter, from AS6 XML files) */ /* Bootloader paramater */ @@ -809,6 +811,7 @@ typedef struct programmer_t { unsigned long addr, unsigned char *value); int (*read_sig_bytes) (const struct programmer_t *pgm, const AVRPART *p, const AVRMEM *m); int (*read_sib) (const struct programmer_t *pgm, const AVRPART *p, char *sib); + int (*read_chip_rev) (const struct programmer_t *pgm, const AVRPART *p, char *chip_rev); int (*term_keep_alive)(const struct programmer_t *pgm, const AVRPART *p); void (*print_parms) (const struct programmer_t *pgm, FILE *fp); int (*set_vtarget) (const struct programmer_t *pgm, double v); From b6aee3bf726138e84c6d2779347bf539ff8b940d Mon Sep 17 00:00:00 2001 From: MCUdude Date: Mon, 24 Jul 2023 21:13:11 +0200 Subject: [PATCH 03/19] Add chip revision readout to jtag3.c --- src/jtag3.c | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/src/jtag3.c b/src/jtag3.c index deafaf383..f29dc2b04 100644 --- a/src/jtag3.c +++ b/src/jtag3.c @@ -1421,6 +1421,11 @@ static int jtag3_initialize(const PROGRAMMER *pgm, const AVRPART *p) { /* Partial Family_ID has been returned */ pmsg_notice("partial Family_ID returned: \"%c%c%c%c\"\n", resp[3], resp[4], resp[5], resp[6]); + + // Read chip silicon revision + char chip_rev[AVR_CHIP_REVLEN] = {0}; + pgm->read_chip_rev(pgm, p, chip_rev); + pmsg_info("chip silicon revision: %x.%x\n", chip_rev[0] >> 4, chip_rev[0] & 0x0f); } else /* JTAG ID has been returned */ @@ -2480,6 +2485,27 @@ int jtag3_read_sib(const PROGRAMMER *pgm, const AVRPART *p, char *sib) { return 0; } +int jtag3_read_chip_rev(const PROGRAMMER *pgm, const AVRPART *p, char *chip_rev) { + int status; + unsigned char cmd[12]; + unsigned char *resp = NULL; + + cmd[0] = SCOPE_AVR; + cmd[1] = CMD3_READ_MEMORY; + cmd[2] = 0; + cmd[3] = MTYPE_SRAM; + u32_to_b4(cmd + 4, p->syscfg_base + 1); + u32_to_b4(cmd + 8, AVR_CHIP_REVLEN); + + if ((status = jtag3_command(pgm, cmd, 12, &resp, "read chip rev")) < 0) + return status; + + memcpy(chip_rev, resp+3, AVR_CHIP_REVLEN); + pmsg_debug("jtag3_read_chip_rev(): received chip revision: %d\n", *chip_rev); + free(resp); + return 0; +} + int jtag3_set_vtarget(const PROGRAMMER *pgm, double v) { unsigned uaref, utarg; unsigned char buf[2]; @@ -3290,6 +3316,7 @@ void jtag3_updi_initpgm(PROGRAMMER *pgm) { pgm->flag = PGM_FL_IS_UPDI; pgm->unlock = jtag3_unlock_erase_key; pgm->read_sib = jtag3_read_sib; + pgm->read_chip_rev = jtag3_read_chip_rev; /* * hardware dependent functions From a586c6b57700169e91d7bad8bf9ad2a2cff4304d Mon Sep 17 00:00:00 2001 From: MCUdude Date: Mon, 24 Jul 2023 21:23:07 +0200 Subject: [PATCH 04/19] Only print chip revision in verbose mode --- src/jtag3.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/jtag3.c b/src/jtag3.c index f29dc2b04..5a4d16e6b 100644 --- a/src/jtag3.c +++ b/src/jtag3.c @@ -1425,7 +1425,7 @@ static int jtag3_initialize(const PROGRAMMER *pgm, const AVRPART *p) { // Read chip silicon revision char chip_rev[AVR_CHIP_REVLEN] = {0}; pgm->read_chip_rev(pgm, p, chip_rev); - pmsg_info("chip silicon revision: %x.%x\n", chip_rev[0] >> 4, chip_rev[0] & 0x0f); + pmsg_notice("chip silicon revision: %x.%x\n", chip_rev[0] >> 4, chip_rev[0] & 0x0f); } else /* JTAG ID has been returned */ From 90cc0075a75d5ee93352e2f14a397b2d1fe8d264 Mon Sep 17 00:00:00 2001 From: MCUdude Date: Mon, 24 Jul 2023 21:57:51 +0200 Subject: [PATCH 05/19] Minor formatting and grammar --- src/jtag3.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/jtag3.c b/src/jtag3.c index 5a4d16e6b..e895ea006 100644 --- a/src/jtag3.c +++ b/src/jtag3.c @@ -1423,9 +1423,9 @@ static int jtag3_initialize(const PROGRAMMER *pgm, const AVRPART *p) { resp[3], resp[4], resp[5], resp[6]); // Read chip silicon revision - char chip_rev[AVR_CHIP_REVLEN] = {0}; + char chip_rev[AVR_CHIP_REVLEN]; pgm->read_chip_rev(pgm, p, chip_rev); - pmsg_notice("chip silicon revision: %x.%x\n", chip_rev[0] >> 4, chip_rev[0] & 0x0f); + pmsg_notice("silicon revision: %x.%x\n", chip_rev[0] >> 4, chip_rev[0] & 0x0f); } else /* JTAG ID has been returned */ @@ -2501,7 +2501,7 @@ int jtag3_read_chip_rev(const PROGRAMMER *pgm, const AVRPART *p, char *chip_rev) return status; memcpy(chip_rev, resp+3, AVR_CHIP_REVLEN); - pmsg_debug("jtag3_read_chip_rev(): received chip revision: %d\n", *chip_rev); + pmsg_debug("jtag3_read_chip_rev(): received chip revision: 0x%02x\n", *chip_rev); free(resp); return 0; } From 419707b130d15d4e9f6508a3cd64eb60ca654825 Mon Sep 17 00:00:00 2001 From: MCUdude Date: Mon, 24 Jul 2023 22:01:14 +0200 Subject: [PATCH 06/19] Tweak debug print message --- src/jtag3.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/jtag3.c b/src/jtag3.c index e895ea006..a8dcd0e2c 100644 --- a/src/jtag3.c +++ b/src/jtag3.c @@ -2501,7 +2501,7 @@ int jtag3_read_chip_rev(const PROGRAMMER *pgm, const AVRPART *p, char *chip_rev) return status; memcpy(chip_rev, resp+3, AVR_CHIP_REVLEN); - pmsg_debug("jtag3_read_chip_rev(): received chip revision: 0x%02x\n", *chip_rev); + pmsg_debug("jtag3_read_chip_rev(): received chip silicon revision: 0x%02x\n", *chip_rev); free(resp); return 0; } From fab54b7abbaa2ac869805c5946b2f2549f08c80a Mon Sep 17 00:00:00 2001 From: MCUdude Date: Mon, 24 Jul 2023 22:02:42 +0200 Subject: [PATCH 07/19] Add chip revision readout to jtagmkII --- src/jtagmkII.c | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/src/jtagmkII.c b/src/jtagmkII.c index 89aa1b396..89215145f 100644 --- a/src/jtagmkII.c +++ b/src/jtagmkII.c @@ -1353,6 +1353,12 @@ static int jtagmkII_initialize(const PROGRAMMER *pgm, const AVRPART *p) { "single-byte EEPROM updates not possible\n"); } + if (pgm->read_chip_rev) { + char chip_rev[AVR_CHIP_REVLEN]; + pgm->read_chip_rev(pgm, p, chip_rev); + pmsg_notice("silicon revision: %x.%x\n", chip_rev[0] >> 4, chip_rev[0] & 0x0f); + } + return 0; } @@ -2129,6 +2135,31 @@ static int jtagmkII_paged_load(const PROGRAMMER *pgm, const AVRPART *p, const AV return n_bytes; } +static int jtagmkII_read_chip_rev(const PROGRAMMER *pgm, const AVRPART *p, char *chip_rev) { + unsigned char cmd[10]; + unsigned char *resp; + int status; + + pmsg_notice2("jtagmkII_read_chip_rev()"); + + cmd[0] = CMND_READ_MEMORY; + cmd[1] = MTYPE_SRAM; + u32_to_b4(cmd + 2, 8); + u32_to_b4(cmd + 6, p->syscfg_base + 1); + jtagmkII_send(pgm, cmd, 10); + + status = jtagmkII_recv(pgm, &resp); + if (status <= 0) { + msg_notice2("\n"); + pmsg_warning("timeout/error communicating with programmer (status %d)\n", status); + return -1; + } + + memcpy(chip_rev, resp+1, AVR_CHIP_REVLEN); + pmsg_debug("jtagmkII_read_chip_rev(): received chip silicon revision: 0x%02x\n", *chip_rev); + free(resp); + return 0; +} static int jtagmkII_read_byte(const PROGRAMMER *pgm, const AVRPART *p, const AVRMEM *mem, unsigned long addr, unsigned char * value) @@ -3731,6 +3762,7 @@ void jtagmkII_updi_initpgm(PROGRAMMER *pgm) { pgm->parseextparams = jtagmkII_parseextparms; pgm->setup = jtagmkII_setup; pgm->teardown = jtagmkII_teardown; + pgm->read_chip_rev = jtagmkII_read_chip_rev; pgm->page_size = 256; pgm->flag = PGM_FL_IS_PDI; } From ac760ff49064c5de53abed709057341ec4a78b64 Mon Sep 17 00:00:00 2001 From: Dawid Buchwald Date: Tue, 25 Jul 2023 19:18:29 +0200 Subject: [PATCH 08/19] Added support for chip silicon revision number --- src/serialupdi.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/src/serialupdi.c b/src/serialupdi.c index 794e4daf6..2f257f947 100644 --- a/src/serialupdi.c +++ b/src/serialupdi.c @@ -122,7 +122,6 @@ static int serialupdi_decode_sib(const PROGRAMMER *pgm, updi_sib_info *sib_info) memset(sib_info->nvm_string, 0, SIB_INFO_NVM_LENGTH+1); memset(sib_info->debug_string, 0, SIB_INFO_DEBUG_LENGTH+1); memset(sib_info->pdi_string, 0, SIB_INFO_PDI_LENGTH+1); - memset(sib_info->pdi_string, 0, SIB_INFO_PDI_LENGTH+1); memset(sib_info->extra_string, 0, SIB_INFO_EXTRA_LENGTH+1); memcpy(sib_info->family_string, sib_info->sib_string, SIB_INFO_FAMILY_LENGTH); @@ -633,6 +632,14 @@ static int serialupdi_initialize(const PROGRAMMER *pgm, const AVRPART *p) { return -1; } + if (updi_read_data(pgm, p->syscfg_base+1, &value, 1) < 0) { + pmsg_error("Reading chip silicon revision failed\n"); + return -1; + } else { + pmsg_debug("Received chip silicon revision 0x%02x\n", value); + pmsg_notice("Chip silicon revision: %x.%x\n", value >> 4, value & 0x0f); + } + if (updi_link_init(pgm) < 0) { pmsg_error("UPDI link initialization failed\n"); return -1; From 970976f74a01da2d54407a7a68393e2cca0cbf2b Mon Sep 17 00:00:00 2001 From: MCUdude Date: Fri, 28 Jul 2023 19:03:14 +0200 Subject: [PATCH 09/19] Check if pgm->read_chip_rev exists before executing --- src/jtag3.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/src/jtag3.c b/src/jtag3.c index a8dcd0e2c..7cc95bb1c 100644 --- a/src/jtag3.c +++ b/src/jtag3.c @@ -1421,11 +1421,6 @@ static int jtag3_initialize(const PROGRAMMER *pgm, const AVRPART *p) { /* Partial Family_ID has been returned */ pmsg_notice("partial Family_ID returned: \"%c%c%c%c\"\n", resp[3], resp[4], resp[5], resp[6]); - - // Read chip silicon revision - char chip_rev[AVR_CHIP_REVLEN]; - pgm->read_chip_rev(pgm, p, chip_rev); - pmsg_notice("silicon revision: %x.%x\n", chip_rev[0] >> 4, chip_rev[0] & 0x0f); } else /* JTAG ID has been returned */ @@ -1435,6 +1430,13 @@ static int jtag3_initialize(const PROGRAMMER *pgm, const AVRPART *p) { free(resp); + // Read chip silicon revision + if(pgm->read_chip_rev) { + char chip_rev[AVR_CHIP_REVLEN]; + pgm->read_chip_rev(pgm, p, chip_rev); + pmsg_notice("silicon revision: %x.%x\n", chip_rev[0] >> 4, chip_rev[0] & 0x0f); + } + PDATA(pgm)->boot_start = ULONG_MAX; if (p->prog_modes & PM_PDI) { // Find the border between application and boot area From 03aeb540c6781e903dfd6d945c6f814aa3f5b45f Mon Sep 17 00:00:00 2001 From: MCUdude Date: Fri, 28 Jul 2023 23:31:21 +0200 Subject: [PATCH 10/19] Add xmega revid memory --- src/avr.c | 1 + src/avrdude.conf.in | 5 +++++ src/jtag3.c | 46 ++++++++++++++++++++++++++++++--------------- 3 files changed, 37 insertions(+), 15 deletions(-) diff --git a/src/avr.c b/src/avr.c index d51afa797..282a5bf57 100644 --- a/src/avr.c +++ b/src/avr.c @@ -1405,6 +1405,7 @@ const char *avr_mem_order[100] = { "tempsense", "signature", "prodsig", "sernum", "calibration", "osccal16", "osccal20", "osc16err", "osc20err", "usersig", "userrow", "data", + "revid", }; void avr_add_mem_order(const char *str) { diff --git a/src/avrdude.conf.in b/src/avrdude.conf.in index 3abf8937d..bdb2b16a7 100644 --- a/src/avrdude.conf.in +++ b/src/avrdude.conf.in @@ -15885,6 +15885,11 @@ part offset = 0x1000090; ; + memory "revid" + size = 1; + offset = 0x1000093; + ; + memory "prodsig" size = 50; page_size = 50; diff --git a/src/jtag3.c b/src/jtag3.c index 7cc95bb1c..e0c724d27 100644 --- a/src/jtag3.c +++ b/src/jtag3.c @@ -2160,6 +2160,8 @@ static int jtag3_read_byte(const PROGRAMMER *pgm, const AVRPART *p, const AVRMEM cmd[3] = MTYPE_OSCCAL_BYTE; if (pgm->flag & PGM_FL_IS_DW) unsupp = 1; + } else if (strcmp(mem->desc, "revid") == 0) { + cmd[3] = MTYPE_SRAM; } else if (strcmp(mem->desc, "signature") == 0) { static unsigned char signature_cache[2]; @@ -2489,22 +2491,33 @@ int jtag3_read_sib(const PROGRAMMER *pgm, const AVRPART *p, char *sib) { int jtag3_read_chip_rev(const PROGRAMMER *pgm, const AVRPART *p, char *chip_rev) { int status; - unsigned char cmd[12]; - unsigned char *resp = NULL; - cmd[0] = SCOPE_AVR; - cmd[1] = CMD3_READ_MEMORY; - cmd[2] = 0; - cmd[3] = MTYPE_SRAM; - u32_to_b4(cmd + 4, p->syscfg_base + 1); - u32_to_b4(cmd + 8, AVR_CHIP_REVLEN); + if(p->prog_modes & PM_UPDI) { + unsigned char cmd[12]; + unsigned char *resp = NULL; - if ((status = jtag3_command(pgm, cmd, 12, &resp, "read chip rev")) < 0) - return status; + cmd[0] = SCOPE_AVR; + cmd[1] = CMD3_READ_MEMORY; + cmd[2] = 0; + cmd[3] = MTYPE_SRAM; + u32_to_b4(cmd + 4, p->syscfg_base + 1); + u32_to_b4(cmd + 8, AVR_CHIP_REVLEN); + + if ((status = jtag3_command(pgm, cmd, 12, &resp, "read chip rev")) < 0) + return status; + + memcpy(chip_rev, resp+3, AVR_CHIP_REVLEN); + free(resp); + } + // XMEGA using JTAG or PDI + else if (p->prog_modes & PM_PDI) { + AVRMEM *m = avr_locate_mem(p, "revid"); + if ((status = pgm->read_byte(pgm, p, m, 0, (unsigned char *)chip_rev)) < 0) { + return status; + } + } - memcpy(chip_rev, resp+3, AVR_CHIP_REVLEN); pmsg_debug("jtag3_read_chip_rev(): received chip silicon revision: 0x%02x\n", *chip_rev); - free(resp); return 0; } @@ -2718,10 +2731,12 @@ static unsigned char jtag3_memtype(const PROGRAMMER *pgm, const AVRPART *p, unsi static unsigned int jtag3_memaddr(const PROGRAMMER *pgm, const AVRPART *p, const AVRMEM *m, unsigned long addr) { if (p->prog_modes & PM_PDI) { /* - * All memories but "flash" are smaller than boot_start anyway, so - * no need for an extra check we are operating on "flash" + * All memories but "flash" and "revid" are smaller than boot_start anyway, + * so no need for an extra check we are operating on "flash" */ - if(addr >= PDATA(pgm)->boot_start) + if(str_eq(m->desc, "revid")) + addr += m->offset; + else if(addr >= PDATA(pgm)->boot_start) addr -= PDATA(pgm)->boot_start; } else if(p->prog_modes & PM_UPDI) { // Modern AVR8X part if(!str_eq(m->desc, "flash")) @@ -3276,6 +3291,7 @@ void jtag3_pdi_initpgm(PROGRAMMER *pgm) { pgm->teardown = jtag3_teardown; pgm->page_size = 256; pgm->flag = PGM_FL_IS_PDI; + pgm->read_chip_rev = jtag3_read_chip_rev; /* * hardware dependent functions From 916bd80b530dc0918d4e96e59522eb1a05f8d8a7 Mon Sep 17 00:00:00 2001 From: MCUdude Date: Fri, 28 Jul 2023 23:41:13 +0200 Subject: [PATCH 11/19] Add read_chip_rev to JTAG programmers That are set up to communicate with Xmega chips --- src/jtag3.c | 23 ++++++++++++----------- 1 file changed, 12 insertions(+), 11 deletions(-) diff --git a/src/jtag3.c b/src/jtag3.c index e0c724d27..431a7ce57 100644 --- a/src/jtag3.c +++ b/src/jtag3.c @@ -1431,7 +1431,7 @@ static int jtag3_initialize(const PROGRAMMER *pgm, const AVRPART *p) { free(resp); // Read chip silicon revision - if(pgm->read_chip_rev) { + if(pgm->read_chip_rev && p->prog_modes & (PM_PDI | PM_UPDI)) { char chip_rev[AVR_CHIP_REVLEN]; pgm->read_chip_rev(pgm, p, chip_rev); pmsg_notice("silicon revision: %x.%x\n", chip_rev[0] >> 4, chip_rev[0] & 0x0f); @@ -2116,17 +2116,17 @@ static int jtag3_read_byte(const PROGRAMMER *pgm, const AVRPART *p, const AVRMEM paddr = addr & ~(pagesize - 1); paddr_ptr = &PDATA(pgm)->eeprom_pageaddr; cache_ptr = PDATA(pgm)->eeprom_pagecache; - } else if (strcmp(mem->desc, "lfuse") == 0) { + } else if (str_eq(mem->desc, "lfuse")) { cmd[3] = MTYPE_FUSE_BITS; addr = 0; if (pgm->flag & PGM_FL_IS_DW) unsupp = 1; - } else if (strcmp(mem->desc, "hfuse") == 0) { + } else if (str_eq(mem->desc, "hfuse")) { cmd[3] = MTYPE_FUSE_BITS; addr = 1; if (pgm->flag & PGM_FL_IS_DW) unsupp = 1; - } else if (strcmp(mem->desc, "efuse") == 0) { + } else if (str_eq(mem->desc, "efuse")) { cmd[3] = MTYPE_FUSE_BITS; addr = 2; if (pgm->flag & PGM_FL_IS_DW) @@ -2139,18 +2139,18 @@ static int jtag3_read_byte(const PROGRAMMER *pgm, const AVRPART *p, const AVRMEM cmd[3] = MTYPE_FUSE_BITS; if (!(p->prog_modes & PM_UPDI)) addr = mem->offset & 7; - } else if (strcmp(mem->desc, "usersig") == 0 || - strcmp(mem->desc, "userrow") == 0) { + } else if (str_eq(mem->desc, "usersig") || + str_eq(mem->desc, "userrow")) { cmd[3] = MTYPE_USERSIG; - } else if (strcmp(mem->desc, "prodsig") == 0) { + } else if (str_eq(mem->desc, "prodsig")) { cmd[3] = MTYPE_PRODSIG; - } else if (strcmp(mem->desc, "sernum") == 0) { + } else if (str_eq(mem->desc, "sernum")) { cmd[3] = MTYPE_SIGN_JTAG; - } else if (strcmp(mem->desc, "osccal16") == 0) { + } else if (str_eq(mem->desc, "osccal16")) { cmd[3] = MTYPE_SIGN_JTAG; - } else if (strcmp(mem->desc, "osccal20") == 0) { + } else if (str_eq(mem->desc, "osccal20")) { cmd[3] = MTYPE_SIGN_JTAG; - } else if (strcmp(mem->desc, "tempsense") == 0) { + } else if (str_eq(mem->desc, "tempsense")) { cmd[3] = MTYPE_SIGN_JTAG; } else if (strcmp(mem->desc, "osc16err") == 0) { cmd[3] = MTYPE_SIGN_JTAG; @@ -3212,6 +3212,7 @@ void jtag3_initpgm(PROGRAMMER *pgm) { pgm->teardown = jtag3_teardown; pgm->page_size = 256; pgm->flag = PGM_FL_IS_JTAG; + pgm->read_chip_rev = jtag3_read_chip_rev; /* * hardware dependent functions From 0f77c6e617ce61e844f0833d6cb35b95e69c7bb8 Mon Sep 17 00:00:00 2001 From: MCUdude Date: Sat, 29 Jul 2023 20:41:19 +0200 Subject: [PATCH 12/19] Add support for revid readout using the stk500v2/xprog protocol --- src/stk500v2.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/src/stk500v2.c b/src/stk500v2.c index cfbc0e756..d8c3ace1d 100644 --- a/src/stk500v2.c +++ b/src/stk500v2.c @@ -4192,6 +4192,14 @@ static int stk600_xprog_program_enable(const PROGRAMMER *pgm, const AVRPART *p) } } + // Read chip silicon revision + if(p->prog_modes & PM_PDI) { + AVRMEM *m = avr_locate_mem(p, "revid"); + unsigned char chip_rev[AVR_CHIP_REVLEN]; + pgm->read_byte(pgm, p, m, 0, chip_rev); + pmsg_notice("silicon revision: %x.%x\n", chip_rev[0] >> 4, chip_rev[0] & 0x0f); + } + return 0; } @@ -4307,6 +4315,8 @@ static int stk600_xprog_read_byte(const PROGRAMMER *pgm, const AVRPART *p, const b[1] = XPRG_MEM_TYPE_EEPROM; } else if (strcmp(mem->desc, "signature") == 0) { b[1] = XPRG_MEM_TYPE_APPL; + } else if (strcmp(mem->desc, "revid") == 0) { + b[1] = XPRG_MEM_TYPE_APPL; } else if (strncmp(mem->desc, "fuse", strlen("fuse")) == 0) { b[1] = XPRG_MEM_TYPE_FUSE; } else if (strncmp(mem->desc, "lock", strlen("lock")) == 0) { From 4c44111a4da8e8f8a1f65895a7d844a39b1d1a0e Mon Sep 17 00:00:00 2001 From: MCUdude Date: Sat, 29 Jul 2023 21:06:43 +0200 Subject: [PATCH 13/19] Add support for revid readout --- src/jtagmkII.c | 46 ++++++++++++++++++++++++++++++---------------- 1 file changed, 30 insertions(+), 16 deletions(-) diff --git a/src/jtagmkII.c b/src/jtagmkII.c index 89215145f..b7ed66ecc 100644 --- a/src/jtagmkII.c +++ b/src/jtagmkII.c @@ -2136,28 +2136,36 @@ static int jtagmkII_paged_load(const PROGRAMMER *pgm, const AVRPART *p, const AV } static int jtagmkII_read_chip_rev(const PROGRAMMER *pgm, const AVRPART *p, char *chip_rev) { - unsigned char cmd[10]; - unsigned char *resp; int status; - pmsg_notice2("jtagmkII_read_chip_rev()"); - cmd[0] = CMND_READ_MEMORY; - cmd[1] = MTYPE_SRAM; - u32_to_b4(cmd + 2, 8); - u32_to_b4(cmd + 6, p->syscfg_base + 1); - jtagmkII_send(pgm, cmd, 10); + if(p->prog_modes & PM_UPDI) { + unsigned char cmd[10]; + unsigned char *resp; + cmd[0] = CMND_READ_MEMORY; + cmd[1] = MTYPE_SRAM; + u32_to_b4(cmd + 2, 8); + u32_to_b4(cmd + 6, p->syscfg_base + 1); + jtagmkII_send(pgm, cmd, 10); - status = jtagmkII_recv(pgm, &resp); - if (status <= 0) { - msg_notice2("\n"); - pmsg_warning("timeout/error communicating with programmer (status %d)\n", status); - return -1; + status = jtagmkII_recv(pgm, &resp); + if (status <= 0) { + msg_notice2("\n"); + pmsg_warning("timeout/error communicating with programmer (status %d)\n", status); + return -1; + } + memcpy(chip_rev, resp+1, AVR_CHIP_REVLEN); + free(resp); + } + // XMEGA using JTAG or PDI + else if (p->prog_modes & PM_PDI) { + AVRMEM *m = avr_locate_mem(p, "revid"); + if ((status = pgm->read_byte(pgm, p, m, 0, (unsigned char *)chip_rev)) < 0) { + return status; + } } - memcpy(chip_rev, resp+1, AVR_CHIP_REVLEN); - pmsg_debug("jtagmkII_read_chip_rev(): received chip silicon revision: 0x%02x\n", *chip_rev); - free(resp); + pmsg_debug("jtag3_read_chip_rev(): received chip silicon revision: 0x%02x\n", *chip_rev); return 0; } @@ -2226,6 +2234,8 @@ static int jtagmkII_read_byte(const PROGRAMMER *pgm, const AVRPART *p, const AVR cmd[1] = MTYPE_OSCCAL_BYTE; if (pgm->flag & PGM_FL_IS_DW) unsupp = 1; + } else if (strcmp(mem->desc, "revid") == 0) { + cmd[1] = MTYPE_SIGN_JTAG; } else if (strcmp(mem->desc, "signature") == 0) { cmd[1] = MTYPE_SIGN_JTAG; @@ -3666,6 +3676,7 @@ void jtagmkII_initpgm(PROGRAMMER *pgm) { pgm->parseextparams = jtagmkII_parseextparms; pgm->setup = jtagmkII_setup; pgm->teardown = jtagmkII_teardown; + pgm->read_chip_rev = jtagmkII_read_chip_rev; pgm->page_size = 256; pgm->flag = PGM_FL_IS_JTAG; } @@ -3729,6 +3740,7 @@ void jtagmkII_pdi_initpgm(PROGRAMMER *pgm) { pgm->print_parms = jtagmkII_print_parms; pgm->setup = jtagmkII_setup; pgm->teardown = jtagmkII_teardown; + pgm->read_chip_rev = jtagmkII_read_chip_rev; pgm->page_size = 256; pgm->flag = PGM_FL_IS_PDI; } @@ -3797,6 +3809,7 @@ void jtagmkII_dragon_initpgm(PROGRAMMER *pgm) { pgm->parseextparams = jtagmkII_parseextparms; pgm->setup = jtagmkII_setup; pgm->teardown = jtagmkII_teardown; + pgm->read_chip_rev = jtagmkII_read_chip_rev; pgm->page_size = 256; pgm->flag = PGM_FL_IS_JTAG; } @@ -3893,6 +3906,7 @@ void jtagmkII_dragon_pdi_initpgm(PROGRAMMER *pgm) { pgm->print_parms = jtagmkII_print_parms; pgm->setup = jtagmkII_setup; pgm->teardown = jtagmkII_teardown; + pgm->read_chip_rev = jtagmkII_read_chip_rev; pgm->page_size = 256; pgm->flag = PGM_FL_IS_PDI; } From 86a1aa1b3cd65be3d4fa3f0a52f5d6adea1fa12c Mon Sep 17 00:00:00 2001 From: MCUdude Date: Sat, 29 Jul 2023 22:32:37 +0200 Subject: [PATCH 14/19] Add extra guards --- src/jtag3.c | 4 ++++ src/jtagmkII.c | 6 +++++- 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/src/jtag3.c b/src/jtag3.c index 431a7ce57..ecf1bd5d1 100644 --- a/src/jtag3.c +++ b/src/jtag3.c @@ -2516,6 +2516,10 @@ int jtag3_read_chip_rev(const PROGRAMMER *pgm, const AVRPART *p, char *chip_rev) return status; } } + else { + pmsg_error("target does not have a chip revision that can be read"); + return -1; + } pmsg_debug("jtag3_read_chip_rev(): received chip silicon revision: 0x%02x\n", *chip_rev); return 0; diff --git a/src/jtagmkII.c b/src/jtagmkII.c index b7ed66ecc..247c7ff3b 100644 --- a/src/jtagmkII.c +++ b/src/jtagmkII.c @@ -1353,7 +1353,7 @@ static int jtagmkII_initialize(const PROGRAMMER *pgm, const AVRPART *p) { "single-byte EEPROM updates not possible\n"); } - if (pgm->read_chip_rev) { + if (pgm->read_chip_rev && p->prog_modes & (PM_PDI | PM_UPDI)) { char chip_rev[AVR_CHIP_REVLEN]; pgm->read_chip_rev(pgm, p, chip_rev); pmsg_notice("silicon revision: %x.%x\n", chip_rev[0] >> 4, chip_rev[0] & 0x0f); @@ -2164,6 +2164,10 @@ static int jtagmkII_read_chip_rev(const PROGRAMMER *pgm, const AVRPART *p, char return status; } } + else { + pmsg_error("target does not have a chip revision that can be read"); + return -1; + } pmsg_debug("jtag3_read_chip_rev(): received chip silicon revision: 0x%02x\n", *chip_rev); return 0; From aef735844e8f4a57e7582cc77ed9befc94b2d587 Mon Sep 17 00:00:00 2001 From: MCUdude Date: Wed, 2 Aug 2023 18:45:59 +0200 Subject: [PATCH 15/19] Add "io" memory to Xmega, tinyAVR0/1/2, megaAVR0 and AVR-Dx/Ex --- src/avrdude.conf.in | 90 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 90 insertions(+) diff --git a/src/avrdude.conf.in b/src/avrdude.conf.in index bdb2b16a7..836ebf3c9 100644 --- a/src/avrdude.conf.in +++ b/src/avrdude.conf.in @@ -15847,6 +15847,12 @@ part nvm_base = 0x01c0; autobaud_sync = 0x20; + memory "io" + size = 0x1000; + offset = 0x0000; + readsize = 1; + ; + memory "fuse1" size = 1; initval = 0x00; @@ -18453,6 +18459,12 @@ part ocd_base = 0x0f80; syscfg_base = 0x0f00; + memory "io" + size = 0x1000; + offset = 0x0000; + readsize = 1; + ; + memory "fuse0" size = 1; initval = 0x00; @@ -19780,6 +19792,12 @@ part parent ".avr8x_tiny" n_interrupts = 30; signature = 0x1e 0x92 0x2c; + memory "io" + size = 0x1080; + offset = 0x0000; + readsize = 1; + ; + memory "eeprom" size = 128; page_size = 32; @@ -19828,6 +19846,12 @@ part parent ".avr8x_tiny" n_interrupts = 30; signature = 0x1e 0x92 0x2b; + memory "io" + size = 0x1080; + offset = 0x0000; + readsize = 1; + ; + memory "eeprom" size = 128; page_size = 32; @@ -19868,6 +19892,12 @@ part parent ".avr8x_tiny" n_interrupts = 30; signature = 0x1e 0x92 0x2a; + memory "io" + size = 0x1080; + offset = 0x0000; + readsize = 1; + ; + memory "eeprom" size = 128; page_size = 32; @@ -19912,6 +19942,12 @@ part parent ".avr8x_tiny" n_interrupts = 30; signature = 0x1e 0x93 0x29; + memory "io" + size = 0x1080; + offset = 0x0000; + readsize = 1; + ; + memory "eeprom" size = 128; page_size = 32; @@ -19960,6 +19996,12 @@ part parent ".avr8x_tiny" n_interrupts = 30; signature = 0x1e 0x93 0x28; + memory "io" + size = 0x1080; + offset = 0x0000; + readsize = 1; + ; + memory "eeprom" size = 128; page_size = 32; @@ -20000,6 +20042,12 @@ part parent ".avr8x_tiny" n_interrupts = 30; signature = 0x1e 0x93 0x27; + memory "io" + size = 0x1080; + offset = 0x0000; + readsize = 1; + ; + memory "eeprom" size = 128; page_size = 32; @@ -20044,6 +20092,12 @@ part parent ".avr8x_tiny" n_interrupts = 30; signature = 0x1e 0x94 0x2a; + memory "io" + size = 0x1080; + offset = 0x0000; + readsize = 1; + ; + memory "eeprom" size = 256; page_size = 32; @@ -20092,6 +20146,12 @@ part parent ".avr8x_tiny" n_interrupts = 30; signature = 0x1e 0x94 0x29; + memory "io" + size = 0x1080; + offset = 0x0000; + readsize = 1; + ; + memory "eeprom" size = 256; page_size = 32; @@ -20132,6 +20192,12 @@ part parent ".avr8x_tiny" n_interrupts = 30; signature = 0x1e 0x94 0x28; + memory "io" + size = 0x1080; + offset = 0x0000; + readsize = 1; + ; + memory "eeprom" size = 256; page_size = 32; @@ -20176,6 +20242,12 @@ part parent ".avr8x_tiny" n_interrupts = 30; signature = 0x1e 0x95 0x28; + memory "io" + size = 0x1080; + offset = 0x0000; + readsize = 1; + ; + memory "eeprom" size = 256; page_size = 64; @@ -20224,6 +20296,12 @@ part parent ".avr8x_tiny" n_interrupts = 30; signature = 0x1e 0x95 0x27; + memory "io" + size = 0x1080; + offset = 0x0000; + readsize = 1; + ; + memory "eeprom" size = 256; page_size = 64; @@ -20264,6 +20342,12 @@ part parent ".avr8x_tiny" n_interrupts = 30; signature = 0x1e 0x95 0x26; + memory "io" + size = 0x1080; + offset = 0x0000; + readsize = 1; + ; + memory "eeprom" size = 256; page_size = 64; @@ -20649,6 +20733,12 @@ part ocd_base = 0x0f80; syscfg_base = 0x0f00; + memory "io" + size = 0x1040; + offset = 0x0000; + readsize = 1; + ; + memory "fuse0" size = 1; initval = 0x00; From 1dedfe5d1bf654f93e0dee5c57b3e67bf61b3aa5 Mon Sep 17 00:00:00 2001 From: MCUdude Date: Wed, 2 Aug 2023 18:46:34 +0200 Subject: [PATCH 16/19] Remove revid memory --- src/avrdude.conf.in | 5 ----- 1 file changed, 5 deletions(-) diff --git a/src/avrdude.conf.in b/src/avrdude.conf.in index 836ebf3c9..acdfedb50 100644 --- a/src/avrdude.conf.in +++ b/src/avrdude.conf.in @@ -15891,11 +15891,6 @@ part offset = 0x1000090; ; - memory "revid" - size = 1; - offset = 0x1000093; - ; - memory "prodsig" size = 50; page_size = 50; From 13b1c8ca0bd98999ae78600b4f571c13ac8e3cba Mon Sep 17 00:00:00 2001 From: MCUdude Date: Wed, 2 Aug 2023 22:19:42 +0200 Subject: [PATCH 17/19] remove "revid" and add "io" memory --- src/avr.c | 1 - src/jtag3.c | 48 +++++++++++++++--------------------------------- src/jtagmkII.c | 50 ++++++++++++++++++-------------------------------- src/stk500v2.c | 21 +++++++++++++++------ 4 files changed, 48 insertions(+), 72 deletions(-) diff --git a/src/avr.c b/src/avr.c index 282a5bf57..d51afa797 100644 --- a/src/avr.c +++ b/src/avr.c @@ -1405,7 +1405,6 @@ const char *avr_mem_order[100] = { "tempsense", "signature", "prodsig", "sernum", "calibration", "osccal16", "osccal20", "osc16err", "osc20err", "usersig", "userrow", "data", - "revid", }; void avr_add_mem_order(const char *str) { diff --git a/src/jtag3.c b/src/jtag3.c index ecf1bd5d1..52a699926 100644 --- a/src/jtag3.c +++ b/src/jtag3.c @@ -2160,7 +2160,7 @@ static int jtag3_read_byte(const PROGRAMMER *pgm, const AVRPART *p, const AVRMEM cmd[3] = MTYPE_OSCCAL_BYTE; if (pgm->flag & PGM_FL_IS_DW) unsupp = 1; - } else if (strcmp(mem->desc, "revid") == 0) { + } else if (strcmp(mem->desc, "io") == 0) { cmd[3] = MTYPE_SRAM; } else if (strcmp(mem->desc, "signature") == 0) { static unsigned char signature_cache[2]; @@ -2313,6 +2313,8 @@ static int jtag3_write_byte(const PROGRAMMER *pgm, const AVRPART *p, const AVRME cmd[3] = MTYPE_OSCCAL_BYTE; if (pgm->flag & PGM_FL_IS_DW) unsupp = 1; + } else if (strcmp(mem->desc, "io") == 0) { + cmd[3] = MTYPE_SRAM; } else if (strcmp(mem->desc, "signature") == 0) { cmd[3] = MTYPE_SIGN_JTAG; if (pgm->flag & PGM_FL_IS_DW) @@ -2490,34 +2492,16 @@ int jtag3_read_sib(const PROGRAMMER *pgm, const AVRPART *p, char *sib) { } int jtag3_read_chip_rev(const PROGRAMMER *pgm, const AVRPART *p, char *chip_rev) { - int status; - - if(p->prog_modes & PM_UPDI) { - unsigned char cmd[12]; - unsigned char *resp = NULL; - - cmd[0] = SCOPE_AVR; - cmd[1] = CMD3_READ_MEMORY; - cmd[2] = 0; - cmd[3] = MTYPE_SRAM; - u32_to_b4(cmd + 4, p->syscfg_base + 1); - u32_to_b4(cmd + 8, AVR_CHIP_REVLEN); - - if ((status = jtag3_command(pgm, cmd, 12, &resp, "read chip rev")) < 0) + // XMEGA using JTAG or PDI, tinyAVR0/1/2, megaAVR0, AVR-Dx, AVR-Ex using UPDI + if(p->prog_modes & (PM_PDI | PM_UPDI)) { + AVRMEM *m = avr_locate_mem(p, "io"); + int status = pgm->read_byte(pgm, p, m, + p->prog_modes & PM_PDI? p->mcu_base+3 :p->syscfg_base+1, + (unsigned char *)chip_rev); + if (status < 0) return status; - - memcpy(chip_rev, resp+3, AVR_CHIP_REVLEN); - free(resp); - } - // XMEGA using JTAG or PDI - else if (p->prog_modes & PM_PDI) { - AVRMEM *m = avr_locate_mem(p, "revid"); - if ((status = pgm->read_byte(pgm, p, m, 0, (unsigned char *)chip_rev)) < 0) { - return status; - } - } - else { - pmsg_error("target does not have a chip revision that can be read"); + } else { + pmsg_error("target does not have a chip revision that can be read\n"); return -1; } @@ -2735,12 +2719,10 @@ static unsigned char jtag3_memtype(const PROGRAMMER *pgm, const AVRPART *p, unsi static unsigned int jtag3_memaddr(const PROGRAMMER *pgm, const AVRPART *p, const AVRMEM *m, unsigned long addr) { if (p->prog_modes & PM_PDI) { /* - * All memories but "flash" and "revid" are smaller than boot_start anyway, - * so no need for an extra check we are operating on "flash" + * All memories but "flash" are smaller than boot_start anyway, so + * no need for an extra check we are operating on "flash" */ - if(str_eq(m->desc, "revid")) - addr += m->offset; - else if(addr >= PDATA(pgm)->boot_start) + if(addr >= PDATA(pgm)->boot_start) addr -= PDATA(pgm)->boot_start; } else if(p->prog_modes & PM_UPDI) { // Modern AVR8X part if(!str_eq(m->desc, "flash")) diff --git a/src/jtagmkII.c b/src/jtagmkII.c index 247c7ff3b..d791e0249 100644 --- a/src/jtagmkII.c +++ b/src/jtagmkII.c @@ -2136,40 +2136,20 @@ static int jtagmkII_paged_load(const PROGRAMMER *pgm, const AVRPART *p, const AV } static int jtagmkII_read_chip_rev(const PROGRAMMER *pgm, const AVRPART *p, char *chip_rev) { - int status; - pmsg_notice2("jtagmkII_read_chip_rev()"); - - if(p->prog_modes & PM_UPDI) { - unsigned char cmd[10]; - unsigned char *resp; - cmd[0] = CMND_READ_MEMORY; - cmd[1] = MTYPE_SRAM; - u32_to_b4(cmd + 2, 8); - u32_to_b4(cmd + 6, p->syscfg_base + 1); - jtagmkII_send(pgm, cmd, 10); - - status = jtagmkII_recv(pgm, &resp); - if (status <= 0) { - msg_notice2("\n"); - pmsg_warning("timeout/error communicating with programmer (status %d)\n", status); - return -1; - } - memcpy(chip_rev, resp+1, AVR_CHIP_REVLEN); - free(resp); - } - // XMEGA using JTAG or PDI - else if (p->prog_modes & PM_PDI) { - AVRMEM *m = avr_locate_mem(p, "revid"); - if ((status = pgm->read_byte(pgm, p, m, 0, (unsigned char *)chip_rev)) < 0) { + // XMEGA using JTAG or PDI, tinyAVR0/1/2, megaAVR0, AVR-Dx, AVR-Ex using UPDI + if(p->prog_modes & (PM_PDI | PM_UPDI)) { + AVRMEM *m = avr_locate_mem(p, "io"); + int status = pgm->read_byte(pgm, p, m, + p->prog_modes & PM_PDI? p->mcu_base+3 :p->syscfg_base+1, + (unsigned char *)chip_rev); + if (status < 0) return status; - } - } - else { - pmsg_error("target does not have a chip revision that can be read"); + } else { + pmsg_error("target does not have a chip revision that can be read\n"); return -1; } - pmsg_debug("jtag3_read_chip_rev(): received chip silicon revision: 0x%02x\n", *chip_rev); + pmsg_debug("jtagmkII_read_chip_rev(): received chip silicon revision: 0x%02x\n", *chip_rev); return 0; } @@ -2238,8 +2218,10 @@ static int jtagmkII_read_byte(const PROGRAMMER *pgm, const AVRPART *p, const AVR cmd[1] = MTYPE_OSCCAL_BYTE; if (pgm->flag & PGM_FL_IS_DW) unsupp = 1; - } else if (strcmp(mem->desc, "revid") == 0) { - cmd[1] = MTYPE_SIGN_JTAG; + } else if (strcmp(mem->desc, "io") == 0) { + cmd[1] = MTYPE_FLASH; + AVRMEM *data = avr_locate_mem(p, "data"); + addr += data->offset; } else if (strcmp(mem->desc, "signature") == 0) { cmd[1] = MTYPE_SIGN_JTAG; @@ -2406,6 +2388,10 @@ static int jtagmkII_write_byte(const PROGRAMMER *pgm, const AVRPART *p, const AV cmd[1] = MTYPE_OSCCAL_BYTE; if (pgm->flag & PGM_FL_IS_DW) unsupp = 1; + } else if (strcmp(mem->desc, "io") == 0) { + cmd[1] = MTYPE_FLASH; // Works with jtag2updi, does not work with any xmega + AVRMEM *data = avr_locate_mem(p, "data"); + addr += data->offset; } else if (strcmp(mem->desc, "signature") == 0) { cmd[1] = MTYPE_SIGN_JTAG; if (pgm->flag & PGM_FL_IS_DW) diff --git a/src/stk500v2.c b/src/stk500v2.c index d8c3ace1d..da2f02527 100644 --- a/src/stk500v2.c +++ b/src/stk500v2.c @@ -4192,11 +4192,11 @@ static int stk600_xprog_program_enable(const PROGRAMMER *pgm, const AVRPART *p) } } - // Read chip silicon revision + // Read XMEGA chip silicon revision if(p->prog_modes & PM_PDI) { - AVRMEM *m = avr_locate_mem(p, "revid"); + AVRMEM *m = avr_locate_mem(p, "io"); unsigned char chip_rev[AVR_CHIP_REVLEN]; - pgm->read_byte(pgm, p, m, 0, chip_rev); + pgm->read_byte(pgm, p, m, p->mcu_base+3, chip_rev); pmsg_notice("silicon revision: %x.%x\n", chip_rev[0] >> 4, chip_rev[0] & 0x0f); } @@ -4239,6 +4239,10 @@ static int stk600_xprog_write_byte(const PROGRAMMER *pgm, const AVRPART *p, cons memcode = XPRG_MEM_TYPE_BOOT; } else if (strcmp(mem->desc, "eeprom") == 0) { memcode = XPRG_MEM_TYPE_EEPROM; + } else if (strcmp(mem->desc, "io") == 0) { + memcode = XPRG_MEM_TYPE_APPL; + AVRMEM *data = avr_locate_mem(p, "data"); + addr += data->offset; } else if (strncmp(mem->desc, "lock", strlen("lock")) == 0) { memcode = XPRG_MEM_TYPE_LOCKBITS; } else if (strncmp(mem->desc, "fuse", strlen("fuse")) == 0) { @@ -4280,7 +4284,6 @@ static int stk600_xprog_write_byte(const PROGRAMMER *pgm, const AVRPART *p, cons if (mem->blocksize != 0) write_size = mem->blocksize; } - b[0] = XPRG_CMD_WRITE_MEM; b[1] = memcode; b[2] = 0; /* pagemode: non-paged write */ @@ -4313,9 +4316,11 @@ static int stk600_xprog_read_byte(const PROGRAMMER *pgm, const AVRPART *p, const b[1] = XPRG_MEM_TYPE_BOOT; } else if (strcmp(mem->desc, "eeprom") == 0) { b[1] = XPRG_MEM_TYPE_EEPROM; - } else if (strcmp(mem->desc, "signature") == 0) { + } else if (strcmp(mem->desc, "io") == 0) { b[1] = XPRG_MEM_TYPE_APPL; - } else if (strcmp(mem->desc, "revid") == 0) { + AVRMEM *data = avr_locate_mem(p, "data"); + addr += data->offset; + } else if (strcmp(mem->desc, "signature") == 0) { b[1] = XPRG_MEM_TYPE_APPL; } else if (strncmp(mem->desc, "fuse", strlen("fuse")) == 0) { b[1] = XPRG_MEM_TYPE_FUSE; @@ -4389,6 +4394,10 @@ static int stk600_xprog_paged_load(const PROGRAMMER *pgm, const AVRPART *p, cons use_ext_addr = (1UL << 31); } else if (strcmp(mem->desc, "eeprom") == 0) { memtype = XPRG_MEM_TYPE_EEPROM; + } else if (strcmp(mem->desc, "io") == 0) { + memtype = XPRG_MEM_TYPE_APPL; + AVRMEM *data = avr_locate_mem(p, "data"); + addr += data->offset; } else if (strcmp(mem->desc, "signature") == 0) { memtype = XPRG_MEM_TYPE_APPL; } else if (strncmp(mem->desc, "fuse", strlen("fuse")) == 0) { From 819e35a57ea8a610ef1cad1aa83a32bf654d4f36 Mon Sep 17 00:00:00 2001 From: MCUdude Date: Thu, 3 Aug 2023 08:17:58 +0200 Subject: [PATCH 18/19] Ensure canonical form Formatted using avrdude -p*/s --- src/avrdude.conf.in | 153 ++++++++++++++++++-------------------------- 1 file changed, 63 insertions(+), 90 deletions(-) diff --git a/src/avrdude.conf.in b/src/avrdude.conf.in index acdfedb50..d8ce36bed 100644 --- a/src/avrdude.conf.in +++ b/src/avrdude.conf.in @@ -15847,12 +15847,6 @@ part nvm_base = 0x01c0; autobaud_sync = 0x20; - memory "io" - size = 0x1000; - offset = 0x0000; - readsize = 1; - ; - memory "fuse1" size = 1; initval = 0x00; @@ -15902,6 +15896,11 @@ part # SRAM, only used to supply the offset offset = 0x1000000; ; + + memory "io" + size = 4096; + readsize = 1; + ; ; #------------------------------------------------------------ @@ -18454,12 +18453,6 @@ part ocd_base = 0x0f80; syscfg_base = 0x0f00; - memory "io" - size = 0x1000; - offset = 0x0000; - readsize = 1; - ; - memory "fuse0" size = 1; initval = 0x00; @@ -18614,6 +18607,11 @@ part # SRAM, only used to supply the offset offset = 0x1000000; ; + + memory "io" + size = 4096; + readsize = 1; + ; ; #------------------------------------------------------------ @@ -19787,12 +19785,6 @@ part parent ".avr8x_tiny" n_interrupts = 30; signature = 0x1e 0x92 0x2c; - memory "io" - size = 0x1080; - offset = 0x0000; - readsize = 1; - ; - memory "eeprom" size = 128; page_size = 32; @@ -19814,6 +19806,10 @@ part parent ".avr8x_tiny" memory "lock" initval = 0xc5; ; + + memory "io" + size = 4224; + ; ; #------------------------------------------------------------ @@ -19841,12 +19837,6 @@ part parent ".avr8x_tiny" n_interrupts = 30; signature = 0x1e 0x92 0x2b; - memory "io" - size = 0x1080; - offset = 0x0000; - readsize = 1; - ; - memory "eeprom" size = 128; page_size = 32; @@ -19868,6 +19858,10 @@ part parent ".avr8x_tiny" memory "lock" initval = 0xc5; ; + + memory "io" + size = 4224; + ; ; #------------------------------------------------------------ @@ -19887,12 +19881,6 @@ part parent ".avr8x_tiny" n_interrupts = 30; signature = 0x1e 0x92 0x2a; - memory "io" - size = 0x1080; - offset = 0x0000; - readsize = 1; - ; - memory "eeprom" size = 128; page_size = 32; @@ -19914,6 +19902,10 @@ part parent ".avr8x_tiny" memory "lock" initval = 0xc5; ; + + memory "io" + size = 4224; + ; ; #------------------------------------------------------------ @@ -19937,12 +19929,6 @@ part parent ".avr8x_tiny" n_interrupts = 30; signature = 0x1e 0x93 0x29; - memory "io" - size = 0x1080; - offset = 0x0000; - readsize = 1; - ; - memory "eeprom" size = 128; page_size = 32; @@ -19964,6 +19950,10 @@ part parent ".avr8x_tiny" memory "lock" initval = 0xc5; ; + + memory "io" + size = 4224; + ; ; #------------------------------------------------------------ @@ -19991,12 +19981,6 @@ part parent ".avr8x_tiny" n_interrupts = 30; signature = 0x1e 0x93 0x28; - memory "io" - size = 0x1080; - offset = 0x0000; - readsize = 1; - ; - memory "eeprom" size = 128; page_size = 32; @@ -20018,6 +20002,10 @@ part parent ".avr8x_tiny" memory "lock" initval = 0xc5; ; + + memory "io" + size = 4224; + ; ; #------------------------------------------------------------ @@ -20037,12 +20025,6 @@ part parent ".avr8x_tiny" n_interrupts = 30; signature = 0x1e 0x93 0x27; - memory "io" - size = 0x1080; - offset = 0x0000; - readsize = 1; - ; - memory "eeprom" size = 128; page_size = 32; @@ -20064,6 +20046,10 @@ part parent ".avr8x_tiny" memory "lock" initval = 0xc5; ; + + memory "io" + size = 4224; + ; ; #------------------------------------------------------------ @@ -20087,12 +20073,6 @@ part parent ".avr8x_tiny" n_interrupts = 30; signature = 0x1e 0x94 0x2a; - memory "io" - size = 0x1080; - offset = 0x0000; - readsize = 1; - ; - memory "eeprom" size = 256; page_size = 32; @@ -20114,6 +20094,10 @@ part parent ".avr8x_tiny" memory "lock" initval = 0xc5; ; + + memory "io" + size = 4224; + ; ; #------------------------------------------------------------ @@ -20141,12 +20125,6 @@ part parent ".avr8x_tiny" n_interrupts = 30; signature = 0x1e 0x94 0x29; - memory "io" - size = 0x1080; - offset = 0x0000; - readsize = 1; - ; - memory "eeprom" size = 256; page_size = 32; @@ -20168,6 +20146,10 @@ part parent ".avr8x_tiny" memory "lock" initval = 0xc5; ; + + memory "io" + size = 4224; + ; ; #------------------------------------------------------------ @@ -20187,12 +20169,6 @@ part parent ".avr8x_tiny" n_interrupts = 30; signature = 0x1e 0x94 0x28; - memory "io" - size = 0x1080; - offset = 0x0000; - readsize = 1; - ; - memory "eeprom" size = 256; page_size = 32; @@ -20214,6 +20190,10 @@ part parent ".avr8x_tiny" memory "lock" initval = 0xc5; ; + + memory "io" + size = 4224; + ; ; #------------------------------------------------------------ @@ -20237,12 +20217,6 @@ part parent ".avr8x_tiny" n_interrupts = 30; signature = 0x1e 0x95 0x28; - memory "io" - size = 0x1080; - offset = 0x0000; - readsize = 1; - ; - memory "eeprom" size = 256; page_size = 64; @@ -20264,6 +20238,10 @@ part parent ".avr8x_tiny" memory "lock" initval = 0xc5; ; + + memory "io" + size = 4224; + ; ; #------------------------------------------------------------ @@ -20291,12 +20269,6 @@ part parent ".avr8x_tiny" n_interrupts = 30; signature = 0x1e 0x95 0x27; - memory "io" - size = 0x1080; - offset = 0x0000; - readsize = 1; - ; - memory "eeprom" size = 256; page_size = 64; @@ -20318,6 +20290,10 @@ part parent ".avr8x_tiny" memory "lock" initval = 0xc5; ; + + memory "io" + size = 4224; + ; ; #------------------------------------------------------------ @@ -20337,12 +20313,6 @@ part parent ".avr8x_tiny" n_interrupts = 30; signature = 0x1e 0x95 0x26; - memory "io" - size = 0x1080; - offset = 0x0000; - readsize = 1; - ; - memory "eeprom" size = 256; page_size = 64; @@ -20364,6 +20334,10 @@ part parent ".avr8x_tiny" memory "lock" initval = 0xc5; ; + + memory "io" + size = 4224; + ; ; #------------------------------------------------------------ @@ -20728,12 +20702,6 @@ part ocd_base = 0x0f80; syscfg_base = 0x0f00; - memory "io" - size = 0x1040; - offset = 0x0000; - readsize = 1; - ; - memory "fuse0" size = 1; initval = 0x00; @@ -20875,6 +20843,11 @@ part # SRAM, only used to supply the offset offset = 0x1000000; ; + + memory "io" + size = 4160; + readsize = 1; + ; ; #------------------------------------------------------------ From 28d4aa6c204a48b365f3ec99df1288bc9c303a19 Mon Sep 17 00:00:00 2001 From: MCUdude Date: Sat, 5 Aug 2023 11:41:39 +0200 Subject: [PATCH 19/19] Change IO memory size accoring to the ATDF files --- src/avrdude.conf.in | 50 +-------------------------------------------- 1 file changed, 1 insertion(+), 49 deletions(-) diff --git a/src/avrdude.conf.in b/src/avrdude.conf.in index 07585550f..37d84bdf6 100644 --- a/src/avrdude.conf.in +++ b/src/avrdude.conf.in @@ -18673,7 +18673,7 @@ part ; memory "io" - size = 4096; + size = 4352; readsize = 1; ; @@ -19875,10 +19875,6 @@ part parent ".avr8x_tiny" memory "lock" initval = 0xc5; ; - - memory "io" - size = 4224; - ; ; #------------------------------------------------------------ @@ -19927,10 +19923,6 @@ part parent ".avr8x_tiny" memory "lock" initval = 0xc5; ; - - memory "io" - size = 4224; - ; ; #------------------------------------------------------------ @@ -19971,10 +19963,6 @@ part parent ".avr8x_tiny" memory "lock" initval = 0xc5; ; - - memory "io" - size = 4224; - ; ; #------------------------------------------------------------ @@ -20019,10 +20007,6 @@ part parent ".avr8x_tiny" memory "lock" initval = 0xc5; ; - - memory "io" - size = 4224; - ; ; #------------------------------------------------------------ @@ -20071,10 +20055,6 @@ part parent ".avr8x_tiny" memory "lock" initval = 0xc5; ; - - memory "io" - size = 4224; - ; ; #------------------------------------------------------------ @@ -20115,10 +20095,6 @@ part parent ".avr8x_tiny" memory "lock" initval = 0xc5; ; - - memory "io" - size = 4224; - ; ; #------------------------------------------------------------ @@ -20163,10 +20139,6 @@ part parent ".avr8x_tiny" memory "lock" initval = 0xc5; ; - - memory "io" - size = 4224; - ; ; #------------------------------------------------------------ @@ -20215,10 +20187,6 @@ part parent ".avr8x_tiny" memory "lock" initval = 0xc5; ; - - memory "io" - size = 4224; - ; ; #------------------------------------------------------------ @@ -20259,10 +20227,6 @@ part parent ".avr8x_tiny" memory "lock" initval = 0xc5; ; - - memory "io" - size = 4224; - ; ; #------------------------------------------------------------ @@ -20307,10 +20271,6 @@ part parent ".avr8x_tiny" memory "lock" initval = 0xc5; ; - - memory "io" - size = 4224; - ; ; #------------------------------------------------------------ @@ -20359,10 +20319,6 @@ part parent ".avr8x_tiny" memory "lock" initval = 0xc5; ; - - memory "io" - size = 4224; - ; ; #------------------------------------------------------------ @@ -20403,10 +20359,6 @@ part parent ".avr8x_tiny" memory "lock" initval = 0xc5; ; - - memory "io" - size = 4224; - ; ; #------------------------------------------------------------