From 1c2341f0ce46a457f0f1b7f2b469642e4dec887e Mon Sep 17 00:00:00 2001 From: lorforlinux Date: Sat, 13 Jun 2020 06:06:34 +0530 Subject: [PATCH 1/4] fix BBB servo cape overlay --- src/arm/BBORG_SERVO-00A2.dts | 66 +++++++++++++----------------------- 1 file changed, 24 insertions(+), 42 deletions(-) diff --git a/src/arm/BBORG_SERVO-00A2.dts b/src/arm/BBORG_SERVO-00A2.dts index de9291be..3c6950a1 100644 --- a/src/arm/BBORG_SERVO-00A2.dts +++ b/src/arm/BBORG_SERVO-00A2.dts @@ -35,27 +35,27 @@ P9_19_pinmux { status = "disabled"; }; /* i2c2.scl */ P9_20_pinmux { status = "disabled"; }; /* i2c2.sda */ - P8_10_pinmux { status = "disabled"; }; /* servo.enable */ + P8_10_pinmux { status = "disabled"; }; /* pca9685.enable */ }; &am33xx_pinmux { bborg_servo_input_pins: pinmux_bborg_servo_input_pins { pinctrl-single,pins = < - BONE_P8_12 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* P8_12: gpio1_12 */ - BONE_P8_11 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* P8_11: gpio1_13 */ - BONE_P9_30 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* P9_30: gpio3_16 */ - BONE_P9_27 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* P9_27: gpio3_19 */ - BONE_P9_41 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* P9_41: gpio3_20 */ - BONE_P9_42 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* P9_42: gpio0_7 */ + BONE_P8_12 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* P8_12: gpio1_12 */ + BONE_P8_11 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* P8_11: gpio1_13 */ + BONE_P9_30 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* P9_30: gpio3_16 */ + BONE_P9_27 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* P9_27: gpio3_19 */ + BONE_P9_41 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* P9_41: gpio3_20 */ + BONE_P9_42 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* P9_42: gpio0_7 */ >; }; - bborg_servo_pca9685_i2c_pins: bborg_servo_pca9685_i2c_pins { + bborg_servo_pca9685_i2c_pins: pinmux_bborg_servo_pca9685_i2c_pins { pinctrl-single,pins = < - BONE_P9_19 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* P9_19: i2c2.scl */ - BONE_P9_20 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* P9_20: i2c2.sda */ + BONE_P9_20 (SLEWCTRL_SLOW | PIN_INPUT_PULLUP | MUX_MODE3) /* P9_19: i2c2.sda */ + BONE_P9_19 (SLEWCTRL_SLOW | PIN_INPUT_PULLUP | MUX_MODE3) /* P9_20: i2c2.scl */ >; }; @@ -75,45 +75,27 @@ #address-cells = <1>; #size-cells = <0>; - pca9685_servo: pca9685_serve@7f { - compatible = "nxp, pca9685"; + pca: pca@70 { + compatible = "nxp,pca9685-pwm"; + #pwm-cells = <16>; + reg = <0x70>; lable = "pca9685_servo"; - pinctrl-names = "default"; - pinctrl-0 = <&bborg_servo_pca9685_en_pins>; - enable-gpios = <&gpio2 4 GPIO_ACTIVE_HIGH>; - reg = <0x7f>; + /* invert; */ + /* open-drain; */ }; }; &{/} { - gpio_inputs { - compatible = "gpio-keys"; + leds { pinctrl-names = "default"; - pinctrl-0 = <&bborg_servo_input_pins>; + pinctrl-0 = <&bborg_servo_pca9685_en_pins>; - input@1 { - lable = "in1"; - gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>; - }; - input@2 { - lable = "in2"; - gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>; - }; - input@3 { - lable = "in3"; - gpios = <&gpio3 16 GPIO_ACTIVE_HIGH>; - }; - input@4 { - lable = "in4"; - gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>; - }; - input@5 { - lable = "in5"; - gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>; - }; - input@6 { - lable = "in6"; - gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>; + compatible = "gpio-leds"; + + pca9685-enable { + label = "pca9685-enable"; + gpios = <&gpio2 4 GPIO_ACTIVE_LOW>; + default-state = "on"; }; }; }; \ No newline at end of file From aec6f34916ee08070ec667d5f878e9ab418997f0 Mon Sep 17 00:00:00 2001 From: Deepak Khatri Date: Sun, 21 Jun 2020 20:23:58 +0530 Subject: [PATCH 2/4] fix naming --- src/arm/BBORG_SERVO-00A2.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/arm/BBORG_SERVO-00A2.dts b/src/arm/BBORG_SERVO-00A2.dts index 3c6950a1..412ac962 100644 --- a/src/arm/BBORG_SERVO-00A2.dts +++ b/src/arm/BBORG_SERVO-00A2.dts @@ -79,14 +79,14 @@ compatible = "nxp,pca9685-pwm"; #pwm-cells = <16>; reg = <0x70>; - lable = "pca9685_servo"; + label = "pca9685_servo"; /* invert; */ /* open-drain; */ }; }; &{/} { - leds { + pca9685 { pinctrl-names = "default"; pinctrl-0 = <&bborg_servo_pca9685_en_pins>; From 7feb52b6aa5979154cac0703a1293f0e526a6991 Mon Sep 17 00:00:00 2001 From: Deepak Khatri Date: Wed, 24 Jun 2020 05:22:59 +0530 Subject: [PATCH 3/4] fix naming and pwm-cells value --- src/arm/BBORG_SERVO-00A2.dts | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/arm/BBORG_SERVO-00A2.dts b/src/arm/BBORG_SERVO-00A2.dts index 412ac962..713eaa3d 100644 --- a/src/arm/BBORG_SERVO-00A2.dts +++ b/src/arm/BBORG_SERVO-00A2.dts @@ -52,7 +52,7 @@ }; - bborg_servo_pca9685_i2c_pins: pinmux_bborg_servo_pca9685_i2c_pins { + bborg_i2c_pins: pinmux_bborg_i2c_pins { pinctrl-single,pins = < BONE_P9_20 (SLEWCTRL_SLOW | PIN_INPUT_PULLUP | MUX_MODE3) /* P9_19: i2c2.sda */ BONE_P9_19 (SLEWCTRL_SLOW | PIN_INPUT_PULLUP | MUX_MODE3) /* P9_20: i2c2.scl */ @@ -69,7 +69,7 @@ &i2c2 { pinctrl-names = "default"; - pinctrl-0 = <&bborg_servo_pca9685_i2c_pins>; + pinctrl-0 = <&bborg_i2c_pins>; status = "okay"; clock-frequency = <100000>; #address-cells = <1>; @@ -77,7 +77,7 @@ pca: pca@70 { compatible = "nxp,pca9685-pwm"; - #pwm-cells = <16>; + #pwm-cells = <2>; reg = <0x70>; label = "pca9685_servo"; /* invert; */ From 64606c5530cb6798593a4f043e4ad0bc2366c5c4 Mon Sep 17 00:00:00 2001 From: Deepak Khatri Date: Mon, 13 Jul 2020 16:21:57 +0530 Subject: [PATCH 4/4] Make servoCape compatible with BBB and BBAI This overlay is using the new compatibility code from https://github.com/beagleboard/BeagleBoard-DeviceTrees/pull/17 --- src/arm/BBORG_SERVO-00A2.dts | 76 ++++++++++++++---------------------- 1 file changed, 29 insertions(+), 47 deletions(-) diff --git a/src/arm/BBORG_SERVO-00A2.dts b/src/arm/BBORG_SERVO-00A2.dts index 713eaa3d..cca2c657 100644 --- a/src/arm/BBORG_SERVO-00A2.dts +++ b/src/arm/BBORG_SERVO-00A2.dts @@ -9,10 +9,6 @@ /dts-v1/; /plugin/; -#include -#include -#include - /* * Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/ */ @@ -38,42 +34,31 @@ P8_10_pinmux { status = "disabled"; }; /* pca9685.enable */ }; -&am33xx_pinmux { - - bborg_servo_input_pins: pinmux_bborg_servo_input_pins { - pinctrl-single,pins = < - BONE_P8_12 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* P8_12: gpio1_12 */ - BONE_P8_11 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* P8_11: gpio1_13 */ - BONE_P9_30 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* P9_30: gpio3_16 */ - BONE_P9_27 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* P9_27: gpio3_19 */ - BONE_P9_41 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* P9_41: gpio3_20 */ - BONE_P9_42 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* P9_42: gpio0_7 */ - >; - }; - - - bborg_i2c_pins: pinmux_bborg_i2c_pins { - pinctrl-single,pins = < - BONE_P9_20 (SLEWCTRL_SLOW | PIN_INPUT_PULLUP | MUX_MODE3) /* P9_19: i2c2.sda */ - BONE_P9_19 (SLEWCTRL_SLOW | PIN_INPUT_PULLUP | MUX_MODE3) /* P9_20: i2c2.scl */ - >; - }; - - - bborg_servo_pca9685_en_pins: pinmux_bborg_servo_pca9685_en_pins { - pinctrl-single,pins = < - BONE_P8_10 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* P9_20: servo.en */ - >; - }; +/* + * Enable and Update the default state of the pins + * For pinctrl-0 values see these file + * BeagleBoard-DeviceTrees/src/arm/am572x-bone-common-univ.dtsi + * BeagleBoard-DeviceTrees/src/arm/am335x-bone-common-univ.dtsi + */ +&ocp { + P8_12_pinmux { status = "okay"; pinctrl-0 = <&P8_12_gpio_input_pin>; }; /* IN1 */ + P8_11_pinmux { status = "okay"; pinctrl-0 = <&P8_11_gpio_input_pin>; }; /* IN2 */ + P9_30_pinmux { status = "okay"; pinctrl-0 = <&P9_30_gpio_input_pin>; }; /* IN3 */ + P9_27_pinmux { status = "okay"; pinctrl-0 = <&P9_27_gpio_input_pin>; }; /* IN4 */ + P9_41_pinmux { status = "okay"; pinctrl-0 = <&P9_41_gpio_input_pin>; }; /* IN5 */ + P9_42_pinmux { status = "okay"; pinctrl-0 = <&P9_42_gpio_input_pin>; }; /* IN6 */ + + P9_19_pinmux { status = "okay"; pinctrl-0 = <&P9_19_i2c_pin>; }; /* i2c_scl */ + P9_20_pinmux { status = "okay"; pinctrl-0 = <&P9_20_i2c_pin>; }; /* i2c_sda */ + P8_10_pinmux { status = "okay"; pinctrl-0 = <&P8_10_gpio_pin>; }; /* pca9685.enable */ }; -&i2c2 { - pinctrl-names = "default"; - pinctrl-0 = <&bborg_i2c_pins>; - status = "okay"; - clock-frequency = <100000>; - #address-cells = <1>; - #size-cells = <0>; +&bone_i2c_2 { + // bone_i2c_2 is enabled by default on BBB and BBAI for cape EEPROM + // status = "okay"; + // clock-frequency = <100000>; + // #address-cells = <1>; + // #size-cells = <0>; pca: pca@70 { compatible = "nxp,pca9685-pwm"; @@ -86,16 +71,13 @@ }; &{/} { - pca9685 { - pinctrl-names = "default"; - pinctrl-0 = <&bborg_servo_pca9685_en_pins>; - - compatible = "gpio-leds"; - - pca9685-enable { + leds { + led_P8_10 { + status = "okay"; label = "pca9685-enable"; - gpios = <&gpio2 4 GPIO_ACTIVE_LOW>; - default-state = "on"; + // pca9685 Chip enable is ACTIVE-LOW but LEDs are set to ACTIVE-HIGH + // Set default-state to "off" to enable the pca9685 chip by default. + default-state = "off"; }; }; }; \ No newline at end of file