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0.10.1To be completed before the 0.10.1 releaseTo be completed before the 0.10.1 releaseenhancementNew feature or requestNew feature or request
Description
Discussed in #214
Originally posted by Freed-Wu January 8, 2025
For example, TI asm have different assembly directive and CPU instruction.
.global _main
.global _puts, _rand, _ltoa
.sect ".const"
string1: .string "The random value returned is ", 0
string2: .string " ", 10, 0 ; '10' == newline
.bss charbuf, 20
.text
_main: .cproc
.reg random_value, bufptr, ran_val_hi:ran_val_lo
.call random_value = _rand() ; get a random value
MVKL string1, bufptr ; load address of string1
MVKH string1, bufptr
.call _puts(bufptr) ; print out string1
MV random_value, ran_val_lo
SHR ran_val_lo, 31, ran_val_hi ; sign extend random value
.call _ltoa(ran_val_hi:ran_val_lo, bufptr) ; convert it to a string
.call _puts(bufptr) ; print out the random value
MVKL string2, bufptr ; load address of string2
MVKH string2, bufptr
.call _puts(bufptr) ; print out a newline
.endproc Metadata
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0.10.1To be completed before the 0.10.1 releaseTo be completed before the 0.10.1 releaseenhancementNew feature or requestNew feature or request