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Merge pull request #654 from betrusted-io/i2c-nack
RFC: I2C NACK
2 parents 69e73ff + d17f988 commit 4bc762e

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12 files changed

+187
-42
lines changed

12 files changed

+187
-42
lines changed

‎libs/cramium-api/src/api.rs

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -36,6 +36,8 @@ pub enum HalOpcode {
3636
ConfigureUdmaClock = 7,
3737
// blocking scalar
3838
ConfigureUdmaEvent = 8,
39+
// blocking scalar
40+
UdmaIrqStatusBits = 16,
3941

4042
/// I2C operations
4143
I2c = 9,

‎libs/cramium-api/src/i2c.rs

Lines changed: 5 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
pub trait I2cApi {
2-
fn i2c_write(&mut self, dev: u8, adr: u8, data: &[u8]) -> Result<usize, xous::Error>;
2+
fn i2c_write(&mut self, dev: u8, adr: u8, data: &[u8]) -> Result<I2cResult, xous::Error>;
33

44
/// initiate an i2c read. The read buffer is passed during the await.
55
fn i2c_read(
@@ -8,7 +8,7 @@ pub trait I2cApi {
88
adr: u8,
99
buf: &mut [u8],
1010
repeated_start: bool,
11-
) -> Result<usize, xous::Error>;
11+
) -> Result<I2cResult, xous::Error>;
1212
}
1313

1414
#[cfg_attr(feature = "derive-rkyv", derive(rkyv::Archive, rkyv::Serialize, rkyv::Deserialize))]
@@ -20,14 +20,16 @@ pub enum I2cTransactionType {
2020
}
2121

2222
#[cfg_attr(feature = "derive-rkyv", derive(rkyv::Archive, rkyv::Serialize, rkyv::Deserialize))]
23-
#[derive(Debug)]
23+
#[derive(Debug, PartialEq, Eq, Copy, Clone)]
2424
pub enum I2cResult {
2525
/// For the outbound message holder
2626
Pending,
2727
/// Returns # of bytes read or written if successful
2828
Ack(usize),
2929
/// An error occurred.
3030
Nack,
31+
/// An unhandled error has occurred.
32+
InternalError,
3133
}
3234
#[cfg_attr(feature = "derive-rkyv", derive(rkyv::Archive, rkyv::Serialize, rkyv::Deserialize))]
3335
#[cfg(feature = "std")]

‎libs/cramium-api/src/udma.rs

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -233,6 +233,12 @@ pub enum EventChannel {
233233
Channel3 = 24,
234234
}
235235

236+
#[derive(Debug, Copy, Clone, num_derive::FromPrimitive)]
237+
pub enum IrqBank {
238+
I2c,
239+
I2cErr,
240+
}
241+
236242
/// Use a trait that will allow us to share code between both `std` and `no-std` implementations
237243
pub trait UdmaGlobalConfig {
238244
fn clock(&self, peripheral: PeriphId, enable: bool);
@@ -243,4 +249,5 @@ pub trait UdmaGlobalConfig {
243249
to_channel: EventChannel,
244250
);
245251
fn reset(&self, peripheral: PeriphId);
252+
fn irq_status_bits(&self, bank: IrqBank) -> u32;
246253
}

‎libs/cramium-hal/src/axp2101.rs

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -213,6 +213,8 @@ impl Axp2101 {
213213
}
214214
}
215215

216+
pub fn get_dcdc(&mut self, which: WhichDcDc) -> (f32, bool) { self.dcdc_v_dvm[which as usize] }
217+
216218
pub fn set_ldo(
217219
&mut self,
218220
i2c: &mut dyn I2cApi,
@@ -237,6 +239,10 @@ impl Axp2101 {
237239
}
238240
}
239241

242+
pub fn get_ldo(&mut self, which: WhichLdo) -> (f32, bool) {
243+
(self.ldo_v[which as usize], self.ldo_ena[which as usize])
244+
}
245+
240246
fn encode_dcdc_ena(&self) -> u8 {
241247
let mut code = 0;
242248
for (i, &ena) in self.dcdc_ena.iter().enumerate() {

‎libs/cramium-hal/src/udma/i2c.rs

Lines changed: 62 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -263,6 +263,50 @@ impl<'a> I2c<'a> {
263263
xous::yield_slice();
264264
}
265265
}
266+
let nack_bits = self.udma_global.irq_status_bits(IrqBank::I2cErr);
267+
match self.channel {
268+
I2cChannel::Channel0 => {
269+
if (nack_bits
270+
& (utralib::utra::irqarray12::EV_STATUS_I2C0_NACK.mask()
271+
<< utralib::utra::irqarray12::EV_STATUS_I2C0_NACK.offset())
272+
as u32)
273+
!= 0
274+
{
275+
return Err(xous::Error::Timeout);
276+
}
277+
}
278+
I2cChannel::Channel1 => {
279+
if (nack_bits
280+
& (utralib::utra::irqarray12::EV_STATUS_I2C1_NACK.mask()
281+
<< utralib::utra::irqarray12::EV_STATUS_I2C1_NACK.offset())
282+
as u32)
283+
!= 0
284+
{
285+
return Err(xous::Error::Timeout);
286+
}
287+
}
288+
I2cChannel::Channel2 => {
289+
if (nack_bits
290+
& (utralib::utra::irqarray12::EV_STATUS_I2C2_NACK.mask()
291+
<< utralib::utra::irqarray12::EV_STATUS_I2C2_NACK.offset())
292+
as u32)
293+
!= 0
294+
{
295+
return Err(xous::Error::Timeout);
296+
}
297+
}
298+
I2cChannel::Channel3 => {
299+
if (nack_bits
300+
& (utralib::utra::irqarray12::EV_STATUS_I2C3_NACK.mask()
301+
<< utralib::utra::irqarray12::EV_STATUS_I2C3_NACK.offset())
302+
as u32)
303+
!= 0
304+
{
305+
return Err(xous::Error::Timeout);
306+
}
307+
}
308+
}
309+
266310
let ret = match self.pending.take() {
267311
I2cPending::Read(len) => {
268312
if let Some(buf) = rx_buf {
@@ -458,13 +502,25 @@ impl I2cApi for I2c<'_> {
458502
adr: u8,
459503
buf: &mut [u8],
460504
repeated_start: bool,
461-
) -> Result<usize, xous::Error> {
462-
self.i2c_read_async(dev, adr, buf.len(), repeated_start)?;
463-
self.i2c_await(Some(buf), true)
505+
) -> Result<I2cResult, xous::Error> {
506+
match self.i2c_read_async(dev, adr, buf.len(), repeated_start) {
507+
Err(_) => return Err(xous::Error::InternalError),
508+
_ => (),
509+
};
510+
match self.i2c_await(Some(buf), true) {
511+
Ok(b) => Ok(I2cResult::Ack(b)),
512+
_ => Ok(I2cResult::Nack),
513+
}
464514
}
465515

466-
fn i2c_write(&mut self, dev: u8, adr: u8, data: &[u8]) -> Result<usize, xous::Error> {
467-
self.i2c_write_async(dev, adr, data)?;
468-
self.i2c_await(None, true)
516+
fn i2c_write(&mut self, dev: u8, adr: u8, data: &[u8]) -> Result<I2cResult, xous::Error> {
517+
match self.i2c_write_async(dev, adr, data) {
518+
Err(_) => return Err(xous::Error::InternalError),
519+
_ => (),
520+
};
521+
match self.i2c_await(None, true) {
522+
Ok(b) => Ok(I2cResult::Ack(b)),
523+
_ => Ok(I2cResult::Nack),
524+
}
469525
}
470526
}

‎libs/cramium-hal/src/udma/mod.rs

Lines changed: 60 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -37,9 +37,53 @@ impl Into<usize> for GlobalReg {
3737

3838
pub struct GlobalConfig {
3939
csr: SharedCsr<u32>,
40+
i2c_irq: SharedCsr<u32>,
41+
i2c_err_irq: SharedCsr<u32>,
4042
}
4143
impl GlobalConfig {
42-
pub fn new(base_addr: *mut u32) -> Self { GlobalConfig { csr: SharedCsr::new(base_addr) } }
44+
pub fn new() -> Self {
45+
#[cfg(target_os = "xous")]
46+
let base_addr = xous::syscall::map_memory(
47+
xous::MemoryAddress::new(utralib::generated::HW_UDMA_CTRL_BASE),
48+
None,
49+
4096,
50+
xous::MemoryFlags::R | xous::MemoryFlags::W,
51+
)
52+
.expect("couldn't map UDMA global control")
53+
.as_mut_ptr() as *mut u32;
54+
#[cfg(not(target_os = "xous"))]
55+
let base_addr = utra::udma_ctrl::HW_UDMA_CTRL_BASE as *mut u32;
56+
57+
#[cfg(target_os = "xous")]
58+
let i2c_irq_addr = xous::syscall::map_memory(
59+
xous::MemoryAddress::new(utralib::generated::HW_IRQARRAY7_BASE),
60+
None,
61+
4096,
62+
xous::MemoryFlags::R | xous::MemoryFlags::W,
63+
)
64+
.expect("couldn't map I2C IRQ range")
65+
.as_mut_ptr() as *mut u32;
66+
#[cfg(not(target_os = "xous"))]
67+
let i2c_irq_addr = utralib::generated::HW_IRQARRAY7_BASE as *mut u32;
68+
69+
#[cfg(target_os = "xous")]
70+
let i2c_err_irq_addr = xous::syscall::map_memory(
71+
xous::MemoryAddress::new(utralib::generated::HW_IRQARRAY12_BASE),
72+
None,
73+
4096,
74+
xous::MemoryFlags::R | xous::MemoryFlags::W,
75+
)
76+
.expect("couldn't map I2C IRQ range")
77+
.as_mut_ptr() as *mut u32;
78+
#[cfg(not(target_os = "xous"))]
79+
let i2c_err_irq_addr = utralib::generated::HW_IRQARRAY12_BASE as *mut u32;
80+
81+
GlobalConfig {
82+
csr: SharedCsr::new(base_addr),
83+
i2c_irq: SharedCsr::new(i2c_irq_addr),
84+
i2c_err_irq: SharedCsr::new(i2c_err_irq_addr),
85+
}
86+
}
4387

4488
pub fn clock_on(&self, peripheral: PeriphId) {
4589
// Safety: only safe when used in the context of UDMA registers.
@@ -138,6 +182,21 @@ impl UdmaGlobalConfig for GlobalConfig {
138182
}
139183

140184
fn reset(&self, peripheral: PeriphId) { self.reset(peripheral); }
185+
186+
fn irq_status_bits(&self, bank: IrqBank) -> u32 {
187+
match bank {
188+
IrqBank::I2c => {
189+
let pending = self.i2c_irq.r(utralib::utra::irqarray7::EV_PENDING);
190+
self.i2c_irq.wo(utralib::utra::irqarray7::EV_PENDING, pending);
191+
pending
192+
}
193+
IrqBank::I2cErr => {
194+
let pending = self.i2c_err_irq.r(utralib::utra::irqarray12::EV_PENDING);
195+
self.i2c_err_irq.wo(utralib::utra::irqarray12::EV_PENDING, pending);
196+
pending
197+
}
198+
}
199+
}
141200
}
142201
// --------------------------------- DMA channel ------------------------------------
143202
pub(crate) const CFG_EN: u32 = 0b01_0000; // start a transfer

‎loader/src/platform/cramium/cramium.rs

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -235,7 +235,7 @@ pub fn early_init() -> u32 {
235235

236236
// Set up the UDMA_UART block to the correct baud rate and enable status
237237
#[allow(unused_mut)] // some configs require mut
238-
let mut udma_global = GlobalConfig::new(utra::udma_ctrl::HW_UDMA_CTRL_BASE as *mut u32);
238+
let mut udma_global = GlobalConfig::new();
239239
udma_global.clock_on(PeriphId::Uart1);
240240
udma_global.map_event(
241241
PeriphId::Uart1,
@@ -409,7 +409,7 @@ pub fn early_init() -> u32 {
409409
// show the boot logo
410410
use ux_api::minigfx::FrameBuffer;
411411

412-
let mut udma_global = GlobalConfig::new(utra::udma_ctrl::HW_UDMA_CTRL_BASE as *mut u32);
412+
let mut udma_global = GlobalConfig::new();
413413
let mut sh1107 = cramium_hal::sh1107::Oled128x128::new(
414414
cramium_hal::sh1107::MainThreadToken::new(),
415415
perclk,
@@ -456,7 +456,7 @@ pub fn early_init() -> u32 {
456456
use crate::platform::cramium::qr;
457457

458458
let iox = Iox::new(utra::iox::HW_IOX_BASE as *mut u32);
459-
let udma_global = GlobalConfig::new(utra::udma_ctrl::HW_UDMA_CTRL_BASE as *mut u32);
459+
let udma_global = GlobalConfig::new();
460460

461461
// setup camera pins
462462
let (cam_pdwn_bnk, cam_pdwn_pin) = cramium_hal::board::setup_camera_pins(&iox);
@@ -962,7 +962,7 @@ pub fn early_init() -> u32 {
962962

963963
// setup the I/O pins
964964
let mut iox = Iox::new(utralib::generated::HW_IOX_BASE as *mut u32);
965-
let mut udma_global = GlobalConfig::new(utralib::generated::HW_UDMA_CTRL_BASE as *mut u32);
965+
let mut udma_global = GlobalConfig::new();
966966
let channel = cramium_hal::board::setup_memory_pins(&iox);
967967
udma_global.clock_off(PeriphId::from(channel));
968968

‎loader/src/platform/cramium/swap.rs

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -41,7 +41,7 @@ pub struct SwapHal {
4141
impl SwapHal {
4242
pub fn new(cfg: &BootConfig, perclk_freq: u32) -> Option<SwapHal> {
4343
if let Some(swap) = cfg.swap {
44-
let udma_global = GlobalConfig::new(utralib::generated::HW_UDMA_CTRL_BASE as *mut u32);
44+
let udma_global = GlobalConfig::new();
4545

4646
// setup the I/O pins
4747
let iox = Iox::new(utralib::generated::HW_IOX_BASE as *mut u32);
@@ -413,8 +413,7 @@ pub fn userspace_maps(cfg: &mut BootConfig) {
413413
iox.set_gpio_dir(IoxPort::PD, 3, IoxDir::Output);
414414

415415
// Set up the UDMA_UART block to the correct baud rate and enable status
416-
let udma_global =
417-
cramium_hal::udma::GlobalConfig::new(utralib::utra::udma_ctrl::HW_UDMA_CTRL_BASE as *mut u32);
416+
let udma_global = cramium_hal::udma::GlobalConfig::new();
418417
udma_global.clock_on(PeriphId::Uart0);
419418
udma_global.map_event(
420419
PeriphId::Uart0,

‎loader/src/platform/cramium/update.rs

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -110,7 +110,7 @@ pub fn process_update(perclk: u32) {
110110

111111
crate::println!("waiting for button press");
112112
let mut iox = Iox::new(utra::iox::HW_IOX_BASE as *mut u32);
113-
let mut udma_global = udma::GlobalConfig::new(utra::udma_ctrl::HW_UDMA_CTRL_BASE as *mut u32);
113+
let mut udma_global = udma::GlobalConfig::new();
114114

115115
let iox_kbd = iox.clone();
116116
let mut sh1107 = cramium_hal::sh1107::Oled128x128::new(
@@ -394,9 +394,7 @@ pub fn process_update(perclk: u32) {
394394
);
395395
progress_bar(&mut sh1107, 0);
396396

397-
let udma_global = GlobalConfig::new(
398-
utralib::generated::HW_UDMA_CTRL_BASE as *mut u32,
399-
);
397+
let udma_global = GlobalConfig::new();
400398

401399
// setup the I/O pins
402400
let iox = Iox::new(utralib::generated::HW_IOX_BASE as *mut u32);

‎services/cram-hal-service/src/i2c_lib.rs

Lines changed: 10 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -33,7 +33,7 @@ impl I2cApi for I2c {
3333
adr: u8,
3434
buf: &mut [u8],
3535
repeated_start: bool,
36-
) -> Result<usize, xous::Error> {
36+
) -> Result<I2cResult, xous::Error> {
3737
let r = I2cTransaction {
3838
i2c_type: if repeated_start {
3939
I2cTransactionType::ReadRepeatedStart
@@ -46,16 +46,14 @@ impl I2cApi for I2c {
4646
result: I2cResult::Pending,
4747
};
4848
let result = self.i2c_transactions(I2cTransactions::from(vec![r]))?;
49-
match result.transactions[0].result {
50-
I2cResult::Ack(b) => {
51-
buf.copy_from_slice(&result.transactions[0].data);
52-
Ok(b)
53-
}
54-
_ => Err(xous::Error::InternalError),
49+
if result.transactions[0].result == I2cResult::InternalError {
50+
Err(xous::Error::InternalError)
51+
} else {
52+
Ok(result.transactions[0].result)
5553
}
5654
}
5755

58-
fn i2c_write(&mut self, dev: u8, adr: u8, data: &[u8]) -> Result<usize, xous::Error> {
56+
fn i2c_write(&mut self, dev: u8, adr: u8, data: &[u8]) -> Result<I2cResult, xous::Error> {
5957
let w = I2cTransaction {
6058
i2c_type: I2cTransactionType::Write,
6159
device: dev,
@@ -64,9 +62,10 @@ impl I2cApi for I2c {
6462
result: I2cResult::Pending,
6563
};
6664
let result = self.i2c_transactions(I2cTransactions::from(vec![w]))?;
67-
match result.transactions[0].result {
68-
I2cResult::Ack(b) => Ok(b),
69-
_ => Err(xous::Error::InternalError),
65+
if result.transactions[0].result == I2cResult::InternalError {
66+
Err(xous::Error::InternalError)
67+
} else {
68+
Ok(result.transactions[0].result)
7069
}
7170
}
7271
}

‎services/cram-hal-service/src/lib.rs

Lines changed: 16 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -86,4 +86,20 @@ impl UdmaGlobalConfig for UdmaGlobal {
8686
}
8787

8888
fn reset(&self, peripheral: PeriphId) { self.reset(peripheral); }
89+
90+
fn irq_status_bits(&self, bank: IrqBank) -> u32 {
91+
match xous::send_message(
92+
self.conn,
93+
xous::Message::new_blocking_scalar(
94+
HalOpcode::UdmaIrqStatusBits.to_usize().unwrap(),
95+
bank as u32 as usize,
96+
0,
97+
0,
98+
0,
99+
),
100+
) {
101+
Ok(xous::Result::Scalar5(_, value, _, _, _)) => value as u32,
102+
_ => panic!("Unhandled response on irq_status_bits"),
103+
}
104+
}
89105
}

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