diff --git a/.github/workflows/main.yml b/.github/workflows/main.yml index 99a6b0204d59..592cea2b3635 100644 --- a/.github/workflows/main.yml +++ b/.github/workflows/main.yml @@ -550,6 +550,7 @@ jobs: cargo check -p wasmtime --no-default-features --features runtime,component-model && cargo check -p wasmtime --no-default-features --features runtime,gc,component-model,async,debug-builtins && cargo check -p cranelift-control --no-default-features && + cargo check -p cranelift-assembler-x64 --no-default-features -F core && cargo check -p pulley-interpreter --features encode,decode,disas,interp && cargo check -p wasmtime-wasi-io --no-default-features # Use `cross` for illumos to have a C compiler/linker available. diff --git a/Cargo.toml b/Cargo.toml index ca68c5e23156..b82c369c620f 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -50,7 +50,10 @@ wasmtime-cranelift = { workspace = true, optional = true } wasmtime-environ = { workspace = true } wasmtime-explorer = { workspace = true, optional = true } wasmtime-wast = { workspace = true, optional = true } -wasi-common = { workspace = true, default-features = true, features = ["exit", "tokio"], optional = true } +wasi-common = { workspace = true, default-features = true, features = [ + "exit", + "tokio", +], optional = true } wasmtime-wasi = { workspace = true, default-features = true, optional = true } wasmtime-wasi-nn = { workspace = true, optional = true } wasmtime-wasi-config = { workspace = true, optional = true } @@ -59,7 +62,10 @@ wasmtime-wasi-keyvalue = { workspace = true, optional = true } wasmtime-wasi-threads = { workspace = true, optional = true } wasmtime-wasi-http = { workspace = true, optional = true } wasmtime-unwinder = { workspace = true } -wasmtime-wizer = { workspace = true, optional = true, features = ['clap', 'wasmtime'] } +wasmtime-wizer = { workspace = true, optional = true, features = [ + 'clap', + 'wasmtime', +] } clap = { workspace = true } clap_complete = { workspace = true, optional = true } anyhow = { workspace = true, features = ['std'] } @@ -84,7 +90,7 @@ smallvec = { workspace = true } async-trait = { workspace = true } bytes = { workspace = true } cfg-if = { workspace = true } -tokio = { workspace = true, optional = true, features = [ "signal", "macros" ] } +tokio = { workspace = true, optional = true, features = ["signal", "macros"] } hyper = { workspace = true, optional = true } http = { workspace = true, optional = true } http-body-util = { workspace = true, optional = true } @@ -95,12 +101,25 @@ rustix = { workspace = true, features = ["mm", "process"] } [dev-dependencies] # depend again on wasmtime to activate its default features for tests -wasmtime = { workspace = true, features = ['default', 'winch', 'pulley', 'all-arch', 'call-hook', 'memory-protection-keys', 'component-model-async'] } +wasmtime = { workspace = true, features = [ + 'default', + 'winch', + 'pulley', + 'all-arch', + 'call-hook', + 'memory-protection-keys', + 'component-model-async', +] } env_logger = { workspace = true } log = { workspace = true } filecheck = { workspace = true } tempfile = { workspace = true } -tokio = { workspace = true, features = ["rt", "time", "macros", "rt-multi-thread"] } +tokio = { workspace = true, features = [ + "rt", + "time", + "macros", + "rt-multi-thread", +] } wast = { workspace = true } criterion = { workspace = true } num_cpus = "1.17.0" @@ -110,7 +129,10 @@ wat = { workspace = true } rayon = "1.5.0" wasmtime-wast = { workspace = true, features = ['component-model'] } wasmtime-component-util = { workspace = true } -wasmtime-test-util = { workspace = true, features = ['wasmtime-wast', 'component'] } +wasmtime-test-util = { workspace = true, features = [ + 'wasmtime-wast', + 'component', +] } bstr = "1.6.0" libc = { workspace = true } serde = { workspace = true } @@ -120,7 +142,11 @@ test-programs-artifacts = { workspace = true } bytesize = "2.0.1" wit-component = { workspace = true } cranelift-filetests = { workspace = true } -cranelift-codegen = { workspace = true, features = ["disas", "trace-log", "timing"] } +cranelift-codegen = { workspace = true, features = [ + "disas", + "trace-log", + "timing", +] } cranelift-reader = { workspace = true } toml = { workspace = true } similar = { workspace = true } @@ -180,9 +206,7 @@ members = [ "fuzz", "winch/codegen", ] -exclude = [ - 'docs/rust_wasi_markdown_parser', -] +exclude = ['docs/rust_wasi_markdown_parser'] [workspace.package] version = "41.0.0" @@ -265,8 +289,8 @@ wasmtime-wmemcheck = { path = "crates/wmemcheck", version = "=41.0.0", package = wasmtime-c-api-macros = { path = "crates/c-api-macros", version = "=41.0.0", package = 'wasmtime-internal-c-api-macros' } wasmtime-cache = { path = "crates/cache", version = "=41.0.0", package = 'wasmtime-internal-cache' } wasmtime-cranelift = { path = "crates/cranelift", version = "=41.0.0", package = 'wasmtime-internal-cranelift' } -wasmtime-winch = { path = "crates/winch", version = "=41.0.0", package = 'wasmtime-internal-winch' } -wasmtime-explorer = { path = "crates/explorer", version = "=41.0.0", package = 'wasmtime-internal-explorer' } +wasmtime-winch = { path = "crates/winch", version = "=41.0.0", package = 'wasmtime-internal-winch' } +wasmtime-explorer = { path = "crates/explorer", version = "=41.0.0", package = 'wasmtime-internal-explorer' } wasmtime-fiber = { path = "crates/fiber", version = "=41.0.0", package = 'wasmtime-internal-fiber' } wasmtime-jit-debug = { path = "crates/jit-debug", version = "=41.0.0", package = 'wasmtime-internal-jit-debug' } wasmtime-component-util = { path = "crates/component-util", version = "=41.0.0", package = 'wasmtime-internal-component-util' } @@ -275,7 +299,7 @@ wasmtime-versioned-export-macros = { path = "crates/versioned-export-macros", ve wasmtime-slab = { path = "crates/slab", version = "=41.0.0", package = 'wasmtime-internal-slab' } wasmtime-jit-icache-coherence = { path = "crates/jit-icache-coherence", version = "=41.0.0", package = 'wasmtime-internal-jit-icache-coherence' } wasmtime-wit-bindgen = { path = "crates/wit-bindgen", version = "=41.0.0", package = 'wasmtime-internal-wit-bindgen' } -wasmtime-math = { path = "crates/math", version = "=41.0.0", package = 'wasmtime-internal-math' } +wasmtime-math = { path = "crates/math", version = "=41.0.0", package = 'wasmtime-internal-math' } wasmtime-unwinder = { path = "crates/unwinder", version = "=41.0.0", package = 'wasmtime-internal-unwinder' } wasmtime-debugger = { path = "crates/debugger", version = "=41.0.0", package = "wasmtime-internal-debugger" } wasmtime-wizer = { path = "crates/wizer", version = "41.0.0" } @@ -291,7 +315,10 @@ pulley-macros = { path = 'pulley/macros', version = "=41.0.0" } # Cranelift crates in this workspace cranelift-assembler-x64 = { path = "cranelift/assembler-x64", version = "0.128.0" } -cranelift-codegen = { path = "cranelift/codegen", version = "0.128.0", default-features = false, features = ["std", "unwind"] } +cranelift-codegen = { path = "cranelift/codegen", version = "0.128.0", default-features = false, features = [ + "std", + "unwind", +] } cranelift-frontend = { path = "cranelift/frontend", version = "0.128.0" } cranelift-entity = { path = "cranelift/entity", version = "0.128.0" } cranelift-native = { path = "cranelift/native", version = "0.128.0" } @@ -304,7 +331,7 @@ cranelift-jit = { path = "cranelift/jit", version = "0.128.0" } cranelift-fuzzgen = { path = "cranelift/fuzzgen" } cranelift-bforest = { path = "cranelift/bforest", version = "0.128.0" } cranelift-bitset = { path = "cranelift/bitset", version = "0.128.0" } -cranelift-control = { path = "cranelift/control", version = "0.128.0" } +cranelift-control = { path = "cranelift/control", version = "0.128.0", default-features = false } cranelift-srcgen = { path = "cranelift/srcgen", version = "0.128.0" } cranelift = { path = "cranelift/umbrella", version = "0.128.0" } @@ -322,7 +349,7 @@ component-async-tests = { path = "crates/misc/component-async-tests" } # Bytecode Alliance maintained dependencies: # --------------------------- -regalloc2 = "0.13.3" +regalloc2 = { version = "0.13.3", default-features = false } wasip1 = { version = "1.0.0", default-features = false } # cap-std family: @@ -343,7 +370,9 @@ wit-bindgen = { version = "0.50.0", default-features = false } wit-bindgen-rust-macro = { version = "0.50.0", default-features = false } # wasm-tools family: -wasmparser = { version = "0.243.0", default-features = false, features = ['simd'] } +wasmparser = { version = "0.243.0", default-features = false, features = [ + 'simd', +] } wat = "1.243.0" wast = "243.0.0" wasmprinter = "0.243.0" @@ -362,14 +391,20 @@ arbitrary = "1.4.2" backtrace = "0.3.75" mutatis = "0.3.2" cc = "1.2.41" -object = { version = "0.37.3", default-features = false, features = ['read_core', 'elf'] } +object = { version = "0.37.3", default-features = false, features = [ + 'read_core', + 'elf', +] } gimli = { version = "0.32.3", default-features = false, features = ['read'] } addr2line = { version = "0.25.1", default-features = false } anyhow = { version = "1.0.100", default-features = false } windows-sys = "0.61.2" env_logger = "0.11.5" log = { version = "0.4.28", default-features = false } -clap = { version = "4.5.48", default-features = false, features = ["std", "derive"] } +clap = { version = "4.5.48", default-features = false, features = [ + "std", + "derive", +] } clap_complete = "4.5.58" hashbrown = { version = "0.15", default-features = false } capstone = "0.13.0" @@ -398,7 +433,7 @@ tempfile = "3.23.0" filecheck = "0.5.0" libc = { version = "0.2.177", default-features = true } file-per-thread-logger = "0.2.0" -tokio = { version = "1.48.0", features = [ "rt", "time" ] } +tokio = { version = "1.48.0", features = ["rt", "time"] } hyper = "1.7.0" http = "1.3.1" http-body = "1.0.1" @@ -409,12 +444,22 @@ indexmap = { version = "2.11.4", default-features = false } syn = "2.0.106" quote = "1.0.41" proc-macro2 = "1.0.101" -test-log = { version = "0.2.18", default-features = false, features = ["trace"] } -tracing-subscriber = { version = "0.3.20", default-features = false, features = ['fmt', 'env-filter', 'ansi', 'tracing-log'] } +test-log = { version = "0.2.18", default-features = false, features = [ + "trace", +] } +tracing-subscriber = { version = "0.3.20", default-features = false, features = [ + 'fmt', + 'env-filter', + 'ansi', + 'tracing-log', +] } url = "2.5.7" postcard = { version = "1.1.3", default-features = false, features = ['alloc'] } -criterion = { version = "0.7.0", default-features = false, features = ["html_reports", "rayon"] } -rustc-hash = "2.1.1" +criterion = { version = "0.7.0", default-features = false, features = [ + "html_reports", + "rayon", +] } +rustc-hash = { version = "2.1.1", default-features = false } libtest-mimic = "0.8.1" semver = { version = "1.0.27", default-features = false } ittapi = "0.4.0" @@ -529,10 +574,19 @@ disable-logging = ["log/max_level_off", "tracing/max_level_off"] wasi-nn = ["dep:wasmtime-wasi-nn"] wasi-tls = ["dep:wasmtime-wasi-tls"] wasi-threads = ["dep:wasmtime-wasi-threads", "threads"] -wasi-http = ["component-model", "dep:wasmtime-wasi-http", "dep:tokio", "dep:hyper", "wasmtime-wasi-http/default-send-request"] +wasi-http = [ + "component-model", + "dep:wasmtime-wasi-http", + "dep:tokio", + "dep:hyper", + "wasmtime-wasi-http/default-send-request", +] wasi-config = ["dep:wasmtime-wasi-config"] wasi-keyvalue = ["dep:wasmtime-wasi-keyvalue"] -pooling-allocator = ["wasmtime/pooling-allocator", "wasmtime-cli-flags/pooling-allocator"] +pooling-allocator = [ + "wasmtime/pooling-allocator", + "wasmtime-cli-flags/pooling-allocator", +] component-model = [ "wasmtime/component-model", "wasmtime-wast?/component-model", @@ -554,7 +608,10 @@ gc = ["wasmtime-cli-flags/gc", "wasmtime/gc"] gc-drc = ["gc", "wasmtime/gc-drc", "wasmtime-cli-flags/gc-drc"] gc-null = ["gc", "wasmtime/gc-null", "wasmtime-cli-flags/gc-null"] pulley = ["wasmtime-cli-flags/pulley"] -stack-switching = ["wasmtime/stack-switching", "wasmtime-cli-flags/stack-switching"] +stack-switching = [ + "wasmtime/stack-switching", + "wasmtime-cli-flags/stack-switching", +] debug = ["wasmtime-cli-flags/debug", "wasmtime/debug"] # CLI subcommands for the `wasmtime` executable. See `wasmtime $cmd --help` diff --git a/cranelift/assembler-x64/Cargo.toml b/cranelift/assembler-x64/Cargo.toml index 6935ec669950..424d26f206ce 100644 --- a/cranelift/assembler-x64/Cargo.toml +++ b/cranelift/assembler-x64/Cargo.toml @@ -23,3 +23,4 @@ workspace = true [features] fuzz = ['dep:arbitrary', 'dep:capstone'] +core = [] diff --git a/cranelift/assembler-x64/meta/src/dsl/format.rs b/cranelift/assembler-x64/meta/src/dsl/format.rs index fe39d1892db3..cb6b8e5a9645 100644 --- a/cranelift/assembler-x64/meta/src/dsl/format.rs +++ b/cranelift/assembler-x64/meta/src/dsl/format.rs @@ -535,7 +535,7 @@ impl Default for Mutability { } impl core::fmt::Display for Mutability { - fn fmt(&self, f: &mut std::fmt::Formatter<'_>) -> std::fmt::Result { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { match self { Self::Read => write!(f, "r"), Self::ReadWrite => write!(f, "rw"), @@ -576,7 +576,7 @@ impl Default for Extension { } impl core::fmt::Display for Extension { - fn fmt(&self, f: &mut std::fmt::Formatter<'_>) -> std::fmt::Result { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { match self { Extension::None => write!(f, ""), Extension::SignExtendQuad => write!(f, "sxq"), @@ -627,7 +627,7 @@ impl Default for Eflags { } impl core::fmt::Display for Eflags { - fn fmt(&self, f: &mut std::fmt::Formatter<'_>) -> std::fmt::Result { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { match self { Self::None => write!(f, ""), Self::R => write!(f, "r"), diff --git a/cranelift/assembler-x64/meta/src/generate.rs b/cranelift/assembler-x64/meta/src/generate.rs index b4b13e19d33e..4191a53d6833 100644 --- a/cranelift/assembler-x64/meta/src/generate.rs +++ b/cranelift/assembler-x64/meta/src/generate.rs @@ -53,11 +53,11 @@ fn match_variants(f: &mut Formatter, insts: &[dsl::Inst], invoke: &str) { }); } -/// `impl std::fmt::Display for Inst { ... }` +/// `impl core::fmt::Display for Inst { ... }` fn generate_inst_display_impl(f: &mut Formatter, insts: &[dsl::Inst]) { - f.add_block("impl std::fmt::Display for Inst", |f| { + f.add_block("impl core::fmt::Display for Inst", |f| { f.add_block( - "fn fmt(&self, f: &mut std::fmt::Formatter<'_>) -> std::fmt::Result", + "fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result", |f| { match_variants(f, insts, "fmt(f)"); }, diff --git a/cranelift/assembler-x64/meta/src/generate/inst.rs b/cranelift/assembler-x64/meta/src/generate/inst.rs index 0991b4134be8..6d5e8b8862fe 100644 --- a/cranelift/assembler-x64/meta/src/generate/inst.rs +++ b/cranelift/assembler-x64/meta/src/generate/inst.rs @@ -107,12 +107,12 @@ impl dsl::Inst { fmtln!(f, "#[must_use]"); fmtln!(f, "#[inline]"); f.add_block( - &format!("pub fn mnemonic(&self) -> std::borrow::Cow<'static, str>"), + &format!("pub fn mnemonic(&self) -> alloc::borrow::Cow<'static, str>"), |f| { if self.custom.contains(Mnemonic) { fmtln!(f, "crate::custom::mnemonic::{}(self)", self.name()); } else { - fmtln!(f, "std::borrow::Cow::Borrowed(\"{}\")", self.mnemonic); + fmtln!(f, "alloc::borrow::Cow::Borrowed(\"{}\")", self.mnemonic); } }, ); @@ -265,10 +265,10 @@ impl dsl::Inst { let impl_block = self.generate_impl_block_start(); let struct_name = self.struct_name_with_generic(); f.add_block( - &format!("{impl_block} std::fmt::Display for {struct_name}"), + &format!("{impl_block} core::fmt::Display for {struct_name}"), |f| { f.add_block( - "fn fmt(&self, f: &mut std::fmt::Formatter) -> std::fmt::Result", + "fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result", |f| { if self.custom.contains(Display) { fmtln!(f, "crate::custom::display::{}(f, self)", self.name()); diff --git a/cranelift/assembler-x64/src/api.rs b/cranelift/assembler-x64/src/api.rs index c27101985b2c..f65cfc338045 100644 --- a/cranelift/assembler-x64/src/api.rs +++ b/cranelift/assembler-x64/src/api.rs @@ -3,9 +3,10 @@ use crate::gpr; use crate::xmm; use crate::{Amode, DeferredTarget, GprMem, XmmMem}; -use std::fmt; -use std::{num::NonZeroU8, vec::Vec}; - +use alloc::vec::Vec; +use core::fmt; +use core::num::NonZeroU8; +use alloc::string::String; /// Describe how an instruction is emitted into a code buffer. pub trait CodeSink { /// Add 1 byte to the code section. @@ -113,7 +114,7 @@ pub trait Registers { } /// Describe how to interact with an external register type. -pub trait AsReg: Copy + Clone + std::fmt::Debug + PartialEq { +pub trait AsReg: Copy + Clone + core::fmt::Debug + PartialEq { /// Create a register from its hardware encoding. /// /// This is primarily useful for fuzzing, though it is also useful for diff --git a/cranelift/assembler-x64/src/custom.rs b/cranelift/assembler-x64/src/custom.rs index adbfd2c6acc9..c2b70fecbc24 100644 --- a/cranelift/assembler-x64/src/custom.rs +++ b/cranelift/assembler-x64/src/custom.rs @@ -75,7 +75,7 @@ pub mod encode { pub mod mnemonic { use crate::inst; use crate::{Registers, XmmMem}; - use std::borrow::Cow; + use alloc::borrow::Cow; macro_rules! lock { ($name:tt => $mnemonic:expr) => { @@ -191,7 +191,8 @@ pub mod mnemonic { pub mod display { use crate::inst; use crate::{Amode, Gpr, GprMem, Registers, Size}; - use std::fmt; + use core::fmt; + use alloc::string::ToString; pub fn callq_d(f: &mut fmt::Formatter, inst: &inst::callq_d) -> fmt::Result { let inst::callq_d { imm32 } = inst; diff --git a/cranelift/assembler-x64/src/features.rs b/cranelift/assembler-x64/src/features.rs index 3559b9755662..77864e74db92 100644 --- a/cranelift/assembler-x64/src/features.rs +++ b/cranelift/assembler-x64/src/features.rs @@ -32,7 +32,7 @@ //! [`Inst::features`]: crate::inst::Inst::features use crate::inst::for_each_feature; -use std::fmt; +use core::fmt; // Helpfully generate `enum Feature`. macro_rules! create_feature_enum { diff --git a/cranelift/assembler-x64/src/fixed.rs b/cranelift/assembler-x64/src/fixed.rs index d689874c9a5a..c17ca3b944ef 100644 --- a/cranelift/assembler-x64/src/fixed.rs +++ b/cranelift/assembler-x64/src/fixed.rs @@ -1,6 +1,7 @@ //! Operands with fixed register encodings. use crate::{AsReg, Size}; +use alloc::string::String; /// A _fixed_ register. /// diff --git a/cranelift/assembler-x64/src/fuzz.rs b/cranelift/assembler-x64/src/fuzz.rs index 250e08a43e57..9bbcaf83509f 100644 --- a/cranelift/assembler-x64/src/fuzz.rs +++ b/cranelift/assembler-x64/src/fuzz.rs @@ -146,7 +146,7 @@ fn disassemble(assembled: &[u8], original: &Inst) -> String { } fn pretty_print_hexadecimal(hex: &[u8]) -> String { - use std::fmt::Write; + use core::fmt::Write; let mut s = String::with_capacity(hex.len() * 2); for b in hex { write!(&mut s, "{b:02X}").unwrap(); @@ -183,7 +183,7 @@ macro_rules! hex_print_signed_imm { /// - print negative values as `-0x...` (signed hex) instead of `0xff...` /// (normal hex) /// - print `mov` immediates as base-10 instead of base-16 (?!). -fn replace_signed_immediates(dis: &str) -> std::borrow::Cow<'_, str> { +fn replace_signed_immediates(dis: &str) -> alloc::borrow::Cow<'_, str> { match dis.find('$') { None => dis.into(), Some(idx) => { @@ -259,7 +259,7 @@ fn remove_after_parenthesis_test() { } /// Run some post-processing on the disassembly to make it match Capstone. -fn fix_up(dis: &str) -> std::borrow::Cow<'_, str> { +fn fix_up(dis: &str) -> alloc::borrow::Cow<'_, str> { let dis = remove_after_semicolon(dis); replace_signed_immediates(&dis) } diff --git a/cranelift/assembler-x64/src/gpr.rs b/cranelift/assembler-x64/src/gpr.rs index 4013c60686de..5489b513ce29 100644 --- a/cranelift/assembler-x64/src/gpr.rs +++ b/cranelift/assembler-x64/src/gpr.rs @@ -1,6 +1,7 @@ //! Pure register operands; see [`Gpr`]. use crate::AsReg; +use alloc::string::String; /// A general purpose x64 register (e.g., `%rax`). /// diff --git a/cranelift/assembler-x64/src/imm.rs b/cranelift/assembler-x64/src/imm.rs index eeb5a27d4d0d..0c129cd65d45 100644 --- a/cranelift/assembler-x64/src/imm.rs +++ b/cranelift/assembler-x64/src/imm.rs @@ -1,7 +1,10 @@ //! Immediate operands to instructions. use crate::api::CodeSink; -use std::fmt; +use core::fmt; + +#[cfg(feature = "core")] +use alloc::{format, string::String}; /// This helper function prints the unsigned hexadecimal representation of the /// immediate value: e.g., this prints `$0xfe` to represent both the signed `-2` @@ -49,7 +52,7 @@ impl From for Imm8 { } impl TryFrom for Imm8 { - type Error = std::num::TryFromIntError; + type Error = core::num::TryFromIntError; fn try_from(simm32: i32) -> Result { Ok(Self(u8::try_from(simm32)?)) } @@ -100,7 +103,7 @@ impl From for Simm8 { } impl TryFrom for Simm8 { - type Error = std::num::TryFromIntError; + type Error = core::num::TryFromIntError; fn try_from(simm32: i32) -> Result { Ok(Self(i8::try_from(simm32)?)) } @@ -134,7 +137,7 @@ impl From for Imm16 { } impl TryFrom for Imm16 { - type Error = std::num::TryFromIntError; + type Error = core::num::TryFromIntError; fn try_from(simm32: i32) -> Result { Ok(Self(u16::try_from(simm32)?)) } @@ -185,7 +188,7 @@ impl From for Simm16 { } impl TryFrom for Simm16 { - type Error = std::num::TryFromIntError; + type Error = core::num::TryFromIntError; fn try_from(simm32: i32) -> Result { Ok(Self(i16::try_from(simm32)?)) } diff --git a/cranelift/assembler-x64/src/inst.rs b/cranelift/assembler-x64/src/inst.rs index 173336a7372d..e4f23849cd12 100644 --- a/cranelift/assembler-x64/src/inst.rs +++ b/cranelift/assembler-x64/src/inst.rs @@ -14,6 +14,9 @@ use crate::rex::RexPrefix; use crate::vex::VexPrefix; use crate::xmm::{self, Xmm}; +use alloc::string::ToString; + + // Include code generated by the `meta` crate. include!(concat!(env!("OUT_DIR"), "/assembler.rs")); diff --git a/cranelift/assembler-x64/src/lib.rs b/cranelift/assembler-x64/src/lib.rs index 7b5b6db7fc3a..d28e102ffeb7 100644 --- a/cranelift/assembler-x64/src/lib.rs +++ b/cranelift/assembler-x64/src/lib.rs @@ -41,6 +41,8 @@ non_camel_case_types, reason = "all of the generated struct names use snake case" )] +#![cfg_attr(feature = "core", no_std)] +extern crate alloc; mod api; mod custom; diff --git a/cranelift/assembler-x64/src/main.rs b/cranelift/assembler-x64/src/main.rs index c50a80fea5b9..4361d85624f9 100644 --- a/cranelift/assembler-x64/src/main.rs +++ b/cranelift/assembler-x64/src/main.rs @@ -1,8 +1,19 @@ //! Print the path to the generated code. +#![cfg_attr(feature = "core", no_std)] +#[cfg(not(feature = "core"))] fn main() { let paths: Vec = include!(concat!(env!("OUT_DIR"), "/generated-files.rs")); for path in paths { println!("{}", path.display()); } } + +#[cfg(feature = "core")] +fn main() {} + +#[cfg(feature = "core")] +#[panic_handler] +fn panic(_info: &core::panic::PanicInfo) -> ! { + loop {} +} \ No newline at end of file diff --git a/cranelift/assembler-x64/src/mem.rs b/cranelift/assembler-x64/src/mem.rs index 19cf06707e54..cffecf9bf18b 100644 --- a/cranelift/assembler-x64/src/mem.rs +++ b/cranelift/assembler-x64/src/mem.rs @@ -4,6 +4,9 @@ use crate::api::{AsReg, CodeSink, Constant, KnownOffset, Label, TrapCode}; use crate::gpr::{self, NonRspGpr, Size}; use crate::rex::{Disp, RexPrefix, encode_modrm, encode_sib}; +#[cfg(feature = "core")] +use alloc::string::{String, ToString}; + /// x64 memory addressing modes. #[derive(Copy, Clone, Debug, PartialEq)] #[cfg_attr(any(test, feature = "fuzz"), derive(arbitrary::Arbitrary))] @@ -99,8 +102,8 @@ impl From for AmodeOffset { } } -impl std::fmt::LowerHex for AmodeOffset { - fn fmt(&self, f: &mut std::fmt::Formatter) -> std::fmt::Result { +impl core::fmt::LowerHex for AmodeOffset { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { // This rather complex implementation is necessary to match how // `capstone` pretty-prints memory immediates. if self.0 == 0 { @@ -116,7 +119,7 @@ impl std::fmt::LowerHex for AmodeOffset { Some(i) => i, None => -2_147_483_648, }; - std::fmt::LowerHex::fmt(&abs, f) + core::fmt::LowerHex::fmt(&abs, f) } } @@ -154,12 +157,12 @@ impl AmodeOffsetPlusKnownOffset { } } -impl std::fmt::LowerHex for AmodeOffsetPlusKnownOffset { - fn fmt(&self, f: &mut std::fmt::Formatter) -> std::fmt::Result { +impl core::fmt::LowerHex for AmodeOffsetPlusKnownOffset { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { if let Some(offset) = self.offset { write!(f, "+")?; } - std::fmt::LowerHex::fmt(&self.simm32, f) + core::fmt::LowerHex::fmt(&self.simm32, f) } } @@ -172,8 +175,8 @@ pub enum DeferredTarget { None, } -impl std::fmt::Display for Amode { - fn fmt(&self, f: &mut std::fmt::Formatter<'_>) -> std::fmt::Result { +impl core::fmt::Display for Amode { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { let pointer_width = Size::Quadword; match self { Amode::ImmReg { simm32, base, .. } => { diff --git a/cranelift/assembler-x64/src/xmm.rs b/cranelift/assembler-x64/src/xmm.rs index 9b2a00a9d489..636c887afbc7 100644 --- a/cranelift/assembler-x64/src/xmm.rs +++ b/cranelift/assembler-x64/src/xmm.rs @@ -2,6 +2,10 @@ use crate::{AsReg, CodeSink, rex::encode_modrm}; +#[cfg(feature = "core")] +use alloc::string::String; +//use core::convert::{AsMut, AsRef, From}; + /// An x64 SSE register (e.g., `%xmm0`). #[derive(Clone, Copy, Debug)] pub struct Xmm(pub(crate) R); diff --git a/cranelift/codegen/Cargo.toml b/cranelift/codegen/Cargo.toml index 56d90b18975c..03040f037d3c 100644 --- a/cranelift/codegen/Cargo.toml +++ b/cranelift/codegen/Cargo.toml @@ -30,7 +30,7 @@ cranelift-entity = { workspace = true } cranelift-bforest = { workspace = true } cranelift-bitset = { workspace = true } cranelift-control = { workspace = true } -hashbrown = { workspace = true } +hashbrown = { workspace = true, features = ["default-hasher"] } target-lexicon = { workspace = true } log = { workspace = true } serde = { workspace = true, optional = true } @@ -65,13 +65,13 @@ default = ["std", "unwind", "host-arch", "timing"] # The "std" feature enables use of libstd. The "core" feature enables use # of some minimal std-like replacement libraries. At least one of these two # features need to be enabled. -std = ["serde?/std"] +std = ["serde?/std", "rustc-hash/std", "cranelift-control/fuzz"] # The "core" feature used to enable a hashmap workaround, but is now # deprecated (we (i) always use hashbrown, and (ii) don't support a # no_std build anymore). The feature remains for backward # compatibility as a no-op. -core = [] +core = ["cranelift-assembler-x64/core"] # Enable the `to_capstone` method on TargetIsa, for constructing a Capstone # context, and the `disassemble` method on `MachBufferFinalized`. diff --git a/cranelift/codegen/meta/src/gen_inst.rs b/cranelift/codegen/meta/src/gen_inst.rs index ab0db7c757a8..1b4612f108d9 100644 --- a/cranelift/codegen/meta/src/gen_inst.rs +++ b/cranelift/codegen/meta/src/gen_inst.rs @@ -312,7 +312,7 @@ fn gen_instruction_data_impl(formats: &[Rc], fmt: &mut Format (Some("args.as_slice(pool)"), "args.len(pool)") } else if format.num_value_operands == 1 { members.push("ref arg"); - (Some("std::slice::from_ref(arg)"), "1") + (Some("core::slice::from_ref(arg)"), "1") } else if format.num_value_operands > 0 { members.push("ref args"); (Some("args"), "args.len()") @@ -324,7 +324,7 @@ fn gen_instruction_data_impl(formats: &[Rc], fmt: &mut Format 0 => None, 1 => { members.push("ref destination"); - Some(("std::slice::from_ref(destination)", "1")) + Some(("core::slice::from_ref(destination)", "1")) } _ => { members.push("ref blocks"); diff --git a/cranelift/codegen/shared/src/lib.rs b/cranelift/codegen/shared/src/lib.rs index 2a03a8323439..8aa30263357e 100644 --- a/cranelift/codegen/shared/src/lib.rs +++ b/cranelift/codegen/shared/src/lib.rs @@ -2,9 +2,10 @@ //! `cranelift-codegen-meta` libraries. #![deny(missing_docs)] +#![no_std] pub mod constant_hash; pub mod constants; /// Version number of this crate. -pub const VERSION: &str = env!("CARGO_PKG_VERSION"); +pub const VERSION: &str = core::env!("CARGO_PKG_VERSION"); diff --git a/cranelift/codegen/src/alias_analysis.rs b/cranelift/codegen/src/alias_analysis.rs index 93adce052c9f..b915db0f79e7 100644 --- a/cranelift/codegen/src/alias_analysis.rs +++ b/cranelift/codegen/src/alias_analysis.rs @@ -400,3 +400,4 @@ fn get_ext_opcode(op: Opcode) -> Option { _ => Some(op), } } +use crate::prelude::*; diff --git a/cranelift/codegen/src/ctxhash.rs b/cranelift/codegen/src/ctxhash.rs index 98931566aad3..10fe7af5b032 100644 --- a/cranelift/codegen/src/ctxhash.rs +++ b/cranelift/codegen/src/ctxhash.rs @@ -5,7 +5,7 @@ //! an array or pool of shared data). use hashbrown::hash_table::HashTable; -use std::hash::{Hash, Hasher}; +use core::hash::{Hash, Hasher}; /// Trait that allows for equality comparison given some external /// context. @@ -92,7 +92,7 @@ impl CtxHashMap { match self.raw.find_mut(hash as u64, |bucket| { hash == bucket.hash && ctx.ctx_eq(&bucket.k, &k) }) { - Some(bucket) => Some(std::mem::replace(&mut bucket.v, v)), + Some(bucket) => Some(core::mem::replace(&mut bucket.v, v)), None => { let data = BucketData { hash, k, v }; self.raw diff --git a/cranelift/codegen/src/data_value.rs b/cranelift/codegen/src/data_value.rs index 4eeb8c117ace..26a66d53694e 100644 --- a/cranelift/codegen/src/data_value.rs +++ b/cranelift/codegen/src/data_value.rs @@ -247,13 +247,13 @@ impl DataValue { /// Write a [DataValue] to a memory location in native-endian byte order. pub unsafe fn write_value_to(&self, p: *mut u128) { let size = self.ty().bytes() as usize; - self.write_to_slice_ne(unsafe { std::slice::from_raw_parts_mut(p as *mut u8, size) }); + self.write_to_slice_ne(unsafe { core::slice::from_raw_parts_mut(p as *mut u8, size) }); } /// Read a [DataValue] from a memory location using a given [Type] in native-endian byte order. pub unsafe fn read_value_from(p: *const u128, ty: Type) -> Self { DataValue::read_from_slice_ne( - unsafe { std::slice::from_raw_parts(p as *const u8, ty.bytes() as usize) }, + unsafe { core::slice::from_raw_parts(p as *const u8, ty.bytes() as usize) }, ty, ) } @@ -290,7 +290,7 @@ pub enum DataValueCastFailure { // This is manually implementing Error and Display instead of using thiserror to reduce the amount // of dependencies used by Cranelift. -impl std::error::Error for DataValueCastFailure {} +impl core::error::Error for DataValueCastFailure {} impl Display for DataValueCastFailure { fn fmt(&self, f: &mut Formatter) -> fmt::Result { @@ -420,3 +420,4 @@ mod test { ); } } +use crate::prelude::*; diff --git a/cranelift/codegen/src/dominator_tree.rs b/cranelift/codegen/src/dominator_tree.rs index 10ab9c891ebb..90e700d0097d 100644 --- a/cranelift/codegen/src/dominator_tree.rs +++ b/cranelift/codegen/src/dominator_tree.rs @@ -94,7 +94,7 @@ impl SpanningTree { } } -impl std::ops::Index for SpanningTree { +impl core::ops::Index for SpanningTree { type Output = SpanningTreeNode; fn index(&self, idx: u32) -> &Self::Output { @@ -102,7 +102,7 @@ impl std::ops::Index for SpanningTree { } } -impl std::ops::IndexMut for SpanningTree { +impl core::ops::IndexMut for SpanningTree { fn index_mut(&mut self, idx: u32) -> &mut Self::Output { &mut self.nodes[idx as usize] } @@ -439,7 +439,7 @@ impl DominatorTree { } let semi_candidate = self.eval(self.nodes[pred].pre_number, last_linked); - semi = std::cmp::min(semi, semi_candidate); + semi = core::cmp::min(semi, semi_candidate); } let w_node = &mut self.stree[w]; @@ -771,3 +771,4 @@ mod tests { assert!(!dt.dominates(v3_def, block0, &cur.func.layout)); } } +use crate::prelude::*; diff --git a/cranelift/codegen/src/egraph.rs b/cranelift/codegen/src/egraph.rs index 9993f7941f10..a8d6a80ee3b2 100644 --- a/cranelift/codegen/src/egraph.rs +++ b/cranelift/codegen/src/egraph.rs @@ -660,7 +660,7 @@ where let old_vals = ctx.func.dfg.inst_results(inst); let new_vals = if let Some(val) = new_val.as_ref() { - std::slice::from_ref(val) + core::slice::from_ref(val) } else { ctx.func.dfg.inst_results(new_inst) }; @@ -1075,7 +1075,7 @@ impl<'a> CtxEq<(Type, InstructionData), (Type, InstructionData)> for GVNContext< impl<'a> CtxHash<(Type, InstructionData)> for GVNContext<'a> { fn ctx_hash(&self, state: &mut H, (ty, inst): &(Type, InstructionData)) { - std::hash::Hash::hash(&ty, state); + core::hash::Hash::hash(&ty, state); inst.hash(state, self.value_lists); } } @@ -1110,3 +1110,4 @@ pub(crate) struct Stats { pub(crate) elaborate_func_post_insts: u64, pub(crate) eclass_size_limit: u64, } +use crate::prelude::*; diff --git a/cranelift/codegen/src/egraph/cost.rs b/cranelift/codegen/src/egraph/cost.rs index 1ff56fcd61f9..062196964c96 100644 --- a/cranelift/codegen/src/egraph/cost.rs +++ b/cranelift/codegen/src/egraph/cost.rs @@ -48,7 +48,7 @@ impl core::fmt::Debug for Cost { impl Ord for Cost { #[inline] - fn cmp(&self, other: &Self) -> std::cmp::Ordering { + fn cmp(&self, other: &Self) -> core::cmp::Ordering { // We make sure that the high bits are the op cost and the low bits are // the depth. This means that we can use normal integer comparison to // order by op cost and then depth. @@ -65,7 +65,7 @@ impl Ord for Cost { impl PartialOrd for Cost { #[inline] - fn partial_cmp(&self, other: &Self) -> Option { + fn partial_cmp(&self, other: &Self) -> Option { Some(self.cmp(other)) } } @@ -172,24 +172,24 @@ impl Cost { } } -impl std::iter::Sum for Cost { +impl core::iter::Sum for Cost { fn sum>(iter: I) -> Self { iter.fold(Self::zero(), |a, b| a + b) } } -impl std::default::Default for Cost { +impl core::default::Default for Cost { fn default() -> Cost { Cost::zero() } } -impl std::ops::Add for Cost { +impl core::ops::Add for Cost { type Output = Cost; fn add(self, other: Cost) -> Cost { let op_cost = self.op_cost().saturating_add(other.op_cost()); - let depth = std::cmp::max(self.depth(), other.depth()); + let depth = core::cmp::max(self.depth(), other.depth()); Cost::new(op_cost, depth) } } diff --git a/cranelift/codegen/src/egraph/elaborate.rs b/cranelift/codegen/src/egraph/elaborate.rs index d9d156eb41c8..ec617344b9ba 100644 --- a/cranelift/codegen/src/egraph/elaborate.rs +++ b/cranelift/codegen/src/egraph/elaborate.rs @@ -82,7 +82,7 @@ impl PartialOrd for BestEntry { impl Ord for BestEntry { #[inline] - fn cmp(&self, other: &Self) -> std::cmp::Ordering { + fn cmp(&self, other: &Self) -> core::cmp::Ordering { self.0.cmp(&other.0).then_with(|| { // Note that this comparison is reversed. When costs are equal, // prefer the value with the bigger index. This is a heuristic that @@ -321,9 +321,9 @@ impl<'a> Elaborator<'a> { debug_assert!(!best[x].1.is_reserved_value()); debug_assert!(!best[y].1.is_reserved_value()); best[value] = if use_worst { - std::cmp::max(best[x], best[y]) + core::cmp::max(best[x], best[y]) } else { - std::cmp::min(best[x], best[y]) + core::cmp::min(best[x], best[y]) }; trace!( " -> best of union({:?}, {:?}) = {:?}", @@ -865,3 +865,4 @@ impl<'a> Elaborator<'a> { self.stats.elaborate_func_post_insts += self.func.dfg.num_insts() as u64; } } +use crate::prelude::*; diff --git a/cranelift/codegen/src/incremental_cache.rs b/cranelift/codegen/src/incremental_cache.rs index 9b9d935241e8..973cca13ece1 100644 --- a/cranelift/codegen/src/incremental_cache.rs +++ b/cranelift/codegen/src/incremental_cache.rs @@ -111,7 +111,7 @@ pub trait CacheKvStore { #[derive(Clone, Hash, PartialEq, Eq)] pub struct CacheKeyHash([u8; 32]); -impl std::fmt::Display for CacheKeyHash { +impl core::fmt::Display for CacheKeyHash { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { write!(f, "CacheKeyHash:{:?}", self.0) } @@ -239,3 +239,4 @@ pub fn try_finish_recompile(func: &Function, bytes: &[u8]) -> Result Err(RecompileError::Deserialize(err)), } } +use crate::prelude::*; diff --git a/cranelift/codegen/src/inline.rs b/cranelift/codegen/src/inline.rs index ac150c598980..6e6756871545 100644 --- a/cranelift/codegen/src/inline.rs +++ b/cranelift/codegen/src/inline.rs @@ -1584,3 +1584,4 @@ fn create_constants(allocs: &mut InliningAllocs, func: &mut ir::Function, callee allocs.constants[*callee_constant] = Some(inlined_constant).into(); } } +use crate::prelude::*; diff --git a/cranelift/codegen/src/ir/condcodes.rs b/cranelift/codegen/src/ir/condcodes.rs index e791649bb69c..009f95bf391c 100644 --- a/cranelift/codegen/src/ir/condcodes.rs +++ b/cranelift/codegen/src/ir/condcodes.rs @@ -344,7 +344,7 @@ impl FromStr for FloatCC { #[cfg(test)] mod tests { use super::*; - use std::string::ToString; + use alloc::string::ToString; #[test] fn int_complement() { diff --git a/cranelift/codegen/src/ir/constant.rs b/cranelift/codegen/src/ir/constant.rs index a9ac61e06a02..67310cd9462f 100644 --- a/cranelift/codegen/src/ir/constant.rs +++ b/cranelift/codegen/src/ir/constant.rs @@ -272,7 +272,7 @@ impl ConstantPool { #[cfg(test)] mod tests { use super::*; - use std::string::ToString; + use alloc::string::ToString; #[test] fn empty() { diff --git a/cranelift/codegen/src/ir/debug_tags.rs b/cranelift/codegen/src/ir/debug_tags.rs index 39d137c2973b..d2ca049f6c53 100644 --- a/cranelift/codegen/src/ir/debug_tags.rs +++ b/cranelift/codegen/src/ir/debug_tags.rs @@ -139,3 +139,4 @@ impl core::fmt::Display for DebugTag { } } } +use crate::prelude::*; diff --git a/cranelift/codegen/src/ir/entities.rs b/cranelift/codegen/src/ir/entities.rs index cbb8f3097aff..a1ab10662d7d 100644 --- a/cranelift/codegen/src/ir/entities.rs +++ b/cranelift/codegen/src/ir/entities.rs @@ -562,3 +562,4 @@ mod tests { assert_eq!(Constant::with_number(1).unwrap().to_string(), "const1"); } } +use crate::prelude::*; diff --git a/cranelift/codegen/src/ir/exception_table.rs b/cranelift/codegen/src/ir/exception_table.rs index 4130f23792b4..80730652054a 100644 --- a/cranelift/codegen/src/ir/exception_table.rs +++ b/cranelift/codegen/src/ir/exception_table.rs @@ -287,3 +287,4 @@ impl<'a> Display for DisplayExceptionTable<'a> { Ok(()) } } +use crate::prelude::*; diff --git a/cranelift/codegen/src/ir/extname.rs b/cranelift/codegen/src/ir/extname.rs index f29d854b1a44..d28ebcb4e7b2 100644 --- a/cranelift/codegen/src/ir/extname.rs +++ b/cranelift/codegen/src/ir/extname.rs @@ -99,7 +99,7 @@ pub struct TestcaseName(Box<[u8]>); impl fmt::Display for TestcaseName { fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result { f.write_char('%')?; - f.write_str(std::str::from_utf8(&self.0).unwrap()) + f.write_str(core::str::from_utf8(&self.0).unwrap()) } } diff --git a/cranelift/codegen/src/ir/immediates.rs b/cranelift/codegen/src/ir/immediates.rs index 79b9432960af..ce89abd2307d 100644 --- a/cranelift/codegen/src/ir/immediates.rs +++ b/cranelift/codegen/src/ir/immediates.rs @@ -1,3 +1,4 @@ + //! Immediate operands for Cranelift instructions //! //! This module defines the types of immediate operands that can appear on Cranelift instructions. @@ -1958,3 +1959,4 @@ mod tests { } } } +use crate::prelude::*; diff --git a/cranelift/codegen/src/ir/instructions.rs b/cranelift/codegen/src/ir/instructions.rs index 2b94d9da1e33..80c04e48e6fb 100644 --- a/cranelift/codegen/src/ir/instructions.rs +++ b/cranelift/codegen/src/ir/instructions.rs @@ -429,7 +429,7 @@ impl InstructionData { exception_tables: &'a ir::ExceptionTables, ) -> &'a [BlockCall] { match self { - Self::Jump { destination, .. } => std::slice::from_ref(destination), + Self::Jump { destination, .. } => core::slice::from_ref(destination), Self::Brif { blocks, .. } => blocks.as_slice(), Self::BranchTable { table, .. } => jump_tables.get(*table).unwrap().all_branches(), Self::TryCall { exception, .. } | Self::TryCallIndirect { exception, .. } => { @@ -451,7 +451,7 @@ impl InstructionData { exception_tables: &'a mut ir::ExceptionTables, ) -> &'a mut [BlockCall] { match self { - Self::Jump { destination, .. } => std::slice::from_mut(destination), + Self::Jump { destination, .. } => core::slice::from_mut(destination), Self::Brif { blocks, .. } => blocks.as_mut_slice(), Self::BranchTable { table, .. } => { jump_tables.get_mut(*table).unwrap().all_branches_mut() @@ -1162,7 +1162,7 @@ mod tests { fn inst_data_size() { // The size of `InstructionData` is performance sensitive, so make sure // we don't regress it unintentionally. - assert_eq!(std::mem::size_of::(), 16); + assert_eq!(core::mem::size_of::(), 16); } #[test] diff --git a/cranelift/codegen/src/ir/jumptable.rs b/cranelift/codegen/src/ir/jumptable.rs index 5a26ef4e4768..5bdad87d941f 100644 --- a/cranelift/codegen/src/ir/jumptable.rs +++ b/cranelift/codegen/src/ir/jumptable.rs @@ -31,7 +31,7 @@ impl JumpTableData { /// Create a new jump table with the provided blocks. pub fn new(def: BlockCall, table: &[BlockCall]) -> Self { Self { - table: std::iter::once(def).chain(table.iter().copied()).collect(), + table: core::iter::once(def).chain(table.iter().copied()).collect(), } } @@ -114,8 +114,8 @@ mod tests { use crate::entity::EntityRef; use crate::ir::instructions::ValueListPool; use crate::ir::{Block, BlockArg, BlockCall, Value}; + use alloc::string::ToString; use alloc::vec::Vec; - use std::string::ToString; #[test] fn empty() { diff --git a/cranelift/codegen/src/ir/layout.rs b/cranelift/codegen/src/ir/layout.rs index 1284ab65676e..2a2d139018fe 100644 --- a/cranelift/codegen/src/ir/layout.rs +++ b/cranelift/codegen/src/ir/layout.rs @@ -1193,3 +1193,4 @@ mod tests { assert_eq!(layout.pp_cmp(i3, i2), Ordering::Greater) } } +use crate::prelude::*; diff --git a/cranelift/codegen/src/ir/memtype.rs b/cranelift/codegen/src/ir/memtype.rs index 4df26f1647e5..b7b0d7e2db1e 100644 --- a/cranelift/codegen/src/ir/memtype.rs +++ b/cranelift/codegen/src/ir/memtype.rs @@ -108,14 +108,14 @@ pub enum MemoryTypeData { Empty, } -impl std::default::Default for MemoryTypeData { +impl core::default::Default for MemoryTypeData { fn default() -> Self { Self::Empty } } -impl std::fmt::Display for MemoryTypeData { - fn fmt(&self, f: &mut std::fmt::Formatter) -> std::fmt::Result { +impl core::fmt::Display for MemoryTypeData { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { match self { Self::Struct { size, fields } => { write!(f, "struct {size} {{")?; diff --git a/cranelift/codegen/src/ir/pcc.rs b/cranelift/codegen/src/ir/pcc.rs index 4fb88fd02ebf..b10f43f78d06 100644 --- a/cranelift/codegen/src/ir/pcc.rs +++ b/cranelift/codegen/src/ir/pcc.rs @@ -78,13 +78,13 @@ use crate::isa::TargetIsa; use crate::machinst::{BlockIndex, LowerBackend, VCode}; use crate::trace; use regalloc2::Function as _; -use std::fmt; +use core::fmt; #[cfg(feature = "enable-serde")] use serde_derive::{Deserialize, Serialize}; /// The result of checking proof-carrying-code facts. -pub type PccResult = std::result::Result; +pub type PccResult = core::result::Result; /// An error or inconsistency discovered when checking proof-carrying /// code. @@ -332,7 +332,7 @@ impl Expr { } else { Expr { base: BaseExpr::min(&lhs.base, &rhs.base), - offset: std::cmp::min(lhs.offset, rhs.offset), + offset: core::cmp::min(lhs.offset, rhs.offset), } } } @@ -347,7 +347,7 @@ impl Expr { } else { Expr { base: BaseExpr::max(&lhs.base, &rhs.base), - offset: std::cmp::max(lhs.offset, rhs.offset), + offset: core::cmp::max(lhs.offset, rhs.offset), } } } @@ -651,8 +651,8 @@ impl Fact { }, ) if bw_lhs == bw_rhs && max_lhs >= min_rhs && max_rhs >= min_lhs => Fact::Range { bit_width: *bw_lhs, - min: std::cmp::max(*min_lhs, *min_rhs), - max: std::cmp::min(*max_lhs, *max_rhs), + min: core::cmp::max(*min_lhs, *min_rhs), + max: core::cmp::min(*max_lhs, *max_rhs), }, ( @@ -693,8 +693,8 @@ impl Fact { { Fact::Mem { ty: *ty_lhs, - min_offset: std::cmp::max(*min_offset_lhs, *min_offset_rhs), - max_offset: std::cmp::min(*max_offset_lhs, *max_offset_rhs), + min_offset: core::cmp::max(*min_offset_lhs, *min_offset_rhs), + max_offset: core::cmp::min(*max_offset_lhs, *max_offset_rhs), nullable: *nullable_lhs && *nullable_rhs, } } @@ -910,7 +910,7 @@ impl<'a> FactContext<'a> { ) if bw_lhs == bw_rhs && add_width >= *bw_lhs => { let computed_min = min_lhs.checked_add(*min_rhs)?; let computed_max = max_lhs.checked_add(*max_rhs)?; - let computed_max = std::cmp::min(max_value_for_width(add_width), computed_max); + let computed_max = core::cmp::min(max_value_for_width(add_width), computed_max); Some(Fact::Range { bit_width: *bw_lhs, min: computed_min, diff --git a/cranelift/codegen/src/ir/stackslot.rs b/cranelift/codegen/src/ir/stackslot.rs index 1ad2a5d7d871..3c10fdc98026 100644 --- a/cranelift/codegen/src/ir/stackslot.rs +++ b/cranelift/codegen/src/ir/stackslot.rs @@ -249,3 +249,4 @@ mod tests { ); } } +use crate::prelude::*; diff --git a/cranelift/codegen/src/ir/trapcode.rs b/cranelift/codegen/src/ir/trapcode.rs index e3fbcfbb4a50..f990f312b94f 100644 --- a/cranelift/codegen/src/ir/trapcode.rs +++ b/cranelift/codegen/src/ir/trapcode.rs @@ -145,3 +145,4 @@ mod tests { assert_eq!("users".parse::(), Err(())); } } +use crate::prelude::*; diff --git a/cranelift/codegen/src/ir/types.rs b/cranelift/codegen/src/ir/types.rs index bc7704cf0662..48e98fd352d2 100644 --- a/cranelift/codegen/src/ir/types.rs +++ b/cranelift/codegen/src/ir/types.rs @@ -622,3 +622,4 @@ mod tests { assert_eq!(Type::int_with_byte_size(evil), None); } } +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/aarch64/abi.rs b/cranelift/codegen/src/isa/aarch64/abi.rs index 20f8476a604a..875afdc85f3c 100644 --- a/cranelift/codegen/src/isa/aarch64/abi.rs +++ b/cranelift/codegen/src/isa/aarch64/abi.rs @@ -16,7 +16,7 @@ use alloc::boxed::Box; use alloc::vec::Vec; use regalloc2::{MachineEnv, PReg, PRegSet}; use smallvec::{SmallVec, smallvec}; -use std::borrow::ToOwned; +use alloc::borrow::ToOwned; use std::sync::OnceLock; // We use a generic implementation that factors out AArch64 and x64 ABI commonalities, because @@ -348,7 +348,7 @@ impl ABIMachineSpec for AArch64MachineDeps { } else { // Every arg takes a minimum slot of 8 bytes. (16-byte stack // alignment happens separately after all args.) - std::cmp::max(size, 8) + core::cmp::max(size, 8) }; if !is_winch_return { @@ -1632,3 +1632,4 @@ fn create_reg_env(enable_pinned_reg: bool) -> MachineEnv { env } +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/aarch64/inst/args.rs b/cranelift/codegen/src/isa/aarch64/inst/args.rs index a382a5ef725a..d912aee4dd79 100644 --- a/cranelift/codegen/src/isa/aarch64/inst/args.rs +++ b/cranelift/codegen/src/isa/aarch64/inst/args.rs @@ -724,3 +724,4 @@ impl TestBitAndBranchKind { } } } +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/aarch64/inst/emit.rs b/cranelift/codegen/src/isa/aarch64/inst/emit.rs index 06e0eb017708..b5bb377591df 100644 --- a/cranelift/codegen/src/isa/aarch64/inst/emit.rs +++ b/cranelift/codegen/src/isa/aarch64/inst/emit.rs @@ -3685,3 +3685,4 @@ fn emit_return_call_common_sequence( sink.put4(key.enc_auti_hint()); } } +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/aarch64/inst/emit_tests.rs b/cranelift/codegen/src/isa/aarch64/inst/emit_tests.rs index d8e6cd6a2083..fdca784dd038 100644 --- a/cranelift/codegen/src/isa/aarch64/inst/emit_tests.rs +++ b/cranelift/codegen/src/isa/aarch64/inst/emit_tests.rs @@ -27,7 +27,7 @@ fn test_aarch64_binemit() { // // #!/bin/sh // tmp=`mktemp /tmp/XXXXXXXX.o` - // aarch64-linux-gnu-as /dev/stdin -o $tmp + // aarch64-linux-gnu-as /dev/corein -o $tmp // aarch64-linux-gnu-objdump -d $tmp // rm -f $tmp // @@ -7970,3 +7970,4 @@ fn test_cond_invert() { assert_eq!(cond.invert().invert(), cond); } } +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/aarch64/inst/imms.rs b/cranelift/codegen/src/isa/aarch64/inst/imms.rs index e408f26985a9..69a1ca5312e7 100644 --- a/cranelift/codegen/src/isa/aarch64/inst/imms.rs +++ b/cranelift/codegen/src/isa/aarch64/inst/imms.rs @@ -4,7 +4,7 @@ use crate::ir::types::*; use crate::isa::aarch64::inst::{OperandSize, ScalarSize}; use crate::machinst::PrettyPrint; -use std::string::String; +use alloc::string::String; /// An immediate that represents the NZCV flags. #[derive(Clone, Copy, Debug)] @@ -1240,3 +1240,4 @@ mod test { ); } } +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/aarch64/inst/mod.rs b/cranelift/codegen/src/isa/aarch64/inst/mod.rs index cc5ff8eb3aec..e8308a425840 100644 --- a/cranelift/codegen/src/isa/aarch64/inst/mod.rs +++ b/cranelift/codegen/src/isa/aarch64/inst/mod.rs @@ -12,8 +12,8 @@ use crate::machinst::{PrettyPrint, Reg, RegClass, Writable}; use alloc::vec::Vec; use core::slice; use smallvec::{SmallVec, smallvec}; -use std::fmt::Write; -use std::string::{String, ToString}; +use core::fmt::Write; +use alloc::string::{String, ToString}; pub(crate) mod regs; pub(crate) use self::regs::*; @@ -3109,6 +3109,7 @@ mod tests { } else { 32 }; - assert_eq!(expected, std::mem::size_of::()); + assert_eq!(expected, core::mem::size_of::()); } } +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/aarch64/inst/regs.rs b/cranelift/codegen/src/isa/aarch64/inst/regs.rs index f5a6eb526daf..c625d99d964d 100644 --- a/cranelift/codegen/src/isa/aarch64/inst/regs.rs +++ b/cranelift/codegen/src/isa/aarch64/inst/regs.rs @@ -8,7 +8,7 @@ use crate::machinst::{Reg, RegClass, Writable}; use regalloc2::PReg; use regalloc2::VReg; -use std::string::{String, ToString}; +use alloc::string::{String, ToString}; //============================================================================= // Registers, the Universe thereof, and printing @@ -279,3 +279,4 @@ pub fn pretty_print_vreg_vector(reg: Reg, size: VectorSize) -> String { pub fn pretty_print_vreg_element(reg: Reg, idx: usize, size: ScalarSize) -> String { show_vreg_element(reg, idx as u8, size) } +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/aarch64/inst/unwind.rs b/cranelift/codegen/src/isa/aarch64/inst/unwind.rs index 1e2bb904db74..cb1a9ad16eb4 100644 --- a/cranelift/codegen/src/isa/aarch64/inst/unwind.rs +++ b/cranelift/codegen/src/isa/aarch64/inst/unwind.rs @@ -1,2 +1,3 @@ #[cfg(feature = "unwind")] pub(crate) mod systemv; +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/aarch64/inst/unwind/systemv.rs b/cranelift/codegen/src/isa/aarch64/inst/unwind/systemv.rs index 9378c46fa53b..25a095983c42 100644 --- a/cranelift/codegen/src/isa/aarch64/inst/unwind/systemv.rs +++ b/cranelift/codegen/src/isa/aarch64/inst/unwind/systemv.rs @@ -175,3 +175,4 @@ mod tests { func } } +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/aarch64/lower.rs b/cranelift/codegen/src/isa/aarch64/lower.rs index 6d51a380433f..99c9f2f95592 100644 --- a/cranelift/codegen/src/isa/aarch64/lower.rs +++ b/cranelift/codegen/src/isa/aarch64/lower.rs @@ -143,3 +143,4 @@ impl LowerBackend for AArch64Backend { type FactFlowState = pcc::FactFlowState; } +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/aarch64/lower/isle.rs b/cranelift/codegen/src/isa/aarch64/lower/isle.rs index b372ace5cb2d..91ee0718b776 100644 --- a/cranelift/codegen/src/isa/aarch64/lower/isle.rs +++ b/cranelift/codegen/src/isa/aarch64/lower/isle.rs @@ -33,8 +33,8 @@ use crate::{ }; use core::u32; use regalloc2::PReg; -use std::boxed::Box; -use std::vec::Vec; +use alloc::boxed::Box; +use alloc::vec::Vec; type BoxCallInfo = Box>; type BoxCallIndInfo = Box>; @@ -237,7 +237,7 @@ impl Context for IsleContext<'_, '_, MInst, AArch64Backend> { fn lshl_from_u64(&mut self, ty: Type, n: u64) -> Option { let shiftimm = ShiftOpShiftImm::maybe_from_shift(n)?; let shiftee_bits = ty_bits(ty); - if shiftee_bits <= std::u8::MAX as usize { + if shiftee_bits <= core::u8::MAX as usize { let shiftimm = shiftimm.mask(shiftee_bits as u8); Some(ShiftOpAndAmt::new(ShiftOp::LSL, shiftimm)) } else { @@ -248,7 +248,7 @@ impl Context for IsleContext<'_, '_, MInst, AArch64Backend> { fn ashr_from_u64(&mut self, ty: Type, n: u64) -> Option { let shiftimm = ShiftOpShiftImm::maybe_from_shift(n)?; let shiftee_bits = ty_bits(ty); - if shiftee_bits <= std::u8::MAX as usize { + if shiftee_bits <= core::u8::MAX as usize { let shiftimm = shiftimm.mask(shiftee_bits as u8); Some(ShiftOpAndAmt::new(ShiftOp::ASR, shiftimm)) } else { @@ -858,3 +858,4 @@ impl Context for IsleContext<'_, '_, MInst, AArch64Backend> { self.backend.flags.is_pic() } } +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/aarch64/lower/isle/generated_code.rs b/cranelift/codegen/src/isa/aarch64/lower/isle/generated_code.rs index 2e0f7bd77dda..3867a060b7f3 100644 --- a/cranelift/codegen/src/isa/aarch64/lower/isle/generated_code.rs +++ b/cranelift/codegen/src/isa/aarch64/lower/isle/generated_code.rs @@ -14,3 +14,4 @@ )] include!(concat!(env!("ISLE_DIR"), "/isle_aarch64.rs")); +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/aarch64/mod.rs b/cranelift/codegen/src/isa/aarch64/mod.rs index 892911edd833..40bb5d9aa966 100644 --- a/cranelift/codegen/src/isa/aarch64/mod.rs +++ b/cranelift/codegen/src/isa/aarch64/mod.rs @@ -15,7 +15,7 @@ use crate::settings as shared_settings; use alloc::{boxed::Box, vec::Vec}; use core::fmt; use cranelift_control::ControlPlane; -use std::string::String; +use alloc::string::String; use target_lexicon::{Aarch64Architecture, Architecture, OperatingSystem, Triple}; // New backend: @@ -278,3 +278,4 @@ pub fn isa_builder(triple: Triple) -> IsaBuilder { }, } } +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/aarch64/pcc.rs b/cranelift/codegen/src/isa/aarch64/pcc.rs index e5ee1919803e..3b5e31d11c0e 100644 --- a/cranelift/codegen/src/isa/aarch64/pcc.rs +++ b/cranelift/codegen/src/isa/aarch64/pcc.rs @@ -568,3 +568,4 @@ fn check_store_addr( let _output_fact = ctx.store(&fact, ty, None)?; Ok(()) } +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/aarch64/settings.rs b/cranelift/codegen/src/isa/aarch64/settings.rs index 2cda69446ff3..21031399b5eb 100644 --- a/cranelift/codegen/src/isa/aarch64/settings.rs +++ b/cranelift/codegen/src/isa/aarch64/settings.rs @@ -7,3 +7,4 @@ use core::fmt; // public `Flags` struct with an impl for all of the settings defined in // `cranelift/codegen/meta/src/isa/arm64.rs`. include!(concat!(env!("OUT_DIR"), "/settings-arm64.rs")); +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/mod.rs b/cranelift/codegen/src/isa/mod.rs index 8728c299c1b4..2c44409de892 100644 --- a/cranelift/codegen/src/isa/mod.rs +++ b/cranelift/codegen/src/isa/mod.rs @@ -23,7 +23,7 @@ //! # #[macro_use] extern crate target_lexicon; //! use cranelift_codegen::isa; //! use cranelift_codegen::settings::{self, Configurable}; -//! use std::str::FromStr; +//! use core::str::FromStr; //! use target_lexicon::Triple; //! //! let shared_builder = settings::builder(); @@ -50,16 +50,16 @@ use crate::CodegenResult; use crate::ir::{self, Function, Type}; #[cfg(feature = "unwind")] use crate::isa::unwind::{UnwindInfoKind, systemv::RegisterMappingError}; -use crate::machinst::{CompiledCode, CompiledCodeStencil, TextSectionBuilder}; +use crate::machinst::{CompiledCodeStencil, TextSectionBuilder}; use crate::settings; use crate::settings::Configurable; use crate::settings::SetResult; use crate::{Reg, flowgraph}; +use alloc::string::String; use alloc::{boxed::Box, sync::Arc, vec::Vec}; use core::fmt; use core::fmt::{Debug, Formatter}; use cranelift_control::ControlPlane; -use std::string::String; use target_lexicon::{Architecture, PointerWidth, Triple, triple}; // This module is made public here for benchmarking purposes. No guarantees are @@ -146,7 +146,7 @@ pub enum LookupError { // This is manually implementing Error and Display instead of using thiserror to reduce the amount // of dependencies used by Cranelift. -impl std::error::Error for LookupError {} +impl core::error::Error for LookupError {} impl fmt::Display for LookupError { fn fmt(&self, f: &mut Formatter) -> fmt::Result { @@ -499,3 +499,4 @@ impl Debug for &dyn TargetIsa { ) } } +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/pulley32.rs b/cranelift/codegen/src/isa/pulley32.rs index b337274660d0..e3467275472e 100644 --- a/cranelift/codegen/src/isa/pulley32.rs +++ b/cranelift/codegen/src/isa/pulley32.rs @@ -11,3 +11,4 @@ impl PulleyTargetKind for Pulley32 { PointerWidth::PointerWidth32 } } +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/pulley64.rs b/cranelift/codegen/src/isa/pulley64.rs index 31b1d08a04b2..234840c45eb5 100644 --- a/cranelift/codegen/src/isa/pulley64.rs +++ b/cranelift/codegen/src/isa/pulley64.rs @@ -11,3 +11,4 @@ impl PulleyTargetKind for Pulley64 { PointerWidth::PointerWidth64 } } +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/pulley_shared/abi.rs b/cranelift/codegen/src/isa/pulley_shared/abi.rs index 3529408fb50e..05952c94a4ab 100644 --- a/cranelift/codegen/src/isa/pulley_shared/abi.rs +++ b/cranelift/codegen/src/isa/pulley_shared/abi.rs @@ -14,7 +14,7 @@ use core::marker::PhantomData; use cranelift_bitset::ScalarBitSet; use regalloc2::{MachineEnv, PReg, PRegSet}; use smallvec::{SmallVec, smallvec}; -use std::borrow::ToOwned; +use alloc::borrow::ToOwned; use std::sync::OnceLock; /// Support for the Pulley ABI from the callee side (within a function body). @@ -130,7 +130,7 @@ where // Compute size and 16-byte stack alignment happens // separately after all args. let size = reg_ty.bits() / 8; - let size = std::cmp::max(size, 8); + let size = core::cmp::max(size, 8); // Align. debug_assert!(size.is_power_of_two()); @@ -985,3 +985,4 @@ fn create_reg_environment() -> MachineEnv { scratch_by_class: [None, None, None], } } +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/pulley_shared/inst/args.rs b/cranelift/codegen/src/isa/pulley_shared/inst/args.rs index 6ddd6a09dc98..43d1e8a82a82 100644 --- a/cranelift/codegen/src/isa/pulley_shared/inst/args.rs +++ b/cranelift/codegen/src/isa/pulley_shared/inst/args.rs @@ -5,7 +5,7 @@ use crate::ir::ExternalName; use crate::machinst::abi::StackAMode; use pulley_interpreter::encode; use pulley_interpreter::regs::Reg as _; -use std::fmt; +use core::fmt; /// A macro for defining a newtype of `Reg` that enforces some invariant about /// the wrapped `Reg` (such as that it is of a particular register class). @@ -61,7 +61,7 @@ macro_rules! newtype_of_reg { // NB: We cannot implement `DerefMut` because that would let people do // nasty stuff like `*my_xreg.deref_mut() = some_freg`, breaking the // invariants that `XReg` provides. - impl std::ops::Deref for $newtype_reg { + impl core::ops::Deref for $newtype_reg { type Target = Reg; fn deref(&self) -> &Reg { @@ -779,3 +779,4 @@ impl fmt::Display for AddrG32Bne { } } } +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/pulley_shared/inst/emit.rs b/cranelift/codegen/src/isa/pulley_shared/inst/emit.rs index 74082b4260c3..25614218b03b 100644 --- a/cranelift/codegen/src/isa/pulley_shared/inst/emit.rs +++ b/cranelift/codegen/src/isa/pulley_shared/inst/emit.rs @@ -707,3 +707,4 @@ fn patch_pc_rel_offset

( assert_eq!(*chunk, [0, 0, 0, 0]); *chunk = (end - start - 4).to_le_bytes(); } +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/pulley_shared/inst/mod.rs b/cranelift/codegen/src/isa/pulley_shared/inst/mod.rs index 9bf27e8b8aca..497ba5e2031e 100644 --- a/cranelift/codegen/src/isa/pulley_shared/inst/mod.rs +++ b/cranelift/codegen/src/isa/pulley_shared/inst/mod.rs @@ -611,7 +611,7 @@ const TRAP_OPCODE: &'static [u8] = &[ #[test] fn test_trap_encoding() { - let mut dst = std::vec::Vec::new(); + let mut dst = alloc::vec::Vec::new(); pulley_interpreter::encode::trap(&mut dst); assert_eq!(dst, TRAP_OPCODE); } @@ -952,3 +952,4 @@ impl MachInstLabelUse for LabelUse { } } } +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/pulley_shared/inst/regs.rs b/cranelift/codegen/src/isa/pulley_shared/inst/regs.rs index 90f7d36e104b..069050e7cd55 100644 --- a/cranelift/codegen/src/isa/pulley_shared/inst/regs.rs +++ b/cranelift/codegen/src/isa/pulley_shared/inst/regs.rs @@ -162,3 +162,4 @@ define_registers! { v_reg(30) => v30, writable_v30; v_reg(31) => v31, writable_v31; } +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/pulley_shared/lower.rs b/cranelift/codegen/src/isa/pulley_shared/lower.rs index 8dd5a0cea50c..b436d1d3e46e 100644 --- a/cranelift/codegen/src/isa/pulley_shared/lower.rs +++ b/cranelift/codegen/src/isa/pulley_shared/lower.rs @@ -34,3 +34,4 @@ where type FactFlowState = (); } +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/pulley_shared/lower/isle.rs b/cranelift/codegen/src/isa/pulley_shared/lower/isle.rs index d72b6a023789..baa93a5eb1bc 100644 --- a/cranelift/codegen/src/isa/pulley_shared/lower/isle.rs +++ b/cranelift/codegen/src/isa/pulley_shared/lower/isle.rs @@ -327,3 +327,4 @@ where let mut isle_ctx = PulleyIsleContext::new(lower_ctx, backend); generated_code::constructor_lower_branch(&mut isle_ctx, branch, targets) } +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/pulley_shared/lower/isle/generated_code.rs b/cranelift/codegen/src/isa/pulley_shared/lower/isle/generated_code.rs index 45dd7050dc3c..6b0853db8f25 100644 --- a/cranelift/codegen/src/isa/pulley_shared/lower/isle/generated_code.rs +++ b/cranelift/codegen/src/isa/pulley_shared/lower/isle/generated_code.rs @@ -13,3 +13,4 @@ )] include!(concat!(env!("ISLE_DIR"), "/isle_pulley_shared.rs")); +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/pulley_shared/mod.rs b/cranelift/codegen/src/isa/pulley_shared/mod.rs index c3f16efa2b33..f86782a0a2e9 100644 --- a/cranelift/codegen/src/isa/pulley_shared/mod.rs +++ b/cranelift/codegen/src/isa/pulley_shared/mod.rs @@ -21,7 +21,7 @@ use alloc::vec::Vec; use core::fmt::Debug; use core::marker::PhantomData; use cranelift_control::ControlPlane; -use std::string::String; +use alloc::string::String; use target_lexicon::{Architecture, Triple}; pub use settings::Flags as PulleyFlags; @@ -312,3 +312,4 @@ impl PulleyFlags { } } } +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/pulley_shared/settings.rs b/cranelift/codegen/src/isa/pulley_shared/settings.rs index 5d4fd19ed116..d611e3a6f2a5 100644 --- a/cranelift/codegen/src/isa/pulley_shared/settings.rs +++ b/cranelift/codegen/src/isa/pulley_shared/settings.rs @@ -14,3 +14,4 @@ use core::fmt; include!(concat!(env!("OUT_DIR"), "/settings-pulley.rs")); impl IsaFlags for Flags {} +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/riscv64/abi.rs b/cranelift/codegen/src/isa/riscv64/abi.rs index 129255219225..d373057ec6fa 100644 --- a/cranelift/codegen/src/isa/riscv64/abi.rs +++ b/cranelift/codegen/src/isa/riscv64/abi.rs @@ -20,7 +20,7 @@ use alloc::vec::Vec; use regalloc2::{MachineEnv, PReg, PRegSet}; use smallvec::{SmallVec, smallvec}; -use std::borrow::ToOwned; +use alloc::borrow::ToOwned; use std::sync::OnceLock; /// Support for the Riscv64 ABI from the callee side (within a function body). @@ -59,7 +59,7 @@ impl RiscvFlags { // Due to a limitation in regalloc2, we can't support types // larger than 1024 bytes. So limit that here. - return std::cmp::min(size, 1024); + return core::cmp::min(size, 1024); } return 0; @@ -165,7 +165,7 @@ impl ABIMachineSpec for Riscv64MachineDeps { // Compute size and 16-byte stack alignment happens // separately after all args. let size = reg_ty.bits() / 8; - let size = std::cmp::max(size, 8); + let size = core::cmp::max(size, 8); // Align. debug_assert!(size.is_power_of_two()); next_stack = align_to(next_stack, size); @@ -1055,3 +1055,4 @@ impl Riscv64MachineDeps { insts.extend(Self::gen_sp_reg_adjust((guard_size * probe_count) as i32)); } } +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/riscv64/inst/args.rs b/cranelift/codegen/src/isa/riscv64/inst/args.rs index a4cca654296e..d710f4348e46 100644 --- a/cranelift/codegen/src/isa/riscv64/inst/args.rs +++ b/cranelift/codegen/src/isa/riscv64/inst/args.rs @@ -8,7 +8,7 @@ use crate::isa::riscv64::lower::isle::generated_code::{ }; use crate::machinst::isle::WritableReg; -use std::fmt::Result; +use core::fmt::Result; /// A macro for defining a newtype of `Reg` that enforces some invariant about /// the wrapped `Reg` (such as that it is of a particular register class). @@ -53,7 +53,7 @@ macro_rules! newtype_of_reg { // NB: We cannot implement `DerefMut` because that would let people do // nasty stuff like `*my_xreg.deref_mut() = some_freg`, breaking the // invariants that `XReg` provides. - impl std::ops::Deref for $newtype_reg { + impl core::ops::Deref for $newtype_reg { type Target = Reg; fn deref(&self) -> &Reg { @@ -651,7 +651,7 @@ impl Display for FpuOPWidth { impl TryFrom for FpuOPWidth { type Error = &'static str; - fn try_from(value: Type) -> std::result::Result { + fn try_from(value: Type) -> core::result::Result { match value { F16 => Ok(FpuOPWidth::H), F32 => Ok(FpuOPWidth::S), @@ -1946,3 +1946,4 @@ impl ZcbMemOp { } } } +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/riscv64/inst/emit.rs b/cranelift/codegen/src/isa/riscv64/inst/emit.rs index 5e631c3af1d3..714271546539 100644 --- a/cranelift/codegen/src/isa/riscv64/inst/emit.rs +++ b/cranelift/codegen/src/isa/riscv64/inst/emit.rs @@ -2885,3 +2885,4 @@ fn return_call_emit_impl( } } } +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/riscv64/inst/emit_tests.rs b/cranelift/codegen/src/isa/riscv64/inst/emit_tests.rs index 9ad30a98d0be..09880464c68e 100644 --- a/cranelift/codegen/src/isa/riscv64/inst/emit_tests.rs +++ b/cranelift/codegen/src/isa/riscv64/inst/emit_tests.rs @@ -1,6 +1,6 @@ use crate::isa::riscv64::inst::*; use crate::isa::riscv64::lower::isle::generated_code::FpuOPWidth; -use std::borrow::Cow; +use alloc::borrow::Cow; fn fa7() -> Reg { f_reg(17) @@ -2283,3 +2283,4 @@ fn riscv64_worst_case_instruction_size() { println!("calculate max size is {} , inst is {:?}", max.0, max.1); assert!(max.0 <= Inst::worst_case_size()); } +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/riscv64/inst/encode.rs b/cranelift/codegen/src/isa/riscv64/inst/encode.rs index 048fc2af05b5..b167f319ccfe 100644 --- a/cranelift/codegen/src/isa/riscv64/inst/encode.rs +++ b/cranelift/codegen/src/isa/riscv64/inst/encode.rs @@ -718,3 +718,4 @@ pub fn encode_fp_rrrr( funct7, ) } +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/riscv64/inst/imms.rs b/cranelift/codegen/src/isa/riscv64/inst/imms.rs index 1b9621231a1b..5e9f0faeee45 100644 --- a/cranelift/codegen/src/isa/riscv64/inst/imms.rs +++ b/cranelift/codegen/src/isa/riscv64/inst/imms.rs @@ -2,7 +2,7 @@ // Some variants are never constructed, but we still want them as options in the future. use super::Inst; -use std::fmt::{Debug, Display, Formatter, Result}; +use core::fmt::{Debug, Display, Formatter, Result}; #[derive(Copy, Clone, Debug, Default)] pub struct Imm12 { @@ -371,3 +371,4 @@ mod test { assert!(Inst::imm_min() == i32::MIN as i64 - 2048); } } +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/riscv64/inst/mod.rs b/cranelift/codegen/src/isa/riscv64/inst/mod.rs index 2521e8d358b9..dc41e455c3c3 100644 --- a/cranelift/codegen/src/isa/riscv64/inst/mod.rs +++ b/cranelift/codegen/src/isa/riscv64/inst/mod.rs @@ -15,9 +15,9 @@ pub use crate::ir::condcodes::FloatCC; use alloc::vec::Vec; use regalloc2::RegClass; use smallvec::{SmallVec, smallvec}; -use std::boxed::Box; -use std::fmt::Write; -use std::string::{String, ToString}; +use alloc::boxed::Box; +use core::fmt::Write; +use alloc::string::{String, ToString}; pub mod regs; pub use self::regs::*; @@ -38,7 +38,7 @@ use crate::isa::riscv64::abi::Riscv64MachineDeps; #[cfg(test)] mod emit_tests; -use std::fmt::{Display, Formatter}; +use core::fmt::{Display, Formatter}; pub(crate) type VecU8 = Vec; @@ -85,7 +85,7 @@ impl CondBrTarget { } impl Display for CondBrTarget { - fn fmt(&self, f: &mut Formatter<'_>) -> std::fmt::Result { + fn fmt(&self, f: &mut Formatter<'_>) -> core::fmt::Result { match self { CondBrTarget::Label(l) => write!(f, "{}", l.to_string()), CondBrTarget::Fallthrough => write!(f, "0"), @@ -1940,3 +1940,4 @@ mod test { assert!(LabelUse::B12.max_pos_range() == ((1 << 11) - 1) * 2); } } +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/riscv64/inst/regs.rs b/cranelift/codegen/src/isa/riscv64/inst/regs.rs index 76493732bfe1..d1e9fa7cd00f 100644 --- a/cranelift/codegen/src/isa/riscv64/inst/regs.rs +++ b/cranelift/codegen/src/isa/riscv64/inst/regs.rs @@ -151,3 +151,4 @@ pub const fn pf_reg(enc: usize) -> PReg { pub const fn pv_reg(enc: usize) -> PReg { PReg::new(enc, RegClass::Vector) } +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/riscv64/inst/unwind.rs b/cranelift/codegen/src/isa/riscv64/inst/unwind.rs index 1e2bb904db74..cb1a9ad16eb4 100644 --- a/cranelift/codegen/src/isa/riscv64/inst/unwind.rs +++ b/cranelift/codegen/src/isa/riscv64/inst/unwind.rs @@ -1,2 +1,3 @@ #[cfg(feature = "unwind")] pub(crate) mod systemv; +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/riscv64/inst/unwind/systemv.rs b/cranelift/codegen/src/isa/riscv64/inst/unwind/systemv.rs index 0b2ef040b19c..0edc32ba221f 100644 --- a/cranelift/codegen/src/isa/riscv64/inst/unwind/systemv.rs +++ b/cranelift/codegen/src/isa/riscv64/inst/unwind/systemv.rs @@ -171,3 +171,4 @@ mod tests { func } } +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/riscv64/inst/vector.rs b/cranelift/codegen/src/isa/riscv64/inst/vector.rs index 269e6481b506..dcbda4aa1850 100644 --- a/cranelift/codegen/src/isa/riscv64/inst/vector.rs +++ b/cranelift/codegen/src/isa/riscv64/inst/vector.rs @@ -1148,3 +1148,4 @@ pub trait VecInstOverlapInfo { self.forbids_src_dst_overlaps() || (mask.is_enabled() && self.forbids_mask_dst_overlaps()) } } +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/riscv64/lower.rs b/cranelift/codegen/src/isa/riscv64/lower.rs index 117778f820b3..8de92855b2f8 100644 --- a/cranelift/codegen/src/isa/riscv64/lower.rs +++ b/cranelift/codegen/src/isa/riscv64/lower.rs @@ -33,3 +33,4 @@ impl LowerBackend for Riscv64Backend { type FactFlowState = (); } +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/riscv64/lower/isle.rs b/cranelift/codegen/src/isa/riscv64/lower/isle.rs index 87bf480f2f5f..81d0e2061b54 100644 --- a/cranelift/codegen/src/isa/riscv64/lower/isle.rs +++ b/cranelift/codegen/src/isa/riscv64/lower/isle.rs @@ -22,8 +22,8 @@ use crate::{ machinst::{ArgPair, CallArgList, CallRetList, InstOutput}, }; use regalloc2::PReg; -use std::boxed::Box; -use std::vec::Vec; +use alloc::boxed::Box; +use alloc::vec::Vec; use wasmtime_math::{f32_cvt_to_int_bounds, f64_cvt_to_int_bounds}; type BoxCallInfo = Box>; @@ -749,3 +749,4 @@ pub(crate) fn lower_branch( let mut isle_ctx = RV64IsleContext::new(lower_ctx, backend); generated_code::constructor_lower_branch(&mut isle_ctx, branch, targets) } +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/riscv64/lower/isle/generated_code.rs b/cranelift/codegen/src/isa/riscv64/lower/isle/generated_code.rs index ad8466108a3b..9fb78bfb80ca 100644 --- a/cranelift/codegen/src/isa/riscv64/lower/isle/generated_code.rs +++ b/cranelift/codegen/src/isa/riscv64/lower/isle/generated_code.rs @@ -13,3 +13,4 @@ )] include!(concat!(env!("ISLE_DIR"), "/isle_riscv64.rs")); +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/riscv64/mod.rs b/cranelift/codegen/src/isa/riscv64/mod.rs index 873b69851090..6a50953d6750 100644 --- a/cranelift/codegen/src/isa/riscv64/mod.rs +++ b/cranelift/codegen/src/isa/riscv64/mod.rs @@ -16,7 +16,7 @@ use crate::{CodegenError, ir}; use alloc::{boxed::Box, vec::Vec}; use core::fmt; use cranelift_control::ControlPlane; -use std::string::String; +use alloc::string::String; use target_lexicon::{Architecture, Triple}; mod abi; pub(crate) mod inst; @@ -292,3 +292,4 @@ fn isa_constructor( let backend = Riscv64Backend::new_with_flags(triple, shared_flags, isa_flags); Ok(backend.wrapped()) } +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/riscv64/settings.rs b/cranelift/codegen/src/isa/riscv64/settings.rs index c896dd5fe911..f4ca3fb3a88a 100644 --- a/cranelift/codegen/src/isa/riscv64/settings.rs +++ b/cranelift/codegen/src/isa/riscv64/settings.rs @@ -7,3 +7,4 @@ use core::fmt; // public `Flags` struct with an impl for all of the settings defined in // `cranelift/codegen/meta/src/isa/riscv64/settings.rs`. include!(concat!(env!("OUT_DIR"), "/settings-riscv64.rs")); +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/s390x/abi.rs b/cranelift/codegen/src/isa/s390x/abi.rs index 7b8ad6da166e..02658acfc0f5 100644 --- a/cranelift/codegen/src/isa/s390x/abi.rs +++ b/cranelift/codegen/src/isa/s390x/abi.rs @@ -147,7 +147,7 @@ use crate::settings; use alloc::vec::Vec; use regalloc2::{MachineEnv, PRegSet}; use smallvec::{SmallVec, smallvec}; -use std::borrow::ToOwned; +use alloc::borrow::ToOwned; use std::sync::OnceLock; // We use a generic implementation that factors out ABI commonalities. @@ -399,11 +399,11 @@ impl ABIMachineSpec for S390xMachineDeps { // Compute size. Every argument or return value takes a slot of // at least 8 bytes. let size = (ty_bits(param.value_type) / 8) as u32; - let slot_size = std::cmp::max(size, 8); + let slot_size = core::cmp::max(size, 8); // Align the stack slot. debug_assert!(slot_size.is_power_of_two()); - let slot_align = std::cmp::min(slot_size, 8); + let slot_align = core::cmp::min(slot_size, 8); next_stack = align_to(next_stack, slot_align); // If the type is actually of smaller size (and the argument @@ -1627,3 +1627,4 @@ fn tail_create_machine_env() -> MachineEnv { scratch_by_class: [None, None, None], } } +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/s390x/inst/args.rs b/cranelift/codegen/src/isa/s390x/inst/args.rs index 33e790673b61..5e114104b320 100644 --- a/cranelift/codegen/src/isa/s390x/inst/args.rs +++ b/cranelift/codegen/src/isa/s390x/inst/args.rs @@ -269,3 +269,4 @@ impl PrettyPrint for Cond { s.to_string() } } +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/s390x/inst/emit.rs b/cranelift/codegen/src/isa/s390x/inst/emit.rs index 5baef0fede8a..e218fe55454a 100644 --- a/cranelift/codegen/src/isa/s390x/inst/emit.rs +++ b/cranelift/codegen/src/isa/s390x/inst/emit.rs @@ -3559,3 +3559,4 @@ impl Inst { state.clear_post_insn(); } } +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/s390x/inst/emit_tests.rs b/cranelift/codegen/src/isa/s390x/inst/emit_tests.rs index aa6f9e6b19c9..9f5afa33448e 100644 --- a/cranelift/codegen/src/isa/s390x/inst/emit_tests.rs +++ b/cranelift/codegen/src/isa/s390x/inst/emit_tests.rs @@ -13496,3 +13496,4 @@ fn test_s390x_binemit() { assert_eq!(expected_encoding, actual_encoding); } } +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/s390x/inst/imms.rs b/cranelift/codegen/src/isa/s390x/inst/imms.rs index 8ceebbcdac15..edb66ba08196 100644 --- a/cranelift/codegen/src/isa/s390x/inst/imms.rs +++ b/cranelift/codegen/src/isa/s390x/inst/imms.rs @@ -1,7 +1,7 @@ //! S390x ISA definitions: immediate constants. use crate::machinst::PrettyPrint; -use std::string::String; +use alloc::string::String; /// An unsigned 12-bit immediate. #[derive(Clone, Copy, Debug)] @@ -200,3 +200,4 @@ impl PrettyPrint for UImm32Shifted { format!("{}", self.bits) } } +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/s390x/inst/mod.rs b/cranelift/codegen/src/isa/s390x/inst/mod.rs index 1e9c0aeb72be..766730533764 100644 --- a/cranelift/codegen/src/isa/s390x/inst/mod.rs +++ b/cranelift/codegen/src/isa/s390x/inst/mod.rs @@ -9,8 +9,8 @@ use crate::{CodegenError, CodegenResult, settings}; use alloc::boxed::Box; use alloc::vec::Vec; use smallvec::SmallVec; -use std::fmt::Write; -use std::string::{String, ToString}; +use core::fmt::Write; +use alloc::string::{String, ToString}; pub mod regs; pub use self::regs::*; pub mod imms; @@ -55,7 +55,7 @@ pub struct ReturnCallInfo { fn inst_size_test() { // This test will help with unintentionally growing the size // of the Inst enum. - assert_eq!(32, std::mem::size_of::()); + assert_eq!(32, core::mem::size_of::()); } /// A register pair. Enum so it can be destructured in ISLE. @@ -3550,3 +3550,4 @@ impl MachInstLabelUse for LabelUse { } } } +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/s390x/inst/regs.rs b/cranelift/codegen/src/isa/s390x/inst/regs.rs index d3985bb9d20b..eebcb36a33df 100644 --- a/cranelift/codegen/src/isa/s390x/inst/regs.rs +++ b/cranelift/codegen/src/isa/s390x/inst/regs.rs @@ -184,3 +184,4 @@ pub fn pretty_print_regpair_mod_lo(rd: WritableRegPair, ri: Reg) -> String { pub fn pretty_print_fpr(reg: Reg) -> (String, Option) { (show_reg(reg), maybe_show_fpr(reg)) } +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/s390x/inst/unwind.rs b/cranelift/codegen/src/isa/s390x/inst/unwind.rs index 1e2bb904db74..cb1a9ad16eb4 100644 --- a/cranelift/codegen/src/isa/s390x/inst/unwind.rs +++ b/cranelift/codegen/src/isa/s390x/inst/unwind.rs @@ -1,2 +1,3 @@ #[cfg(feature = "unwind")] pub(crate) mod systemv; +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/s390x/inst/unwind/systemv.rs b/cranelift/codegen/src/isa/s390x/inst/unwind/systemv.rs index 6ae2c7e262d9..a37ca84767d9 100644 --- a/cranelift/codegen/src/isa/s390x/inst/unwind/systemv.rs +++ b/cranelift/codegen/src/isa/s390x/inst/unwind/systemv.rs @@ -216,3 +216,4 @@ mod tests { func } } +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/s390x/lower.rs b/cranelift/codegen/src/isa/s390x/lower.rs index 9af0b96147e5..c111eee9c915 100644 --- a/cranelift/codegen/src/isa/s390x/lower.rs +++ b/cranelift/codegen/src/isa/s390x/lower.rs @@ -28,3 +28,4 @@ impl LowerBackend for S390xBackend { type FactFlowState = (); } +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/s390x/lower/isle.rs b/cranelift/codegen/src/isa/s390x/lower/isle.rs index b4bbbc7ec9c1..e93358b1a972 100644 --- a/cranelift/codegen/src/isa/s390x/lower/isle.rs +++ b/cranelift/codegen/src/isa/s390x/lower/isle.rs @@ -24,9 +24,9 @@ use crate::{ }, }; use regalloc2::PReg; -use std::boxed::Box; -use std::cell::Cell; -use std::vec::Vec; +use alloc::boxed::Box; +use core::cell::Cell; +use alloc::vec::Vec; type BoxCallInfo = Box>; type BoxReturnCallInfo = Box>; @@ -631,7 +631,7 @@ impl generated_code::Context for IsleContext<'_, '_, MInst, S390xBackend> { #[inline] fn fcvt_to_sint_lb32(&mut self, size: u8) -> u64 { let lb = (-2.0_f32).powi((size - 1).into()); - std::cmp::max(lb.to_bits() + 1, (lb - 1.0).to_bits()) as u64 + core::cmp::max(lb.to_bits() + 1, (lb - 1.0).to_bits()) as u64 } #[inline] @@ -642,7 +642,7 @@ impl generated_code::Context for IsleContext<'_, '_, MInst, S390xBackend> { #[inline] fn fcvt_to_sint_lb64(&mut self, size: u8) -> u64 { let lb = (-2.0_f64).powi((size - 1).into()); - std::cmp::max(lb.to_bits() + 1, (lb - 1.0).to_bits()) + core::cmp::max(lb.to_bits() + 1, (lb - 1.0).to_bits()) } #[inline] @@ -859,3 +859,4 @@ fn condcode_is_signed(cc: IntCC) -> bool { IntCC::UnsignedLessThan => false, } } +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/s390x/lower/isle/generated_code.rs b/cranelift/codegen/src/isa/s390x/lower/isle/generated_code.rs index a6daad546b62..c32fdefdc440 100644 --- a/cranelift/codegen/src/isa/s390x/lower/isle/generated_code.rs +++ b/cranelift/codegen/src/isa/s390x/lower/isle/generated_code.rs @@ -13,3 +13,4 @@ )] include!(concat!(env!("ISLE_DIR"), "/isle_s390x.rs")); +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/s390x/mod.rs b/cranelift/codegen/src/isa/s390x/mod.rs index 8768b4eebf84..8393768c442a 100644 --- a/cranelift/codegen/src/isa/s390x/mod.rs +++ b/cranelift/codegen/src/isa/s390x/mod.rs @@ -15,7 +15,7 @@ use crate::settings as shared_settings; use alloc::{boxed::Box, vec::Vec}; use core::fmt; use cranelift_control::ControlPlane; -use std::string::String; +use alloc::string::String; use target_lexicon::{Architecture, Triple}; // New backend: @@ -236,3 +236,4 @@ pub fn isa_builder(triple: Triple) -> IsaBuilder { }, } } +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/s390x/settings.rs b/cranelift/codegen/src/isa/s390x/settings.rs index 5bf89030f19d..16a717f9e7c7 100644 --- a/cranelift/codegen/src/isa/s390x/settings.rs +++ b/cranelift/codegen/src/isa/s390x/settings.rs @@ -7,3 +7,4 @@ use core::fmt; // public `Flags` struct with an impl for all of the settings defined in // `cranelift/codegen/meta/src/isa/s390x/settings.rs`. include!(concat!(env!("OUT_DIR"), "/settings-s390x.rs")); +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/unwind.rs b/cranelift/codegen/src/isa/unwind.rs index ada37b03ccbb..7b842ac7e4ab 100644 --- a/cranelift/codegen/src/isa/unwind.rs +++ b/cranelift/codegen/src/isa/unwind.rs @@ -15,6 +15,7 @@ pub mod winx64; pub mod winarm64; /// CFA-based unwind information used on SystemV. +#[cfg(feature = "unwind")] pub type CfaUnwindInfo = systemv::UnwindInfo; /// Expected unwind info type. diff --git a/cranelift/codegen/src/isa/unwind/systemv.rs b/cranelift/codegen/src/isa/unwind/systemv.rs index d85694e87852..0fb19d0408c7 100644 --- a/cranelift/codegen/src/isa/unwind/systemv.rs +++ b/cranelift/codegen/src/isa/unwind/systemv.rs @@ -23,10 +23,10 @@ pub enum RegisterMappingError { // This is manually implementing Error and Display instead of using thiserror to reduce the amount // of dependencies used by Cranelift. -impl std::error::Error for RegisterMappingError {} +impl core::error::Error for RegisterMappingError {} -impl std::fmt::Display for RegisterMappingError { - fn fmt(&self, f: &mut std::fmt::Formatter) -> std::fmt::Result { +impl core::fmt::Display for RegisterMappingError { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { match self { RegisterMappingError::MissingBank => write!(f, "unable to find bank for register info"), RegisterMappingError::UnsupportedArchitecture => write!( @@ -286,3 +286,4 @@ impl UnwindInfo { fde } } +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/unwind/winarm64.rs b/cranelift/codegen/src/isa/unwind/winarm64.rs index 3d3cdd8fcf48..803867af2a85 100644 --- a/cranelift/codegen/src/isa/unwind/winarm64.rs +++ b/cranelift/codegen/src/isa/unwind/winarm64.rs @@ -315,3 +315,4 @@ pub(crate) fn create_unwind_info_from_insts( Ok(UnwindInfo { unwind_codes }) } +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/unwind/winx64.rs b/cranelift/codegen/src/isa/unwind/winx64.rs index 38cb46b83b55..e352dc6351df 100644 --- a/cranelift/codegen/src/isa/unwind/winx64.rs +++ b/cranelift/codegen/src/isa/unwind/winx64.rs @@ -310,3 +310,4 @@ fn ensure_unwind_offset(offset: u32) -> CodegenResult { } Ok(offset as u8) } +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/winch.rs b/cranelift/codegen/src/isa/winch.rs index c37ddd373ee0..df8fdce35223 100644 --- a/cranelift/codegen/src/isa/winch.rs +++ b/cranelift/codegen/src/isa/winch.rs @@ -8,7 +8,7 @@ pub(super) fn reverse_stack(mut args: ArgsAccumulator, next_stack: u32, uses_ext for slot in slots.iter_mut() { if let ABIArgSlot::Stack { offset, ty, .. } = slot { let size = if uses_extension { - i64::from(std::cmp::max(ty.bytes(), 8)) + i64::from(core::cmp::max(ty.bytes(), 8)) } else { i64::from(ty.bytes()) }; diff --git a/cranelift/codegen/src/isa/x64/abi.rs b/cranelift/codegen/src/isa/x64/abi.rs index 81897510640d..e00689769b40 100644 --- a/cranelift/codegen/src/isa/x64/abi.rs +++ b/cranelift/codegen/src/isa/x64/abi.rs @@ -9,14 +9,14 @@ use crate::isa::{CallConv, unwind::UnwindInst, x64::inst::*, x64::settings as x6 use crate::machinst::abi::*; use crate::machinst::*; use crate::settings; +use alloc::borrow::ToOwned; use alloc::boxed::Box; use alloc::vec::Vec; use args::*; +use std::sync::OnceLock; use cranelift_assembler_x64 as asm; use regalloc2::{MachineEnv, PReg, PRegSet}; use smallvec::{SmallVec, smallvec}; -use std::borrow::ToOwned; -use std::sync::OnceLock; /// Support for the x64 ABI from the callee side (within a function body). pub(crate) type X64Callee = Callee; @@ -358,7 +358,7 @@ impl ABIMachineSpec for X64ABIMachineSpec { { size } else { - let size = std::cmp::max(size, 8); + let size = core::cmp::max(size, 8); // Align. debug_assert!(size.is_power_of_two()); @@ -1346,3 +1346,4 @@ fn create_reg_env_systemv(enable_pinned_reg: bool) -> MachineEnv { env } +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/x64/inst/args.rs b/cranelift/codegen/src/isa/x64/inst/args.rs index c34983643e87..c5e6a117ec04 100644 --- a/cranelift/codegen/src/isa/x64/inst/args.rs +++ b/cranelift/codegen/src/isa/x64/inst/args.rs @@ -7,8 +7,8 @@ use crate::ir::types::*; use crate::isa::x64::inst::Inst; use crate::isa::x64::inst::regs::pretty_print_reg; use crate::machinst::*; -use std::fmt; -use std::string::String; +use core::fmt; +use alloc::string::String; /// An extension trait for converting `Writable{Xmm,Gpr}` to `Writable`. pub trait ToWritableReg { @@ -87,7 +87,7 @@ macro_rules! newtype_of_reg { // NB: We cannot implement `DerefMut` because that would let people do // nasty stuff like `*my_gpr.deref_mut() = some_xmm_reg`, breaking the // invariants that `Gpr` provides. - impl std::ops::Deref for $newtype_reg { + impl core::ops::Deref for $newtype_reg { type Target = Reg; fn deref(&self) -> &Reg { @@ -1061,3 +1061,4 @@ impl OperandSize { self.to_bytes() * 8 } } +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/x64/inst/emit.rs b/cranelift/codegen/src/isa/x64/inst/emit.rs index 406f9961f7ca..363f9194bd6f 100644 --- a/cranelift/codegen/src/isa/x64/inst/emit.rs +++ b/cranelift/codegen/src/isa/x64/inst/emit.rs @@ -735,7 +735,7 @@ pub(crate) fn emit( // Emit jump table (table of 32-bit offsets). sink.bind_label(start_of_jumptable, state.ctrl_plane_mut()); let jt_off = sink.cur_offset(); - for &target in targets.iter().chain(std::iter::once(default_target)) { + for &target in targets.iter().chain(core::iter::once(default_target)) { let word_off = sink.cur_offset(); // off_into_table is an addend here embedded in the label to be later patched at // the end of codegen. The offset is initially relative to this jump table entry; diff --git a/cranelift/codegen/src/isa/x64/inst/emit_tests.rs b/cranelift/codegen/src/isa/x64/inst/emit_tests.rs index 1bd8b0f6b28e..7d9e7a6e7eba 100644 --- a/cranelift/codegen/src/isa/x64/inst/emit_tests.rs +++ b/cranelift/codegen/src/isa/x64/inst/emit_tests.rs @@ -2,7 +2,7 @@ //! //! See comments at the top of `fn x64_emit` for advice on how to create reliable test cases. //! -//! to see stdout: cargo test -- --nocapture +//! to see coreout: cargo test -- --nocapture //! //! for this specific case, as of 24 Aug 2020: //! @@ -383,3 +383,4 @@ fn test_x64_emit() { assert_eq!(expected_encoding, actual_encoding, "{expected_printing}"); } } +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/x64/inst/external.rs b/cranelift/codegen/src/isa/x64/inst/external.rs index 2394103a63f6..0229c5ed42c9 100644 --- a/cranelift/codegen/src/isa/x64/inst/external.rs +++ b/cranelift/codegen/src/isa/x64/inst/external.rs @@ -7,7 +7,7 @@ use super::{ use crate::{Reg, Writable, ir::TrapCode}; use cranelift_assembler_x64 as asm; use regalloc2::{PReg, RegClass}; -use std::string::String; +use alloc::string::String; /// Define the types of registers Cranelift will use. #[derive(Clone, Debug)] @@ -562,3 +562,4 @@ mod tests { assert_eq!(pair.to_string(None), "(%v500 <- %v400)"); } } +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/x64/inst/mod.rs b/cranelift/codegen/src/isa/x64/inst/mod.rs index 298dc938b235..0567b9554fb6 100644 --- a/cranelift/codegen/src/isa/x64/inst/mod.rs +++ b/cranelift/codegen/src/isa/x64/inst/mod.rs @@ -16,8 +16,8 @@ use alloc::vec::Vec; use core::slice; use cranelift_assembler_x64 as asm; use smallvec::{SmallVec, smallvec}; -use std::fmt::{self, Write}; -use std::string::{String, ToString}; +use core::fmt::{self, Write}; +use alloc::string::{String, ToString}; pub mod args; mod emit; @@ -60,7 +60,7 @@ pub struct ReturnCallInfo { fn inst_size_test() { // This test will help with unintentionally growing the size // of the Inst enum. - assert_eq!(48, std::mem::size_of::()); + assert_eq!(48, core::mem::size_of::()); } impl Inst { @@ -1384,7 +1384,7 @@ impl MachInst for Inst { } fn gen_nop(preferred_size: usize) -> Inst { - Inst::nop(std::cmp::min(preferred_size, 9) as u8) + Inst::nop(core::cmp::min(preferred_size, 9) as u8) } fn gen_nop_units() -> Vec> { @@ -1678,3 +1678,4 @@ impl MachInstLabelUse for LabelUse { } } } +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/x64/inst/regs.rs b/cranelift/codegen/src/isa/x64/inst/regs.rs index f4c0fc2abbfc..33cb94dfd060 100644 --- a/cranelift/codegen/src/isa/x64/inst/regs.rs +++ b/cranelift/codegen/src/isa/x64/inst/regs.rs @@ -9,7 +9,7 @@ use crate::machinst::Reg; use alloc::string::ToString; use cranelift_assembler_x64::{gpr, xmm}; use regalloc2::{PReg, RegClass, VReg}; -use std::string::String; +use alloc::string::String; // Constructors for Regs. @@ -174,3 +174,4 @@ pub fn pretty_print_reg(reg: Reg, size: u8) -> String { name } } +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/x64/inst/unwind/systemv.rs b/cranelift/codegen/src/isa/x64/inst/unwind/systemv.rs index 3f46843ab4f4..ecbe379cd7da 100644 --- a/cranelift/codegen/src/isa/x64/inst/unwind/systemv.rs +++ b/cranelift/codegen/src/isa/x64/inst/unwind/systemv.rs @@ -202,3 +202,4 @@ mod tests { func } } +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/x64/inst/unwind/winx64.rs b/cranelift/codegen/src/isa/x64/inst/unwind/winx64.rs index f848a5baf76f..f6d80f5e531f 100644 --- a/cranelift/codegen/src/isa/x64/inst/unwind/winx64.rs +++ b/cranelift/codegen/src/isa/x64/inst/unwind/winx64.rs @@ -14,3 +14,4 @@ impl crate::isa::unwind::winx64::RegisterMapper for RegisterMapper { } } } +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/x64/lower.rs b/cranelift/codegen/src/isa/x64/lower.rs index 522a155ff1f4..a000f8ece143 100644 --- a/cranelift/codegen/src/isa/x64/lower.rs +++ b/cranelift/codegen/src/isa/x64/lower.rs @@ -16,7 +16,7 @@ use crate::machinst::lower::*; use crate::machinst::*; use crate::result::CodegenResult; use crate::settings::Flags; -use std::boxed::Box; +use alloc::boxed::Box; use target_lexicon::Triple; /// Identifier for a particular input of an instruction. diff --git a/cranelift/codegen/src/isa/x64/lower/isle.rs b/cranelift/codegen/src/isa/x64/lower/isle.rs index 073284605ef7..3917b4203ca5 100644 --- a/cranelift/codegen/src/isa/x64/lower/isle.rs +++ b/cranelift/codegen/src/isa/x64/lower/isle.rs @@ -22,10 +22,10 @@ use crate::machinst::{ ArgPair, CallArgList, CallInfo, CallRetList, InstOutput, MachInst, VCodeConstant, VCodeConstantData, }; +use alloc::boxed::Box; use alloc::vec::Vec; use cranelift_assembler_x64 as asm; use regalloc2::PReg; -use std::boxed::Box; /// Type representing out-of-line data for calls. This type optional because the /// call instruction is also used by Winch to emit calls, but the @@ -1249,3 +1249,4 @@ const I8X16_USHR_MASKS: [u8; 128] = [ 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, ]; +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/x64/lower/isle/generated_code.rs b/cranelift/codegen/src/isa/x64/lower/isle/generated_code.rs index c48996ec46d6..1bc434f23b5a 100644 --- a/cranelift/codegen/src/isa/x64/lower/isle/generated_code.rs +++ b/cranelift/codegen/src/isa/x64/lower/isle/generated_code.rs @@ -14,3 +14,4 @@ )] include!(concat!(env!("ISLE_DIR"), "/isle_x64.rs")); +use crate::prelude::*; diff --git a/cranelift/codegen/src/isa/x64/mod.rs b/cranelift/codegen/src/isa/x64/mod.rs index 0edaf5ccb79c..c67ccc5b654b 100644 --- a/cranelift/codegen/src/isa/x64/mod.rs +++ b/cranelift/codegen/src/isa/x64/mod.rs @@ -10,16 +10,16 @@ use crate::isa::unwind::systemv; use crate::isa::x64::settings as x64_settings; use crate::isa::{Builder as IsaBuilder, FunctionAlignment, IsaFlagsHashKey}; use crate::machinst::{ - CompiledCode, CompiledCodeStencil, MachInst, MachTextSectionBuilder, Reg, SigSet, + CompiledCodeStencil, MachInst, MachTextSectionBuilder, Reg, SigSet, TextSectionBuilder, VCode, compile, }; use crate::result::{CodegenError, CodegenResult}; use crate::settings::{self as shared_settings, Flags}; use crate::{Final, MachBufferFinalized}; +use alloc::string::String; use alloc::{borrow::ToOwned, boxed::Box, vec::Vec}; use core::fmt; use cranelift_control::ControlPlane; -use std::string::String; use target_lexicon::Triple; mod abi; @@ -264,3 +264,4 @@ fn isa_constructor( let backend = X64Backend::new_with_flags(triple, shared_flags, isa_flags)?; Ok(backend.wrapped()) } +use crate::prelude::*; diff --git a/cranelift/codegen/src/isle_prelude.rs b/cranelift/codegen/src/isle_prelude.rs index 6a9a57db40bf..a2b58b15431d 100644 --- a/cranelift/codegen/src/isle_prelude.rs +++ b/cranelift/codegen/src/isle_prelude.rs @@ -130,7 +130,7 @@ macro_rules! isle_common_prelude_methods { #[inline] fn i64_sextend_u64(&mut self, ty: Type, x: u64) -> i64 { - let shift_amt = std::cmp::max(0, 64 - ty.bits()); + let shift_amt = core::cmp::max(0, 64 - ty.bits()); ((x as i64) << shift_amt) >> shift_amt } @@ -167,7 +167,7 @@ macro_rules! isle_common_prelude_methods { #[inline] fn ty_bits(&mut self, ty: Type) -> u8 { - use std::convert::TryInto; + use core::convert::TryInto; ty.bits().try_into().unwrap() } diff --git a/cranelift/codegen/src/legalizer/globalvalue.rs b/cranelift/codegen/src/legalizer/globalvalue.rs index d829302fbd81..45444d161934 100644 --- a/cranelift/codegen/src/legalizer/globalvalue.rs +++ b/cranelift/codegen/src/legalizer/globalvalue.rs @@ -50,7 +50,7 @@ fn const_vector_scale( assert!(ty.bytes() <= 16); // Use a minimum of 128-bits for the base type. - let base_bytes = std::cmp::max(ty.bytes(), 16); + let base_bytes = core::cmp::max(ty.bytes(), 16); let scale = (isa.dynamic_vector_bytes(ty) / base_bytes) as i64; assert!(scale > 0); let pos = FuncCursor::new(func).at_inst(inst); diff --git a/cranelift/codegen/src/lib.rs b/cranelift/codegen/src/lib.rs index 425edb25e160..fe017ca4468e 100644 --- a/cranelift/codegen/src/lib.rs +++ b/cranelift/codegen/src/lib.rs @@ -21,7 +21,7 @@ extern crate alloc; extern crate std; #[cfg(not(feature = "std"))] -use hashbrown::{HashMap, HashSet, hash_map}; +use hashbrown::{HashMap, hash_map}; #[cfg(feature = "std")] use std::collections::{HashMap, hash_map}; @@ -43,6 +43,8 @@ include!(concat!(env!("ISLE_DIR"), "/isle_numerics.rs")); #[macro_use] mod machinst; +mod prelude; + pub mod binemit; pub mod cfg_printer; pub mod cursor; diff --git a/cranelift/codegen/src/loop_analysis.rs b/cranelift/codegen/src/loop_analysis.rs index b9ac3a7c6a38..5d88c519af5a 100644 --- a/cranelift/codegen/src/loop_analysis.rs +++ b/cranelift/codegen/src/loop_analysis.rs @@ -62,13 +62,13 @@ impl LoopLevel { /// A clamped loop level from a larger-width (usize) depth. pub fn clamped(level: usize) -> Self { Self( - u8::try_from(std::cmp::min(level, (Self::INVALID as usize) - 1)) + u8::try_from(core::cmp::min(level, (Self::INVALID as usize) - 1)) .expect("Clamped value must always convert"), ) } } -impl std::default::Default for LoopLevel { +impl core::default::Default for LoopLevel { fn default() -> Self { LoopLevel::invalid() } diff --git a/cranelift/codegen/src/machinst/abi.rs b/cranelift/codegen/src/machinst/abi.rs index e8949062f457..c98093d88bf5 100644 --- a/cranelift/codegen/src/machinst/abi.rs +++ b/cranelift/codegen/src/machinst/abi.rs @@ -107,11 +107,11 @@ use crate::settings::ProbestackStrategy; use crate::{ir, isa}; use crate::{machinst::*, trace}; use alloc::boxed::Box; +use core::marker::PhantomData; +use hashbrown::HashMap; use regalloc2::{MachineEnv, PReg, PRegSet}; use rustc_hash::FxHashMap; use smallvec::smallvec; -use std::collections::HashMap; -use std::marker::PhantomData; /// A small vector of instructions (with some reasonable size); appropriate for /// a small fixed sequence implementing one operation. @@ -1022,7 +1022,7 @@ impl SigSet { // NB: we do _not_ implement `IndexMut` because these signatures are // deduplicated and shared! -impl std::ops::Index for SigSet { +impl core::ops::Index for SigSet { type Output = SigData; fn index(&self, sig: Sig) -> &Self::Output { @@ -1244,7 +1244,7 @@ impl Callee { // We always at least machine-word-align slots, but also // satisfy the user's requested alignment. debug_assert!(data.align_shift < 32); - let align = std::cmp::max(M::word_bytes(), 1u32 << data.align_shift); + let align = core::cmp::max(M::word_bytes(), 1u32 << data.align_shift); let mask = align - 1; let start_offset = checked_round_up(unaligned_start_offset, mask) .ok_or(CodegenError::ImplLimitExceeded)?; @@ -2183,7 +2183,7 @@ impl Callee { // establishes live-ranges for in-register arguments and // constrains them at the start of the function to the // locations defined by the ABI. - Some(M::gen_args(std::mem::take(&mut self.reg_args))) + Some(M::gen_args(core::mem::take(&mut self.reg_args))) } else { None } @@ -2612,6 +2612,7 @@ mod tests { fn sig_data_size() { // The size of `SigData` is performance sensitive, so make sure // we don't regress it unintentionally. - assert_eq!(std::mem::size_of::(), 24); + assert_eq!(core::mem::size_of::(), 24); } } +use crate::prelude::*; diff --git a/cranelift/codegen/src/machinst/blockorder.rs b/cranelift/codegen/src/machinst/blockorder.rs index e41f1fa4f14c..9e48e2c4d607 100644 --- a/cranelift/codegen/src/machinst/blockorder.rs +++ b/cranelift/codegen/src/machinst/blockorder.rs @@ -78,7 +78,7 @@ pub struct BlockLoweringOrder { lowered_succ_indices: Vec, /// Ranges in `lowered_succ_indices` giving the successor lists for each lowered /// block. Indexed by lowering-order index (`BlockIndex`). - lowered_succ_ranges: Vec<(Option, std::ops::Range)>, + lowered_succ_ranges: Vec<(Option, core::ops::Range)>, /// BlockIndex for each original Block. blockindex_by_block: SecondaryMap, /// Cold blocks. These blocks are not reordered in the diff --git a/cranelift/codegen/src/machinst/buffer.rs b/cranelift/codegen/src/machinst/buffer.rs index f386e2af50b5..6b5de1ea41b7 100644 --- a/cranelift/codegen/src/machinst/buffer.rs +++ b/cranelift/codegen/src/machinst/buffer.rs @@ -184,11 +184,11 @@ use core::ops::Range; use cranelift_control::ControlPlane; use cranelift_entity::{PrimaryMap, SecondaryMap, entity_impl}; use smallvec::SmallVec; -use std::cmp::Ordering; -use std::collections::BinaryHeap; -use std::mem; -use std::string::String; -use std::vec::Vec; +use core::cmp::Ordering; +use alloc::collections::BinaryHeap; +use core::mem; +use alloc::string::String; +use alloc::vec::Vec; #[cfg(feature = "enable-serde")] use serde::{Deserialize, Serialize}; @@ -1820,7 +1820,7 @@ impl MachBufferFinalized { /// Return the code in this mach buffer as a hex string for testing purposes. pub fn stringify_code_bytes(&self) -> String { // This is pretty lame, but whatever .. - use std::fmt::Write; + use core::fmt::Write; let mut s = String::with_capacity(self.data.len() * 2); for b in &self.data { write!(&mut s, "{b:02X}").unwrap(); @@ -2910,3 +2910,4 @@ mod test { ); } } +use crate::prelude::*; diff --git a/cranelift/codegen/src/machinst/helpers.rs b/cranelift/codegen/src/machinst/helpers.rs index 411af0cdc7f9..01f397c8c67f 100644 --- a/cranelift/codegen/src/machinst/helpers.rs +++ b/cranelift/codegen/src/machinst/helpers.rs @@ -1,7 +1,7 @@ //! Miscellaneous helpers for machine backends. use crate::ir::Type; -use std::ops::{Add, BitAnd, Not, Sub}; +use core::ops::{Add, BitAnd, Not, Sub}; /// Returns the size (in bits) of a given type. pub fn ty_bits(ty: Type) -> usize { diff --git a/cranelift/codegen/src/machinst/inst_common.rs b/cranelift/codegen/src/machinst/inst_common.rs index b077dd3b6112..1a15cde4e1fa 100644 --- a/cranelift/codegen/src/machinst/inst_common.rs +++ b/cranelift/codegen/src/machinst/inst_common.rs @@ -14,3 +14,4 @@ pub struct InsnInput { pub(crate) insn: IRInst, pub(crate) input: usize, } +use crate::prelude::*; diff --git a/cranelift/codegen/src/machinst/isle.rs b/cranelift/codegen/src/machinst/isle.rs index ee8b29ceafcb..f73ede5b257b 100644 --- a/cranelift/codegen/src/machinst/isle.rs +++ b/cranelift/codegen/src/machinst/isle.rs @@ -218,7 +218,7 @@ macro_rules! isle_lower_prelude_methods { _ => return None, }; let ty = self.lower_ctx.output_ty(inst, 0); - let shift_amt = std::cmp::max(0, 64 - self.ty_bits(ty)); + let shift_amt = core::cmp::max(0, 64 - self.ty_bits(ty)); Some((constant << shift_amt) >> shift_amt) } @@ -760,7 +760,7 @@ macro_rules! isle_lower_prelude_methods { &mut self, targets: &MachLabelSlice, ) -> Option<(MachLabel, BoxVecMachLabel)> { - use std::boxed::Box; + use alloc::boxed::Box; if targets.is_empty() { return None; } diff --git a/cranelift/codegen/src/machinst/lower.rs b/cranelift/codegen/src/machinst/lower.rs index e94d26186093..6d61a37f3072 100644 --- a/cranelift/codegen/src/machinst/lower.rs +++ b/cranelift/codegen/src/machinst/lower.rs @@ -26,7 +26,7 @@ use alloc::vec::Vec; use cranelift_control::ControlPlane; use rustc_hash::{FxHashMap, FxHashSet}; use smallvec::{SmallVec, smallvec}; -use std::fmt::Debug; +use core::fmt::Debug; use super::{VCodeBuildDirection, VRegAllocator}; @@ -38,7 +38,7 @@ pub type InstOutput = SmallVec<[ValueRegs; 2]>; /// any side-effecting op (for this purpose, loads are also considered /// side-effecting, to avoid subtle questions w.r.t. the memory model), and /// furthermore, it is guaranteed that for any two instructions A and B such -/// that color(A) == color(B), either A dominates B and B postdominates A, or +/// that color(A) == color(B), either A dominates B and B pocoreominates A, or /// vice-versa. (For now, in practice, only ops in the same basic block can ever /// have the same color, trivially providing the second condition.) Intuitively, /// this means that the ops of the same color must always execute "together", as @@ -1389,7 +1389,7 @@ impl<'func, I: VCodeInst> Lower<'func, I> { /// Instruction input/output queries. impl<'func, I: VCodeInst> Lower<'func, I> { - /// Get the instdata for a given IR instruction. + /// Get the incoreata for a given IR instruction. pub fn data(&self, ir_inst: Inst) -> &InstructionData { &self.f.dfg.insts[ir_inst] } @@ -1797,3 +1797,4 @@ mod tests { assert_eq!(uses[v5], ValueUseState::Unused); } } +use crate::prelude::*; diff --git a/cranelift/codegen/src/machinst/mod.rs b/cranelift/codegen/src/machinst/mod.rs index f534ddb87a28..4c014f5dd0f2 100644 --- a/cranelift/codegen/src/machinst/mod.rs +++ b/cranelift/codegen/src/machinst/mod.rs @@ -59,7 +59,7 @@ use cranelift_control::ControlPlane; use cranelift_entity::PrimaryMap; use regalloc2::VReg; use smallvec::{SmallVec, smallvec}; -use std::string::String; +use alloc::string::String; #[cfg(feature = "enable-serde")] use serde_derive::{Deserialize, Serialize}; @@ -444,7 +444,7 @@ impl CompiledCodeBase { params: Option<&crate::ir::function::FunctionParameters>, cs: &capstone::Capstone, ) -> Result { - use std::fmt::Write; + use core::fmt::Write; let mut buf = String::new(); diff --git a/cranelift/codegen/src/machinst/reg.rs b/cranelift/codegen/src/machinst/reg.rs index f60afcf7d077..5d364601297d 100644 --- a/cranelift/codegen/src/machinst/reg.rs +++ b/cranelift/codegen/src/machinst/reg.rs @@ -111,8 +111,8 @@ impl Reg { } } -impl std::fmt::Debug for Reg { - fn fmt(&self, f: &mut std::fmt::Formatter) -> std::fmt::Result { +impl core::fmt::Debug for Reg { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { if VReg::from(self.0) == VReg::invalid() { write!(f, "") } else if let Some(spillslot) = self.to_spillslot() { @@ -153,8 +153,8 @@ impl RealReg { } } -impl std::fmt::Debug for RealReg { - fn fmt(&self, f: &mut std::fmt::Formatter) -> std::fmt::Result { +impl core::fmt::Debug for RealReg { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { Reg::from(*self).fmt(f) } } @@ -179,8 +179,8 @@ impl VirtualReg { } } -impl std::fmt::Debug for VirtualReg { - fn fmt(&self, f: &mut std::fmt::Formatter) -> std::fmt::Result { +impl core::fmt::Debug for VirtualReg { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { Reg::from(*self).fmt(f) } } @@ -243,20 +243,20 @@ impl cranelift_assembler_x64::AsReg for Writa // Conversions between regalloc2 types (VReg, PReg) and our types // (VirtualReg, RealReg, Reg). -impl std::convert::From for Reg { +impl core::convert::From for Reg { fn from(vreg: regalloc2::VReg) -> Reg { Reg(vreg.bits() as u32) } } -impl std::convert::From for VirtualReg { +impl core::convert::From for VirtualReg { fn from(vreg: regalloc2::VReg) -> VirtualReg { debug_assert!(pinned_vreg_to_preg(vreg).is_none()); VirtualReg(vreg) } } -impl std::convert::From for regalloc2::VReg { +impl core::convert::From for regalloc2::VReg { /// Extract the underlying `regalloc2::VReg`. Note that physical /// registers also map to particular (special) VRegs, so this /// method can be used either on virtual or physical `Reg`s. @@ -264,19 +264,19 @@ impl std::convert::From for regalloc2::VReg { reg.0.into() } } -impl std::convert::From<&Reg> for regalloc2::VReg { +impl core::convert::From<&Reg> for regalloc2::VReg { fn from(reg: &Reg) -> regalloc2::VReg { reg.0.into() } } -impl std::convert::From for regalloc2::VReg { +impl core::convert::From for regalloc2::VReg { fn from(reg: VirtualReg) -> regalloc2::VReg { reg.0 } } -impl std::convert::From for regalloc2::VReg { +impl core::convert::From for regalloc2::VReg { fn from(reg: RealReg) -> regalloc2::VReg { // This representation is redundant: the class is implied in the vreg // index as well as being in the vreg class field. @@ -284,31 +284,31 @@ impl std::convert::From for regalloc2::VReg { } } -impl std::convert::From for regalloc2::PReg { +impl core::convert::From for regalloc2::PReg { fn from(reg: RealReg) -> regalloc2::PReg { reg.0 } } -impl std::convert::From for RealReg { +impl core::convert::From for RealReg { fn from(preg: regalloc2::PReg) -> RealReg { RealReg(preg) } } -impl std::convert::From for Reg { +impl core::convert::From for Reg { fn from(preg: regalloc2::PReg) -> Reg { RealReg(preg).into() } } -impl std::convert::From for Reg { +impl core::convert::From for Reg { fn from(reg: RealReg) -> Reg { Reg(VReg::from(reg).bits() as u32) } } -impl std::convert::From for Reg { +impl core::convert::From for Reg { fn from(reg: VirtualReg) -> Reg { Reg(reg.0.bits() as u32) } @@ -317,7 +317,7 @@ impl std::convert::From for Reg { /// A spill slot. pub type SpillSlot = regalloc2::SpillSlot; -impl std::convert::From for Reg { +impl core::convert::From for Reg { fn from(spillslot: regalloc2::SpillSlot) -> Reg { Reg(REG_SPILLSLOT_BIT | spillslot.index() as u32) } @@ -563,3 +563,4 @@ pub trait PrettyPrint { self.pretty_print(0) } } +use crate::prelude::*; diff --git a/cranelift/codegen/src/machinst/valueregs.rs b/cranelift/codegen/src/machinst/valueregs.rs index 53eacea5d067..8a684d868f86 100644 --- a/cranelift/codegen/src/machinst/valueregs.rs +++ b/cranelift/codegen/src/machinst/valueregs.rs @@ -4,7 +4,7 @@ use regalloc2::{PReg, VReg}; use super::{RealReg, Reg, VirtualReg, Writable}; -use std::fmt::Debug; +use core::fmt::Debug; const VALUE_REGS_PARTS: usize = 2; diff --git a/cranelift/codegen/src/machinst/vcode.rs b/cranelift/codegen/src/machinst/vcode.rs index 9bb44e43d50f..a1fb9c9e12bb 100644 --- a/cranelift/codegen/src/machinst/vcode.rs +++ b/cranelift/codegen/src/machinst/vcode.rs @@ -31,13 +31,14 @@ use regalloc2::{ }; use rustc_hash::FxHashMap; +use crate::HashMap; +use crate::hash_map::Entry; + use core::cmp::Ordering; use core::fmt::{self, Write}; use core::mem::take; use core::ops::Range; use cranelift_entity::{Keys, entity_impl}; -use std::collections::HashMap; -use std::collections::hash_map::Entry; /// Index referring to an instruction in VCode. pub type InsnIndex = regalloc2::Inst; @@ -808,7 +809,7 @@ impl VCode { let mut cur_srcloc = None; let mut last_offset = None; let mut inst_offsets = vec![]; - let mut state = I::State::new(&self.abi, std::mem::take(ctrl_plane)); + let mut state = I::State::new(&self.abi, core::mem::take(ctrl_plane)); let mut disasm = String::new(); @@ -1552,7 +1553,7 @@ impl VCode { } } -impl std::ops::Index for VCode { +impl core::ops::Index for VCode { type Output = I; fn index(&self, idx: InsnIndex) -> &Self::Output { &self.insts[idx.index()] @@ -2040,7 +2041,7 @@ impl VCodeConstantData { #[cfg(test)] mod test { use super::*; - use std::mem::size_of; + use core::mem::size_of; #[test] fn size_of_constant_structs() { @@ -2057,3 +2058,4 @@ mod test { // least 48 bytes, making an empty `VCodeConstants` cost 120 bytes. } } +use crate::prelude::*; diff --git a/cranelift/codegen/src/opts.rs b/cranelift/codegen/src/opts.rs index b7a05cf4fea8..3c9dd6693edf 100644 --- a/cranelift/codegen/src/opts.rs +++ b/cranelift/codegen/src/opts.rs @@ -17,7 +17,7 @@ use crate::machinst::isle::*; use crate::trace; use cranelift_entity::packed_option::ReservedValue; use smallvec::{SmallVec, smallvec}; -use std::marker::PhantomData; +use core::marker::PhantomData; pub type Unit = (); pub type ValueArray2 = [Value; 2]; diff --git a/cranelift/codegen/src/opts/generated_code.rs b/cranelift/codegen/src/opts/generated_code.rs index 82208623362a..2ff9eaef16bc 100644 --- a/cranelift/codegen/src/opts/generated_code.rs +++ b/cranelift/codegen/src/opts/generated_code.rs @@ -16,3 +16,4 @@ )] include!(concat!(env!("ISLE_DIR"), "/isle_opt.rs")); +use crate::prelude::*; diff --git a/cranelift/codegen/src/prelude.rs b/cranelift/codegen/src/prelude.rs new file mode 100644 index 000000000000..5dd5950bdf86 --- /dev/null +++ b/cranelift/codegen/src/prelude.rs @@ -0,0 +1,4 @@ +pub use alloc::format; +pub use alloc::string::ToString; +pub use alloc::vec; + diff --git a/cranelift/codegen/src/remove_constant_phis.rs b/cranelift/codegen/src/remove_constant_phis.rs index ccaa3973f875..ae9f3ad6ed24 100644 --- a/cranelift/codegen/src/remove_constant_phis.rs +++ b/cranelift/codegen/src/remove_constant_phis.rs @@ -227,7 +227,7 @@ pub fn do_remove_constant_phis(func: &mut Function, domtree: &mut DominatorTree) // info. The solver will iterate over the summaries, rather than having // to inspect each instruction in each block. let bump = - Bump::with_capacity(domtree.cfg_postorder().len() * 4 * std::mem::size_of::()); + Bump::with_capacity(domtree.cfg_postorder().len() * 4 * core::mem::size_of::()); let mut summaries = SecondaryMap::::with_capacity(domtree.cfg_postorder().len()); diff --git a/cranelift/codegen/src/result.rs b/cranelift/codegen/src/result.rs index 5e4a490073c7..c62572cd9958 100644 --- a/cranelift/codegen/src/result.rs +++ b/cranelift/codegen/src/result.rs @@ -4,7 +4,7 @@ use regalloc2::checker::CheckerErrors; use crate::ir::pcc::PccError; use crate::{ir::Function, verifier::VerifierErrors}; -use std::string::String; +use alloc::string::String; /// A compilation error. /// @@ -52,8 +52,8 @@ pub type CodegenResult = Result; // This is manually implementing Error and Display instead of using thiserror to reduce the amount // of dependencies used by Cranelift. -impl std::error::Error for CodegenError { - fn source(&self) -> Option<&(dyn std::error::Error + 'static)> { +impl core::error::Error for CodegenError { + fn source(&self) -> Option<&(dyn core::error::Error + 'static)> { match self { CodegenError::Verifier(source) => Some(source), CodegenError::ImplLimitExceeded { .. } @@ -67,8 +67,8 @@ impl std::error::Error for CodegenError { } } -impl std::fmt::Display for CodegenError { - fn fmt(&self, f: &mut std::fmt::Formatter) -> std::fmt::Result { +impl core::fmt::Display for CodegenError { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { match self { CodegenError::Verifier(_) => write!(f, "Verifier errors"), CodegenError::ImplLimitExceeded => write!(f, "Implementation limit exceeded"), diff --git a/cranelift/codegen/src/settings.rs b/cranelift/codegen/src/settings.rs index af8cbd51402c..39899e63480c 100644 --- a/cranelift/codegen/src/settings.rs +++ b/cranelift/codegen/src/settings.rs @@ -290,7 +290,7 @@ pub enum SetError { BadValue(String), } -impl std::error::Error for SetError {} +impl core::error::Error for SetError {} impl fmt::Display for SetError { fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result { @@ -566,3 +566,4 @@ enable_incremental_compilation_cache_checks = false assert_eq!(f.opt_level(), super::OptLevel::Speed); } } +use crate::prelude::*; diff --git a/cranelift/codegen/src/souper_harvest.rs b/cranelift/codegen/src/souper_harvest.rs index 02958ed56a71..5ea25882bae3 100644 --- a/cranelift/codegen/src/souper_harvest.rs +++ b/cranelift/codegen/src/souper_harvest.rs @@ -587,3 +587,4 @@ fn post_order_dfs( } } } +use crate::prelude::*; diff --git a/cranelift/codegen/src/take_and_replace.rs b/cranelift/codegen/src/take_and_replace.rs index 78b8c71e827c..584d9239d0fa 100644 --- a/cranelift/codegen/src/take_and_replace.rs +++ b/cranelift/codegen/src/take_and_replace.rs @@ -64,7 +64,7 @@ where U: Default, { fn drop(&mut self) { - *(self.proj)(self.container) = std::mem::take(&mut self.value); + *(self.proj)(self.container) = core::mem::take(&mut self.value); } } @@ -76,7 +76,7 @@ where /// Create a new `TakeAndReplace` that temporarily takes out /// `proj(container)`. pub fn new(mut container: &'a mut T, proj: F) -> Self { - let value = std::mem::take(proj(&mut container)); + let value = core::mem::take(proj(&mut container)); TakeAndReplace { container, value, diff --git a/cranelift/codegen/src/timing.rs b/cranelift/codegen/src/timing.rs index a61dd21f7956..a06c6001ef41 100644 --- a/cranelift/codegen/src/timing.rs +++ b/cranelift/codegen/src/timing.rs @@ -118,12 +118,12 @@ pub use enabled::*; #[cfg(feature = "timing")] mod enabled { use super::{DESCRIPTIONS, DefaultProfiler, NUM_PASSES, Pass, Profiler}; - use std::any::Any; - use std::boxed::Box; - use std::cell::{Cell, RefCell}; - use std::fmt; - use std::mem; - use std::time::Duration; + use alloc::boxed::Box; + use core::any::Any; + use core::cell::{Cell, RefCell}; + use core::fmt; + use core::mem; + use core::time::Duration; use std::time::Instant; // Information about passes in a single thread. @@ -135,7 +135,7 @@ mod enabled { /// /// Returns the old profiler. pub fn set_thread_profiler(new_profiler: Box) -> Box { - PROFILER.with(|profiler| std::mem::replace(&mut *profiler.borrow_mut(), new_profiler)) + PROFILER.with(|profiler| core::mem::replace(&mut *profiler.borrow_mut(), new_profiler)) } /// Start timing `pass` as a child of the currently running pass, if any. diff --git a/cranelift/codegen/src/verifier/mod.rs b/cranelift/codegen/src/verifier/mod.rs index 8406820d6ac0..0aac5d0d024f 100644 --- a/cranelift/codegen/src/verifier/mod.rs +++ b/cranelift/codegen/src/verifier/mod.rs @@ -99,7 +99,7 @@ pub struct VerifierError { // This is manually implementing Error and Display instead of using thiserror to reduce the amount // of dependencies used by Cranelift. -impl std::error::Error for VerifierError {} +impl core::error::Error for VerifierError {} impl Display for VerifierError { fn fmt(&self, f: &mut Formatter) -> fmt::Result { @@ -178,7 +178,7 @@ pub struct VerifierErrors(pub Vec); // This is manually implementing Error and Display instead of using thiserror to reduce the amount // of dependencies used by Cranelift. -impl std::error::Error for VerifierErrors {} +impl core::error::Error for VerifierErrors {} impl VerifierErrors { /// Return a new `VerifierErrors` struct. @@ -2314,3 +2314,4 @@ mod tests { assert_err_with_msg!(errors, "block0 cannot be empty"); } } +use crate::prelude::*; diff --git a/cranelift/codegen/src/write.rs b/cranelift/codegen/src/write.rs index c0025aa6fca3..ab4b51effee1 100644 --- a/cranelift/codegen/src/write.rs +++ b/cranelift/codegen/src/write.rs @@ -749,3 +749,4 @@ mod tests { ); } } +use crate::prelude::*; diff --git a/cranelift/isle/isle/src/codegen.rs b/cranelift/isle/isle/src/codegen.rs index c215e1db74ea..e42ef1ae5a7c 100644 --- a/cranelift/isle/isle/src/codegen.rs +++ b/cranelift/isle/isle/src/codegen.rs @@ -166,7 +166,8 @@ impl<'a> Codegen<'a> { } writeln!(code, "\nuse super::*; // Pulls in all external types.").unwrap(); - writeln!(code, "use std::marker::PhantomData;").unwrap(); + writeln!(code, "use alloc::vec::Vec;").unwrap(); + writeln!(code, "use core::{{marker::PhantomData, ops}};").unwrap(); } fn generate_trait_sig(&self, code: &mut String, indent: &str, sig: &ExternalSig) { @@ -271,38 +272,38 @@ pub trait Length {{ fn len(&self) -> usize; }} -impl Length for std::vec::Vec {{ +impl Length for alloc::vec::Vec {{ fn len(&self) -> usize {{ - std::vec::Vec::len(self) + alloc::vec::Vec::len(self) }} }} pub struct ContextIterWrapper {{ iter: I, - _ctx: std::marker::PhantomData, + _ctx: core::marker::PhantomData, }} impl Default for ContextIterWrapper {{ fn default() -> Self {{ ContextIterWrapper {{ iter: I::default(), - _ctx: std::marker::PhantomData + _ctx: core::marker::PhantomData }} }} }} -impl std::ops::Deref for ContextIterWrapper {{ +impl core::ops::Deref for ContextIterWrapper {{ type Target = I; fn deref(&self) -> &I {{ &self.iter }} }} -impl std::ops::DerefMut for ContextIterWrapper {{ +impl core::ops::DerefMut for ContextIterWrapper {{ fn deref_mut(&mut self) -> &mut I {{ &mut self.iter }} }} impl From for ContextIterWrapper {{ fn from(iter: I) -> Self {{ - Self {{ iter, _ctx: std::marker::PhantomData }} + Self {{ iter, _ctx: core::marker::PhantomData }} }} }} impl ContextIter for ContextIterWrapper {{ @@ -322,7 +323,7 @@ impl IntoContextIter for ContextIterWrapper { fn into_context_iter(self) -> Self::IntoIter {{ ContextIterWrapper {{ iter: self.iter.into_iter(), - _ctx: std::marker::PhantomData + _ctx: core::marker::PhantomData }} }} }}