|
| 1 | +diff --git a/src/cpu/x64/jit_generator.hpp b/src/cpu/x64/jit_generator.hpp |
| 2 | +index a6b1c3397e..c8ebe0f33b 100644 |
| 3 | +--- a/src/cpu/x64/jit_generator.hpp |
| 4 | ++++ b/src/cpu/x64/jit_generator.hpp |
| 5 | +@@ -103,8 +103,8 @@ static inline void tc_configure_tile( |
| 6 | + |
| 7 | + #ifdef XBYAK64 |
| 8 | + constexpr Xbyak::Operand::Code abi_save_gpr_regs[] = { |
| 9 | +- Xbyak::Operand::RBX, |
| 10 | + Xbyak::Operand::RBP, |
| 11 | ++ Xbyak::Operand::RBX, |
| 12 | + Xbyak::Operand::R12, |
| 13 | + Xbyak::Operand::R13, |
| 14 | + Xbyak::Operand::R14, |
| 15 | +@@ -194,11 +194,17 @@ public: |
| 16 | + uni_vmovdqu(ptr[rsp + i * xmm_len], |
| 17 | + Xbyak::Xmm(xmm_to_preserve_start + i)); |
| 18 | + } |
| 19 | +- for (size_t i = 0; i < num_abi_save_gpr_regs; ++i) |
| 20 | ++ for (size_t i = 0; i < num_abi_save_gpr_regs; ++i) { |
| 21 | + push(Xbyak::Reg64(abi_save_gpr_regs[i])); |
| 22 | ++ // Stack magic: save rsp into rbp state to be able to unwind stack. |
| 23 | ++ if (i == 0) mov(rbp, rsp); |
| 24 | ++ } |
| 25 | ++#ifndef DNNL_ENABLE_MEM_DEBUG |
| 26 | ++ // do not use RBP in mem debug mode to enable backtracing from jit code |
| 27 | + if (is_valid_isa(avx512_core)) { |
| 28 | + mov(reg_EVEX_max_8b_offt, 2 * EVEX_max_8b_offt); |
| 29 | + } |
| 30 | ++#endif |
| 31 | + |
| 32 | + #ifdef DNNL_ENABLE_MEM_DEBUG |
| 33 | + // This section poisons vector registers with NaNs to catch situations |
| 34 | +@@ -277,6 +283,8 @@ public: |
| 35 | + |
| 36 | + int scale = 0; |
| 37 | + |
| 38 | ++#ifndef DNNL_ENABLE_MEM_DEBUG |
| 39 | ++ // do not use RBP in mem debug mode to enable backtracing from jit code |
| 40 | + if (EVEX_max_8b_offt <= offt && offt < 3 * EVEX_max_8b_offt) { |
| 41 | + offt = offt - 2 * EVEX_max_8b_offt; |
| 42 | + scale = 1; |
| 43 | +@@ -285,6 +293,7 @@ public: |
| 44 | + offt = offt - 4 * EVEX_max_8b_offt; |
| 45 | + scale = 2; |
| 46 | + } |
| 47 | ++#endif |
| 48 | + |
| 49 | + auto re = RegExp() + base + offt; |
| 50 | + if (scale) re = re + reg_EVEX_max_8b_offt * scale; |
0 commit comments