STM32F75x and STM32F74x timers missing OC2M bits #581
Description
Per RM0385 (https://www.st.com/resource/en/reference_manual/rm0385-stm32f75xxx-and-stm32f74xxx-advanced-armbased-32bit-mcus-stmicroelectronics.pdf) these two lines have the TIM2/TIM3/TIM4/TIM5 timers as what seems to be a hybrid between the version 1 timer and version 2 timer that was added in #364. Like version 1, they do not have the MMS2 field in CR2 which the version 2 has. But like version 2, they have the split OC2M field in CCMR1 (alternate) that version 1 doesn't seem to have.
See here where OC2M and OC1M have bit 3 in the upper 16 bit section, split from the rest of those fields.
In the current setup, these timers are using the v1 config which only exposes the lower 3 bits, and not the highest bit which is used to set some additional mode options.