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lines changed Original file line number Diff line number Diff line change @@ -129,13 +129,16 @@ namespace hal
129129 } );
130130 if ( clock_pins.size () != 1 )
131131 {
132- return ERR ( " invalid number of input clock pins at gate '" + ff_name + " ' with ID " + ff_id_str );
132+ log_error ( " clock_tree_extractor" , " invalid number of input clock pins at gate '" + ff_name + " ' with ID " + ff_id_str );
133+ continue ;
133134 }
134135
135- const Net *clk = ff->get_fan_in_net ( clock_pins.front () );
136+ const GatePin *clock_pin = clock_pins.front ();
137+ const Net *clk = ff->get_fan_in_net ( clock_pin );
136138 if ( clk == nullptr )
137139 {
138- return ERR ( " no net connected to clock pin at gate '" + ff_name + " ' with ID " + ff_id_str );
140+ log_error ( " clock_tree_extractor" , " no net connected to clock pin at gate '" + ff_name + " ' with ID " + ff_id_str );
141+ continue ;
139142 }
140143
141144 const u32 clk_id = clk->get_id ();
@@ -144,14 +147,20 @@ namespace hal
144147
145148 if ( clk_sources.size () > 1 )
146149 {
147- return ERR ( " invalid number of sources for clock net with ID " + clk_id_str );
150+ log_error ( " clock_tree_extractor" , " invalid number of sources for clock net with ID " + clk_id_str );
151+ continue ;
148152 }
149153 else if ( clk->is_global_input_net () )
150154 {
151155 const std::string clk_name = clk->get_name ();
152156 vertices[" global_inputs" ].insert ( clk_name );
153157 continue ;
154158 }
159+ else if ( clk_sources.size () == 0 )
160+ {
161+ // ignore unrouted nets for now
162+ continue ;
163+ }
155164
156165 const Endpoint *source_ep = clk_sources.front ();
157166 const Gate *source_gate = source_ep->get_gate ();
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