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Define a stable set of SPI tests (#2934)
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hil-test/tests/spi_full_duplex.rs

Lines changed: 87 additions & 41 deletions
Original file line numberDiff line numberDiff line change
@@ -2,6 +2,7 @@
22
33
//% CHIPS: esp32 esp32c2 esp32c3 esp32c6 esp32h2 esp32s2 esp32s3
44
//% FEATURES: unstable
5+
//% FEATURES(stable):
56

67
// FIXME: add async test cases that don't rely on PCNT
78

@@ -11,20 +12,28 @@
1112
use embedded_hal::spi::SpiBus;
1213
use embedded_hal_async::spi::SpiBus as SpiBusAsync;
1314
use esp_hal::{
14-
dma::{DmaDescriptor, DmaRxBuf, DmaTxBuf},
15-
dma_buffers,
16-
gpio::{Level, NoPin},
1715
spi::master::{Config, Spi},
18-
time::RateExtU32,
1916
Blocking,
2017
};
21-
#[cfg(pcnt)]
22-
use esp_hal::{
23-
gpio::interconnect::InputSignal,
24-
pcnt::{channel::EdgeMode, unit::Unit, Pcnt},
25-
};
18+
use fugit::RateExtU32;
2619
use hil_test as _;
2720

21+
cfg_if::cfg_if! {
22+
if #[cfg(feature = "unstable")] {
23+
use esp_hal::{
24+
dma::{DmaDescriptor, DmaRxBuf, DmaTxBuf},
25+
dma_buffers,
26+
gpio::{Level, NoPin},
27+
};
28+
#[cfg(pcnt)]
29+
use esp_hal::{
30+
gpio::interconnect::InputSignal,
31+
pcnt::{channel::EdgeMode, unit::Unit, Pcnt},
32+
};
33+
}
34+
}
35+
36+
#[cfg(feature = "unstable")]
2837
cfg_if::cfg_if! {
2938
if #[cfg(any(esp32, esp32s2))] {
3039
type DmaChannel = esp_hal::dma::Spi2DmaChannel;
@@ -35,15 +44,18 @@ cfg_if::cfg_if! {
3544

3645
struct Context {
3746
spi: Spi<'static, Blocking>,
47+
#[cfg(feature = "unstable")]
3848
dma_channel: DmaChannel,
3949
// Reuse the really large buffer so we don't run out of DRAM with many tests
4050
rx_buffer: &'static mut [u8],
51+
#[cfg(feature = "unstable")]
4152
rx_descriptors: &'static mut [DmaDescriptor],
4253
tx_buffer: &'static mut [u8],
54+
#[cfg(feature = "unstable")]
4355
tx_descriptors: &'static mut [DmaDescriptor],
44-
#[cfg(pcnt)]
56+
#[cfg(all(pcnt, feature = "unstable"))]
4557
pcnt_source: InputSignal,
46-
#[cfg(pcnt)]
58+
#[cfg(all(pcnt, feature = "unstable"))]
4759
pcnt_unit: Unit<'static, 0>,
4860
}
4961

@@ -56,9 +68,9 @@ mod tests {
5668
fn init() -> Context {
5769
let peripherals = esp_hal::init(esp_hal::Config::default());
5870

59-
let sclk = peripherals.GPIO0;
6071
let (_, mosi) = hil_test::common_test_pins!(peripherals);
6172

73+
#[cfg(feature = "unstable")]
6274
cfg_if::cfg_if! {
6375
if #[cfg(pdma)] {
6476
let dma_channel = peripherals.DMA_SPI2;
@@ -67,33 +79,58 @@ mod tests {
6779
}
6880
}
6981

70-
let (miso, mosi) = mosi.split();
71-
#[cfg(pcnt)]
72-
let mosi_loopback_pcnt = miso.clone();
82+
cfg_if::cfg_if! {
83+
if #[cfg(feature = "unstable")] {
84+
let (miso, mosi) = mosi.split();
85+
86+
#[cfg(pcnt)]
87+
let mosi_loopback_pcnt = miso.clone();
88+
89+
let (rx_buffer, rx_descriptors, tx_buffer, tx_descriptors) = dma_buffers!(32000);
90+
} else {
91+
use esp_hal::peripheral::Peripheral;
92+
let miso = unsafe { mosi.clone_unchecked() };
93+
94+
static mut TX_BUFFER: [u8; 4096] = [0; 4096];
95+
static mut RX_BUFFER: [u8; 4096] = [0; 4096];
96+
97+
let tx_buffer = unsafe { (&raw mut TX_BUFFER).as_mut().unwrap() };
98+
let rx_buffer = unsafe { (&raw mut RX_BUFFER).as_mut().unwrap() };
99+
}
100+
}
73101

74102
// Need to set miso first so that mosi can overwrite the
75103
// output connection (because we are using the same pin to loop back)
76104
let spi = Spi::new(peripherals.SPI2, Config::default().with_frequency(10.MHz()))
77105
.unwrap()
78-
.with_sck(sclk)
106+
.with_sck(peripherals.GPIO0)
79107
.with_miso(miso)
80108
.with_mosi(mosi);
81109

82-
let (rx_buffer, rx_descriptors, tx_buffer, tx_descriptors) = dma_buffers!(32000);
83-
84-
#[cfg(pcnt)]
85-
let pcnt = Pcnt::new(peripherals.PCNT);
86-
Context {
87-
spi,
88-
dma_channel,
89-
rx_buffer,
90-
rx_descriptors,
91-
tx_buffer,
92-
tx_descriptors,
93-
#[cfg(pcnt)]
94-
pcnt_source: mosi_loopback_pcnt,
95-
#[cfg(pcnt)]
96-
pcnt_unit: pcnt.unit0,
110+
cfg_if::cfg_if! {
111+
if #[cfg(feature = "unstable")] {
112+
#[cfg(pcnt)]
113+
let pcnt = Pcnt::new(peripherals.PCNT);
114+
115+
Context {
116+
spi,
117+
rx_buffer,
118+
tx_buffer,
119+
dma_channel,
120+
rx_descriptors,
121+
tx_descriptors,
122+
#[cfg(pcnt)]
123+
pcnt_source: mosi_loopback_pcnt,
124+
#[cfg(pcnt)]
125+
pcnt_unit: pcnt.unit0,
126+
}
127+
} else {
128+
Context {
129+
spi,
130+
rx_buffer,
131+
tx_buffer,
132+
}
133+
}
97134
}
98135
}
99136

@@ -144,7 +181,7 @@ mod tests {
144181
}
145182

146183
#[test]
147-
#[cfg(pcnt)]
184+
#[cfg(all(pcnt, feature = "unstable"))]
148185
fn test_asymmetric_write(mut ctx: Context) {
149186
let write = [0xde, 0xad, 0xbe, 0xef];
150187

@@ -162,7 +199,7 @@ mod tests {
162199
}
163200

164201
#[test]
165-
#[cfg(pcnt)]
202+
#[cfg(all(pcnt, feature = "unstable"))]
166203
async fn test_async_asymmetric_write(ctx: Context) {
167204
let write = [0xde, 0xad, 0xbe, 0xef];
168205

@@ -181,7 +218,7 @@ mod tests {
181218
}
182219

183220
#[test]
184-
#[cfg(pcnt)]
221+
#[cfg(all(pcnt, feature = "unstable"))]
185222
async fn async_write_after_sync_write_waits_for_flush(ctx: Context) {
186223
let write = [0xde, 0xad, 0xbe, 0xef, 0xde, 0xad, 0xbe, 0xef];
187224

@@ -206,7 +243,7 @@ mod tests {
206243
}
207244

208245
#[test]
209-
#[cfg(pcnt)]
246+
#[cfg(all(pcnt, feature = "unstable"))]
210247
fn test_asymmetric_write_transfer(mut ctx: Context) {
211248
let write = [0xde, 0xad, 0xbe, 0xef];
212249

@@ -224,7 +261,7 @@ mod tests {
224261
}
225262

226263
#[test]
227-
#[cfg(pcnt)]
264+
#[cfg(all(pcnt, feature = "unstable"))]
228265
async fn test_async_asymmetric_write_transfer(ctx: Context) {
229266
let write = [0xde, 0xad, 0xbe, 0xef];
230267

@@ -305,7 +342,7 @@ mod tests {
305342
}
306343

307344
#[test]
308-
#[cfg(pcnt)]
345+
#[cfg(all(pcnt, feature = "unstable"))]
309346
fn test_dma_read_dma_write_pcnt(ctx: Context) {
310347
const DMA_BUFFER_SIZE: usize = 8;
311348
const TRANSFER_SIZE: usize = 5;
@@ -345,7 +382,7 @@ mod tests {
345382
}
346383

347384
#[test]
348-
#[cfg(pcnt)]
385+
#[cfg(all(pcnt, feature = "unstable"))]
349386
fn test_dma_read_dma_transfer_pcnt(ctx: Context) {
350387
const DMA_BUFFER_SIZE: usize = 8;
351388
const TRANSFER_SIZE: usize = 5;
@@ -385,6 +422,7 @@ mod tests {
385422
}
386423

387424
#[test]
425+
#[cfg(feature = "unstable")]
388426
fn test_symmetric_dma_transfer(ctx: Context) {
389427
// This test case sends a large amount of data, multiple times to verify that
390428
// https://github.com/esp-rs/esp-hal/issues/2151 is and remains fixed.
@@ -415,6 +453,7 @@ mod tests {
415453
}
416454

417455
#[test]
456+
#[cfg(feature = "unstable")]
418457
fn test_asymmetric_dma_transfer(ctx: Context) {
419458
const WRITE_SIZE: usize = 4;
420459
const READ_SIZE: usize = 2;
@@ -451,7 +490,7 @@ mod tests {
451490
}
452491

453492
#[test]
454-
#[cfg(pcnt)]
493+
#[cfg(all(pcnt, feature = "unstable"))]
455494
fn test_dma_bus_read_write_pcnt(ctx: Context) {
456495
const TRANSFER_SIZE: usize = 4;
457496
let (rx_buffer, rx_descriptors, tx_buffer, tx_descriptors) = dma_buffers!(4);
@@ -484,6 +523,7 @@ mod tests {
484523
}
485524

486525
#[test]
526+
#[cfg(feature = "unstable")]
487527
fn test_dma_bus_symmetric_transfer(ctx: Context) {
488528
let (rx_buffer, rx_descriptors, tx_buffer, tx_descriptors) = dma_buffers!(4);
489529
let dma_rx_buf = DmaRxBuf::new(rx_descriptors, rx_buffer).unwrap();
@@ -503,6 +543,7 @@ mod tests {
503543
}
504544

505545
#[test]
546+
#[cfg(feature = "unstable")]
506547
fn test_dma_bus_asymmetric_transfer(ctx: Context) {
507548
let (rx_buffer, rx_descriptors, tx_buffer, tx_descriptors) = dma_buffers!(4);
508549
let dma_rx_buf = DmaRxBuf::new(rx_descriptors, rx_buffer).unwrap();
@@ -522,6 +563,7 @@ mod tests {
522563
}
523564

524565
#[test]
566+
#[cfg(feature = "unstable")]
525567
fn test_dma_bus_symmetric_transfer_huge_buffer(ctx: Context) {
526568
const DMA_BUFFER_SIZE: usize = 4096;
527569

@@ -543,7 +585,7 @@ mod tests {
543585
}
544586

545587
#[test]
546-
#[cfg(pcnt)]
588+
#[cfg(all(pcnt, feature = "unstable"))]
547589
async fn test_async_dma_read_dma_write_pcnt(ctx: Context) {
548590
const DMA_BUFFER_SIZE: usize = 8;
549591
const TRANSFER_SIZE: usize = 5;
@@ -577,7 +619,7 @@ mod tests {
577619
}
578620

579621
#[test]
580-
#[cfg(pcnt)]
622+
#[cfg(all(pcnt, feature = "unstable"))]
581623
async fn test_async_dma_read_dma_transfer_pcnt(ctx: Context) {
582624
const DMA_BUFFER_SIZE: usize = 8;
583625
const TRANSFER_SIZE: usize = 5;
@@ -613,6 +655,7 @@ mod tests {
613655
}
614656

615657
#[test]
658+
#[cfg(feature = "unstable")]
616659
fn test_write_read(ctx: Context) {
617660
let spi = ctx
618661
.spi
@@ -656,6 +699,7 @@ mod tests {
656699
}
657700

658701
#[test]
702+
#[cfg(feature = "unstable")]
659703
fn cancel_stops_transaction(mut ctx: Context) {
660704
// Slow down. At 80kHz, the transfer is supposed to take a bit over 3 seconds.
661705
// This means that without working cancellation, the test case should
@@ -680,6 +724,7 @@ mod tests {
680724
}
681725

682726
#[test]
727+
#[cfg(feature = "unstable")]
683728
fn can_transmit_after_cancel(mut ctx: Context) {
684729
// Slow down. At 80kHz, the transfer is supposed to take a bit over 3 seconds.
685730
ctx.spi
@@ -717,6 +762,7 @@ mod tests {
717762
}
718763

719764
#[test]
765+
#[cfg(feature = "unstable")]
720766
async fn cancelling_an_awaited_transfer_does_nothing(ctx: Context) {
721767
// Set up a large buffer that would trigger a timeout
722768
let dma_rx_buf = DmaRxBuf::new(ctx.rx_descriptors, ctx.rx_buffer).unwrap();

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