Commit 793f7bd
Large Refactoring (#95)
* wip: Share parsed `mbedtls_x509_crt` and `mbedtls_pk_context` between sessions
* feat: Add no-copy support for X509 parsing. Expose auth_mode parameter
- Session now exposes an optional `auth_mode` parameter to select the
certificate verification mode.
- Update Certificates to handle no-copy variants of certificates
parsing.
- Add DER certificates for testing no-copy variants
* refactor: Use struct to pass configuration to a session
* feat: Expose parsed X509 certificates and add extra impls to generated bindings
* fix: Improve lifetime management for Session certificates
- Remove duplicate justfile step for faster building
* refactor: Use `mbedtls_calloc()` and `mbedtls_free()` alias for memory management
* feat: Make `Certificates` Send
* chore: auto-push built libraries
* refactor: Make `Certificates` take references
* Unify everything into SessionConfig
* Option to split the async session into a read and write halves
* External rng; support for defmt
* defmt
* Make the async code non-optional
* Split into modules
* Move examples into their own crates; remove esp-hal dependencies from the examples; STD examples; testing and bugfixing
* Streamline the error story; apply Clippy
* New HAL-neutral HW-accel framework
* Restore the workspace Cargo.toml and the xtask alias
* esp - expmod
* Re-export the sys crate
* Make the build of esp-mbedtls-sys cpu-arch-specific but NOT mcu-specific
* Move all hooking and HW accel to esp-mbedtls-sys
* Move the self-tests to esp-mbedtls-sys
* Update READMEs
* Fix merr to return the non-negative result
* Restore the crypto self tests on the esp32 chips (with HW accel)
* Enlarge sha work area sizes for esp32
* Bugfixing
* Reduce the accel installation noise
* Fix software fallbacks for xtensa and riscv32
* Fix the exp_mod return type
* esp server example
* Unify the embassy_net bootstrapping code for all esp examples
* Working esp server examples
* Update certs and examples READMEs
* Replace all mentions of OpenThread with MbedTLS
* Install and run espup manually so that we enable the Espressif RISCV toolchain
* Fix CI
* Clippy
* fmt; fix CI
* Fix CI
* Address code review comments
* Rename a forgotten openthread mentioning
* Fix a typo
* Address review feedback
* Do not allocate larger space for sha, because sha HW accel is not enabled for the esp32 anyway
* Always build esp-hal with opt-level 3 as this affects HW accel
---------
Co-authored-by: Anthony Grondin <[email protected]>
Co-authored-by: github-actions[bot] <github-actions[bot]@users.noreply.github.com>1 parent 35e8ccd commit 793f7bd
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135 files changed
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lines changed- .cargo
- .github/workflows
- esp-mbedtls-sys
- gen
- include
- soc
- esp32c3
- esp32c6
- esp32s2
- esp32s3
- esp32
- toolchains
- libs
- riscv32imac-unknown-none-elf
- riscv32imc-unknown-none-elf
- xtensa-esp32-none-elf
- xtensa-esp32s2-none-elf
- xtensa-esp32s3-none-elf
- src
- accel
- esp
- hook
- digest
- include
- esp-mbedtls
- src
- esp_hal
- sha
- session
- examples
- certs
- common
- certs
- esp
- .cargo
- src
- bin
- std
- src/bin
- src
- xtask
- src
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