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Merge tag 'v5.10.237' into 5.10-main
This is the 5.10.237 stable release # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEEZH8oZUiU471FcZm+ONu9yGCSaT4FAmgUW08ACgkQONu9yGCS # aT4UGg/7Bed+OOl+O9bXt+AUdov7/VFJCLVcYkHSHDDrB5vB93Sjgq69+S0JKhWE # rW9Hlf1jnNf5KKDo/9oikpaCyh+LTXIVHZK/pLCo2yKDVAlC6K3g1FYf5uWM5OUm # m4lZImyy27yC6wAmMhcARZPehFs0+tQkMzDagVVJtIrQRbc40LOmV/X6YprOB5OI # qdchz+TIFdw6UUQvXgUL+NLRIN3yzxvh0s5hMLiugCHQMa2mZUWiZAfqQGgQhC0m # +e2I5rDnwT7Lml2hiBQAn2tgcDKOK4oFtxORcUIFx7gL45qi3gsHDYlfj5AY3xY3 # VvL0sz04r658mCVSd0tyvWpbln3mKG+LZNbv2wGswsCiogVU+d71y4bRqeg3OqKH # zD3sJLOfUdc63TJbJ9kibRlLok0iPc0ZtT0wO5UNwQmIdqUpMtqz29ZPzANOMWtT # C6Edi66KaK+hpMN1/8ecZvJRZkTI8Butw2JCiKHCS47KHqO91KWbWE5s0gKqJ77b # Sg4NWSpWb0GksseXDN+HG3tKRhbipMi3lh+pvMPLwLM+MgcpAczj3NaArkkhFjuV # gxCSLze6irXSTd12cPY0p6n78SkcGAIENQmP61MxQWsVErl/MIIaCCrCYuF9Ae/L # qfCovCyRUPE1khUqjslWPLoUMVBl204i9ziuRP0/jSM3Kzmj4mQ= # =EQZw # -----END PGP SIGNATURE----- # gpg: Signature made Fri May 2 07:42:39 2025 CEST # gpg: using RSA key 647F28654894E3BD457199BE38DBBDC86092693E # gpg: Can't check signature: No public key
2 parents ddb6023 + 024a4a4 commit 07b5d86

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‎Makefile‎

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,7 @@
11
# SPDX-License-Identifier: GPL-2.0
22
VERSION = 5
33
PATCHLEVEL = 10
4-
SUBLEVEL = 236
4+
SUBLEVEL = 237
55
EXTRAVERSION =
66
NAME = Dare mighty things
77

@@ -976,6 +976,9 @@ KBUILD_CFLAGS += $(call cc-option,-Werror=incompatible-pointer-types)
976976
# Require designated initializers for all marked structures
977977
KBUILD_CFLAGS += $(call cc-option,-Werror=designated-init)
978978

979+
# Ensure compilers do not transform certain loops into calls to wcslen()
980+
KBUILD_CFLAGS += -fno-builtin-wcslen
981+
979982
# change __FILE__ to the relative path from the srctree
980983
KBUILD_CPPFLAGS += $(call cc-option,-fmacro-prefix-map=$(srctree)/=)
981984

‎arch/arm/mach-exynos/Kconfig‎

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -13,7 +13,6 @@ menuconfig ARCH_EXYNOS
1313
select ARM_GIC
1414
select EXYNOS_IRQ_COMBINER
1515
select COMMON_CLK_SAMSUNG
16-
select EXYNOS_ASV
1716
select EXYNOS_CHIPID
1817
select EXYNOS_THERMAL
1918
select EXYNOS_PMU

‎arch/arm64/boot/dts/mediatek/mt8173.dtsi‎

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1193,8 +1193,7 @@
11931193
};
11941194

11951195
pwm0: pwm@1401e000 {
1196-
compatible = "mediatek,mt8173-disp-pwm",
1197-
"mediatek,mt6595-disp-pwm";
1196+
compatible = "mediatek,mt8173-disp-pwm";
11981197
reg = <0 0x1401e000 0 0x1000>;
11991198
#pwm-cells = <2>;
12001199
clocks = <&mmsys CLK_MM_DISP_PWM026M>,
@@ -1204,8 +1203,7 @@
12041203
};
12051204

12061205
pwm1: pwm@1401f000 {
1207-
compatible = "mediatek,mt8173-disp-pwm",
1208-
"mediatek,mt6595-disp-pwm";
1206+
compatible = "mediatek,mt8173-disp-pwm";
12091207
reg = <0 0x1401f000 0 0x1000>;
12101208
#pwm-cells = <2>;
12111209
clocks = <&mmsys CLK_MM_DISP_PWM126M>,

‎arch/arm64/include/asm/cputype.h‎

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -74,6 +74,7 @@
7474
#define ARM_CPU_PART_CORTEX_A76 0xD0B
7575
#define ARM_CPU_PART_NEOVERSE_N1 0xD0C
7676
#define ARM_CPU_PART_CORTEX_A77 0xD0D
77+
#define ARM_CPU_PART_CORTEX_A76AE 0xD0E
7778
#define ARM_CPU_PART_NEOVERSE_V1 0xD40
7879
#define ARM_CPU_PART_CORTEX_A78 0xD41
7980
#define ARM_CPU_PART_CORTEX_A78AE 0xD42
@@ -110,6 +111,7 @@
110111
#define QCOM_CPU_PART_KRYO 0x200
111112
#define QCOM_CPU_PART_KRYO_2XX_GOLD 0x800
112113
#define QCOM_CPU_PART_KRYO_2XX_SILVER 0x801
114+
#define QCOM_CPU_PART_KRYO_3XX_GOLD 0x802
113115
#define QCOM_CPU_PART_KRYO_3XX_SILVER 0x803
114116
#define QCOM_CPU_PART_KRYO_4XX_GOLD 0x804
115117
#define QCOM_CPU_PART_KRYO_4XX_SILVER 0x805
@@ -136,6 +138,7 @@
136138
#define MIDR_CORTEX_A76 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A76)
137139
#define MIDR_NEOVERSE_N1 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_N1)
138140
#define MIDR_CORTEX_A77 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A77)
141+
#define MIDR_CORTEX_A76AE MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A76AE)
139142
#define MIDR_NEOVERSE_V1 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_V1)
140143
#define MIDR_CORTEX_A78 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A78)
141144
#define MIDR_CORTEX_A78AE MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A78AE)
@@ -167,6 +170,7 @@
167170
#define MIDR_QCOM_KRYO MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO)
168171
#define MIDR_QCOM_KRYO_2XX_GOLD MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_2XX_GOLD)
169172
#define MIDR_QCOM_KRYO_2XX_SILVER MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_2XX_SILVER)
173+
#define MIDR_QCOM_KRYO_3XX_GOLD MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_3XX_GOLD)
170174
#define MIDR_QCOM_KRYO_3XX_SILVER MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_3XX_SILVER)
171175
#define MIDR_QCOM_KRYO_4XX_GOLD MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_4XX_GOLD)
172176
#define MIDR_QCOM_KRYO_4XX_SILVER MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_4XX_SILVER)

‎arch/arm64/kernel/proton-pack.c‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -874,6 +874,7 @@ u8 spectre_bhb_loop_affected(int scope)
874874
MIDR_ALL_VERSIONS(MIDR_CORTEX_A76),
875875
MIDR_ALL_VERSIONS(MIDR_CORTEX_A77),
876876
MIDR_ALL_VERSIONS(MIDR_NEOVERSE_N1),
877+
MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_4XX_GOLD),
877878
{},
878879
};
879880
static const struct midr_range spectre_bhb_k11_list[] = {

‎arch/mips/dec/prom/init.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -42,7 +42,7 @@ int (*__pmax_close)(int);
4242
* Detect which PROM the DECSTATION has, and set the callback vectors
4343
* appropriately.
4444
*/
45-
void __init which_prom(s32 magic, s32 *prom_vec)
45+
static void __init which_prom(s32 magic, s32 *prom_vec)
4646
{
4747
/*
4848
* No sign of the REX PROM's magic number means we assume a non-REX

‎arch/mips/include/asm/ds1287.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -8,7 +8,7 @@
88
#define __ASM_DS1287_H
99

1010
extern int ds1287_timer_state(void);
11-
extern void ds1287_set_base_clock(unsigned int clock);
11+
extern int ds1287_set_base_clock(unsigned int hz);
1212
extern int ds1287_clockevent_init(int irq);
1313

1414
#endif

‎arch/mips/include/asm/mips-cm.h‎

Lines changed: 22 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -47,6 +47,16 @@ extern phys_addr_t __mips_cm_phys_base(void);
4747
*/
4848
extern int mips_cm_is64;
4949

50+
/*
51+
* mips_cm_is_l2_hci_broken - determine if HCI is broken
52+
*
53+
* Some CM reports show that Hardware Cache Initialization is
54+
* complete, but in reality it's not the case. They also incorrectly
55+
* indicate that Hardware Cache Initialization is supported. This
56+
* flags allows warning about this broken feature.
57+
*/
58+
extern bool mips_cm_is_l2_hci_broken;
59+
5060
/**
5161
* mips_cm_error_report - Report CM cache errors
5262
*/
@@ -85,6 +95,18 @@ static inline bool mips_cm_present(void)
8595
#endif
8696
}
8797

98+
/**
99+
* mips_cm_update_property - update property from the device tree
100+
*
101+
* Retrieve the properties from the device tree if a CM node exist and
102+
* update the internal variable based on this.
103+
*/
104+
#ifdef CONFIG_MIPS_CM
105+
extern void mips_cm_update_property(void);
106+
#else
107+
static inline void mips_cm_update_property(void) {}
108+
#endif
109+
88110
/**
89111
* mips_cm_has_l2sync - determine whether an L2-only sync region is present
90112
*

‎arch/mips/kernel/cevt-ds1287.c‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -10,6 +10,7 @@
1010
#include <linux/mc146818rtc.h>
1111
#include <linux/irq.h>
1212

13+
#include <asm/ds1287.h>
1314
#include <asm/time.h>
1415

1516
int ds1287_timer_state(void)

‎arch/mips/kernel/mips-cm.c‎

Lines changed: 14 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -5,6 +5,7 @@
55
*/
66

77
#include <linux/errno.h>
8+
#include <linux/of.h>
89
#include <linux/percpu.h>
910
#include <linux/spinlock.h>
1011

@@ -14,6 +15,7 @@
1415
void __iomem *mips_gcr_base;
1516
void __iomem *mips_cm_l2sync_base;
1617
int mips_cm_is64;
18+
bool mips_cm_is_l2_hci_broken;
1719

1820
static char *cm2_tr[8] = {
1921
"mem", "gcr", "gic", "mmio",
@@ -238,6 +240,18 @@ static void mips_cm_probe_l2sync(void)
238240
mips_cm_l2sync_base = ioremap(addr, MIPS_CM_L2SYNC_SIZE);
239241
}
240242

243+
void mips_cm_update_property(void)
244+
{
245+
struct device_node *cm_node;
246+
247+
cm_node = of_find_compatible_node(of_root, NULL, "mobileye,eyeq6-cm");
248+
if (!cm_node)
249+
return;
250+
pr_info("HCI (Hardware Cache Init for the L2 cache) in GCR_L2_RAM_CONFIG from the CM3 is broken");
251+
mips_cm_is_l2_hci_broken = true;
252+
of_node_put(cm_node);
253+
}
254+
241255
int mips_cm_probe(void)
242256
{
243257
phys_addr_t addr;

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