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chip_srom.c
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// TODO: Check sample end < sample start
#include <stdlib.h>
#include <string.h>
#include <stdio.h>
#include "stdtype.h"
#include "stdbool.h"
#define SPCM_BANK_256 (11)
#define SPCM_BANK_512 (12)
#define SPCM_BANK_12M (13)
#define SPCM_BANK_MASK7 (0x70 << 16)
#define SPCM_BANK_MASKF (0xF0 << 16)
#define SPCM_BANK_MASKF8 (0xF8 << 16)
// ADPCM type A channel struct
typedef struct
{
UINT8 flag; // port state
UINT32 start; // sample data start address
UINT32 end; // sample data end address
} ADPCM_CH;
#define ADPCMA_ADDRESS_SHIFT 8 // adpcm A address shift
// DELTA-T (adpcm type B) struct
typedef struct deltat_adpcm_state // AT: rearranged and tigntened structure
{
UINT8 *memory;
UINT8 *memory_usg;
UINT32 memory_size;
UINT32 start; // start address
//UINT32 limit; // limit address
UINT32 end; // end address
UINT8 portstate; // port status
UINT8 control2; // control reg: SAMPLE, DA/AD, RAM TYPE (x8bit / x1bit), ROM/RAM
UINT8 portshift; // address bits shift-left:
// ** 8 for YM2610,
// ** 5 for Y8950 and YM2608
UINT8 DRAMportshift; // address bits shift-right:
// ** 0 for ROM and x8bit DRAMs,
// ** 3 for x1 DRAMs
UINT8 reg[16]; // adpcm registers
UINT8 emulation_mode; // which chip we're emulating
} YM_DELTAT;
#define YM_DELTAT_MODE_NORMAL 0
#define YM_DELTAT_MODE_YM2610 1
static const UINT8 dram_rightshift[4] = {3, 0, 0, 0};
typedef struct segapcm_data
{
UINT32 intf_bank;
UINT8 bankshift;
UINT32 bankmask;
UINT32 rgnmask;
UINT32 ROMSize;
UINT8* ROMData;
UINT8* ROMUsage;
UINT8 RAMData[0x800];
} SEGAPCM_DATA;
typedef struct ym2608_data
{
UINT8 RegData[0x200];
UINT32 DT_ROMSize;
UINT8* DT_ROMData;
UINT8* DT_ROMUsage;
YM_DELTAT DeltaT; // Delta-T ADPCM unit
} YM2608_DATA;
typedef struct ym2610_data
{
UINT8 RegData[0x200];
UINT32 AP_ROMSize;
UINT8* AP_ROMData;
UINT8* AP_ROMUsage;
ADPCM_CH ADPCM[6]; // adpcm channels
UINT32 ADPCMReg[0x30]; // registers
UINT32 DT_ROMSize;
UINT8* DT_ROMData;
UINT8* DT_ROMUsage;
YM_DELTAT DeltaT; // Delta-T ADPCM unit
} YM2610_DATA;
typedef struct y8950_data
{
UINT8 RegData[0x100];
UINT32 DT_ROMSize;
UINT8* DT_ROMData;
UINT8* DT_ROMUsage;
YM_DELTAT DeltaT; // Delta-T ADPCM unit
} Y8950_DATA;
typedef struct YMZ280BVoice
{
UINT8 keyon;
UINT32 start;
UINT32 stop;
UINT32 loop_start;
UINT32 loop_end;
} YMZ_VOICE;
typedef struct ymz280b_data
{
YMZ_VOICE Voice[8];
UINT32 ROMSize;
UINT8* ROMData;
UINT8* ROMUsage;
} YMZ280B_DATA;
typedef struct ymf271_slot
{
UINT8 waveform;
UINT32 startaddr;
UINT32 loopaddr;
UINT32 endaddr;
UINT8 active;
UINT8 bits;
UINT8 IsPCM;
} YMF271_SLOT;
typedef struct ymf271_group
{
UINT8 sync; // 0/1 - FM only, 2 - FM+PCM, 3 - PCM only
} YMF271_GROUP;
typedef struct ymz271_data
{
YMF271_SLOT slots[48];
YMF271_GROUP groups[12];
UINT32 ROMSize;
UINT8* ROMData;
UINT8* ROMUsage;
} YMF271_DATA;
typedef struct rf5c_pcm_channel
{
UINT8 enable;
UINT16 start;
UINT16 loopst;
UINT16 step;
} RF5C_CHANNEL;
typedef struct rf5c_data
{
RF5C_CHANNEL Channel[8];
UINT8 SelChn;
UINT16 SelBank;
UINT32 RAMSize;
UINT8* RAMData;
UINT8* RAMUsage;
} RF5C_DATA;
#define OKIM6295_VOICES 4
typedef struct okim_voice
{
bool playing;
UINT32 start;
UINT32 stop;
} OKIM_VOICE;
typedef struct okim6295_data
{
OKIM_VOICE voice[OKIM6295_VOICES];
UINT8 command;
UINT8 nmk_mode;
UINT32 bank_offs;
UINT8 nmk_bank[4];
UINT32 ROMSize;
UINT8* ROMData;
UINT8* ROMUsage;
} OKIM6295_DATA;
enum
{
C140_TYPE_SYSTEM2,
C140_TYPE_SYSTEM21,
C140_TYPE_ASIC219
};
//static const INT16 asic219banks[4] = {0x07, 0x01, 0x03, 0x05};
#define C140_MAX_VOICE 24
typedef struct
{
UINT8 bank;
UINT8 mode;
UINT8 start_msb;
UINT8 start_lsb;
UINT8 end_msb;
UINT8 end_lsb;
UINT32 smpl_start;
UINT32 smpl_end;
} C140_VOICE;
typedef struct _c140_state
{
int banking_type;
UINT32 ROMSize;
UINT8* ROMData;
UINT8* ROMUsage;
UINT8 BankRegs[0x10];
C140_VOICE voi[C140_MAX_VOICE];
} C140_DATA;
#define QSOUND_CHANNELS 19 /* 16pcm + 3adpcm */
typedef struct _qsound_channel
{
UINT8 bank; // bank (x16)
INT32 address; // start address
INT32 end; // end address
UINT8 key; // Key on / key off
} QSOUND_CHANNEL;
typedef struct qsound_data
{
QSOUND_CHANNEL channel[QSOUND_CHANNELS];
UINT16 data; // register latch data
UINT32 ROMSize;
UINT8* ROMData;
UINT8* ROMUsage;
} QSOUND_DATA;
#define K054539_RESET_FLAGS 0
#define K054539_REVERSE_STEREO 1
#define K054539_DISABLE_REVERB 2
#define K054539_UPDATE_AT_KEYON 4
typedef struct _k054539_channel
{
UINT8 pos_reg[3];
UINT8 pos_latch[3];
UINT8 mode_reg;
bool key_on;
} K054539_CHANNEL;
typedef struct _k054539_state
{
//UINT8 regs[0x230];
UINT8 flags;
UINT8 reg_enable;
UINT32 ROMSize;
UINT8* ROMData;
UINT8* ROMUsage;
K054539_CHANNEL channels[8];
} K054539_DATA;
typedef struct _k053260_channel
{
UINT16 size;
UINT16 start;
UINT8 bank;
bool play;
bool reverse;
// UINT8 ppcm; // packed PCM (4 bit signed)
} K053260_CHANNEL;
typedef struct k053260_data
{
UINT8 mode;
UINT32 ROMSize;
UINT8* ROMData;
UINT8* ROMUsage;
K053260_CHANNEL channels[4];
} K053260_DATA;
typedef struct upd7759_data
{
UINT8 fifo_in; // last data written to the sound chip
UINT8 reset; // current state of the RESET line
UINT8 start; // current state of the START line
//INT8 state; // current overall chip state
UINT32 romoffset; // ROM offset to make save/restore
UINT32 ROMSize;
UINT8* ROMData;
UINT8* ROMUsage;
} UPD7759_DATA;
typedef struct nes_apu_data
{
UINT32 ROMSize;
UINT8* ROMData;
UINT8* ROMUsage;
UINT8 RegData[0x20];
} NES_APU_DATA;
typedef struct _multipcm_slot
{
UINT16 SmplID;
UINT8 Playing;
} MULTIPCM_SLOT;
typedef struct multipcm_data
{
UINT32 ROMSize;
UINT8* ROMData;
UINT8* ROMUsage;
UINT8 SmplMask[0x200]; // Bit 7 - Sample Table, Bit 0 - Sample Data
UINT8 SegaBanking;
UINT32 Bank0;
UINT32 Bank1;
UINT8 CurSlot;
UINT8 Address;
MULTIPCM_SLOT slot[28];
} MULTIPCM_DATA;
#define SETA_NUM_CHANNELS 16
// don't remove anything, size of this struct is used when reading channel regs
typedef struct
{
UINT8 status;
UINT8 volume; // volume / wave form no.
UINT8 frequency; // frequency / pitch lo
UINT8 pitch_hi; // reserved / pitch hi
UINT8 start; // start address / envelope time
UINT8 end; // end address / envelope no.
UINT8 reserve[2];
} X1_010_CHANNEL;
typedef struct
{
UINT32 lastStart;
UINT32 lastEnd;
} X1_010_CHNINFO;
typedef struct x1010_data
{
UINT32 ROMSize;
INT8 *ROMData;
UINT8* ROMUsage;
UINT8 reg[0x2000];
X1_010_CHNINFO chnInfo[SETA_NUM_CHANNELS];
} X1_010_DATA;
enum {
C352_FLG_BUSY = 0x8000, // channel is busy
C352_FLG_KEYON = 0x4000, // Keyon
C352_FLG_KEYOFF = 0x2000, // Keyoff
C352_FLG_LOOPTRG = 0x1000, // Loop Trigger
C352_FLG_LOOPHIST = 0x0800, // Loop History
C352_FLG_FM = 0x0400, // Frequency Modulation
C352_FLG_PHASERL = 0x0200, // Rear Left invert phase 180 degrees
C352_FLG_PHASEFL = 0x0100, // Front Left invert phase 180 degrees
C352_FLG_PHASEFR = 0x0080, // invert phase 180 degrees (e.g. flip sign of sample)
C352_FLG_LDIR = 0x0040, // loop direction
C352_FLG_LINK = 0x0020, // "long-format" sample (can't loop, not sure what else it means)
C352_FLG_NOISE = 0x0010, // play noise instead of sample
C352_FLG_MULAW = 0x0008, // sample is mulaw instead of linear 8-bit PCM
C352_FLG_FILTER = 0x0004, // don't apply filter
C352_FLG_REVLOOP = 0x0003, // loop backwards
C352_FLG_LOOP = 0x0002, // loop forward
C352_FLG_REVERSE = 0x0001, // play sample backwards
};
typedef struct
{
UINT8 bank;
UINT16 start_addr;
UINT16 end_addr;
UINT16 repeat_addr;
UINT32 flag;
UINT16 start;
UINT16 repeat;
//UINT32 current_addr;
UINT32 pos;
} C352_CHANNEL;
typedef struct c352_data
{
UINT32 ROMSize;
INT8 *ROMData;
UINT8* ROMUsage;
C352_CHANNEL channels[32];
} C352_DATA;
typedef struct
{
UINT32 start;
UINT32 end;
//UINT8 play;
} GA20_CHANNEL;
typedef struct ga20_data
{
UINT32 ROMSize;
UINT8 *ROMData;
UINT8* ROMUsage;
GA20_CHANNEL channels[4];
} GA20_DATA;
static const UINT32 es5503_wavemasks[8] =
{ 0x1FF00, 0x1FE00, 0x1FC00, 0x1F800, 0x1F000, 0x1E000, 0x1C000, 0x18000};
typedef struct
{
UINT32 wavetblpointer;
UINT16 wtsize;
UINT8 control;
UINT8 vol;
UINT8 wavetblsize;
//UINT8 resolution;
} ES5503_OSC;
typedef struct es5503_data
{
UINT32 ROMSize;
UINT8* ROMData;
UINT8* ROMUsage;
ES5503_OSC oscillators[32];
} ES5503_DATA;
typedef struct _ymf278b_slot
{
UINT16 SmplID;
UINT8 Playing;
} YMF278B_SLOT;
typedef struct ymf278b_data
{
UINT32 ROMSize;
UINT8* ROMData;
UINT8* ROMUsage;
UINT32 RAMBase;
UINT32 RAMSize;
UINT8* RAMData;
UINT8* RAMUsage;
UINT8 SmplMask[0x200]; // Bit 7 - Sample Table, Bit 0 - Sample Data
YMF278B_SLOT slots[24];
INT8 wavetblhdr;
INT8 memmode;
} YMF278B_DATA;
#define ES6CTRL_BS1 0x8000
#define ES6CTRL_BS0 0x4000
#define ES6CTRL_CMPD 0x2000
#define ES6CTRL_CA2 0x1000
#define ES6CTRL_CA1 0x0800
#define ES6CTRL_CA0 0x0400
#define ES6CTRL_LP4 0x0200
#define ES6CTRL_LP3 0x0100
#define ES6CTRL_IRQ 0x0080
#define ES6CTRL_DIR 0x0040
#define ES6CTRL_IRQE 0x0020
#define ES6CTRL_BLE 0x0010
#define ES6CTRL_LPE 0x0008
#define ES6CTRL_LEI 0x0004
#define ES6CTRL_STOP1 0x0002
#define ES6CTRL_STOP0 0x0001
#define ES6CTRL_BSMASK (ES6CTRL_BS1 | ES6CTRL_BS0)
#define ES6CTRL_CAMASK (ES6CTRL_CA2 | ES6CTRL_CA1 | ES6CTRL_CA0)
#define ES6CTRL_LPMASK (ES6CTRL_LP4 | ES6CTRL_LP3)
#define ES6CTRL_LOOPMASK (ES6CTRL_BLE | ES6CTRL_LPE)
#define ES6CTRL_STOPMASK (ES6CTRL_STOP1 | ES6CTRL_STOP0)
typedef struct es5506_voice
{
UINT32 control; // control register
UINT32 start; // start register
UINT32 end; // end register
UINT32 accum; // accumulator register
UINT32 exbank; // external address bank
} ES5506_VOICE;
typedef struct es5506_rom
{
UINT32 ROMSize;
UINT8* ROMData;
UINT8* ROMUsage;
} ES5506_ROM;
typedef struct es5506_data
{
ES5506_ROM Rgn[4]; // ROM regions
UINT32 writeLatch;
UINT8 chipType; // 0 - ES5505, 1 - ES5506
UINT8 curPage;
UINT8 voiceCount;
ES5506_VOICE voice[32];
} ES5506_DATA;
typedef struct all_chips
{
SEGAPCM_DATA SegaPCM;
YM2608_DATA YM2608;
YM2610_DATA YM2610;
Y8950_DATA Y8950;
YMZ280B_DATA YMZ280B;
RF5C_DATA RF5C68;
RF5C_DATA RF5C164;
YMF278B_DATA YMF278B;
YMF271_DATA YMF271;
NES_APU_DATA NES_APU;
UPD7759_DATA UPD7759;
OKIM6295_DATA OKIM6295;
MULTIPCM_DATA MultiPCM;
K054539_DATA K054539;
C140_DATA C140;
K053260_DATA K053260;
QSOUND_DATA QSound;
ES5503_DATA ES5503;
ES5506_DATA ES5506;
X1_010_DATA X1_010;
C352_DATA C352;
GA20_DATA GA20;
} ALL_CHIPS;
void InitAllChips(void);
void FreeAllChips(void);
void SetChipSet(UINT8 ChipID);
void segapcm_mem_write(UINT16 Offset, UINT8 Data);
void ym2608_write(UINT8 Port, UINT8 Register, UINT8 Data);
void ym2610_write(UINT8 Port, UINT8 Register, UINT8 Data);
void y8950_write(UINT8 Register, UINT8 Data);
static void FM_ADPCMAWrite(YM2610_DATA *F2610, UINT8 r, UINT8 v);
static void YM_DELTAT_ADPCM_Write(YM_DELTAT *DELTAT, UINT8 r, UINT8 v);
void ymz280b_write(UINT8 Register, UINT8 Data);
static void rf5c_write(RF5C_DATA* chip, UINT8 Register, UINT8 Data);
void rf5c68_write(UINT8 Register, UINT8 Data);
void rf5c164_write(UINT8 Register, UINT8 Data);
static void ymf271_write_fm_reg(YMF271_DATA* chip, UINT8 SlotNum, UINT8 Register, UINT8 Data);
static void ymf271_write_fm(YMF271_DATA* chip, UINT8 Port, UINT8 Register, UINT8 Data);
void ymf271_write(UINT8 Port, UINT8 Register, UINT8 Data);
void nes_apu_write(UINT8 Register, UINT8 Data);
void multipcm_write(UINT8 Port, UINT8 Data);
void multipcm_bank_write(UINT8 Bank, UINT16 Data);
void upd7759_write(UINT8 Port, UINT8 Data);
void okim6295_write(UINT8 Offset, UINT8 Data);
static void k054539_proc_channel(K054539_DATA* chip, UINT8 Chn);
void k054539_write(UINT8 Port, UINT8 Offset, UINT8 Data);
void c140_write(UINT8 Port, UINT8 Offset, UINT8 Data);
void k053260_write(UINT8 Register, UINT8 Data);
void qsound_write(UINT8 Offset, UINT16 Value);
void x1_010_write(UINT16 Offset, UINT8 Data);
void c352_write(UINT16 Offset, UINT16 Value);
void ga20_write(UINT8 Register, UINT8 Data);
void es5503_write(UINT8 Register, UINT8 Data);
void ymf278b_write(UINT8 Port, UINT8 Register, UINT8 Data);
void es550x_w(UINT8 Offset, UINT8 Data);
void es550x_w16(UINT8 Offset, UINT16 Data);
void write_rom_data(UINT8 ROMType, UINT32 ROMSize, UINT32 DataStart, UINT32 DataLength,
const UINT8* ROMData);
UINT32 GetROMMask(UINT8 ROMType, UINT8** MaskData);
UINT32 GetROMData(UINT8 ROMType, UINT8** ROMData);
UINT8 ChipCount = 0x02;
ALL_CHIPS* ChipData = NULL;
ALL_CHIPS* ChDat;
void InitAllChips(void)
{
UINT8 CurChip;
UINT8 CurChn;
YM_DELTAT* TempYDT;
if (ChipData == NULL)
ChipData = (ALL_CHIPS*)malloc(ChipCount * sizeof(ALL_CHIPS));
memset(ChipData, 0x00, ChipCount * sizeof(ALL_CHIPS));
for (CurChip = 0x00; CurChip < ChipCount; CurChip ++)
{
ChDat = ChipData + CurChip;
memset(ChDat->SegaPCM.RAMData, 0xFF, 0x800);
ChDat->SegaPCM.intf_bank = SPCM_BANK_512;
// DELTA-T unit
TempYDT = &ChDat->YM2608.DeltaT;
TempYDT->portshift = 5; // always 5bits shift // ASG
//TempYDT->limit = ~0;
TempYDT->emulation_mode = YM_DELTAT_MODE_NORMAL;
TempYDT->portstate = 0;
TempYDT->control2 = 0;
TempYDT->DRAMportshift = dram_rightshift[TempYDT->control2 & 3];
// DELTA-T unit
TempYDT = &ChDat->YM2610.DeltaT;
TempYDT->portshift = 8; // allways 8bits shift
//TempYDT->limit = ~0;
TempYDT->emulation_mode = YM_DELTAT_MODE_YM2610;
TempYDT->portstate = 0x20;
TempYDT->control2 = 0x01;
TempYDT->DRAMportshift = dram_rightshift[TempYDT->control2 & 3];
TempYDT = &ChDat->Y8950.DeltaT;
TempYDT->portshift = 5; // always 5bits shift // ASG
//TempYDT->limit = ~0;
TempYDT->emulation_mode = YM_DELTAT_MODE_NORMAL;
TempYDT->portstate = 0;
TempYDT->control2 = 0;
TempYDT->DRAMportshift = dram_rightshift[TempYDT->control2 & 3];
ChDat->YMF278B.RAMBase = 0x200000; // default ROM size is 2 MB
//ChDat->UPD7759.state = STATE_IDLE;
ChDat->UPD7759.reset = 1;
ChDat->UPD7759.start = 1;
ChDat->OKIM6295.command = 0xFF;
ChDat->K054539.flags = K054539_RESET_FLAGS;
ChDat->C140.banking_type = 0x00;
ChDat->ES5506.voiceCount = 32;
for (CurChn = 0; CurChn < 28; CurChn ++)
ChDat->MultiPCM.slot[CurChn].SmplID = 0xFFFF;
}
SetChipSet(0x00);
return;
}
void FreeAllChips(void)
{
if (ChipData == NULL)
return;
free(ChipData);
ChipData = NULL;
return;
}
void SetChipSet(UINT8 ChipID)
{
ChDat = ChipData + ChipID;
return;
}
void segapcm_mem_write(UINT16 Offset, UINT8 Data)
{
SEGAPCM_DATA* chip = &ChDat->SegaPCM;
UINT8 CurChn;
UINT8* RAMBase;
UINT32 StAddr;
UINT32 EndAddr;
UINT32 Addr;
if (Offset >= 0xFFF0)
{
Addr = (Offset & 0x03) * 8;
chip->intf_bank &= ~(0xFF << Addr);
chip->intf_bank |= (Data << Addr);
return;
}
CurChn = (Offset & 0x78) / 8;
RAMBase = chip->RAMData + CurChn * 8;
chip->RAMData[Offset] = Data;
switch(Offset & 0x87)
{
/* case 0x04: // Loop Address L
break;
case 0x05: // Loop Address H
break;
case 0x06: // End Address H
break;
case 0x84: // Current Address L
break;
case 0x85: // Current Address H
break;*/
case 0x86: // Flags (Channel Disable, Loop Disable)
if (! (chip->RAMData[0x86 | (CurChn * 8)] & 0x01))
{
StAddr = (RAMBase[0x84] << 0) | (RAMBase[0x85] << 8);
Addr = (RAMBase[0x04] << 0) | (RAMBase[0x05] << 8); // Loop Address
if (Addr < StAddr)
StAddr = Addr;
EndAddr = (RAMBase[0x06] + 0x01) << 8;
//StAddr &= ~0x00FF;
Addr = (RAMBase[0x86] & chip->bankmask) << chip->bankshift;
StAddr = (Addr + StAddr) & chip->rgnmask;
EndAddr = (Addr + EndAddr) & chip->rgnmask;
for (Addr = StAddr; Addr < EndAddr; Addr ++)
chip->ROMUsage[Addr] |= 0x01;
}
break;
}
return;
}
void ym2608_write(UINT8 Port, UINT8 Register, UINT8 Data)
{
YM2608_DATA* chip;
UINT16 RegVal;
chip = &ChDat->YM2608;
RegVal = (Port << 8) | Register;
chip->RegData[RegVal] = Data;
switch(RegVal & 0x1F0)
{
case 0x010: // ADPCM A
break;
case 0x100: // DeltaT ADPCM
if ((RegVal & 0x0F) == 0x0E)
break;
YM_DELTAT_ADPCM_Write(&chip->DeltaT, RegVal & 0x0F, Data);
break;
}
return;
}
void ym2610_write(UINT8 Port, UINT8 Register, UINT8 Data)
{
YM2610_DATA* chip;
UINT16 RegVal;
chip = &ChDat->YM2610;
RegVal = (Port << 8) | Register;
chip->RegData[RegVal] = Data;
switch(RegVal & 0x1F0)
{
case 0x010: // DeltaT ADPCM
if (RegVal >= 0x1C)
break;
YM_DELTAT_ADPCM_Write(&chip->DeltaT, RegVal & 0x0F, Data);
break;
case 0x100: // ADPCM A
case 0x110:
case 0x120:
FM_ADPCMAWrite(chip, RegVal & 0xFF, Data);
break;
}
return;
}
void y8950_write(UINT8 Register, UINT8 Data)
{
Y8950_DATA* chip;
chip = &ChDat->Y8950;
chip->RegData[Register] = Data;
if (Register >= 0x07 && Register < 0x015) // DeltaT ADPCM
{
if (Register >= 0x13)
return;
if (Register == 0x08)
Data &= 0x0F;
YM_DELTAT_ADPCM_Write(&chip->DeltaT, Register - 0x07, Data);
}
return;
}
// ADPCM type A Write
static void FM_ADPCMAWrite(YM2610_DATA *F2610, UINT8 r, UINT8 v)
{
ADPCM_CH *adpcm = F2610->ADPCM;
UINT8 c = r&0x07;
UINT32 SampleLen;
UINT32 CurSmpl;
UINT8* MaskBase;
// an almost complete copy-paste-and-delete from MAME
F2610->ADPCMReg[r] = v; // stock data
switch(r)
{
case 0x00: // DM,--,C5,C4,C3,C2,C1,C0
if( !(v&0x80) )
{
// KEY ON
for( c = 0; c < 6; c++ )
{
if( (v>>c)&1 )
{
// *** start adpcm ***
adpcm[c].flag = 1;
adpcm[c].end &= (1 << 20) - 1; // YM2610 checks only 20 bits while playing
adpcm[c].end |= adpcm[c].start & ~((1 << 20) - 1);
if (adpcm[c].end < adpcm[c].start)
{
printf("YM2610: ADPCM-A Start %06X > End %06X\n", adpcm[c].start, adpcm[c].end);
adpcm[c].end += (1 << 20);
}
adpcm[c].end ++;
if(adpcm[c].start >= F2610->AP_ROMSize) // Check Start in Range
{
printf("YM2610: ADPCM-A start out of range: $%08x\n", adpcm[c].start);
adpcm[c].flag = 0;
continue;
}
if(adpcm[c].end > F2610->AP_ROMSize) // Check End in Range
{
printf("YM2610 Ch %u: ADPCM-A end out of range\n", c);
printf("ADPCM-A Start: %06x\tADPCM-A End: %06x\n",
adpcm[c].start, adpcm[c].end);
adpcm[c].end = F2610->AP_ROMSize;
//continue; // uncomment to ignore the fact that the complete rom
// may be used
}
SampleLen = adpcm[c].end - adpcm[c].start;
MaskBase = &F2610->AP_ROMUsage[adpcm[c].start];
for (CurSmpl = 0x00; CurSmpl < SampleLen; CurSmpl ++)
MaskBase[CurSmpl] |= 0x01;
}
}
}
else
{
// KEY OFF
for( c = 0; c < 6; c++ )
if( (v>>c)&1 )
adpcm[c].flag = 0;
}
break;
case 0x01: // Total Level
break;
default:
c = r&0x07;
if( c >= 0x06 ) return;
switch( r&0x38 ){
case 0x08: // Pan, Instrument Level
break;
case 0x10: // Sample Start Address
case 0x18:
adpcm[c].start = ((F2610->ADPCMReg[0x18 + c] * 0x0100 |
F2610->ADPCMReg[0x10 + c]) << ADPCMA_ADDRESS_SHIFT);
if (adpcm[c].flag)
{
printf("ADPCM-A Ch %u StartAddr: %06X\n", c, adpcm[c].start);
}
break;
case 0x20: // Sample End Address
case 0x28:
adpcm[c].end = ((F2610->ADPCMReg[0x28 + c] * 0x0100 |
F2610->ADPCMReg[0x20 + c]) << ADPCMA_ADDRESS_SHIFT);
adpcm[c].end += (1<<ADPCMA_ADDRESS_SHIFT) - 1;
//adpcm[c].end += (2<<ADPCMA_ADDRESS_SHIFT) - 1; // Puzzle De Pon-Patch
if (adpcm[c].flag)
{
printf("ADPCM-A Ch %u EndAddr: %06X\n", c, adpcm[c].end);
}
break;
}
}
return;
}
// DELTA-T ADPCM write register
static void YM_DELTAT_ADPCM_Write(YM_DELTAT *DELTAT, UINT8 r, UINT8 v)
{
UINT32 SampleLen;
UINT32 CurSmpl;
UINT8* MaskBase;
if(r>=0x10) return;
DELTAT->reg[r] = v; // stock data
switch( r )
{
case 0x00: // START,REC,MEMDATA,REPEAT,SPOFF,--,--,RESET
// handle emulation mode
if(DELTAT->emulation_mode == YM_DELTAT_MODE_YM2610)
{
v |= 0x20; // YM2610 always uses external memory and doesn't even have memory flag bit.
}
DELTAT->portstate = v & (0x80|0x40|0x20|0x10|0x01); // start, rec, memory mode, repeat flag copy, reset(bit0)
if( DELTAT->portstate&0x20 ) // do we access external memory?
{
// if yes, then let's check if ADPCM memory is mapped and big enough
if(DELTAT->memory == NULL)
{
if (DELTAT->portstate & 0x80) // check for START bit - the warning is rather useless else
printf("YM Delta-T ADPCM rom not mapped\n");
DELTAT->portstate = 0x00;
break;
}
else
{
if( DELTAT->start >= DELTAT->memory_size ) // Check Start in Range
{
printf("YM Delta-T ADPCM start out of range: $%08x\n", DELTAT->start);
DELTAT->portstate = 0x00;
}
if( DELTAT->end > DELTAT->memory_size ) // Check End in Range
{
printf("YM Delta-T ADPCM end out of range: $%08x\n", DELTAT->end);
DELTAT->end = DELTAT->memory_size;
}
}
}
else // we access CPU memory (ADPCM data register $08) so we only reset now_addr here
{
break; // ROM is not used
}
if( DELTAT->portstate&0x80 )
{
// start ADPCM
SampleLen = DELTAT->end - DELTAT->start;
if (DELTAT->end < DELTAT->start)
{
printf("Warning: Invalid Sample Length: %06X (%06X .. %06X)\n", SampleLen, DELTAT->start, DELTAT->end);
if (DELTAT->end + 0x10000 < DELTAT->start)
return;
SampleLen += 0x10000; // workaround
}
MaskBase = &DELTAT->memory_usg[DELTAT->start];
for (CurSmpl = 0x00; CurSmpl < SampleLen; CurSmpl ++)
MaskBase[CurSmpl] |= 0x01;
}
break;
case 0x01: // L,R,-,-,SAMPLE,DA/AD,RAMTYPE,ROM
// handle emulation mode
if(DELTAT->emulation_mode == YM_DELTAT_MODE_YM2610)
{
v |= 0x01; // YM2610 always uses ROM as an external memory and doesn't tave ROM/RAM memory flag bit.
}
if ((DELTAT->control2 & 3) != (v & 3))
{
//0-DRAM x1, 1-ROM, 2-DRAM x8, 3-ROM (3 is bad setting - not allowed by the manual)
if (DELTAT->DRAMportshift != dram_rightshift[v&3])
{
DELTAT->DRAMportshift = dram_rightshift[v&3];
// refresh addresses
DELTAT->start = (DELTAT->reg[0x3]*0x0100 | DELTAT->reg[0x2]) << (DELTAT->portshift - DELTAT->DRAMportshift);
DELTAT->end = (DELTAT->reg[0x5]*0x0100 | DELTAT->reg[0x4]) << (DELTAT->portshift - DELTAT->DRAMportshift);
DELTAT->end += (1 << (DELTAT->portshift-DELTAT->DRAMportshift) ) - 1;
DELTAT->end ++;
//DELTAT->limit = (DELTAT->reg[0xd]*0x0100 | DELTAT->reg[0xc]) << (DELTAT->portshift - DELTAT->DRAMportshift);
}
}
DELTAT->control2 = v;
break;
case 0x02: // Start Address L
case 0x03: // Start Address H
DELTAT->start = (DELTAT->reg[0x3]*0x0100 | DELTAT->reg[0x2]) << (DELTAT->portshift - DELTAT->DRAMportshift);
//logerror("DELTAT start: 02=%2x 03=%2x addr=%8x\n",DELTAT->reg[0x2], DELTAT->reg[0x3],DELTAT->start )
break;
case 0x04: // Stop Address L
case 0x05: // Stop Address H
DELTAT->end = (DELTAT->reg[0x5]*0x0100 | DELTAT->reg[0x4]) << (DELTAT->portshift - DELTAT->DRAMportshift);
DELTAT->end += (1 << (DELTAT->portshift-DELTAT->DRAMportshift) ) - 1;
DELTAT->end ++;
//logerror("DELTAT end : 04=%2x 05=%2x addr=%8x\n",DELTAT->reg[0x4], DELTAT->reg[0x5],DELTAT->end )
break;
case 0x06: // Prescale L (ADPCM and Record frq)
case 0x07: // Prescale H
break;
case 0x08: // ADPCM data
break;
case 0x09: // DELTA-N L (ADPCM Playback Prescaler)
case 0x0a: // DELTA-N H
break;
case 0x0b: // Output level control (volume, linear)
break;
case 0x0c: // Limit Address L
case 0x0d: // Limit Address H
//DELTAT->limit = (DELTAT->reg[0xd]*0x0100 | DELTAT->reg[0xc]) << (DELTAT->portshift - DELTAT->DRAMportshift);
//logerror("DELTAT limit: 0c=%2x 0d=%2x addr=%8x\n",DELTAT->reg[0xc], DELTAT->reg[0xd],DELTAT->limit );
break;
}
return;
}
void ymz280b_write(UINT8 Register, UINT8 Data)
{
YMZ280B_DATA* chip;
YMZ_VOICE *voice;
UINT32 SampleLen;
UINT32 CurSmpl;
UINT8* MaskBase;
chip = &ChDat->YMZ280B;
if (Register < 0x80)
{
voice = &chip->Voice[(Register >> 2) & 0x07];
switch(Register & 0xE3)
{
case 0x01: // pitch upper 1 bit, loop, key on, mode
voice->keyon = (Data & 0x80) >> 7;
if (voice->keyon)
{
if (voice->start >= chip->ROMSize) // Check Start in Range
{
printf("YMZ280B: start out of range: $%08x\n", voice->start);
voice->keyon = 0;
}