From 6183cacc0bfe09bebbcaf65ec08f240de9873504 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Martin=20Kr=C3=B6ning?= Date: Sun, 20 Oct 2024 17:37:26 +0200 Subject: [PATCH 1/2] fix(arch): make `BOOT_INFO` a `OnceCell` MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Martin Kröning --- src/arch/aarch64/kernel/mod.rs | 5 +++-- src/arch/aarch64/kernel/start.rs | 4 +--- src/arch/x86_64/kernel/mod.rs | 10 ++++------ 3 files changed, 8 insertions(+), 11 deletions(-) diff --git a/src/arch/aarch64/kernel/mod.rs b/src/arch/aarch64/kernel/mod.rs index fa751c699b..a5a8895b79 100644 --- a/src/arch/aarch64/kernel/mod.rs +++ b/src/arch/aarch64/kernel/mod.rs @@ -17,6 +17,7 @@ use core::str; use core::sync::atomic::{AtomicU32, AtomicU64, Ordering}; use hermit_entry::boot_info::BootInfo; +use hermit_sync::OnceCell; use crate::arch::aarch64::kernel::core_local::*; use crate::arch::aarch64::kernel::serial::SerialPort; @@ -37,10 +38,10 @@ pub(crate) static CURRENT_STACK_ADDRESS: AtomicU64 = AtomicU64::new(0); #[cfg(target_os = "none")] global_asm!(include_str!("start.s")); -static mut BOOT_INFO: Option = None; +static BOOT_INFO: OnceCell = OnceCell::new(); pub fn boot_info() -> &'static BootInfo { - unsafe { BOOT_INFO.as_ref().unwrap() } + BOOT_INFO.get().unwrap() } pub fn is_uhyve_with_pci() -> bool { diff --git a/src/arch/aarch64/kernel/start.rs b/src/arch/aarch64/kernel/start.rs index 262276fd21..9d04013bf6 100644 --- a/src/arch/aarch64/kernel/start.rs +++ b/src/arch/aarch64/kernel/start.rs @@ -70,9 +70,7 @@ unsafe extern "C" fn pre_init(boot_info: Option<&'static RawBootInfo>, cpu_id: u } if cpu_id == 0 { - unsafe { - BOOT_INFO = Some(BootInfo::from(*boot_info.unwrap())); - } + BOOT_INFO.set(BootInfo::from(*boot_info.unwrap())).unwrap(); crate::boot_processor_main() } else { #[cfg(not(feature = "smp"))] diff --git a/src/arch/x86_64/kernel/mod.rs b/src/arch/x86_64/kernel/mod.rs index 3704f458c7..d018149923 100644 --- a/src/arch/x86_64/kernel/mod.rs +++ b/src/arch/x86_64/kernel/mod.rs @@ -6,7 +6,7 @@ use core::sync::atomic::{AtomicPtr, AtomicU32, Ordering}; use fdt::Fdt; use hermit_entry::boot_info::{BootInfo, PlatformInfo, RawBootInfo}; -use hermit_sync::InterruptSpinMutex; +use hermit_sync::{InterruptSpinMutex, OnceCell}; use x86::controlregs::{cr0, cr0_write, cr4, Cr0}; use self::serial::SerialPort; @@ -38,10 +38,10 @@ pub(crate) mod systemtime; #[cfg(feature = "vga")] mod vga; -static mut BOOT_INFO: Option = None; +static BOOT_INFO: OnceCell = OnceCell::new(); pub fn boot_info() -> &'static BootInfo { - unsafe { BOOT_INFO.as_ref().unwrap() } + BOOT_INFO.get().unwrap() } /// Serial port to print kernel messages @@ -256,9 +256,7 @@ unsafe extern "C" fn pre_init(boot_info: Option<&'static RawBootInfo>, cpu_id: u } if cpu_id == 0 { - unsafe { - BOOT_INFO = Some(BootInfo::from(*boot_info.unwrap())); - } + BOOT_INFO.set(BootInfo::from(*boot_info.unwrap())).unwrap(); crate::boot_processor_main() } else { From 4c36bb6e4b12aef3d82f8b98309e45a0665f2bfe Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Martin=20Kr=C3=B6ning?= Date: Sun, 20 Oct 2024 18:41:31 +0200 Subject: [PATCH 2/2] refactor(arch): move boot info into env MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Martin Kröning --- src/arch/aarch64/kernel/interrupts.rs | 5 ++-- src/arch/aarch64/kernel/mod.rs | 19 ++++---------- src/arch/aarch64/kernel/pci.rs | 4 +-- src/arch/aarch64/kernel/processor.rs | 3 +-- src/arch/aarch64/kernel/scheduler.rs | 4 +-- src/arch/aarch64/kernel/start.rs | 7 +++--- src/arch/aarch64/kernel/systemtime.rs | 4 +-- src/arch/riscv64/kernel/mod.rs | 21 ++++++---------- src/arch/riscv64/kernel/scheduler.rs | 5 ++-- src/arch/riscv64/kernel/start.rs | 6 ++--- src/arch/x86_64/kernel/mod.rs | 36 +++++++++++++-------------- src/arch/x86_64/kernel/processor.rs | 4 +-- src/arch/x86_64/kernel/scheduler.rs | 5 ++-- src/arch/x86_64/kernel/systemtime.rs | 5 ++-- src/env.rs | 16 +++++++++--- src/lib.rs | 2 +- 16 files changed, 67 insertions(+), 79 deletions(-) diff --git a/src/arch/aarch64/kernel/interrupts.rs b/src/arch/aarch64/kernel/interrupts.rs index f5954df7e6..16da226aa9 100644 --- a/src/arch/aarch64/kernel/interrupts.rs +++ b/src/arch/aarch64/kernel/interrupts.rs @@ -11,18 +11,17 @@ use hashbrown::HashMap; use hermit_dtb::Dtb; use hermit_sync::{InterruptSpinMutex, InterruptTicketMutex, OnceCell}; -use crate::arch::aarch64::kernel::boot_info; use crate::arch::aarch64::kernel::core_local::increment_irq_counter; use crate::arch::aarch64::kernel::scheduler::State; use crate::arch::aarch64::mm::paging::{self, BasePageSize, PageSize, PageTableEntryFlags}; use crate::arch::aarch64::mm::{virtualmem, PhysAddr}; -use crate::core_scheduler; #[cfg(not(feature = "pci"))] use crate::drivers::mmio::get_interrupt_handlers; #[cfg(feature = "pci")] use crate::drivers::pci::get_interrupt_handlers; use crate::drivers::{InterruptHandlerQueue, InterruptLine}; use crate::scheduler::{self, CoreId}; +use crate::{core_scheduler, env}; /// The ID of the first Private Peripheral Interrupt. const PPI_START: u8 = 16; @@ -229,7 +228,7 @@ pub(crate) fn init() { let dtb = unsafe { Dtb::from_raw(ptr::with_exposed_provenance( - boot_info().hardware_info.device_tree.unwrap().get() as usize, + env::boot_info().hardware_info.device_tree.unwrap().get() as usize, )) .expect(".dtb file has invalid header") }; diff --git a/src/arch/aarch64/kernel/mod.rs b/src/arch/aarch64/kernel/mod.rs index a5a8895b79..95489d40c4 100644 --- a/src/arch/aarch64/kernel/mod.rs +++ b/src/arch/aarch64/kernel/mod.rs @@ -16,9 +16,6 @@ use core::arch::global_asm; use core::str; use core::sync::atomic::{AtomicU32, AtomicU64, Ordering}; -use hermit_entry::boot_info::BootInfo; -use hermit_sync::OnceCell; - use crate::arch::aarch64::kernel::core_local::*; use crate::arch::aarch64::kernel::serial::SerialPort; use crate::arch::aarch64::mm::{PhysAddr, VirtAddr}; @@ -38,31 +35,25 @@ pub(crate) static CURRENT_STACK_ADDRESS: AtomicU64 = AtomicU64::new(0); #[cfg(target_os = "none")] global_asm!(include_str!("start.s")); -static BOOT_INFO: OnceCell = OnceCell::new(); - -pub fn boot_info() -> &'static BootInfo { - BOOT_INFO.get().unwrap() -} - pub fn is_uhyve_with_pci() -> bool { false } pub fn get_ram_address() -> PhysAddr { - PhysAddr(boot_info().hardware_info.phys_addr_range.start) + PhysAddr(env::boot_info().hardware_info.phys_addr_range.start) } pub fn get_base_address() -> VirtAddr { - VirtAddr(boot_info().load_info.kernel_image_addr_range.start) + VirtAddr(env::boot_info().load_info.kernel_image_addr_range.start) } pub fn get_image_size() -> usize { - let range = &boot_info().load_info.kernel_image_addr_range; + let range = &env::boot_info().load_info.kernel_image_addr_range; (range.end - range.start) as usize } pub fn get_limit() -> usize { - boot_info().hardware_info.phys_addr_range.end as usize + env::boot_info().hardware_info.phys_addr_range.end as usize } #[cfg(feature = "smp")] @@ -89,7 +80,7 @@ pub fn message_output_init() { CoreLocal::install(); unsafe { - COM1.port_address = boot_info() + COM1.port_address = env::boot_info() .hardware_info .serial_port_base .map(|uartport| uartport.get()) diff --git a/src/arch/aarch64/kernel/pci.rs b/src/arch/aarch64/kernel/pci.rs index 53bca6f571..e8f2f981e1 100644 --- a/src/arch/aarch64/kernel/pci.rs +++ b/src/arch/aarch64/kernel/pci.rs @@ -13,7 +13,7 @@ use crate::arch::aarch64::kernel::interrupts::GIC; use crate::arch::aarch64::mm::paging::{self, BasePageSize, PageSize, PageTableEntryFlags}; use crate::arch::aarch64::mm::{virtualmem, PhysAddr, VirtAddr}; use crate::drivers::pci::{PciDevice, PCI_DEVICES}; -use crate::kernel::boot_info; +use crate::env; const PCI_MAX_DEVICE_NUMBER: u8 = 32; const PCI_MAX_FUNCTION_NUMBER: u8 = 8; @@ -224,7 +224,7 @@ fn detect_interrupt( pub fn init() { let dtb = unsafe { Dtb::from_raw(core::ptr::with_exposed_provenance( - boot_info().hardware_info.device_tree.unwrap().get() as usize, + env::boot_info().hardware_info.device_tree.unwrap().get() as usize, )) .expect(".dtb file has invalid header") }; diff --git a/src/arch/aarch64/kernel/processor.rs b/src/arch/aarch64/kernel/processor.rs index af7a3ac98a..dad333ba08 100644 --- a/src/arch/aarch64/kernel/processor.rs +++ b/src/arch/aarch64/kernel/processor.rs @@ -5,7 +5,6 @@ use aarch64::regs::{Readable, CNTFRQ_EL0}; use hermit_dtb::Dtb; use hermit_sync::{without_interrupts, Lazy}; -use crate::arch::aarch64::kernel::boot_info; use crate::env; // System counter frequency in Hz @@ -253,7 +252,7 @@ pub fn set_oneshot_timer(wakeup_time: Option) { pub fn print_information() { let dtb = unsafe { Dtb::from_raw(core::ptr::with_exposed_provenance( - boot_info().hardware_info.device_tree.unwrap().get() as usize, + env::boot_info().hardware_info.device_tree.unwrap().get() as usize, )) .expect(".dtb file has invalid header") }; diff --git a/src/arch/aarch64/kernel/scheduler.rs b/src/arch/aarch64/kernel/scheduler.rs index ba1d7db638..64cfb9cadc 100644 --- a/src/arch/aarch64/kernel/scheduler.rs +++ b/src/arch/aarch64/kernel/scheduler.rs @@ -15,7 +15,7 @@ use crate::arch::aarch64::mm::{PhysAddr, VirtAddr}; use crate::scheduler::task::{Task, TaskFrame}; #[cfg(target_os = "none")] use crate::scheduler::PerCoreSchedulerExt; -use crate::{kernel, DEFAULT_STACK_SIZE, KERNEL_STACK_SIZE}; +use crate::{env, DEFAULT_STACK_SIZE, KERNEL_STACK_SIZE}; #[derive(Debug)] #[repr(C, packed)] @@ -266,7 +266,7 @@ pub struct TaskTLS { impl TaskTLS { fn from_environment() -> Option> { - let tls_info = kernel::boot_info().load_info.tls_info?; + let tls_info = env::boot_info().load_info.tls_info?; assert_ne!(tls_info.memsz, 0); // Get TLS initialization image diff --git a/src/arch/aarch64/kernel/start.rs b/src/arch/aarch64/kernel/start.rs index 9d04013bf6..27b2818c8a 100644 --- a/src/arch/aarch64/kernel/start.rs +++ b/src/arch/aarch64/kernel/start.rs @@ -1,11 +1,10 @@ use core::arch::asm; -use hermit_entry::boot_info::{BootInfo, RawBootInfo}; +use hermit_entry::boot_info::RawBootInfo; use hermit_entry::Entry; use crate::arch::aarch64::kernel::scheduler::TaskStacks; -use crate::arch::aarch64::kernel::BOOT_INFO; -use crate::KERNEL_STACK_SIZE; +use crate::{env, KERNEL_STACK_SIZE}; extern "C" { static vector_table: u8; @@ -70,7 +69,7 @@ unsafe extern "C" fn pre_init(boot_info: Option<&'static RawBootInfo>, cpu_id: u } if cpu_id == 0 { - BOOT_INFO.set(BootInfo::from(*boot_info.unwrap())).unwrap(); + env::set_boot_info(*boot_info.unwrap()); crate::boot_processor_main() } else { #[cfg(not(feature = "smp"))] diff --git a/src/arch/aarch64/kernel/systemtime.rs b/src/arch/aarch64/kernel/systemtime.rs index 100b4bba84..a67da38a44 100644 --- a/src/arch/aarch64/kernel/systemtime.rs +++ b/src/arch/aarch64/kernel/systemtime.rs @@ -10,7 +10,7 @@ use time::OffsetDateTime; use crate::arch::aarch64::mm::paging::{self, BasePageSize, PageSize, PageTableEntryFlags}; use crate::arch::aarch64::mm::{virtualmem, PhysAddr, VirtAddr}; -use crate::kernel::boot_info; +use crate::env; static PL031_ADDRESS: OnceCell = OnceCell::new(); static BOOT_TIME: OnceCell = OnceCell::new(); @@ -47,7 +47,7 @@ fn rtc_read(off: usize) -> u32 { pub fn init() { let dtb = unsafe { Dtb::from_raw(core::ptr::with_exposed_provenance( - boot_info().hardware_info.device_tree.unwrap().get() as usize, + env::boot_info().hardware_info.device_tree.unwrap().get() as usize, )) .expect(".dtb file has invalid header") }; diff --git a/src/arch/riscv64/kernel/mod.rs b/src/arch/riscv64/kernel/mod.rs index 0c74a7ec3d..4300e90511 100644 --- a/src/arch/riscv64/kernel/mod.rs +++ b/src/arch/riscv64/kernel/mod.rs @@ -16,8 +16,6 @@ use core::ptr; use core::sync::atomic::{AtomicPtr, AtomicU32, AtomicU64, Ordering}; use fdt::Fdt; -use hermit_entry::boot_info::BootInfo; -use hermit_sync::OnceCell; use riscv::register::sstatus; use crate::arch::riscv64::kernel::core_local::{core_id, CoreLocal}; @@ -32,7 +30,6 @@ use crate::env; pub(crate) static mut HARTS_AVAILABLE: Vec = Vec::new(); /// Kernel header to announce machine features -static BOOT_INFO: OnceCell = OnceCell::new(); static CPU_ONLINE: AtomicU32 = AtomicU32::new(0); static CURRENT_BOOT_ID: AtomicU32 = AtomicU32::new(0); static CURRENT_STACK_ADDRESS: AtomicPtr<()> = AtomicPtr::new(ptr::null_mut()); @@ -41,26 +38,22 @@ static NUM_CPUS: AtomicU32 = AtomicU32::new(0); // FUNCTIONS -pub fn boot_info() -> &'static BootInfo { - BOOT_INFO.get().unwrap() -} - pub fn is_uhyve_with_pci() -> bool { false } pub fn get_ram_address() -> PhysAddr { - PhysAddr(boot_info().hardware_info.phys_addr_range.start) + PhysAddr(env::boot_info().hardware_info.phys_addr_range.start) } pub fn get_image_size() -> usize { - (boot_info().load_info.kernel_image_addr_range.end - - boot_info().load_info.kernel_image_addr_range.start) as usize + (env::boot_info().load_info.kernel_image_addr_range.end + - env::boot_info().load_info.kernel_image_addr_range.start) as usize } pub fn get_limit() -> usize { - (boot_info().hardware_info.phys_addr_range.end - - boot_info().hardware_info.phys_addr_range.start) as usize + (env::boot_info().hardware_info.phys_addr_range.end + - env::boot_info().hardware_info.phys_addr_range.start) as usize } #[cfg(feature = "smp")] @@ -79,7 +72,7 @@ pub fn get_processor_count() -> u32 { } pub fn get_base_address() -> VirtAddr { - VirtAddr(boot_info().load_info.kernel_image_addr_range.start) + VirtAddr(env::boot_info().load_info.kernel_image_addr_range.start) } pub fn args() -> Option<&'static str> { @@ -87,7 +80,7 @@ pub fn args() -> Option<&'static str> { } pub fn get_dtb_ptr() -> *const u8 { - boot_info().hardware_info.device_tree.unwrap().get() as _ + env::boot_info().hardware_info.device_tree.unwrap().get() as _ } pub fn get_hart_mask() -> u64 { diff --git a/src/arch/riscv64/kernel/scheduler.rs b/src/arch/riscv64/kernel/scheduler.rs index b820f4a031..c1b23af0b0 100644 --- a/src/arch/riscv64/kernel/scheduler.rs +++ b/src/arch/riscv64/kernel/scheduler.rs @@ -5,13 +5,12 @@ use core::{mem, ptr}; use align_address::Align; -use crate::arch::riscv64::kernel::boot_info; use crate::arch::riscv64::kernel::core_local::core_scheduler; use crate::arch::riscv64::kernel::processor::set_oneshot_timer; use crate::arch::riscv64::mm::paging::{BasePageSize, PageSize, PageTableEntryFlags}; use crate::arch::riscv64::mm::{PhysAddr, VirtAddr}; use crate::scheduler::task::{Task, TaskFrame}; -use crate::{DEFAULT_STACK_SIZE, KERNEL_STACK_SIZE}; +use crate::{env, DEFAULT_STACK_SIZE, KERNEL_STACK_SIZE}; #[repr(C, packed)] #[derive(Clone, Copy, Debug)] @@ -272,7 +271,7 @@ pub struct TaskTLS { impl TaskTLS { pub fn from_environment() -> Option> { - let tls_info = boot_info().load_info.tls_info?; + let tls_info = env::boot_info().load_info.tls_info?; assert_ne!(tls_info.memsz, 0); let tls_size = tls_info.memsz as usize; diff --git a/src/arch/riscv64/kernel/start.rs b/src/arch/riscv64/kernel/start.rs index a14c540447..6e584265cd 100644 --- a/src/arch/riscv64/kernel/start.rs +++ b/src/arch/riscv64/kernel/start.rs @@ -8,8 +8,8 @@ use hermit_entry::Entry; use super::{get_dtb_ptr, CPU_ONLINE, CURRENT_BOOT_ID, HART_MASK, NUM_CPUS}; #[cfg(not(feature = "smp"))] use crate::arch::riscv64::kernel::processor; -use crate::arch::riscv64::kernel::{BootInfo, BOOT_INFO, CURRENT_STACK_ADDRESS}; -use crate::KERNEL_STACK_SIZE; +use crate::arch::riscv64::kernel::CURRENT_STACK_ADDRESS; +use crate::{env, KERNEL_STACK_SIZE}; //static mut BOOT_STACK: [u8; KERNEL_STACK_SIZE] = [0; KERNEL_STACK_SIZE]; @@ -54,7 +54,7 @@ unsafe extern "C" fn pre_init(hart_id: usize, boot_info: Option<&'static RawBoot if CPU_ONLINE.load(Ordering::Acquire) == 0 { unsafe { - BOOT_INFO.set(BootInfo::from(*boot_info.unwrap())).unwrap(); + env::set_boot_info(*boot_info.unwrap()); let fdt = Fdt::from_ptr(get_dtb_ptr()).expect("FDT is invalid"); // Init HART_MASK let mut hart_mask = 0; diff --git a/src/arch/x86_64/kernel/mod.rs b/src/arch/x86_64/kernel/mod.rs index d018149923..5926e6d977 100644 --- a/src/arch/x86_64/kernel/mod.rs +++ b/src/arch/x86_64/kernel/mod.rs @@ -5,8 +5,8 @@ use core::ptr; use core::sync::atomic::{AtomicPtr, AtomicU32, Ordering}; use fdt::Fdt; -use hermit_entry::boot_info::{BootInfo, PlatformInfo, RawBootInfo}; -use hermit_sync::{InterruptSpinMutex, OnceCell}; +use hermit_entry::boot_info::{PlatformInfo, RawBootInfo}; +use hermit_sync::InterruptSpinMutex; use x86::controlregs::{cr0, cr0_write, cr4, Cr0}; use self::serial::SerialPort; @@ -38,34 +38,28 @@ pub(crate) mod systemtime; #[cfg(feature = "vga")] mod vga; -static BOOT_INFO: OnceCell = OnceCell::new(); - -pub fn boot_info() -> &'static BootInfo { - BOOT_INFO.get().unwrap() -} - /// Serial port to print kernel messages pub(crate) static COM1: InterruptSpinMutex> = InterruptSpinMutex::new(None); pub fn get_ram_address() -> PhysAddr { - PhysAddr(boot_info().hardware_info.phys_addr_range.start) + PhysAddr(env::boot_info().hardware_info.phys_addr_range.start) } pub fn get_base_address() -> VirtAddr { - VirtAddr(boot_info().load_info.kernel_image_addr_range.start) + VirtAddr(env::boot_info().load_info.kernel_image_addr_range.start) } pub fn get_image_size() -> usize { - let range = &boot_info().load_info.kernel_image_addr_range; + let range = &env::boot_info().load_info.kernel_image_addr_range; (range.end - range.start) as usize } pub fn get_limit() -> usize { - boot_info().hardware_info.phys_addr_range.end as usize + env::boot_info().hardware_info.phys_addr_range.end as usize } pub fn get_mbinfo() -> Option { - match boot_info().platform_info { + match env::boot_info().platform_info { PlatformInfo::Multiboot { multiboot_info_addr, .. @@ -75,7 +69,7 @@ pub fn get_mbinfo() -> Option { } pub fn get_fdt() -> Option> { - boot_info().hardware_info.device_tree.map(|fdt| { + env::boot_info().hardware_info.device_tree.map(|fdt| { let ptr = ptr::with_exposed_provenance(fdt.get().try_into().unwrap()); unsafe { Fdt::from_ptr(ptr).unwrap() } }) @@ -85,7 +79,7 @@ pub fn get_fdt() -> Option> { pub fn get_possible_cpus() -> u32 { use core::cmp; - match boot_info().platform_info { + match env::boot_info().platform_info { // FIXME: Remove get_processor_count after a transition period for uhyve 0.1.3 adoption PlatformInfo::Uhyve { num_cpus, .. } => cmp::max( u32::try_from(num_cpus.get()).unwrap(), @@ -107,13 +101,13 @@ pub fn get_processor_count() -> u32 { pub fn is_uhyve_with_pci() -> bool { matches!( - boot_info().platform_info, + env::boot_info().platform_info, PlatformInfo::Uhyve { has_pci: true, .. } ) } pub fn args() -> Option<&'static str> { - match boot_info().platform_info { + match env::boot_info().platform_info { PlatformInfo::Multiboot { command_line, .. } => command_line, PlatformInfo::LinuxBootParams { command_line, .. } => command_line, _ => None, @@ -126,7 +120,11 @@ pub fn args() -> Option<&'static str> { pub fn message_output_init() { CoreLocal::install(); - let base = boot_info().hardware_info.serial_port_base.unwrap().get(); + let base = env::boot_info() + .hardware_info + .serial_port_base + .unwrap() + .get(); let serial_port = unsafe { SerialPort::new(base) }; *COM1.lock() = Some(serial_port); } @@ -256,7 +254,7 @@ unsafe extern "C" fn pre_init(boot_info: Option<&'static RawBootInfo>, cpu_id: u } if cpu_id == 0 { - BOOT_INFO.set(BootInfo::from(*boot_info.unwrap())).unwrap(); + env::set_boot_info(*boot_info.unwrap()); crate::boot_processor_main() } else { diff --git a/src/arch/x86_64/kernel/processor.rs b/src/arch/x86_64/kernel/processor.rs index 4f640dbb53..32f2bbb3c9 100644 --- a/src/arch/x86_64/kernel/processor.rs +++ b/src/arch/x86_64/kernel/processor.rs @@ -23,7 +23,7 @@ use x86_64::VirtAddr; #[cfg(feature = "acpi")] use crate::arch::x86_64::kernel::acpi; -use crate::arch::x86_64::kernel::{boot_info, interrupts, pic, pit}; +use crate::arch::x86_64::kernel::{interrupts, pic, pit}; use crate::env; const IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP: u64 = 1 << 16; @@ -374,7 +374,7 @@ impl CpuFrequency { fn detect_from_hypervisor(&mut self) -> Result<(), ()> { fn detect_from_uhyve() -> Result { - match boot_info().platform_info { + match env::boot_info().platform_info { PlatformInfo::Uhyve { cpu_freq, .. } => Ok(u16::try_from( cpu_freq.map(NonZeroU32::get).unwrap_or_default() / 1000, ) diff --git a/src/arch/x86_64/kernel/scheduler.rs b/src/arch/x86_64/kernel/scheduler.rs index 982034cc14..c892e2aec7 100644 --- a/src/arch/x86_64/kernel/scheduler.rs +++ b/src/arch/x86_64/kernel/scheduler.rs @@ -19,8 +19,7 @@ use crate::arch::x86_64::mm::paging::{ }; use crate::arch::x86_64::mm::{PhysAddr, VirtAddr}; use crate::config::*; -#[cfg(not(feature = "common-os"))] -use crate::kernel; +use crate::env; use crate::scheduler::task::{Task, TaskFrame}; use crate::scheduler::PerCoreSchedulerExt; @@ -252,7 +251,7 @@ impl TaskTLS { // “ELF Handling For Thread-Local Storage” Section 3.4.6: x86-64 Specific Definitions for Run-Time Handling of TLS // https://akkadia.org/drepper/tls.pdf fn from_environment() -> Option> { - let tls_info = kernel::boot_info().load_info.tls_info?; + let tls_info = env::boot_info().load_info.tls_info?; assert_ne!(tls_info.memsz, 0); // Get TLS initialization image diff --git a/src/arch/x86_64/kernel/systemtime.rs b/src/arch/x86_64/kernel/systemtime.rs index 5969b44871..ab8df53e1a 100644 --- a/src/arch/x86_64/kernel/systemtime.rs +++ b/src/arch/x86_64/kernel/systemtime.rs @@ -5,7 +5,8 @@ use hermit_sync::{without_interrupts, OnceCell}; use time::OffsetDateTime; use x86::io::*; -use crate::arch::x86_64::kernel::{boot_info, processor}; +use crate::arch::x86_64::kernel::processor; +use crate::env; const CMOS_COMMAND_PORT: u16 = 0x70; const CMOS_DATA_PORT: u16 = 0x71; @@ -173,7 +174,7 @@ impl Rtc { static BOOT_TIME: OnceCell = OnceCell::new(); pub fn init() { - let boot_time = match boot_info().platform_info { + let boot_time = match env::boot_info().platform_info { PlatformInfo::Uhyve { boot_time, .. } => boot_time, _ => { // Get the current time in microseconds since the epoch (1970-01-01) from the x86 RTC. diff --git a/src/env.rs b/src/env.rs index 8251a94408..13fba8d62f 100644 --- a/src/env.rs +++ b/src/env.rs @@ -8,11 +8,21 @@ use ahash::RandomState; use fdt::Fdt; use hashbrown::hash_map::Iter; use hashbrown::HashMap; -use hermit_entry::boot_info::PlatformInfo; +use hermit_entry::boot_info::{BootInfo, PlatformInfo, RawBootInfo}; use hermit_sync::OnceCell; pub(crate) use crate::arch::kernel::{self, get_base_address, get_image_size, get_ram_address}; -use crate::kernel::boot_info; + +static BOOT_INFO: OnceCell = OnceCell::new(); + +pub fn boot_info() -> &'static BootInfo { + BOOT_INFO.get().unwrap() +} + +pub fn set_boot_info(raw_boot_info: RawBootInfo) { + let boot_info = BootInfo::from(raw_boot_info); + BOOT_INFO.set(boot_info).unwrap() +} static CLI: OnceCell = OnceCell::new(); @@ -38,7 +48,7 @@ pub fn is_uhyve() -> bool { } pub fn fdt() -> Option> { - kernel::boot_info().hardware_info.device_tree.map(|fdt| { + boot_info().hardware_info.device_tree.map(|fdt| { let ptr = ptr::with_exposed_provenance(fdt.get().try_into().unwrap()); unsafe { Fdt::from_ptr(ptr).unwrap() } }) diff --git a/src/lib.rs b/src/lib.rs index aaa349c898..72a258f91d 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -205,7 +205,7 @@ fn boot_processor_main() -> ! { } let bss_ptr = core::ptr::addr_of_mut!(__bss_start); info!("BSS starts at {bss_ptr:p}"); - info!("tls_info = {:#x?}", kernel::boot_info().load_info.tls_info); + info!("tls_info = {:#x?}", env::boot_info().load_info.tls_info); arch::boot_processor_init(); #[cfg(not(target_arch = "riscv64"))]