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The current deduplication algorithm is too greedy, at least with respect to fieldsets. The equivalence check currently ignores field names and descriptions, leading to arguably incorrect results.
E.g. looking at the imxrt1061 CCM (which is its own module) many fieldsets are taken from the imxrt1015 definition. The result is that multiple existing clock gates are documented as "Reserved".
The concrete case I stumbled over was that on imxrt106x FLEXIO2_CLK_PRED
and FLEXIO2_CLK_PODF
don't exist. Instead these fields are called FLEXIO1_CLK_PRED
/FLEXIO1_CLK_PODF
. I.e. these fields names exist twice on two different registers. This is incorrect on imxrt106x, even though it is correct in the SVD.
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