From b28f39692d0c29496fba95f3432a7447ff5e104b Mon Sep 17 00:00:00 2001 From: Benjamin Maxwell Date: Tue, 13 Aug 2024 16:33:21 +0000 Subject: [PATCH] Add test Signed-off-by: Benjamin Maxwell --- .../Codegen/LLVMCPU/test/vector_lowering.mlir | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/compiler/src/iree/compiler/Codegen/LLVMCPU/test/vector_lowering.mlir b/compiler/src/iree/compiler/Codegen/LLVMCPU/test/vector_lowering.mlir index 6f2d6fbd07fb9..71adee33b8901 100644 --- a/compiler/src/iree/compiler/Codegen/LLVMCPU/test/vector_lowering.mlir +++ b/compiler/src/iree/compiler/Codegen/LLVMCPU/test/vector_lowering.mlir @@ -212,3 +212,19 @@ func.func @gather_strided_memref() { // CHECK-LABEL: func.func @gather_strided_memref // CHECK-NOT: memref.subview {{.*}} : memref<2592000xf32, strided<[3]> // CHECK-NOT: vector.gather %subview[%c0] [%7], %cst_0, %cst : memref<2592000xf32, strided<[3]> + +// ----- + +func.func @scalable_transpose_store(%vec: vector<4x[4]xf32>, %dest: memref, %i: index, %j: index) { + %transpose = vector.transpose %vec, [1, 0] : vector<4x[4]xf32> to vector<[4]x4xf32> + vector.transfer_write %transpose, %dest[%i, %j] {in_bounds = [true, true]} : vector<[4]x4xf32>, memref + return +} + +/// Note: The lowering for this is implemented/tested upstream (this just checks +/// it is enabled in IREE). + +// CHECK-LABEL: func.func @scalable_transpose_store +// CHECK-NOT: vector.transpose +// CHECK: vector.store {{.*}} : memref, vector<4xf32> +// CHECK-NOT: vector.transpose